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1da177e4
LT
1/*
2 * linux/arch/x86-64/kernel/process.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 *
6 * Pentium III FXSR, SSE support
7 * Gareth Hughes <gareth@valinux.com>, May 2000
8 *
9 * X86-64 port
10 * Andi Kleen.
76e4f660
AR
11 *
12 * CPU hotplug support - ashok.raj@intel.com
1da177e4
LT
13 * $Id: process.c,v 1.38 2002/01/15 10:08:03 ak Exp $
14 */
15
16/*
17 * This file handles the architecture-dependent parts of process handling..
18 */
19
20#include <stdarg.h>
21
76e4f660 22#include <linux/cpu.h>
1da177e4
LT
23#include <linux/errno.h>
24#include <linux/sched.h>
25#include <linux/kernel.h>
26#include <linux/mm.h>
27#include <linux/elfcore.h>
28#include <linux/smp.h>
29#include <linux/slab.h>
30#include <linux/user.h>
31#include <linux/module.h>
32#include <linux/a.out.h>
33#include <linux/interrupt.h>
34#include <linux/delay.h>
1da177e4
LT
35#include <linux/ptrace.h>
36#include <linux/utsname.h>
37#include <linux/random.h>
73649dab 38#include <linux/kprobes.h>
1da177e4
LT
39
40#include <asm/uaccess.h>
41#include <asm/pgtable.h>
42#include <asm/system.h>
43#include <asm/io.h>
44#include <asm/processor.h>
45#include <asm/i387.h>
46#include <asm/mmu_context.h>
47#include <asm/pda.h>
48#include <asm/prctl.h>
49#include <asm/kdebug.h>
50#include <asm/desc.h>
51#include <asm/proto.h>
52#include <asm/ia32.h>
53
54asmlinkage extern void ret_from_fork(void);
55
56unsigned long kernel_thread_flags = CLONE_VM | CLONE_UNTRACED;
57
58static atomic_t hlt_counter = ATOMIC_INIT(0);
59
60unsigned long boot_option_idle_override = 0;
61EXPORT_SYMBOL(boot_option_idle_override);
62
63/*
64 * Powermanagement idle function, if any..
65 */
66void (*pm_idle)(void);
67static DEFINE_PER_CPU(unsigned int, cpu_idle_state);
68
69void disable_hlt(void)
70{
71 atomic_inc(&hlt_counter);
72}
73
74EXPORT_SYMBOL(disable_hlt);
75
76void enable_hlt(void)
77{
78 atomic_dec(&hlt_counter);
79}
80
81EXPORT_SYMBOL(enable_hlt);
82
83/*
84 * We use this if we don't have any better
85 * idle routine..
86 */
87void default_idle(void)
88{
89 if (!atomic_read(&hlt_counter)) {
90 local_irq_disable();
91 if (!need_resched())
92 safe_halt();
93 else
94 local_irq_enable();
95 }
96}
97
98/*
99 * On SMP it's slightly faster (but much more power-consuming!)
100 * to poll the ->need_resched flag instead of waiting for the
101 * cross-CPU IPI to arrive. Use this option with caution.
102 */
103static void poll_idle (void)
104{
105 int oldval;
106
107 local_irq_enable();
108
109 /*
110 * Deal with another CPU just having chosen a thread to
111 * run here:
112 */
113 oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED);
114
115 if (!oldval) {
116 set_thread_flag(TIF_POLLING_NRFLAG);
117 asm volatile(
118 "2:"
119 "testl %0,%1;"
120 "rep; nop;"
121 "je 2b;"
122 : :
123 "i" (_TIF_NEED_RESCHED),
124 "m" (current_thread_info()->flags));
b8f68e9f 125 clear_thread_flag(TIF_POLLING_NRFLAG);
1da177e4
LT
126 } else {
127 set_need_resched();
128 }
129}
130
131void cpu_idle_wait(void)
132{
133 unsigned int cpu, this_cpu = get_cpu();
134 cpumask_t map;
135
136 set_cpus_allowed(current, cpumask_of_cpu(this_cpu));
137 put_cpu();
138
139 cpus_clear(map);
140 for_each_online_cpu(cpu) {
141 per_cpu(cpu_idle_state, cpu) = 1;
142 cpu_set(cpu, map);
143 }
144
145 __get_cpu_var(cpu_idle_state) = 0;
146
147 wmb();
148 do {
149 ssleep(1);
150 for_each_online_cpu(cpu) {
151 if (cpu_isset(cpu, map) && !per_cpu(cpu_idle_state, cpu))
152 cpu_clear(cpu, map);
153 }
154 cpus_and(map, map, cpu_online_map);
155 } while (!cpus_empty(map));
156}
157EXPORT_SYMBOL_GPL(cpu_idle_wait);
158
76e4f660
AR
159#ifdef CONFIG_HOTPLUG_CPU
160DECLARE_PER_CPU(int, cpu_state);
161
162#include <asm/nmi.h>
163/* We don't actually take CPU down, just spin without interrupts. */
164static inline void play_dead(void)
165{
166 idle_task_exit();
167 wbinvd();
168 mb();
169 /* Ack it */
170 __get_cpu_var(cpu_state) = CPU_DEAD;
171
172 while (1)
173 safe_halt();
174}
175#else
176static inline void play_dead(void)
177{
178 BUG();
179}
180#endif /* CONFIG_HOTPLUG_CPU */
181
1da177e4
LT
182/*
183 * The idle thread. There's no useful work to be
184 * done, so just try to conserve power and have a
185 * low exit latency (ie sit in a loop waiting for
186 * somebody to say that they'd like to reschedule)
187 */
188void cpu_idle (void)
189{
190 /* endless idle loop with no priority at all */
191 while (1) {
192 while (!need_resched()) {
193 void (*idle)(void);
194
195 if (__get_cpu_var(cpu_idle_state))
196 __get_cpu_var(cpu_idle_state) = 0;
197
198 rmb();
199 idle = pm_idle;
200 if (!idle)
201 idle = default_idle;
76e4f660
AR
202 if (cpu_is_offline(smp_processor_id()))
203 play_dead();
1da177e4
LT
204 idle();
205 }
206
207 schedule();
208 }
209}
210
211/*
212 * This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
213 * which can obviate IPI to trigger checking of need_resched.
214 * We execute MONITOR against need_resched and enter optimized wait state
215 * through MWAIT. Whenever someone changes need_resched, we would be woken
216 * up from MWAIT (without an IPI).
217 */
218static void mwait_idle(void)
219{
220 local_irq_enable();
221
222 if (!need_resched()) {
223 set_thread_flag(TIF_POLLING_NRFLAG);
224 do {
225 __monitor((void *)&current_thread_info()->flags, 0, 0);
226 if (need_resched())
227 break;
228 __mwait(0, 0);
229 } while (!need_resched());
230 clear_thread_flag(TIF_POLLING_NRFLAG);
231 }
232}
233
e6982c67 234void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
1da177e4
LT
235{
236 static int printed;
237 if (cpu_has(c, X86_FEATURE_MWAIT)) {
238 /*
239 * Skip, if setup has overridden idle.
240 * One CPU supports mwait => All CPUs supports mwait
241 */
242 if (!pm_idle) {
243 if (!printed) {
244 printk("using mwait in idle threads.\n");
245 printed = 1;
246 }
247 pm_idle = mwait_idle;
248 }
249 }
250}
251
252static int __init idle_setup (char *str)
253{
254 if (!strncmp(str, "poll", 4)) {
255 printk("using polling idle threads.\n");
256 pm_idle = poll_idle;
257 }
258
259 boot_option_idle_override = 1;
260 return 1;
261}
262
263__setup("idle=", idle_setup);
264
265/* Prints also some state that isn't saved in the pt_regs */
266void __show_regs(struct pt_regs * regs)
267{
268 unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L, fs, gs, shadowgs;
269 unsigned int fsindex,gsindex;
270 unsigned int ds,cs,es;
271
272 printk("\n");
273 print_modules();
9acf23c4
AK
274 printk("Pid: %d, comm: %.20s %s %s %.*s\n",
275 current->pid, current->comm, print_tainted(),
276 system_utsname.release,
277 (int)strcspn(system_utsname.version, " "),
278 system_utsname.version);
1da177e4
LT
279 printk("RIP: %04lx:[<%016lx>] ", regs->cs & 0xffff, regs->rip);
280 printk_address(regs->rip);
281 printk("\nRSP: %04lx:%016lx EFLAGS: %08lx\n", regs->ss, regs->rsp, regs->eflags);
282 printk("RAX: %016lx RBX: %016lx RCX: %016lx\n",
283 regs->rax, regs->rbx, regs->rcx);
284 printk("RDX: %016lx RSI: %016lx RDI: %016lx\n",
285 regs->rdx, regs->rsi, regs->rdi);
286 printk("RBP: %016lx R08: %016lx R09: %016lx\n",
287 regs->rbp, regs->r8, regs->r9);
288 printk("R10: %016lx R11: %016lx R12: %016lx\n",
289 regs->r10, regs->r11, regs->r12);
290 printk("R13: %016lx R14: %016lx R15: %016lx\n",
291 regs->r13, regs->r14, regs->r15);
292
293 asm("movl %%ds,%0" : "=r" (ds));
294 asm("movl %%cs,%0" : "=r" (cs));
295 asm("movl %%es,%0" : "=r" (es));
296 asm("movl %%fs,%0" : "=r" (fsindex));
297 asm("movl %%gs,%0" : "=r" (gsindex));
298
299 rdmsrl(MSR_FS_BASE, fs);
300 rdmsrl(MSR_GS_BASE, gs);
301 rdmsrl(MSR_KERNEL_GS_BASE, shadowgs);
302
303 asm("movq %%cr0, %0": "=r" (cr0));
304 asm("movq %%cr2, %0": "=r" (cr2));
305 asm("movq %%cr3, %0": "=r" (cr3));
306 asm("movq %%cr4, %0": "=r" (cr4));
307
308 printk("FS: %016lx(%04x) GS:%016lx(%04x) knlGS:%016lx\n",
309 fs,fsindex,gs,gsindex,shadowgs);
310 printk("CS: %04x DS: %04x ES: %04x CR0: %016lx\n", cs, ds, es, cr0);
311 printk("CR2: %016lx CR3: %016lx CR4: %016lx\n", cr2, cr3, cr4);
312}
313
314void show_regs(struct pt_regs *regs)
315{
c078d326 316 printk("CPU %d:", smp_processor_id());
1da177e4
LT
317 __show_regs(regs);
318 show_trace(&regs->rsp);
319}
320
321/*
322 * Free current thread data structures etc..
323 */
324void exit_thread(void)
325{
326 struct task_struct *me = current;
327 struct thread_struct *t = &me->thread;
73649dab
RL
328
329 /*
330 * Remove function-return probe instances associated with this task
331 * and put them back on the free list. Do not insert an exit probe for
332 * this function, it will be disabled by kprobe_flush_task if you do.
333 */
334 kprobe_flush_task(me);
335
1da177e4
LT
336 if (me->thread.io_bitmap_ptr) {
337 struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
338
339 kfree(t->io_bitmap_ptr);
340 t->io_bitmap_ptr = NULL;
341 /*
342 * Careful, clear this in the TSS too:
343 */
344 memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
345 t->io_bitmap_max = 0;
346 put_cpu();
347 }
348}
349
350void flush_thread(void)
351{
352 struct task_struct *tsk = current;
353 struct thread_info *t = current_thread_info();
354
73649dab
RL
355 /*
356 * Remove function-return probe instances associated with this task
357 * and put them back on the free list. Do not insert an exit probe for
358 * this function, it will be disabled by kprobe_flush_task if you do.
359 */
360 kprobe_flush_task(tsk);
361
1da177e4
LT
362 if (t->flags & _TIF_ABI_PENDING)
363 t->flags ^= (_TIF_ABI_PENDING | _TIF_IA32);
364
365 tsk->thread.debugreg0 = 0;
366 tsk->thread.debugreg1 = 0;
367 tsk->thread.debugreg2 = 0;
368 tsk->thread.debugreg3 = 0;
369 tsk->thread.debugreg6 = 0;
370 tsk->thread.debugreg7 = 0;
371 memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
372 /*
373 * Forget coprocessor state..
374 */
375 clear_fpu(tsk);
376 clear_used_math();
377}
378
379void release_thread(struct task_struct *dead_task)
380{
381 if (dead_task->mm) {
382 if (dead_task->mm->context.size) {
383 printk("WARNING: dead process %8s still has LDT? <%p/%d>\n",
384 dead_task->comm,
385 dead_task->mm->context.ldt,
386 dead_task->mm->context.size);
387 BUG();
388 }
389 }
390}
391
392static inline void set_32bit_tls(struct task_struct *t, int tls, u32 addr)
393{
394 struct user_desc ud = {
395 .base_addr = addr,
396 .limit = 0xfffff,
397 .seg_32bit = 1,
398 .limit_in_pages = 1,
399 .useable = 1,
400 };
401 struct n_desc_struct *desc = (void *)t->thread.tls_array;
402 desc += tls;
403 desc->a = LDT_entry_a(&ud);
404 desc->b = LDT_entry_b(&ud);
405}
406
407static inline u32 read_32bit_tls(struct task_struct *t, int tls)
408{
409 struct desc_struct *desc = (void *)t->thread.tls_array;
410 desc += tls;
411 return desc->base0 |
412 (((u32)desc->base1) << 16) |
413 (((u32)desc->base2) << 24);
414}
415
416/*
417 * This gets called before we allocate a new thread and copy
418 * the current task into it.
419 */
420void prepare_to_copy(struct task_struct *tsk)
421{
422 unlazy_fpu(tsk);
423}
424
425int copy_thread(int nr, unsigned long clone_flags, unsigned long rsp,
426 unsigned long unused,
427 struct task_struct * p, struct pt_regs * regs)
428{
429 int err;
430 struct pt_regs * childregs;
431 struct task_struct *me = current;
432
433 childregs = ((struct pt_regs *) (THREAD_SIZE + (unsigned long) p->thread_info)) - 1;
434
435 *childregs = *regs;
436
437 childregs->rax = 0;
438 childregs->rsp = rsp;
439 if (rsp == ~0UL) {
440 childregs->rsp = (unsigned long)childregs;
441 }
442
443 p->thread.rsp = (unsigned long) childregs;
444 p->thread.rsp0 = (unsigned long) (childregs+1);
445 p->thread.userrsp = me->thread.userrsp;
446
447 set_ti_thread_flag(p->thread_info, TIF_FORK);
448
449 p->thread.fs = me->thread.fs;
450 p->thread.gs = me->thread.gs;
451
fd51f666
L
452 asm("mov %%gs,%0" : "=m" (p->thread.gsindex));
453 asm("mov %%fs,%0" : "=m" (p->thread.fsindex));
454 asm("mov %%es,%0" : "=m" (p->thread.es));
455 asm("mov %%ds,%0" : "=m" (p->thread.ds));
1da177e4
LT
456
457 if (unlikely(me->thread.io_bitmap_ptr != NULL)) {
458 p->thread.io_bitmap_ptr = kmalloc(IO_BITMAP_BYTES, GFP_KERNEL);
459 if (!p->thread.io_bitmap_ptr) {
460 p->thread.io_bitmap_max = 0;
461 return -ENOMEM;
462 }
463 memcpy(p->thread.io_bitmap_ptr, me->thread.io_bitmap_ptr, IO_BITMAP_BYTES);
464 }
465
466 /*
467 * Set a new TLS for the child thread?
468 */
469 if (clone_flags & CLONE_SETTLS) {
470#ifdef CONFIG_IA32_EMULATION
471 if (test_thread_flag(TIF_IA32))
472 err = ia32_child_tls(p, childregs);
473 else
474#endif
475 err = do_arch_prctl(p, ARCH_SET_FS, childregs->r8);
476 if (err)
477 goto out;
478 }
479 err = 0;
480out:
481 if (err && p->thread.io_bitmap_ptr) {
482 kfree(p->thread.io_bitmap_ptr);
483 p->thread.io_bitmap_max = 0;
484 }
485 return err;
486}
487
488/*
489 * This special macro can be used to load a debugging register
490 */
491#define loaddebug(thread,r) set_debug(thread->debugreg ## r, r)
492
493/*
494 * switch_to(x,y) should switch tasks from x to y.
495 *
496 * This could still be optimized:
497 * - fold all the options into a flag word and test it with a single test.
498 * - could test fs/gs bitsliced
499 */
500struct task_struct *__switch_to(struct task_struct *prev_p, struct task_struct *next_p)
501{
502 struct thread_struct *prev = &prev_p->thread,
503 *next = &next_p->thread;
504 int cpu = smp_processor_id();
505 struct tss_struct *tss = &per_cpu(init_tss, cpu);
506
507 unlazy_fpu(prev_p);
508
509 /*
510 * Reload esp0, LDT and the page table pointer:
511 */
512 tss->rsp0 = next->rsp0;
513
514 /*
515 * Switch DS and ES.
516 * This won't pick up thread selector changes, but I guess that is ok.
517 */
fd51f666 518 asm volatile("mov %%es,%0" : "=m" (prev->es));
1da177e4
LT
519 if (unlikely(next->es | prev->es))
520 loadsegment(es, next->es);
521
fd51f666 522 asm volatile ("mov %%ds,%0" : "=m" (prev->ds));
1da177e4
LT
523 if (unlikely(next->ds | prev->ds))
524 loadsegment(ds, next->ds);
525
526 load_TLS(next, cpu);
527
528 /*
529 * Switch FS and GS.
530 */
531 {
532 unsigned fsindex;
533 asm volatile("movl %%fs,%0" : "=r" (fsindex));
534 /* segment register != 0 always requires a reload.
535 also reload when it has changed.
536 when prev process used 64bit base always reload
537 to avoid an information leak. */
538 if (unlikely(fsindex | next->fsindex | prev->fs)) {
539 loadsegment(fs, next->fsindex);
540 /* check if the user used a selector != 0
541 * if yes clear 64bit base, since overloaded base
542 * is always mapped to the Null selector
543 */
544 if (fsindex)
545 prev->fs = 0;
546 }
547 /* when next process has a 64bit base use it */
548 if (next->fs)
549 wrmsrl(MSR_FS_BASE, next->fs);
550 prev->fsindex = fsindex;
551 }
552 {
553 unsigned gsindex;
554 asm volatile("movl %%gs,%0" : "=r" (gsindex));
555 if (unlikely(gsindex | next->gsindex | prev->gs)) {
556 load_gs_index(next->gsindex);
557 if (gsindex)
558 prev->gs = 0;
559 }
560 if (next->gs)
561 wrmsrl(MSR_KERNEL_GS_BASE, next->gs);
562 prev->gsindex = gsindex;
563 }
564
565 /*
566 * Switch the PDA context.
567 */
568 prev->userrsp = read_pda(oldrsp);
569 write_pda(oldrsp, next->userrsp);
570 write_pda(pcurrent, next_p);
571 write_pda(kernelstack, (unsigned long)next_p->thread_info + THREAD_SIZE - PDA_STACKOFFSET);
572
573 /*
574 * Now maybe reload the debug registers
575 */
576 if (unlikely(next->debugreg7)) {
577 loaddebug(next, 0);
578 loaddebug(next, 1);
579 loaddebug(next, 2);
580 loaddebug(next, 3);
581 /* no 4 and 5 */
582 loaddebug(next, 6);
583 loaddebug(next, 7);
584 }
585
586
587 /*
588 * Handle the IO bitmap
589 */
590 if (unlikely(prev->io_bitmap_ptr || next->io_bitmap_ptr)) {
591 if (next->io_bitmap_ptr)
592 /*
593 * Copy the relevant range of the IO bitmap.
594 * Normally this is 128 bytes or less:
595 */
596 memcpy(tss->io_bitmap, next->io_bitmap_ptr,
597 max(prev->io_bitmap_max, next->io_bitmap_max));
598 else {
599 /*
600 * Clear any possible leftover bits:
601 */
602 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
603 }
604 }
605
606 return prev_p;
607}
608
609/*
610 * sys_execve() executes a new program.
611 */
612asmlinkage
613long sys_execve(char __user *name, char __user * __user *argv,
614 char __user * __user *envp, struct pt_regs regs)
615{
616 long error;
617 char * filename;
618
619 filename = getname(name);
620 error = PTR_ERR(filename);
621 if (IS_ERR(filename))
622 return error;
623 error = do_execve(filename, argv, envp, &regs);
624 if (error == 0) {
625 task_lock(current);
626 current->ptrace &= ~PT_DTRACE;
627 task_unlock(current);
628 }
629 putname(filename);
630 return error;
631}
632
633void set_personality_64bit(void)
634{
635 /* inherit personality from parent */
636
637 /* Make sure to be in 64bit mode */
638 clear_thread_flag(TIF_IA32);
639
640 /* TBD: overwrites user setup. Should have two bits.
641 But 64bit processes have always behaved this way,
642 so it's not too bad. The main problem is just that
643 32bit childs are affected again. */
644 current->personality &= ~READ_IMPLIES_EXEC;
645}
646
647asmlinkage long sys_fork(struct pt_regs *regs)
648{
649 return do_fork(SIGCHLD, regs->rsp, regs, 0, NULL, NULL);
650}
651
652asmlinkage long sys_clone(unsigned long clone_flags, unsigned long newsp, void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
653{
654 if (!newsp)
655 newsp = regs->rsp;
656 return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
657}
658
659/*
660 * This is trivial, and on the face of it looks like it
661 * could equally well be done in user mode.
662 *
663 * Not so, for quite unobvious reasons - register pressure.
664 * In user mode vfork() cannot have a stack frame, and if
665 * done by calling the "clone()" system call directly, you
666 * do not have enough call-clobbered registers to hold all
667 * the information you need.
668 */
669asmlinkage long sys_vfork(struct pt_regs *regs)
670{
671 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->rsp, regs, 0,
672 NULL, NULL);
673}
674
675unsigned long get_wchan(struct task_struct *p)
676{
677 unsigned long stack;
678 u64 fp,rip;
679 int count = 0;
680
681 if (!p || p == current || p->state==TASK_RUNNING)
682 return 0;
683 stack = (unsigned long)p->thread_info;
684 if (p->thread.rsp < stack || p->thread.rsp > stack+THREAD_SIZE)
685 return 0;
686 fp = *(u64 *)(p->thread.rsp);
687 do {
688 if (fp < (unsigned long)stack || fp > (unsigned long)stack+THREAD_SIZE)
689 return 0;
690 rip = *(u64 *)(fp+8);
691 if (!in_sched_functions(rip))
692 return rip;
693 fp = *(u64 *)fp;
694 } while (count++ < 16);
695 return 0;
696}
697
698long do_arch_prctl(struct task_struct *task, int code, unsigned long addr)
699{
700 int ret = 0;
701 int doit = task == current;
702 int cpu;
703
704 switch (code) {
705 case ARCH_SET_GS:
84929801 706 if (addr >= TASK_SIZE_OF(task))
1da177e4
LT
707 return -EPERM;
708 cpu = get_cpu();
709 /* handle small bases via the GDT because that's faster to
710 switch. */
711 if (addr <= 0xffffffff) {
712 set_32bit_tls(task, GS_TLS, addr);
713 if (doit) {
714 load_TLS(&task->thread, cpu);
715 load_gs_index(GS_TLS_SEL);
716 }
717 task->thread.gsindex = GS_TLS_SEL;
718 task->thread.gs = 0;
719 } else {
720 task->thread.gsindex = 0;
721 task->thread.gs = addr;
722 if (doit) {
723 load_gs_index(0);
724 ret = checking_wrmsrl(MSR_KERNEL_GS_BASE, addr);
725 }
726 }
727 put_cpu();
728 break;
729 case ARCH_SET_FS:
730 /* Not strictly needed for fs, but do it for symmetry
731 with gs */
84929801 732 if (addr >= TASK_SIZE_OF(task))
1da177e4
LT
733 return -EPERM;
734 cpu = get_cpu();
735 /* handle small bases via the GDT because that's faster to
736 switch. */
737 if (addr <= 0xffffffff) {
738 set_32bit_tls(task, FS_TLS, addr);
739 if (doit) {
740 load_TLS(&task->thread, cpu);
741 asm volatile("movl %0,%%fs" :: "r" (FS_TLS_SEL));
742 }
743 task->thread.fsindex = FS_TLS_SEL;
744 task->thread.fs = 0;
745 } else {
746 task->thread.fsindex = 0;
747 task->thread.fs = addr;
748 if (doit) {
749 /* set the selector to 0 to not confuse
750 __switch_to */
751 asm volatile("movl %0,%%fs" :: "r" (0));
752 ret = checking_wrmsrl(MSR_FS_BASE, addr);
753 }
754 }
755 put_cpu();
756 break;
757 case ARCH_GET_FS: {
758 unsigned long base;
759 if (task->thread.fsindex == FS_TLS_SEL)
760 base = read_32bit_tls(task, FS_TLS);
761 else if (doit) {
762 rdmsrl(MSR_FS_BASE, base);
763 } else
764 base = task->thread.fs;
765 ret = put_user(base, (unsigned long __user *)addr);
766 break;
767 }
768 case ARCH_GET_GS: {
769 unsigned long base;
770 if (task->thread.gsindex == GS_TLS_SEL)
771 base = read_32bit_tls(task, GS_TLS);
772 else if (doit) {
773 rdmsrl(MSR_KERNEL_GS_BASE, base);
774 } else
775 base = task->thread.gs;
776 ret = put_user(base, (unsigned long __user *)addr);
777 break;
778 }
779
780 default:
781 ret = -EINVAL;
782 break;
783 }
784
785 return ret;
786}
787
788long sys_arch_prctl(int code, unsigned long addr)
789{
790 return do_arch_prctl(current, code, addr);
791}
792
793/*
794 * Capture the user space registers if the task is not running (in user space)
795 */
796int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
797{
798 struct pt_regs *pp, ptregs;
799
800 pp = (struct pt_regs *)(tsk->thread.rsp0);
801 --pp;
802
803 ptregs = *pp;
804 ptregs.cs &= 0xffff;
805 ptregs.ss &= 0xffff;
806
807 elf_core_copy_regs(regs, &ptregs);
808
809 return 1;
810}
811
812unsigned long arch_align_stack(unsigned long sp)
813{
814 if (randomize_va_space)
815 sp -= get_random_int() % 8192;
816 return sp & ~0xf;
817}