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b2441318 1# SPDX-License-Identifier: GPL-2.0
66701b14 2config ZONE_DMA
35f9cd08 3 def_bool y
66701b14 4
8e1a6dd2 5config XTENSA
35f9cd08 6 def_bool y
07c75d7a 7 select ARCH_NO_COHERENT_DMA_MMAP if !MMU
8f371c75 8 select ARCH_WANT_FRAME_POINTERS
e969161b 9 select ARCH_WANT_IPC_PARSE_VERSION
25df8198 10 select BUILDTIME_EXTABLE_SORT
3e41f9ba 11 select CLONE_BACKWARDS
920f8a39
MF
12 select COMMON_CLK
13 select GENERIC_ATOMIC64
14 select GENERIC_CLOCKEVENTS
15 select GENERIC_IRQ_SHOW
16 select GENERIC_PCI_IOMAP
17 select GENERIC_SCHED_CLOCK
0e46c111 18 select HAVE_DEBUG_KMEMLEAK
c75959a6 19 select HAVE_DMA_API_DEBUG
9d2ffe5c 20 select HAVE_DMA_CONTIGUOUS
5f56a5df 21 select HAVE_EXIT_THREAD
478ba61a 22 select HAVE_FUNCTION_TRACER
d951ba21 23 select HAVE_FUTEX_CMPXCHG if !MMU
c91e02bd 24 select HAVE_HW_BREAKPOINT if PERF_EVENTS
496543c4 25 select HAVE_IRQ_TIME_ACCOUNTING
0e46c111 26 select HAVE_MEMBLOCK
920f8a39 27 select HAVE_OPROFILE
a6f3eefa 28 select HAVE_PERF_EVENTS
920f8a39
MF
29 select IRQ_DOMAIN
30 select MODULES_USE_ELF_RELA
0e46c111 31 select NO_BOOTMEM
db8165f5 32 select PERF_USE_VMALLOC
920f8a39 33 select VIRT_TO_BUS
8e1a6dd2
CZ
34 help
35 Xtensa processors are 32-bit RISC machines designed by Tensilica
36 primarily for embedded systems. These processors are both
37 configurable and extensible. The Linux port to the Xtensa
38 architecture supports all processor configurations and extensions,
39 with reasonable minimum requirements. The Xtensa Linux project has
0ada4490 40 a home page at <http://www.linux-xtensa.org/>.
8e1a6dd2 41
8e1a6dd2 42config RWSEM_XCHGADD_ALGORITHM
35f9cd08 43 def_bool y
8e1a6dd2 44
d4337aa5 45config GENERIC_HWEIGHT
35f9cd08 46 def_bool y
d4337aa5 47
f0d1b0b3 48config ARCH_HAS_ILOG2_U32
35f9cd08 49 def_bool n
f0d1b0b3
DH
50
51config ARCH_HAS_ILOG2_U64
35f9cd08 52 def_bool n
f0d1b0b3 53
ce816fa8 54config NO_IOPORT_MAP
d046f77e 55 def_bool n
5ea81769 56
bdc80787
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57config HZ
58 int
59 default 100
60
8e1a6dd2 61source "init/Kconfig"
dc52ddc0 62source "kernel/Kconfig.freezer"
8e1a6dd2 63
8f371c75
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64config LOCKDEP_SUPPORT
65 def_bool y
66
3e4196a5
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67config STACKTRACE_SUPPORT
68 def_bool y
69
c92931b2
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70config TRACE_IRQFLAGS_SUPPORT
71 def_bool y
72
35f9cd08 73config MMU
de7c1c78 74 def_bool n
35f9cd08 75
4c0d2141
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76config VARIANT_IRQ_SWITCH
77 def_bool n
78
a1a2bdec
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79config HAVE_XTENSA_GPIO32
80 def_bool n
81
8e1a6dd2
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82menu "Processor type and features"
83
84choice
85 prompt "Xtensa Processor Configuration"
173d6681 86 default XTENSA_VARIANT_FSF
8e1a6dd2 87
173d6681 88config XTENSA_VARIANT_FSF
0025427e 89 bool "fsf - default (not generic) configuration"
35f9cd08 90 select MMU
0025427e
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91
92config XTENSA_VARIANT_DC232B
93 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
35f9cd08 94 select MMU
a1a2bdec 95 select HAVE_XTENSA_GPIO32
0025427e 96 help
35f9cd08 97 This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE).
000af2c5 98
d0b73b48
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99config XTENSA_VARIANT_DC233C
100 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
101 select MMU
a1a2bdec 102 select HAVE_XTENSA_GPIO32
d0b73b48
PD
103 help
104 This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE).
105
420ae951
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106config XTENSA_VARIANT_CUSTOM
107 bool "Custom Xtensa processor configuration"
420ae951
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108 select HAVE_XTENSA_GPIO32
109 help
110 Select this variant to use a custom Xtensa processor configuration.
111 You will be prompted for a processor variant CORENAME.
8e1a6dd2
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112endchoice
113
420ae951
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114config XTENSA_VARIANT_CUSTOM_NAME
115 string "Xtensa Processor Custom Core Variant Name"
116 depends on XTENSA_VARIANT_CUSTOM
117 help
118 Provide the name of a custom Xtensa processor variant.
119 This CORENAME selects arch/xtensa/variant/CORENAME.
120 Dont forget you have to select MMU if you have one.
121
122config XTENSA_VARIANT_NAME
123 string
124 default "dc232b" if XTENSA_VARIANT_DC232B
125 default "dc233c" if XTENSA_VARIANT_DC233C
126 default "fsf" if XTENSA_VARIANT_FSF
420ae951
MF
127 default XTENSA_VARIANT_CUSTOM_NAME if XTENSA_VARIANT_CUSTOM
128
129config XTENSA_VARIANT_MMU
130 bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)"
131 depends on XTENSA_VARIANT_CUSTOM
132 default y
de7c1c78 133 select MMU
420ae951
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134 help
135 Build a Conventional Kernel with full MMU support,
136 ie: it supports a TLB with auto-loading, page protection.
137
9bd46da4
MF
138config XTENSA_VARIANT_HAVE_PERF_EVENTS
139 bool "Core variant has Performance Monitor Module"
140 depends on XTENSA_VARIANT_CUSTOM
141 default n
142 help
143 Enable if core variant has Performance Monitor Module with
144 External Registers Interface.
145
146 If unsure, say N.
147
e4629194
MF
148config XTENSA_FAKE_NMI
149 bool "Treat PMM IRQ as NMI"
150 depends on XTENSA_VARIANT_HAVE_PERF_EVENTS
151 default n
152 help
153 If PMM IRQ is the only IRQ at EXCM level it is safe to
154 treat it as NMI, which improves accuracy of profiling.
155
156 If there are other interrupts at or above PMM IRQ priority level
157 but not above the EXCM level, PMM IRQ still may be treated as NMI,
158 but only if these IRQs are not used. There will be a build warning
159 saying that this is not safe, and a bugcheck if one of these IRQs
160 actually fire.
161
162 If unsure, say N.
163
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164config XTENSA_UNALIGNED_USER
165 bool "Unaligned memory access in use space"
35f9cd08
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166 help
167 The Xtensa architecture currently does not handle unaligned
168 memory accesses in hardware but through an exception handler.
169 Per default, unaligned memory accesses are disabled in user space.
8e1a6dd2 170
35f9cd08 171 Say Y here to enable unaligned memory access in user space.
8e1a6dd2 172
bd96efe1 173source "kernel/Kconfig.preempt"
8e1a6dd2 174
f615136c
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175config HAVE_SMP
176 bool "System Supports SMP (MX)"
de7c1c78 177 depends on XTENSA_VARIANT_CUSTOM
f615136c
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178 select XTENSA_MX
179 help
180 This option is use to indicate that the system-on-a-chip (SOC)
181 supports Multiprocessing. Multiprocessor support implemented above
182 the CPU core definition and currently needs to be selected manually.
183
184 Multiprocessor support in implemented with external cache and
769a12a9 185 interrupt controllers.
f615136c
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186
187 The MX interrupt distributer adds Interprocessor Interrupts
188 and causes the IRQ numbers to be increased by 4 for devices
189 like the open cores ethernet driver and the serial interface.
190
191 You still have to select "Enable SMP" to enable SMP on this SOC.
192
193config SMP
194 bool "Enable Symmetric multi-processing support"
195 depends on HAVE_SMP
f615136c
MF
196 select GENERIC_SMP_IDLE_THREAD
197 help
198 Enabled SMP Software; allows more than one CPU/CORE
199 to be activated during startup.
200
201config NR_CPUS
202 depends on SMP
203 int "Maximum number of CPUs (2-32)"
204 range 2 32
205 default "4"
206
49b424fe
MF
207config HOTPLUG_CPU
208 bool "Enable CPU hotplug support"
209 depends on SMP
210 help
211 Say Y here to allow turning CPUs off and on. CPUs can be
212 controlled through /sys/devices/system/cpu.
213
214 Say N if you want to disable CPU hotplug.
215
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MF
216config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
217 bool "Initialize Xtensa MMU inside the Linux kernel code"
a4c6be5a 218 depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B
73a3eed0 219 default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM
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220 help
221 Earlier version initialized the MMU in the exception vector
222 before jumping to _startup in head.S and had an advantage that
223 it was possible to place a software breakpoint at 'reset' and
224 then enter your normal kernel breakpoints once the MMU was mapped
225 to the kernel mappings (0XC0000000).
226
83fc61a5 227 This unfortunately won't work for U-Boot and likely also wont
e85e335f
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228 work for using KEXEC to have a hot kernel ready for doing a
229 KDUMP.
230
231 So now the MMU is initialized in head.S but it's necessary to
232 use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup.
233 xt-gdb can't place a Software Breakpoint in the 0XD region prior
234 to mapping the MMU and after mapping even if the area of low memory
235 was mapped gdb wouldn't remove the breakpoint on hitting it as the
236 PC wouldn't match. Since Hardware Breakpoints are recommended for
237 Linux configurations it seems reasonable to just assume they exist
238 and leave this older mechanism for unfortunate souls that choose
239 not to follow Tensilica's recommendation.
240
241 Selecting this will cause U-Boot to set the KERNEL Load and Entry
242 address at 0x00003000 instead of the mapped std of 0xD0003000.
243
244 If in doubt, say Y.
245
d39af902
MF
246config KSEG_PADDR
247 hex "Physical address of the KSEG mapping"
248 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU
249 default 0x00000000
250 help
251 This is the physical address where KSEG is mapped. Please refer to
252 the chosen KSEG layout help for the required address alignment.
253 Unpacked kernel image (including vectors) must be located completely
254 within KSEG.
255 Physical memory below this address is not available to linux.
256
257 If unsure, leave the default value here.
258
a9f2fc62
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259config KERNEL_LOAD_ADDRESS
260 hex "Kernel load address"
73a3eed0
MF
261 default 0x60003000 if !MMU
262 default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
263 default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
a9f2fc62
MF
264 help
265 This is the address where the kernel is loaded.
266 It is virtual address for MMUv2 configurations and physical address
267 for all other configurations.
268
269 If unsure, leave the default value here.
270
271config VECTORS_OFFSET
272 hex "Kernel vectors offset"
273 default 0x00003000
274 help
275 This is the offset of the kernel image from the relocatable vectors
276 base.
277
278 If unsure, leave the default value here.
279
d39af902
MF
280choice
281 prompt "KSEG layout"
282 depends on MMU
283 default XTENSA_KSEG_MMU_V2
284
285config XTENSA_KSEG_MMU_V2
286 bool "MMUv2: 128MB cached + 128MB uncached"
287 help
288 MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting
289 at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000
290 without cache.
291 KSEG_PADDR must be aligned to 128MB.
292
293config XTENSA_KSEG_256M
294 bool "256MB cached + 256MB uncached"
295 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
296 help
297 TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000
298 with cache and to 0xc0000000 without cache.
299 KSEG_PADDR must be aligned to 256MB.
300
301config XTENSA_KSEG_512M
302 bool "512MB cached + 512MB uncached"
303 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
304 help
305 TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000
306 with cache and to 0xc0000000 without cache.
307 KSEG_PADDR must be aligned to 256MB.
308
309endchoice
310
65559100
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311config HIGHMEM
312 bool "High Memory Support"
8a9de059 313 depends on MMU
65559100
MF
314 help
315 Linux can use the full amount of RAM in the system by
316 default. However, the default MMUv2 setup only maps the
317 lowermost 128 MB of memory linearly to the areas starting
318 at 0xd0000000 (cached) and 0xd8000000 (uncached).
319 When there are more than 128 MB memory in the system not
320 all of it can be "permanently mapped" by the kernel.
321 The physical memory that's not permanently mapped is called
322 "high memory".
323
324 If you are compiling a kernel which will never run on a
325 machine with more than 128 MB total physical RAM, answer
326 N here.
327
328 If unsure, say Y.
329
9184289c
MF
330config FAST_SYSCALL_XTENSA
331 bool "Enable fast atomic syscalls"
332 default n
333 help
334 fast_syscall_xtensa is a syscall that can make atomic operations
335 on UP kernel when processor has no s32c1i support.
336
337 This syscall is deprecated. It may have issues when called with
338 invalid arguments. It is provided only for backwards compatibility.
339 Only enable it if your userspace software requires it.
340
341 If unsure, say N.
342
343config FAST_SYSCALL_SPILL_REGISTERS
344 bool "Enable spill registers syscall"
345 default n
346 help
347 fast_syscall_spill_registers is a syscall that spills all active
348 register windows of a calling userspace task onto its stack.
349
350 This syscall is deprecated. It may have issues when called with
351 invalid arguments. It is provided only for backwards compatibility.
352 Only enable it if your userspace software requires it.
353
354 If unsure, say N.
355
8e1a6dd2
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356endmenu
357
35f9cd08
JW
358config XTENSA_CALIBRATE_CCOUNT
359 def_bool n
360 help
361 On some platforms (XT2000, for example), the CPU clock rate can
362 vary. The frequency can be determined, however, by measuring
363 against a well known, fixed frequency, such as an UART oscillator.
364
365config SERIAL_CONSOLE
366 def_bool n
367
35f9cd08
JW
368menu "Bus options"
369
370config PCI
371 bool "PCI support"
372 default y
373 help
374 Find out whether you have a PCI motherboard. PCI is the name of a
375 bus system, i.e. the way the CPU talks to the other stuff inside
376 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
377 VESA. If you have PCI, say Y, otherwise N.
378
379source "drivers/pci/Kconfig"
380
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381endmenu
382
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383menu "Platform options"
384
385choice
386 prompt "Xtensa System Type"
387 default XTENSA_PLATFORM_ISS
388
389config XTENSA_PLATFORM_ISS
390 bool "ISS"
35f9cd08
JW
391 select XTENSA_CALIBRATE_CCOUNT
392 select SERIAL_CONSOLE
8e1a6dd2
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393 help
394 ISS is an acronym for Tensilica's Instruction Set Simulator.
395
396config XTENSA_PLATFORM_XT2000
397 bool "XT2000"
4964527d 398 select HAVE_IDE
8e1a6dd2
CZ
399 help
400 XT2000 is the name of Tensilica's feature-rich emulation platform.
401 This hardware is capable of running a full Linux distribution.
402
0d456bad
MF
403config XTENSA_PLATFORM_XTFPGA
404 bool "XTFPGA"
61e47e9b 405 select ETHOC if ETHERNET
3de00482 406 select PLATFORM_WANT_DEFAULT_MEM if !MMU
0d456bad 407 select SERIAL_CONSOLE
0d456bad
MF
408 select XTENSA_CALIBRATE_CCOUNT
409 help
410 XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605).
411 This hardware is capable of running a full Linux distribution.
412
8e1a6dd2
CZ
413endchoice
414
415
8e1a6dd2
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416config XTENSA_CPU_CLOCK
417 int "CPU clock rate [MHz]"
418 depends on !XTENSA_CALIBRATE_CCOUNT
35f9cd08 419 default 16
8e1a6dd2
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420
421config GENERIC_CALIBRATE_DELAY
422 bool "Auto calibration of the BogoMIPS value"
35f9cd08 423 help
82300bf4 424 The BogoMIPS value can easily be derived from the CPU frequency.
8e1a6dd2
CZ
425
426config CMDLINE_BOOL
427 bool "Default bootloader kernel arguments"
428
429config CMDLINE
430 string "Initial kernel command string"
431 depends on CMDLINE_BOOL
432 default "console=ttyS0,38400 root=/dev/ram"
433 help
434 On some architectures (EBSA110 and CATS), there is currently no way
435 for the boot loader to pass arguments to the kernel. For these
436 architectures, you should supply some command-line options at build
437 time by entering them here. As a minimum, you should specify the
438 memory size and the root device (e.g., mem=64M root=/dev/nfs).
439
da844a81
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440config USE_OF
441 bool "Flattened Device Tree support"
442 select OF
443 select OF_EARLY_FLATTREE
4e7c84ec 444 select OF_RESERVED_MEM
da844a81
MF
445 help
446 Include support for flattened device tree machine descriptions.
447
448config BUILTIN_DTB
449 string "DTB to build into the kernel image"
450 depends on OF
451
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452config BLK_DEV_SIMDISK
453 tristate "Host file-based simulated block device support"
454 default n
7a0684cd 455 depends on XTENSA_PLATFORM_ISS && BLOCK
b6c7e873
VP
456 help
457 Create block devices that map to files in the host file system.
458 Device binding to host file may be changed at runtime via proc
459 interface provided the device is not in use.
460
461config BLK_DEV_SIMDISK_COUNT
462 int "Number of host file-based simulated block devices"
463 range 1 10
464 depends on BLK_DEV_SIMDISK
465 default 2
466 help
467 This is the default minimal number of created block devices.
468 Kernel/module parameter 'simdisk_count' may be used to change this
469 value at runtime. More file names (but no more than 10) may be
470 specified as parameters, simdisk_count grows accordingly.
471
472config SIMDISK0_FILENAME
473 string "Host filename for the first simulated device"
474 depends on BLK_DEV_SIMDISK = y
475 default ""
476 help
477 Attach a first simdisk to a host file. Conventionally, this file
478 contains a root file system.
479
480config SIMDISK1_FILENAME
481 string "Host filename for the second simulated device"
482 depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1
483 default ""
484 help
485 Another simulated disk in a host file for a buildroot-independent
486 storage.
487
82300bf4
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488source "mm/Kconfig"
489
a9df9338
MF
490config FORCE_MAX_ZONEORDER
491 int "Maximum zone order"
492 default "11"
493 help
494 The kernel memory allocator divides physically contiguous memory
495 blocks into "zones", where each zone is a power of two number of
496 pages. This option selects the largest power of two that the kernel
497 keeps in the memory allocator. If you need to allocate very large
498 blocks of physically contiguous memory, then you may need to
499 increase this value.
500
501 This config option is actually maximum order plus one. For example,
502 a value of 11 means that the largest free memory block is 2^10 pages.
503
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504source "drivers/pcmcia/Kconfig"
505
3932b9ca
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506config PLATFORM_WANT_DEFAULT_MEM
507 def_bool n
508
509config DEFAULT_MEM_START
510 hex "Physical address of the default memory area start"
511 depends on PLATFORM_WANT_DEFAULT_MEM
512 default 0x00000000 if MMU
d9eb3cb2 513 default 0x60000000 if !MMU
3932b9ca 514 help
3de00482
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515 This is the base address of the default memory area.
516 Default memory area has platform-specific meaning, it may be used
517 for e.g. early cache initialization.
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518
519 If unsure, leave the default value here.
520
521config DEFAULT_MEM_SIZE
522 hex "Maximal size of the default memory area"
523 depends on PLATFORM_WANT_DEFAULT_MEM
524 default 0x04000000
525 help
3de00482
MF
526 This is the size of the default memory area.
527 Default memory area has platform-specific meaning, it may be used
528 for e.g. early cache initialization.
3932b9ca
MF
529
530 If unsure, leave the default value here.
531
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532config XTFPGA_LCD
533 bool "Enable XTFPGA LCD driver"
534 depends on XTENSA_PLATFORM_XTFPGA
535 default n
536 help
537 There's a 2x16 LCD on most of XTFPGA boards, kernel may output
538 progress messages there during bootup/shutdown. It may be useful
539 during board bringup.
540
541 If unsure, say N.
542
543config XTFPGA_LCD_BASE_ADDR
544 hex "XTFPGA LCD base address"
545 depends on XTFPGA_LCD
546 default "0x0d0c0000"
547 help
548 Base address of the LCD controller inside KIO region.
549 Different boards from XTFPGA family have LCD controller at different
550 addresses. Please consult prototyping user guide for your board for
551 the correct address. Wrong address here may lead to hardware lockup.
552
553config XTFPGA_LCD_8BIT_ACCESS
554 bool "Use 8-bit access to XTFPGA LCD"
555 depends on XTFPGA_LCD
556 default n
557 help
558 LCD may be connected with 4- or 8-bit interface, 8-bit access may
559 only be used with 8-bit interface. Please consult prototyping user
560 guide for your board for the correct interface width.
561
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562endmenu
563
cab00891 564menu "Executable file formats"
8e1a6dd2 565
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566source "fs/Kconfig.binfmt"
567
568endmenu
569
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570menu "Power management options"
571
572source "kernel/power/Kconfig"
573
574endmenu
575
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576source "net/Kconfig"
577
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578source "drivers/Kconfig"
579
580source "fs/Kconfig"
581
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582source "arch/xtensa/Kconfig.debug"
583
584source "security/Kconfig"
585
586source "crypto/Kconfig"
587
588source "lib/Kconfig"
589
590