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66701b14 1config ZONE_DMA
35f9cd08 2 def_bool y
66701b14 3
8e1a6dd2 4config XTENSA
35f9cd08 5 def_bool y
8f371c75 6 select ARCH_WANT_FRAME_POINTERS
e969161b 7 select ARCH_WANT_IPC_PARSE_VERSION
25df8198 8 select BUILDTIME_EXTABLE_SORT
3e41f9ba 9 select CLONE_BACKWARDS
920f8a39
MF
10 select COMMON_CLK
11 select GENERIC_ATOMIC64
12 select GENERIC_CLOCKEVENTS
13 select GENERIC_IRQ_SHOW
14 select GENERIC_PCI_IOMAP
15 select GENERIC_SCHED_CLOCK
0e46c111 16 select HAVE_DEBUG_KMEMLEAK
c75959a6 17 select HAVE_DMA_API_DEBUG
9d2ffe5c 18 select HAVE_DMA_CONTIGUOUS
5f56a5df 19 select HAVE_EXIT_THREAD
478ba61a 20 select HAVE_FUNCTION_TRACER
d951ba21 21 select HAVE_FUTEX_CMPXCHG if !MMU
c91e02bd 22 select HAVE_HW_BREAKPOINT if PERF_EVENTS
496543c4 23 select HAVE_IRQ_TIME_ACCOUNTING
0e46c111 24 select HAVE_MEMBLOCK
920f8a39 25 select HAVE_OPROFILE
a6f3eefa 26 select HAVE_PERF_EVENTS
920f8a39
MF
27 select IRQ_DOMAIN
28 select MODULES_USE_ELF_RELA
0e46c111 29 select NO_BOOTMEM
db8165f5 30 select PERF_USE_VMALLOC
920f8a39 31 select VIRT_TO_BUS
8e1a6dd2
CZ
32 help
33 Xtensa processors are 32-bit RISC machines designed by Tensilica
34 primarily for embedded systems. These processors are both
35 configurable and extensible. The Linux port to the Xtensa
36 architecture supports all processor configurations and extensions,
37 with reasonable minimum requirements. The Xtensa Linux project has
0ada4490 38 a home page at <http://www.linux-xtensa.org/>.
8e1a6dd2 39
8e1a6dd2 40config RWSEM_XCHGADD_ALGORITHM
35f9cd08 41 def_bool y
8e1a6dd2 42
d4337aa5 43config GENERIC_HWEIGHT
35f9cd08 44 def_bool y
d4337aa5 45
f0d1b0b3 46config ARCH_HAS_ILOG2_U32
35f9cd08 47 def_bool n
f0d1b0b3
DH
48
49config ARCH_HAS_ILOG2_U64
35f9cd08 50 def_bool n
f0d1b0b3 51
ce816fa8 52config NO_IOPORT_MAP
d046f77e 53 def_bool n
5ea81769 54
bdc80787
PA
55config HZ
56 int
57 default 100
58
8e1a6dd2 59source "init/Kconfig"
dc52ddc0 60source "kernel/Kconfig.freezer"
8e1a6dd2 61
8f371c75
MF
62config LOCKDEP_SUPPORT
63 def_bool y
64
3e4196a5
MF
65config STACKTRACE_SUPPORT
66 def_bool y
67
c92931b2
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68config TRACE_IRQFLAGS_SUPPORT
69 def_bool y
70
35f9cd08 71config MMU
de7c1c78 72 def_bool n
35f9cd08 73
4c0d2141
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74config VARIANT_IRQ_SWITCH
75 def_bool n
76
a1a2bdec
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77config HAVE_XTENSA_GPIO32
78 def_bool n
79
8e1a6dd2
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80menu "Processor type and features"
81
82choice
83 prompt "Xtensa Processor Configuration"
173d6681 84 default XTENSA_VARIANT_FSF
8e1a6dd2 85
173d6681 86config XTENSA_VARIANT_FSF
0025427e 87 bool "fsf - default (not generic) configuration"
35f9cd08 88 select MMU
0025427e
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89
90config XTENSA_VARIANT_DC232B
91 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
35f9cd08 92 select MMU
a1a2bdec 93 select HAVE_XTENSA_GPIO32
0025427e 94 help
35f9cd08 95 This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE).
000af2c5 96
d0b73b48
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97config XTENSA_VARIANT_DC233C
98 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
99 select MMU
a1a2bdec 100 select HAVE_XTENSA_GPIO32
d0b73b48
PD
101 help
102 This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE).
103
420ae951
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104config XTENSA_VARIANT_CUSTOM
105 bool "Custom Xtensa processor configuration"
420ae951
MF
106 select HAVE_XTENSA_GPIO32
107 help
108 Select this variant to use a custom Xtensa processor configuration.
109 You will be prompted for a processor variant CORENAME.
8e1a6dd2
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110endchoice
111
420ae951
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112config XTENSA_VARIANT_CUSTOM_NAME
113 string "Xtensa Processor Custom Core Variant Name"
114 depends on XTENSA_VARIANT_CUSTOM
115 help
116 Provide the name of a custom Xtensa processor variant.
117 This CORENAME selects arch/xtensa/variant/CORENAME.
118 Dont forget you have to select MMU if you have one.
119
120config XTENSA_VARIANT_NAME
121 string
122 default "dc232b" if XTENSA_VARIANT_DC232B
123 default "dc233c" if XTENSA_VARIANT_DC233C
124 default "fsf" if XTENSA_VARIANT_FSF
420ae951
MF
125 default XTENSA_VARIANT_CUSTOM_NAME if XTENSA_VARIANT_CUSTOM
126
127config XTENSA_VARIANT_MMU
128 bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)"
129 depends on XTENSA_VARIANT_CUSTOM
130 default y
de7c1c78 131 select MMU
420ae951
MF
132 help
133 Build a Conventional Kernel with full MMU support,
134 ie: it supports a TLB with auto-loading, page protection.
135
9bd46da4
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136config XTENSA_VARIANT_HAVE_PERF_EVENTS
137 bool "Core variant has Performance Monitor Module"
138 depends on XTENSA_VARIANT_CUSTOM
139 default n
140 help
141 Enable if core variant has Performance Monitor Module with
142 External Registers Interface.
143
144 If unsure, say N.
145
e4629194
MF
146config XTENSA_FAKE_NMI
147 bool "Treat PMM IRQ as NMI"
148 depends on XTENSA_VARIANT_HAVE_PERF_EVENTS
149 default n
150 help
151 If PMM IRQ is the only IRQ at EXCM level it is safe to
152 treat it as NMI, which improves accuracy of profiling.
153
154 If there are other interrupts at or above PMM IRQ priority level
155 but not above the EXCM level, PMM IRQ still may be treated as NMI,
156 but only if these IRQs are not used. There will be a build warning
157 saying that this is not safe, and a bugcheck if one of these IRQs
158 actually fire.
159
160 If unsure, say N.
161
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162config XTENSA_UNALIGNED_USER
163 bool "Unaligned memory access in use space"
35f9cd08
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164 help
165 The Xtensa architecture currently does not handle unaligned
166 memory accesses in hardware but through an exception handler.
167 Per default, unaligned memory accesses are disabled in user space.
8e1a6dd2 168
35f9cd08 169 Say Y here to enable unaligned memory access in user space.
8e1a6dd2 170
bd96efe1 171source "kernel/Kconfig.preempt"
8e1a6dd2 172
f615136c
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173config HAVE_SMP
174 bool "System Supports SMP (MX)"
de7c1c78 175 depends on XTENSA_VARIANT_CUSTOM
f615136c
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176 select XTENSA_MX
177 help
178 This option is use to indicate that the system-on-a-chip (SOC)
179 supports Multiprocessing. Multiprocessor support implemented above
180 the CPU core definition and currently needs to be selected manually.
181
182 Multiprocessor support in implemented with external cache and
769a12a9 183 interrupt controllers.
f615136c
MF
184
185 The MX interrupt distributer adds Interprocessor Interrupts
186 and causes the IRQ numbers to be increased by 4 for devices
187 like the open cores ethernet driver and the serial interface.
188
189 You still have to select "Enable SMP" to enable SMP on this SOC.
190
191config SMP
192 bool "Enable Symmetric multi-processing support"
193 depends on HAVE_SMP
f615136c
MF
194 select GENERIC_SMP_IDLE_THREAD
195 help
196 Enabled SMP Software; allows more than one CPU/CORE
197 to be activated during startup.
198
199config NR_CPUS
200 depends on SMP
201 int "Maximum number of CPUs (2-32)"
202 range 2 32
203 default "4"
204
49b424fe
MF
205config HOTPLUG_CPU
206 bool "Enable CPU hotplug support"
207 depends on SMP
208 help
209 Say Y here to allow turning CPUs off and on. CPUs can be
210 controlled through /sys/devices/system/cpu.
211
212 Say N if you want to disable CPU hotplug.
213
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MF
214config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
215 bool "Initialize Xtensa MMU inside the Linux kernel code"
a4c6be5a 216 depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B
73a3eed0 217 default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM
e85e335f
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218 help
219 Earlier version initialized the MMU in the exception vector
220 before jumping to _startup in head.S and had an advantage that
221 it was possible to place a software breakpoint at 'reset' and
222 then enter your normal kernel breakpoints once the MMU was mapped
223 to the kernel mappings (0XC0000000).
224
225 This unfortunately doesn't work for U-Boot and likley also wont
226 work for using KEXEC to have a hot kernel ready for doing a
227 KDUMP.
228
229 So now the MMU is initialized in head.S but it's necessary to
230 use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup.
231 xt-gdb can't place a Software Breakpoint in the 0XD region prior
232 to mapping the MMU and after mapping even if the area of low memory
233 was mapped gdb wouldn't remove the breakpoint on hitting it as the
234 PC wouldn't match. Since Hardware Breakpoints are recommended for
235 Linux configurations it seems reasonable to just assume they exist
236 and leave this older mechanism for unfortunate souls that choose
237 not to follow Tensilica's recommendation.
238
239 Selecting this will cause U-Boot to set the KERNEL Load and Entry
240 address at 0x00003000 instead of the mapped std of 0xD0003000.
241
242 If in doubt, say Y.
243
d39af902
MF
244config KSEG_PADDR
245 hex "Physical address of the KSEG mapping"
246 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU
247 default 0x00000000
248 help
249 This is the physical address where KSEG is mapped. Please refer to
250 the chosen KSEG layout help for the required address alignment.
251 Unpacked kernel image (including vectors) must be located completely
252 within KSEG.
253 Physical memory below this address is not available to linux.
254
255 If unsure, leave the default value here.
256
a9f2fc62
MF
257config KERNEL_LOAD_ADDRESS
258 hex "Kernel load address"
73a3eed0
MF
259 default 0x60003000 if !MMU
260 default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
261 default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
a9f2fc62
MF
262 help
263 This is the address where the kernel is loaded.
264 It is virtual address for MMUv2 configurations and physical address
265 for all other configurations.
266
267 If unsure, leave the default value here.
268
269config VECTORS_OFFSET
270 hex "Kernel vectors offset"
271 default 0x00003000
272 help
273 This is the offset of the kernel image from the relocatable vectors
274 base.
275
276 If unsure, leave the default value here.
277
d39af902
MF
278choice
279 prompt "KSEG layout"
280 depends on MMU
281 default XTENSA_KSEG_MMU_V2
282
283config XTENSA_KSEG_MMU_V2
284 bool "MMUv2: 128MB cached + 128MB uncached"
285 help
286 MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting
287 at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000
288 without cache.
289 KSEG_PADDR must be aligned to 128MB.
290
291config XTENSA_KSEG_256M
292 bool "256MB cached + 256MB uncached"
293 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
294 help
295 TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000
296 with cache and to 0xc0000000 without cache.
297 KSEG_PADDR must be aligned to 256MB.
298
299config XTENSA_KSEG_512M
300 bool "512MB cached + 512MB uncached"
301 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
302 help
303 TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000
304 with cache and to 0xc0000000 without cache.
305 KSEG_PADDR must be aligned to 256MB.
306
307endchoice
308
65559100
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309config HIGHMEM
310 bool "High Memory Support"
8a9de059 311 depends on MMU
65559100
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312 help
313 Linux can use the full amount of RAM in the system by
314 default. However, the default MMUv2 setup only maps the
315 lowermost 128 MB of memory linearly to the areas starting
316 at 0xd0000000 (cached) and 0xd8000000 (uncached).
317 When there are more than 128 MB memory in the system not
318 all of it can be "permanently mapped" by the kernel.
319 The physical memory that's not permanently mapped is called
320 "high memory".
321
322 If you are compiling a kernel which will never run on a
323 machine with more than 128 MB total physical RAM, answer
324 N here.
325
326 If unsure, say Y.
327
9184289c
MF
328config FAST_SYSCALL_XTENSA
329 bool "Enable fast atomic syscalls"
330 default n
331 help
332 fast_syscall_xtensa is a syscall that can make atomic operations
333 on UP kernel when processor has no s32c1i support.
334
335 This syscall is deprecated. It may have issues when called with
336 invalid arguments. It is provided only for backwards compatibility.
337 Only enable it if your userspace software requires it.
338
339 If unsure, say N.
340
341config FAST_SYSCALL_SPILL_REGISTERS
342 bool "Enable spill registers syscall"
343 default n
344 help
345 fast_syscall_spill_registers is a syscall that spills all active
346 register windows of a calling userspace task onto its stack.
347
348 This syscall is deprecated. It may have issues when called with
349 invalid arguments. It is provided only for backwards compatibility.
350 Only enable it if your userspace software requires it.
351
352 If unsure, say N.
353
8e1a6dd2
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354endmenu
355
35f9cd08
JW
356config XTENSA_CALIBRATE_CCOUNT
357 def_bool n
358 help
359 On some platforms (XT2000, for example), the CPU clock rate can
360 vary. The frequency can be determined, however, by measuring
361 against a well known, fixed frequency, such as an UART oscillator.
362
363config SERIAL_CONSOLE
364 def_bool n
365
35f9cd08
JW
366menu "Bus options"
367
368config PCI
369 bool "PCI support"
370 default y
371 help
372 Find out whether you have a PCI motherboard. PCI is the name of a
373 bus system, i.e. the way the CPU talks to the other stuff inside
374 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
375 VESA. If you have PCI, say Y, otherwise N.
376
377source "drivers/pci/Kconfig"
378
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379endmenu
380
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381menu "Platform options"
382
383choice
384 prompt "Xtensa System Type"
385 default XTENSA_PLATFORM_ISS
386
387config XTENSA_PLATFORM_ISS
388 bool "ISS"
35f9cd08
JW
389 select XTENSA_CALIBRATE_CCOUNT
390 select SERIAL_CONSOLE
8e1a6dd2
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391 help
392 ISS is an acronym for Tensilica's Instruction Set Simulator.
393
394config XTENSA_PLATFORM_XT2000
395 bool "XT2000"
4964527d 396 select HAVE_IDE
8e1a6dd2
CZ
397 help
398 XT2000 is the name of Tensilica's feature-rich emulation platform.
399 This hardware is capable of running a full Linux distribution.
400
0d456bad
MF
401config XTENSA_PLATFORM_XTFPGA
402 bool "XTFPGA"
61e47e9b 403 select ETHOC if ETHERNET
3de00482 404 select PLATFORM_WANT_DEFAULT_MEM if !MMU
0d456bad 405 select SERIAL_CONSOLE
0d456bad
MF
406 select XTENSA_CALIBRATE_CCOUNT
407 help
408 XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605).
409 This hardware is capable of running a full Linux distribution.
410
8e1a6dd2
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411endchoice
412
413
8e1a6dd2
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414config XTENSA_CPU_CLOCK
415 int "CPU clock rate [MHz]"
416 depends on !XTENSA_CALIBRATE_CCOUNT
35f9cd08 417 default 16
8e1a6dd2
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418
419config GENERIC_CALIBRATE_DELAY
420 bool "Auto calibration of the BogoMIPS value"
35f9cd08 421 help
82300bf4 422 The BogoMIPS value can easily be derived from the CPU frequency.
8e1a6dd2
CZ
423
424config CMDLINE_BOOL
425 bool "Default bootloader kernel arguments"
426
427config CMDLINE
428 string "Initial kernel command string"
429 depends on CMDLINE_BOOL
430 default "console=ttyS0,38400 root=/dev/ram"
431 help
432 On some architectures (EBSA110 and CATS), there is currently no way
433 for the boot loader to pass arguments to the kernel. For these
434 architectures, you should supply some command-line options at build
435 time by entering them here. As a minimum, you should specify the
436 memory size and the root device (e.g., mem=64M root=/dev/nfs).
437
da844a81
MF
438config USE_OF
439 bool "Flattened Device Tree support"
440 select OF
441 select OF_EARLY_FLATTREE
4e7c84ec 442 select OF_RESERVED_MEM
da844a81
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443 help
444 Include support for flattened device tree machine descriptions.
445
446config BUILTIN_DTB
447 string "DTB to build into the kernel image"
448 depends on OF
449
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450config BLK_DEV_SIMDISK
451 tristate "Host file-based simulated block device support"
452 default n
7a0684cd 453 depends on XTENSA_PLATFORM_ISS && BLOCK
b6c7e873
VP
454 help
455 Create block devices that map to files in the host file system.
456 Device binding to host file may be changed at runtime via proc
457 interface provided the device is not in use.
458
459config BLK_DEV_SIMDISK_COUNT
460 int "Number of host file-based simulated block devices"
461 range 1 10
462 depends on BLK_DEV_SIMDISK
463 default 2
464 help
465 This is the default minimal number of created block devices.
466 Kernel/module parameter 'simdisk_count' may be used to change this
467 value at runtime. More file names (but no more than 10) may be
468 specified as parameters, simdisk_count grows accordingly.
469
470config SIMDISK0_FILENAME
471 string "Host filename for the first simulated device"
472 depends on BLK_DEV_SIMDISK = y
473 default ""
474 help
475 Attach a first simdisk to a host file. Conventionally, this file
476 contains a root file system.
477
478config SIMDISK1_FILENAME
479 string "Host filename for the second simulated device"
480 depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1
481 default ""
482 help
483 Another simulated disk in a host file for a buildroot-independent
484 storage.
485
82300bf4
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486source "mm/Kconfig"
487
a9df9338
MF
488config FORCE_MAX_ZONEORDER
489 int "Maximum zone order"
490 default "11"
491 help
492 The kernel memory allocator divides physically contiguous memory
493 blocks into "zones", where each zone is a power of two number of
494 pages. This option selects the largest power of two that the kernel
495 keeps in the memory allocator. If you need to allocate very large
496 blocks of physically contiguous memory, then you may need to
497 increase this value.
498
499 This config option is actually maximum order plus one. For example,
500 a value of 11 means that the largest free memory block is 2^10 pages.
501
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502source "drivers/pcmcia/Kconfig"
503
3932b9ca
MF
504config PLATFORM_WANT_DEFAULT_MEM
505 def_bool n
506
507config DEFAULT_MEM_START
508 hex "Physical address of the default memory area start"
509 depends on PLATFORM_WANT_DEFAULT_MEM
510 default 0x00000000 if MMU
d9eb3cb2 511 default 0x60000000 if !MMU
3932b9ca 512 help
3de00482
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513 This is the base address of the default memory area.
514 Default memory area has platform-specific meaning, it may be used
515 for e.g. early cache initialization.
3932b9ca
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516
517 If unsure, leave the default value here.
518
519config DEFAULT_MEM_SIZE
520 hex "Maximal size of the default memory area"
521 depends on PLATFORM_WANT_DEFAULT_MEM
522 default 0x04000000
523 help
3de00482
MF
524 This is the size of the default memory area.
525 Default memory area has platform-specific meaning, it may be used
526 for e.g. early cache initialization.
3932b9ca
MF
527
528 If unsure, leave the default value here.
529
4949009e
MF
530config XTFPGA_LCD
531 bool "Enable XTFPGA LCD driver"
532 depends on XTENSA_PLATFORM_XTFPGA
533 default n
534 help
535 There's a 2x16 LCD on most of XTFPGA boards, kernel may output
536 progress messages there during bootup/shutdown. It may be useful
537 during board bringup.
538
539 If unsure, say N.
540
541config XTFPGA_LCD_BASE_ADDR
542 hex "XTFPGA LCD base address"
543 depends on XTFPGA_LCD
544 default "0x0d0c0000"
545 help
546 Base address of the LCD controller inside KIO region.
547 Different boards from XTFPGA family have LCD controller at different
548 addresses. Please consult prototyping user guide for your board for
549 the correct address. Wrong address here may lead to hardware lockup.
550
551config XTFPGA_LCD_8BIT_ACCESS
552 bool "Use 8-bit access to XTFPGA LCD"
553 depends on XTFPGA_LCD
554 default n
555 help
556 LCD may be connected with 4- or 8-bit interface, 8-bit access may
557 only be used with 8-bit interface. Please consult prototyping user
558 guide for your board for the correct interface width.
559
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560endmenu
561
cab00891 562menu "Executable file formats"
8e1a6dd2 563
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564source "fs/Kconfig.binfmt"
565
566endmenu
567
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568menu "Power management options"
569
570source "kernel/power/Kconfig"
571
572endmenu
573
d5950b43
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574source "net/Kconfig"
575
8e1a6dd2
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576source "drivers/Kconfig"
577
578source "fs/Kconfig"
579
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580source "arch/xtensa/Kconfig.debug"
581
582source "security/Kconfig"
583
584source "crypto/Kconfig"
585
586source "lib/Kconfig"
587
588