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xtensa: minimize use of PLATFORM_DEFAULT_MEM_{ADDR,SIZE}
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66701b14 1config ZONE_DMA
35f9cd08 2 def_bool y
66701b14 3
8e1a6dd2 4config XTENSA
35f9cd08 5 def_bool y
8f371c75 6 select ARCH_WANT_FRAME_POINTERS
e969161b 7 select ARCH_WANT_IPC_PARSE_VERSION
25df8198 8 select BUILDTIME_EXTABLE_SORT
3e41f9ba 9 select CLONE_BACKWARDS
920f8a39
MF
10 select COMMON_CLK
11 select GENERIC_ATOMIC64
12 select GENERIC_CLOCKEVENTS
13 select GENERIC_IRQ_SHOW
14 select GENERIC_PCI_IOMAP
15 select GENERIC_SCHED_CLOCK
c75959a6 16 select HAVE_DMA_API_DEBUG
5f56a5df 17 select HAVE_EXIT_THREAD
478ba61a 18 select HAVE_FUNCTION_TRACER
d951ba21 19 select HAVE_FUTEX_CMPXCHG if !MMU
c91e02bd 20 select HAVE_HW_BREAKPOINT if PERF_EVENTS
496543c4 21 select HAVE_IRQ_TIME_ACCOUNTING
920f8a39 22 select HAVE_OPROFILE
a6f3eefa 23 select HAVE_PERF_EVENTS
920f8a39
MF
24 select IRQ_DOMAIN
25 select MODULES_USE_ELF_RELA
db8165f5 26 select PERF_USE_VMALLOC
920f8a39 27 select VIRT_TO_BUS
8e1a6dd2
CZ
28 help
29 Xtensa processors are 32-bit RISC machines designed by Tensilica
30 primarily for embedded systems. These processors are both
31 configurable and extensible. The Linux port to the Xtensa
32 architecture supports all processor configurations and extensions,
33 with reasonable minimum requirements. The Xtensa Linux project has
0ada4490 34 a home page at <http://www.linux-xtensa.org/>.
8e1a6dd2 35
8e1a6dd2 36config RWSEM_XCHGADD_ALGORITHM
35f9cd08 37 def_bool y
8e1a6dd2 38
d4337aa5 39config GENERIC_HWEIGHT
35f9cd08 40 def_bool y
d4337aa5 41
f0d1b0b3 42config ARCH_HAS_ILOG2_U32
35f9cd08 43 def_bool n
f0d1b0b3
DH
44
45config ARCH_HAS_ILOG2_U64
35f9cd08 46 def_bool n
f0d1b0b3 47
ce816fa8 48config NO_IOPORT_MAP
d046f77e 49 def_bool n
5ea81769 50
bdc80787
PA
51config HZ
52 int
53 default 100
54
8e1a6dd2 55source "init/Kconfig"
dc52ddc0 56source "kernel/Kconfig.freezer"
8e1a6dd2 57
8f371c75
MF
58config LOCKDEP_SUPPORT
59 def_bool y
60
3e4196a5
MF
61config STACKTRACE_SUPPORT
62 def_bool y
63
c92931b2
MF
64config TRACE_IRQFLAGS_SUPPORT
65 def_bool y
66
35f9cd08 67config MMU
de7c1c78 68 def_bool n
35f9cd08 69
4c0d2141
JW
70config VARIANT_IRQ_SWITCH
71 def_bool n
72
a1a2bdec
BS
73config HAVE_XTENSA_GPIO32
74 def_bool n
75
8e1a6dd2
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76menu "Processor type and features"
77
78choice
79 prompt "Xtensa Processor Configuration"
173d6681 80 default XTENSA_VARIANT_FSF
8e1a6dd2 81
173d6681 82config XTENSA_VARIANT_FSF
0025427e 83 bool "fsf - default (not generic) configuration"
35f9cd08 84 select MMU
0025427e
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85
86config XTENSA_VARIANT_DC232B
87 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
35f9cd08 88 select MMU
a1a2bdec 89 select HAVE_XTENSA_GPIO32
0025427e 90 help
35f9cd08 91 This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE).
000af2c5 92
d0b73b48
PD
93config XTENSA_VARIANT_DC233C
94 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
95 select MMU
a1a2bdec 96 select HAVE_XTENSA_GPIO32
d0b73b48
PD
97 help
98 This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE).
99
420ae951
MF
100config XTENSA_VARIANT_CUSTOM
101 bool "Custom Xtensa processor configuration"
420ae951
MF
102 select HAVE_XTENSA_GPIO32
103 help
104 Select this variant to use a custom Xtensa processor configuration.
105 You will be prompted for a processor variant CORENAME.
8e1a6dd2
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106endchoice
107
420ae951
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108config XTENSA_VARIANT_CUSTOM_NAME
109 string "Xtensa Processor Custom Core Variant Name"
110 depends on XTENSA_VARIANT_CUSTOM
111 help
112 Provide the name of a custom Xtensa processor variant.
113 This CORENAME selects arch/xtensa/variant/CORENAME.
114 Dont forget you have to select MMU if you have one.
115
116config XTENSA_VARIANT_NAME
117 string
118 default "dc232b" if XTENSA_VARIANT_DC232B
119 default "dc233c" if XTENSA_VARIANT_DC233C
120 default "fsf" if XTENSA_VARIANT_FSF
420ae951
MF
121 default XTENSA_VARIANT_CUSTOM_NAME if XTENSA_VARIANT_CUSTOM
122
123config XTENSA_VARIANT_MMU
124 bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)"
125 depends on XTENSA_VARIANT_CUSTOM
126 default y
de7c1c78 127 select MMU
420ae951
MF
128 help
129 Build a Conventional Kernel with full MMU support,
130 ie: it supports a TLB with auto-loading, page protection.
131
9bd46da4
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132config XTENSA_VARIANT_HAVE_PERF_EVENTS
133 bool "Core variant has Performance Monitor Module"
134 depends on XTENSA_VARIANT_CUSTOM
135 default n
136 help
137 Enable if core variant has Performance Monitor Module with
138 External Registers Interface.
139
140 If unsure, say N.
141
e4629194
MF
142config XTENSA_FAKE_NMI
143 bool "Treat PMM IRQ as NMI"
144 depends on XTENSA_VARIANT_HAVE_PERF_EVENTS
145 default n
146 help
147 If PMM IRQ is the only IRQ at EXCM level it is safe to
148 treat it as NMI, which improves accuracy of profiling.
149
150 If there are other interrupts at or above PMM IRQ priority level
151 but not above the EXCM level, PMM IRQ still may be treated as NMI,
152 but only if these IRQs are not used. There will be a build warning
153 saying that this is not safe, and a bugcheck if one of these IRQs
154 actually fire.
155
156 If unsure, say N.
157
8e1a6dd2
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158config XTENSA_UNALIGNED_USER
159 bool "Unaligned memory access in use space"
35f9cd08
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160 help
161 The Xtensa architecture currently does not handle unaligned
162 memory accesses in hardware but through an exception handler.
163 Per default, unaligned memory accesses are disabled in user space.
8e1a6dd2 164
35f9cd08 165 Say Y here to enable unaligned memory access in user space.
8e1a6dd2 166
bd96efe1 167source "kernel/Kconfig.preempt"
8e1a6dd2 168
f615136c
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169config HAVE_SMP
170 bool "System Supports SMP (MX)"
de7c1c78 171 depends on XTENSA_VARIANT_CUSTOM
f615136c
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172 select XTENSA_MX
173 help
174 This option is use to indicate that the system-on-a-chip (SOC)
175 supports Multiprocessing. Multiprocessor support implemented above
176 the CPU core definition and currently needs to be selected manually.
177
178 Multiprocessor support in implemented with external cache and
769a12a9 179 interrupt controllers.
f615136c
MF
180
181 The MX interrupt distributer adds Interprocessor Interrupts
182 and causes the IRQ numbers to be increased by 4 for devices
183 like the open cores ethernet driver and the serial interface.
184
185 You still have to select "Enable SMP" to enable SMP on this SOC.
186
187config SMP
188 bool "Enable Symmetric multi-processing support"
189 depends on HAVE_SMP
f615136c
MF
190 select GENERIC_SMP_IDLE_THREAD
191 help
192 Enabled SMP Software; allows more than one CPU/CORE
193 to be activated during startup.
194
195config NR_CPUS
196 depends on SMP
197 int "Maximum number of CPUs (2-32)"
198 range 2 32
199 default "4"
200
49b424fe
MF
201config HOTPLUG_CPU
202 bool "Enable CPU hotplug support"
203 depends on SMP
204 help
205 Say Y here to allow turning CPUs off and on. CPUs can be
206 controlled through /sys/devices/system/cpu.
207
208 Say N if you want to disable CPU hotplug.
209
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MF
210config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
211 bool "Initialize Xtensa MMU inside the Linux kernel code"
212 default y
213 help
214 Earlier version initialized the MMU in the exception vector
215 before jumping to _startup in head.S and had an advantage that
216 it was possible to place a software breakpoint at 'reset' and
217 then enter your normal kernel breakpoints once the MMU was mapped
218 to the kernel mappings (0XC0000000).
219
220 This unfortunately doesn't work for U-Boot and likley also wont
221 work for using KEXEC to have a hot kernel ready for doing a
222 KDUMP.
223
224 So now the MMU is initialized in head.S but it's necessary to
225 use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup.
226 xt-gdb can't place a Software Breakpoint in the 0XD region prior
227 to mapping the MMU and after mapping even if the area of low memory
228 was mapped gdb wouldn't remove the breakpoint on hitting it as the
229 PC wouldn't match. Since Hardware Breakpoints are recommended for
230 Linux configurations it seems reasonable to just assume they exist
231 and leave this older mechanism for unfortunate souls that choose
232 not to follow Tensilica's recommendation.
233
234 Selecting this will cause U-Boot to set the KERNEL Load and Entry
235 address at 0x00003000 instead of the mapped std of 0xD0003000.
236
237 If in doubt, say Y.
238
d39af902
MF
239config KSEG_PADDR
240 hex "Physical address of the KSEG mapping"
241 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU
242 default 0x00000000
243 help
244 This is the physical address where KSEG is mapped. Please refer to
245 the chosen KSEG layout help for the required address alignment.
246 Unpacked kernel image (including vectors) must be located completely
247 within KSEG.
248 Physical memory below this address is not available to linux.
249
250 If unsure, leave the default value here.
251
a9f2fc62
MF
252config KERNEL_LOAD_ADDRESS
253 hex "Kernel load address"
254 default 0x00003000
255 help
256 This is the address where the kernel is loaded.
257 It is virtual address for MMUv2 configurations and physical address
258 for all other configurations.
259
260 If unsure, leave the default value here.
261
262config VECTORS_OFFSET
263 hex "Kernel vectors offset"
264 default 0x00003000
265 help
266 This is the offset of the kernel image from the relocatable vectors
267 base.
268
269 If unsure, leave the default value here.
270
d39af902
MF
271choice
272 prompt "KSEG layout"
273 depends on MMU
274 default XTENSA_KSEG_MMU_V2
275
276config XTENSA_KSEG_MMU_V2
277 bool "MMUv2: 128MB cached + 128MB uncached"
278 help
279 MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting
280 at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000
281 without cache.
282 KSEG_PADDR must be aligned to 128MB.
283
284config XTENSA_KSEG_256M
285 bool "256MB cached + 256MB uncached"
286 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
287 help
288 TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000
289 with cache and to 0xc0000000 without cache.
290 KSEG_PADDR must be aligned to 256MB.
291
292config XTENSA_KSEG_512M
293 bool "512MB cached + 512MB uncached"
294 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
295 help
296 TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000
297 with cache and to 0xc0000000 without cache.
298 KSEG_PADDR must be aligned to 256MB.
299
300endchoice
301
65559100
MF
302config HIGHMEM
303 bool "High Memory Support"
8a9de059 304 depends on MMU
65559100
MF
305 help
306 Linux can use the full amount of RAM in the system by
307 default. However, the default MMUv2 setup only maps the
308 lowermost 128 MB of memory linearly to the areas starting
309 at 0xd0000000 (cached) and 0xd8000000 (uncached).
310 When there are more than 128 MB memory in the system not
311 all of it can be "permanently mapped" by the kernel.
312 The physical memory that's not permanently mapped is called
313 "high memory".
314
315 If you are compiling a kernel which will never run on a
316 machine with more than 128 MB total physical RAM, answer
317 N here.
318
319 If unsure, say Y.
320
9184289c
MF
321config FAST_SYSCALL_XTENSA
322 bool "Enable fast atomic syscalls"
323 default n
324 help
325 fast_syscall_xtensa is a syscall that can make atomic operations
326 on UP kernel when processor has no s32c1i support.
327
328 This syscall is deprecated. It may have issues when called with
329 invalid arguments. It is provided only for backwards compatibility.
330 Only enable it if your userspace software requires it.
331
332 If unsure, say N.
333
334config FAST_SYSCALL_SPILL_REGISTERS
335 bool "Enable spill registers syscall"
336 default n
337 help
338 fast_syscall_spill_registers is a syscall that spills all active
339 register windows of a calling userspace task onto its stack.
340
341 This syscall is deprecated. It may have issues when called with
342 invalid arguments. It is provided only for backwards compatibility.
343 Only enable it if your userspace software requires it.
344
345 If unsure, say N.
346
8e1a6dd2
CZ
347endmenu
348
35f9cd08
JW
349config XTENSA_CALIBRATE_CCOUNT
350 def_bool n
351 help
352 On some platforms (XT2000, for example), the CPU clock rate can
353 vary. The frequency can be determined, however, by measuring
354 against a well known, fixed frequency, such as an UART oscillator.
355
356config SERIAL_CONSOLE
357 def_bool n
358
35f9cd08
JW
359menu "Bus options"
360
361config PCI
362 bool "PCI support"
363 default y
364 help
365 Find out whether you have a PCI motherboard. PCI is the name of a
366 bus system, i.e. the way the CPU talks to the other stuff inside
367 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
368 VESA. If you have PCI, say Y, otherwise N.
369
370source "drivers/pci/Kconfig"
371
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372endmenu
373
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374menu "Platform options"
375
376choice
377 prompt "Xtensa System Type"
378 default XTENSA_PLATFORM_ISS
379
380config XTENSA_PLATFORM_ISS
381 bool "ISS"
35f9cd08
JW
382 select XTENSA_CALIBRATE_CCOUNT
383 select SERIAL_CONSOLE
8e1a6dd2
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384 help
385 ISS is an acronym for Tensilica's Instruction Set Simulator.
386
387config XTENSA_PLATFORM_XT2000
388 bool "XT2000"
4964527d 389 select HAVE_IDE
8e1a6dd2
CZ
390 help
391 XT2000 is the name of Tensilica's feature-rich emulation platform.
392 This hardware is capable of running a full Linux distribution.
393
0d456bad
MF
394config XTENSA_PLATFORM_XTFPGA
395 bool "XTFPGA"
61e47e9b 396 select ETHOC if ETHERNET
3de00482 397 select PLATFORM_WANT_DEFAULT_MEM if !MMU
0d456bad 398 select SERIAL_CONSOLE
0d456bad
MF
399 select XTENSA_CALIBRATE_CCOUNT
400 help
401 XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605).
402 This hardware is capable of running a full Linux distribution.
403
8e1a6dd2
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404endchoice
405
406
8e1a6dd2
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407config XTENSA_CPU_CLOCK
408 int "CPU clock rate [MHz]"
409 depends on !XTENSA_CALIBRATE_CCOUNT
35f9cd08 410 default 16
8e1a6dd2
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411
412config GENERIC_CALIBRATE_DELAY
413 bool "Auto calibration of the BogoMIPS value"
35f9cd08 414 help
82300bf4 415 The BogoMIPS value can easily be derived from the CPU frequency.
8e1a6dd2
CZ
416
417config CMDLINE_BOOL
418 bool "Default bootloader kernel arguments"
419
420config CMDLINE
421 string "Initial kernel command string"
422 depends on CMDLINE_BOOL
423 default "console=ttyS0,38400 root=/dev/ram"
424 help
425 On some architectures (EBSA110 and CATS), there is currently no way
426 for the boot loader to pass arguments to the kernel. For these
427 architectures, you should supply some command-line options at build
428 time by entering them here. As a minimum, you should specify the
429 memory size and the root device (e.g., mem=64M root=/dev/nfs).
430
da844a81
MF
431config USE_OF
432 bool "Flattened Device Tree support"
433 select OF
434 select OF_EARLY_FLATTREE
435 help
436 Include support for flattened device tree machine descriptions.
437
438config BUILTIN_DTB
439 string "DTB to build into the kernel image"
440 depends on OF
441
b6c7e873
VP
442config BLK_DEV_SIMDISK
443 tristate "Host file-based simulated block device support"
444 default n
7a0684cd 445 depends on XTENSA_PLATFORM_ISS && BLOCK
b6c7e873
VP
446 help
447 Create block devices that map to files in the host file system.
448 Device binding to host file may be changed at runtime via proc
449 interface provided the device is not in use.
450
451config BLK_DEV_SIMDISK_COUNT
452 int "Number of host file-based simulated block devices"
453 range 1 10
454 depends on BLK_DEV_SIMDISK
455 default 2
456 help
457 This is the default minimal number of created block devices.
458 Kernel/module parameter 'simdisk_count' may be used to change this
459 value at runtime. More file names (but no more than 10) may be
460 specified as parameters, simdisk_count grows accordingly.
461
462config SIMDISK0_FILENAME
463 string "Host filename for the first simulated device"
464 depends on BLK_DEV_SIMDISK = y
465 default ""
466 help
467 Attach a first simdisk to a host file. Conventionally, this file
468 contains a root file system.
469
470config SIMDISK1_FILENAME
471 string "Host filename for the second simulated device"
472 depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1
473 default ""
474 help
475 Another simulated disk in a host file for a buildroot-independent
476 storage.
477
82300bf4
CZ
478source "mm/Kconfig"
479
a9df9338
MF
480config FORCE_MAX_ZONEORDER
481 int "Maximum zone order"
482 default "11"
483 help
484 The kernel memory allocator divides physically contiguous memory
485 blocks into "zones", where each zone is a power of two number of
486 pages. This option selects the largest power of two that the kernel
487 keeps in the memory allocator. If you need to allocate very large
488 blocks of physically contiguous memory, then you may need to
489 increase this value.
490
491 This config option is actually maximum order plus one. For example,
492 a value of 11 means that the largest free memory block is 2^10 pages.
493
8e1a6dd2
CZ
494source "drivers/pcmcia/Kconfig"
495
3932b9ca
MF
496config PLATFORM_WANT_DEFAULT_MEM
497 def_bool n
498
499config DEFAULT_MEM_START
500 hex "Physical address of the default memory area start"
501 depends on PLATFORM_WANT_DEFAULT_MEM
502 default 0x00000000 if MMU
d9eb3cb2 503 default 0x60000000 if !MMU
3932b9ca 504 help
3de00482
MF
505 This is the base address of the default memory area.
506 Default memory area has platform-specific meaning, it may be used
507 for e.g. early cache initialization.
3932b9ca
MF
508
509 If unsure, leave the default value here.
510
511config DEFAULT_MEM_SIZE
512 hex "Maximal size of the default memory area"
513 depends on PLATFORM_WANT_DEFAULT_MEM
514 default 0x04000000
515 help
3de00482
MF
516 This is the size of the default memory area.
517 Default memory area has platform-specific meaning, it may be used
518 for e.g. early cache initialization.
3932b9ca
MF
519
520 If unsure, leave the default value here.
521
4949009e
MF
522config XTFPGA_LCD
523 bool "Enable XTFPGA LCD driver"
524 depends on XTENSA_PLATFORM_XTFPGA
525 default n
526 help
527 There's a 2x16 LCD on most of XTFPGA boards, kernel may output
528 progress messages there during bootup/shutdown. It may be useful
529 during board bringup.
530
531 If unsure, say N.
532
533config XTFPGA_LCD_BASE_ADDR
534 hex "XTFPGA LCD base address"
535 depends on XTFPGA_LCD
536 default "0x0d0c0000"
537 help
538 Base address of the LCD controller inside KIO region.
539 Different boards from XTFPGA family have LCD controller at different
540 addresses. Please consult prototyping user guide for your board for
541 the correct address. Wrong address here may lead to hardware lockup.
542
543config XTFPGA_LCD_8BIT_ACCESS
544 bool "Use 8-bit access to XTFPGA LCD"
545 depends on XTFPGA_LCD
546 default n
547 help
548 LCD may be connected with 4- or 8-bit interface, 8-bit access may
549 only be used with 8-bit interface. Please consult prototyping user
550 guide for your board for the correct interface width.
551
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552endmenu
553
cab00891 554menu "Executable file formats"
8e1a6dd2 555
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556source "fs/Kconfig.binfmt"
557
558endmenu
559
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560menu "Power management options"
561
562source "kernel/power/Kconfig"
563
564endmenu
565
d5950b43
SR
566source "net/Kconfig"
567
8e1a6dd2
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568source "drivers/Kconfig"
569
570source "fs/Kconfig"
571
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572source "arch/xtensa/Kconfig.debug"
573
574source "security/Kconfig"
575
576source "crypto/Kconfig"
577
578source "lib/Kconfig"
579
580