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1 | /* |
2 | * arch/xtensa/kernel/entry.S | |
3 | * | |
4 | * Low-level exception handling | |
5 | * | |
6 | * This file is subject to the terms and conditions of the GNU General Public | |
7 | * License. See the file "COPYING" in the main directory of this archive | |
8 | * for more details. | |
9 | * | |
6656920b | 10 | * Copyright (C) 2004-2007 by Tensilica Inc. |
5a0015d6 CZ |
11 | * |
12 | * Chris Zankel <chris@zankel.net> | |
13 | * | |
14 | */ | |
15 | ||
16 | #include <linux/linkage.h> | |
0013a854 | 17 | #include <asm/asm-offsets.h> |
5a0015d6 CZ |
18 | #include <asm/processor.h> |
19 | #include <asm/thread_info.h> | |
20 | #include <asm/uaccess.h> | |
21 | #include <asm/unistd.h> | |
22 | #include <asm/ptrace.h> | |
23 | #include <asm/current.h> | |
24 | #include <asm/pgtable.h> | |
25 | #include <asm/page.h> | |
26 | #include <asm/signal.h> | |
173d6681 | 27 | #include <asm/tlbflush.h> |
c658eac6 | 28 | #include <asm/variant/tie-asm.h> |
5a0015d6 CZ |
29 | |
30 | /* Unimplemented features. */ | |
31 | ||
5a0015d6 CZ |
32 | #undef KERNEL_STACK_OVERFLOW_CHECK |
33 | #undef PREEMPTIBLE_KERNEL | |
34 | #undef ALLOCA_EXCEPTION_IN_IRAM | |
35 | ||
36 | /* Not well tested. | |
37 | * | |
38 | * - fast_coprocessor | |
39 | */ | |
40 | ||
41 | /* | |
42 | * Macro to find first bit set in WINDOWBASE from the left + 1 | |
43 | * | |
44 | * 100....0 -> 1 | |
45 | * 010....0 -> 2 | |
46 | * 000....1 -> WSBITS | |
47 | */ | |
48 | ||
49 | .macro ffs_ws bit mask | |
50 | ||
51 | #if XCHAL_HAVE_NSA | |
52 | nsau \bit, \mask # 32-WSBITS ... 31 (32 iff 0) | |
53 | addi \bit, \bit, WSBITS - 32 + 1 # uppest bit set -> return 1 | |
54 | #else | |
55 | movi \bit, WSBITS | |
56 | #if WSBITS > 16 | |
57 | _bltui \mask, 0x10000, 99f | |
58 | addi \bit, \bit, -16 | |
59 | extui \mask, \mask, 16, 16 | |
60 | #endif | |
61 | #if WSBITS > 8 | |
62 | 99: _bltui \mask, 0x100, 99f | |
63 | addi \bit, \bit, -8 | |
64 | srli \mask, \mask, 8 | |
65 | #endif | |
66 | 99: _bltui \mask, 0x10, 99f | |
67 | addi \bit, \bit, -4 | |
68 | srli \mask, \mask, 4 | |
69 | 99: _bltui \mask, 0x4, 99f | |
70 | addi \bit, \bit, -2 | |
71 | srli \mask, \mask, 2 | |
72 | 99: _bltui \mask, 0x2, 99f | |
73 | addi \bit, \bit, -1 | |
74 | 99: | |
75 | ||
76 | #endif | |
77 | .endm | |
78 | ||
79 | /* ----------------- DEFAULT FIRST LEVEL EXCEPTION HANDLERS ----------------- */ | |
80 | ||
81 | /* | |
82 | * First-level exception handler for user exceptions. | |
83 | * Save some special registers, extra states and all registers in the AR | |
84 | * register file that were in use in the user task, and jump to the common | |
85 | * exception code. | |
86 | * We save SAR (used to calculate WMASK), and WB and WS (we don't have to | |
87 | * save them for kernel exceptions). | |
88 | * | |
89 | * Entry condition for user_exception: | |
90 | * | |
91 | * a0: trashed, original value saved on stack (PT_AREG0) | |
92 | * a1: a1 | |
93 | * a2: new stack pointer, original value in depc | |
94 | * a3: dispatch table | |
95 | * depc: a2, original value saved on stack (PT_DEPC) | |
96 | * excsave1: a3 | |
97 | * | |
98 | * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC | |
99 | * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception | |
100 | * | |
101 | * Entry condition for _user_exception: | |
102 | * | |
103 | * a0-a3 and depc have been saved to PT_AREG0...PT_AREG3 and PT_DEPC | |
104 | * excsave has been restored, and | |
105 | * stack pointer (a1) has been set. | |
106 | * | |
107 | * Note: _user_exception might be at an odd adress. Don't use call0..call12 | |
108 | */ | |
109 | ||
110 | ENTRY(user_exception) | |
111 | ||
112 | /* Save a2, a3, and depc, restore excsave_1 and set SP. */ | |
113 | ||
114 | xsr a3, EXCSAVE_1 | |
115 | rsr a0, DEPC | |
116 | s32i a1, a2, PT_AREG1 | |
117 | s32i a0, a2, PT_AREG2 | |
118 | s32i a3, a2, PT_AREG3 | |
119 | mov a1, a2 | |
120 | ||
121 | .globl _user_exception | |
122 | _user_exception: | |
123 | ||
124 | /* Save SAR and turn off single stepping */ | |
125 | ||
126 | movi a2, 0 | |
127 | rsr a3, SAR | |
29c4dfd9 | 128 | xsr a2, ICOUNTLEVEL |
5a0015d6 | 129 | s32i a3, a1, PT_SAR |
29c4dfd9 | 130 | s32i a2, a1, PT_ICOUNTLEVEL |
5a0015d6 CZ |
131 | |
132 | /* Rotate ws so that the current windowbase is at bit0. */ | |
133 | /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */ | |
134 | ||
135 | rsr a2, WINDOWBASE | |
136 | rsr a3, WINDOWSTART | |
137 | ssr a2 | |
138 | s32i a2, a1, PT_WINDOWBASE | |
139 | s32i a3, a1, PT_WINDOWSTART | |
140 | slli a2, a3, 32-WSBITS | |
141 | src a2, a3, a2 | |
142 | srli a2, a2, 32-WSBITS | |
143 | s32i a2, a1, PT_WMASK # needed for restoring registers | |
144 | ||
145 | /* Save only live registers. */ | |
146 | ||
147 | _bbsi.l a2, 1, 1f | |
148 | s32i a4, a1, PT_AREG4 | |
149 | s32i a5, a1, PT_AREG5 | |
150 | s32i a6, a1, PT_AREG6 | |
151 | s32i a7, a1, PT_AREG7 | |
152 | _bbsi.l a2, 2, 1f | |
153 | s32i a8, a1, PT_AREG8 | |
154 | s32i a9, a1, PT_AREG9 | |
155 | s32i a10, a1, PT_AREG10 | |
156 | s32i a11, a1, PT_AREG11 | |
157 | _bbsi.l a2, 3, 1f | |
158 | s32i a12, a1, PT_AREG12 | |
159 | s32i a13, a1, PT_AREG13 | |
160 | s32i a14, a1, PT_AREG14 | |
161 | s32i a15, a1, PT_AREG15 | |
162 | _bnei a2, 1, 1f # only one valid frame? | |
163 | ||
164 | /* Only one valid frame, skip saving regs. */ | |
165 | ||
166 | j 2f | |
167 | ||
168 | /* Save the remaining registers. | |
169 | * We have to save all registers up to the first '1' from | |
170 | * the right, except the current frame (bit 0). | |
171 | * Assume a2 is: 001001000110001 | |
6656920b | 172 | * All register frames starting from the top field to the marked '1' |
5a0015d6 CZ |
173 | * must be saved. |
174 | */ | |
175 | ||
176 | 1: addi a3, a2, -1 # eliminate '1' in bit 0: yyyyxxww0 | |
177 | neg a3, a3 # yyyyxxww0 -> YYYYXXWW1+1 | |
178 | and a3, a3, a2 # max. only one bit is set | |
179 | ||
180 | /* Find number of frames to save */ | |
181 | ||
182 | ffs_ws a0, a3 # number of frames to the '1' from left | |
183 | ||
184 | /* Store information into WMASK: | |
185 | * bits 0..3: xxx1 masked lower 4 bits of the rotated windowstart, | |
186 | * bits 4...: number of valid 4-register frames | |
187 | */ | |
188 | ||
189 | slli a3, a0, 4 # number of frames to save in bits 8..4 | |
190 | extui a2, a2, 0, 4 # mask for the first 16 registers | |
191 | or a2, a3, a2 | |
192 | s32i a2, a1, PT_WMASK # needed when we restore the reg-file | |
193 | ||
194 | /* Save 4 registers at a time */ | |
195 | ||
196 | 1: rotw -1 | |
197 | s32i a0, a5, PT_AREG_END - 16 | |
198 | s32i a1, a5, PT_AREG_END - 12 | |
199 | s32i a2, a5, PT_AREG_END - 8 | |
200 | s32i a3, a5, PT_AREG_END - 4 | |
201 | addi a0, a4, -1 | |
202 | addi a1, a5, -16 | |
203 | _bnez a0, 1b | |
204 | ||
205 | /* WINDOWBASE still in SAR! */ | |
206 | ||
207 | rsr a2, SAR # original WINDOWBASE | |
208 | movi a3, 1 | |
209 | ssl a2 | |
210 | sll a3, a3 | |
211 | wsr a3, WINDOWSTART # set corresponding WINDOWSTART bit | |
212 | wsr a2, WINDOWBASE # and WINDOWSTART | |
213 | rsync | |
214 | ||
215 | /* We are back to the original stack pointer (a1) */ | |
216 | ||
c658eac6 | 217 | 2: /* Now, jump to the common exception handler. */ |
5a0015d6 CZ |
218 | |
219 | j common_exception | |
220 | ||
221 | ||
222 | /* | |
223 | * First-level exit handler for kernel exceptions | |
224 | * Save special registers and the live window frame. | |
225 | * Note: Even though we changes the stack pointer, we don't have to do a | |
226 | * MOVSP here, as we do that when we return from the exception. | |
227 | * (See comment in the kernel exception exit code) | |
228 | * | |
229 | * Entry condition for kernel_exception: | |
230 | * | |
231 | * a0: trashed, original value saved on stack (PT_AREG0) | |
232 | * a1: a1 | |
233 | * a2: new stack pointer, original in DEPC | |
234 | * a3: dispatch table | |
235 | * depc: a2, original value saved on stack (PT_DEPC) | |
236 | * excsave_1: a3 | |
237 | * | |
238 | * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC | |
239 | * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception | |
240 | * | |
241 | * Entry condition for _kernel_exception: | |
242 | * | |
243 | * a0-a3 and depc have been saved to PT_AREG0...PT_AREG3 and PT_DEPC | |
244 | * excsave has been restored, and | |
245 | * stack pointer (a1) has been set. | |
246 | * | |
247 | * Note: _kernel_exception might be at an odd adress. Don't use call0..call12 | |
248 | */ | |
249 | ||
250 | ENTRY(kernel_exception) | |
251 | ||
252 | /* Save a0, a2, a3, DEPC and set SP. */ | |
253 | ||
254 | xsr a3, EXCSAVE_1 # restore a3, excsave_1 | |
255 | rsr a0, DEPC # get a2 | |
256 | s32i a1, a2, PT_AREG1 | |
257 | s32i a0, a2, PT_AREG2 | |
258 | s32i a3, a2, PT_AREG3 | |
259 | mov a1, a2 | |
260 | ||
261 | .globl _kernel_exception | |
262 | _kernel_exception: | |
263 | ||
264 | /* Save SAR and turn off single stepping */ | |
265 | ||
266 | movi a2, 0 | |
267 | rsr a3, SAR | |
29c4dfd9 | 268 | xsr a2, ICOUNTLEVEL |
5a0015d6 | 269 | s32i a3, a1, PT_SAR |
29c4dfd9 | 270 | s32i a2, a1, PT_ICOUNTLEVEL |
5a0015d6 CZ |
271 | |
272 | /* Rotate ws so that the current windowbase is at bit0. */ | |
273 | /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */ | |
274 | ||
275 | rsr a2, WINDOWBASE # don't need to save these, we only | |
276 | rsr a3, WINDOWSTART # need shifted windowstart: windowmask | |
277 | ssr a2 | |
278 | slli a2, a3, 32-WSBITS | |
279 | src a2, a3, a2 | |
280 | srli a2, a2, 32-WSBITS | |
281 | s32i a2, a1, PT_WMASK # needed for kernel_exception_exit | |
282 | ||
283 | /* Save only the live window-frame */ | |
284 | ||
285 | _bbsi.l a2, 1, 1f | |
286 | s32i a4, a1, PT_AREG4 | |
287 | s32i a5, a1, PT_AREG5 | |
288 | s32i a6, a1, PT_AREG6 | |
289 | s32i a7, a1, PT_AREG7 | |
290 | _bbsi.l a2, 2, 1f | |
291 | s32i a8, a1, PT_AREG8 | |
292 | s32i a9, a1, PT_AREG9 | |
293 | s32i a10, a1, PT_AREG10 | |
294 | s32i a11, a1, PT_AREG11 | |
295 | _bbsi.l a2, 3, 1f | |
296 | s32i a12, a1, PT_AREG12 | |
297 | s32i a13, a1, PT_AREG13 | |
298 | s32i a14, a1, PT_AREG14 | |
299 | s32i a15, a1, PT_AREG15 | |
300 | ||
301 | 1: | |
302 | ||
303 | #ifdef KERNEL_STACK_OVERFLOW_CHECK | |
304 | ||
305 | /* Stack overflow check, for debugging */ | |
306 | extui a2, a1, TASK_SIZE_BITS,XX | |
307 | movi a3, SIZE?? | |
308 | _bge a2, a3, out_of_stack_panic | |
309 | ||
310 | #endif | |
311 | ||
312 | /* | |
313 | * This is the common exception handler. | |
314 | * We get here from the user exception handler or simply by falling through | |
315 | * from the kernel exception handler. | |
316 | * Save the remaining special registers, switch to kernel mode, and jump | |
317 | * to the second-level exception handler. | |
318 | * | |
319 | */ | |
320 | ||
321 | common_exception: | |
322 | ||
29c4dfd9 | 323 | /* Save some registers, disable loops and clear the syscall flag. */ |
5a0015d6 CZ |
324 | |
325 | rsr a2, DEBUGCAUSE | |
326 | rsr a3, EPC_1 | |
327 | s32i a2, a1, PT_DEBUGCAUSE | |
328 | s32i a3, a1, PT_PC | |
329 | ||
29c4dfd9 | 330 | movi a2, -1 |
5a0015d6 | 331 | rsr a3, EXCVADDR |
29c4dfd9 | 332 | s32i a2, a1, PT_SYSCALL |
5a0015d6 CZ |
333 | movi a2, 0 |
334 | s32i a3, a1, PT_EXCVADDR | |
335 | xsr a2, LCOUNT | |
336 | s32i a2, a1, PT_LCOUNT | |
337 | ||
338 | /* It is now save to restore the EXC_TABLE_FIXUP variable. */ | |
339 | ||
340 | rsr a0, EXCCAUSE | |
341 | movi a3, 0 | |
342 | rsr a2, EXCSAVE_1 | |
343 | s32i a0, a1, PT_EXCCAUSE | |
344 | s32i a3, a2, EXC_TABLE_FIXUP | |
345 | ||
346 | /* All unrecoverable states are saved on stack, now, and a1 is valid, | |
347 | * so we can allow exceptions and interrupts (*) again. | |
348 | * Set PS(EXCM = 0, UM = 0, RING = 0, OWB = 0, WOE = 1, INTLEVEL = X) | |
349 | * | |
350 | * (*) We only allow interrupts if PS.INTLEVEL was not set to 1 before | |
351 | * (interrupts disabled) and if this exception is not an interrupt. | |
352 | */ | |
353 | ||
354 | rsr a3, PS | |
355 | addi a0, a0, -4 | |
356 | movi a2, 1 | |
357 | extui a3, a3, 0, 1 # a3 = PS.INTLEVEL[0] | |
358 | moveqz a3, a2, a0 # a3 = 1 iff interrupt exception | |
173d6681 | 359 | movi a2, 1 << PS_WOE_BIT |
5a0015d6 CZ |
360 | or a3, a3, a2 |
361 | rsr a0, EXCCAUSE | |
362 | xsr a3, PS | |
363 | ||
364 | s32i a3, a1, PT_PS # save ps | |
365 | ||
366 | /* Save LBEG, LEND */ | |
367 | ||
368 | rsr a2, LBEG | |
369 | rsr a3, LEND | |
370 | s32i a2, a1, PT_LBEG | |
371 | s32i a3, a1, PT_LEND | |
372 | ||
c658eac6 CZ |
373 | /* Save optional registers. */ |
374 | ||
375 | save_xtregs_opt a1 a2 a4 a5 a6 a7 PT_XTREGS_OPT | |
376 | ||
5a0015d6 CZ |
377 | /* Go to second-level dispatcher. Set up parameters to pass to the |
378 | * exception handler and call the exception handler. | |
379 | */ | |
380 | ||
381 | movi a4, exc_table | |
382 | mov a6, a1 # pass stack frame | |
383 | mov a7, a0 # pass EXCCAUSE | |
384 | addx4 a4, a0, a4 | |
385 | l32i a4, a4, EXC_TABLE_DEFAULT # load handler | |
386 | ||
387 | /* Call the second-level handler */ | |
388 | ||
389 | callx4 a4 | |
390 | ||
391 | /* Jump here for exception exit */ | |
392 | ||
393 | common_exception_return: | |
394 | ||
395 | /* Jump if we are returning from kernel exceptions. */ | |
396 | ||
397 | 1: l32i a3, a1, PT_PS | |
173d6681 | 398 | _bbsi.l a3, PS_UM_BIT, 2f |
5a0015d6 CZ |
399 | j kernel_exception_exit |
400 | ||
401 | /* Specific to a user exception exit: | |
402 | * We need to check some flags for signal handling and rescheduling, | |
403 | * and have to restore WB and WS, extra states, and all registers | |
404 | * in the register file that were in use in the user task. | |
405 | */ | |
406 | ||
407 | 2: wsr a3, PS /* disable interrupts */ | |
408 | ||
409 | /* Check for signals (keep interrupts disabled while we read TI_FLAGS) | |
410 | * Note: PS.INTLEVEL = 0, PS.EXCM = 1 | |
411 | */ | |
412 | ||
413 | GET_THREAD_INFO(a2,a1) | |
414 | l32i a4, a2, TI_FLAGS | |
415 | ||
416 | /* Enable interrupts again. | |
417 | * Note: When we get here, we certainly have handled any interrupts. | |
418 | * (Hint: There is only one user exception frame on stack) | |
419 | */ | |
420 | ||
173d6681 | 421 | movi a3, 1 << PS_WOE_BIT |
5a0015d6 CZ |
422 | |
423 | _bbsi.l a4, TIF_NEED_RESCHED, 3f | |
424 | _bbci.l a4, TIF_SIGPENDING, 4f | |
425 | ||
5a0015d6 CZ |
426 | l32i a4, a1, PT_DEPC |
427 | bgeui a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 4f | |
5a0015d6 CZ |
428 | /* Reenable interrupts and call do_signal() */ |
429 | ||
430 | wsr a3, PS | |
431 | movi a4, do_signal # int do_signal(struct pt_regs*, sigset_t*) | |
432 | mov a6, a1 | |
433 | movi a7, 0 | |
434 | callx4 a4 | |
435 | j 1b | |
436 | ||
437 | 3: /* Reenable interrupts and reschedule */ | |
438 | ||
439 | wsr a3, PS | |
440 | movi a4, schedule # void schedule (void) | |
441 | callx4 a4 | |
442 | j 1b | |
443 | ||
444 | /* Restore the state of the task and return from the exception. */ | |
445 | ||
5a0015d6 CZ |
446 | 4: /* a2 holds GET_CURRENT(a2,a1) */ |
447 | ||
5a0015d6 CZ |
448 | /* Switch to the user thread WINDOWBASE. Save SP temporarily in DEPC */ |
449 | ||
450 | l32i a2, a1, PT_WINDOWBASE | |
451 | l32i a3, a1, PT_WINDOWSTART | |
452 | wsr a1, DEPC # use DEPC as temp storage | |
453 | wsr a3, WINDOWSTART # restore WINDOWSTART | |
454 | ssr a2 # preserve user's WB in the SAR | |
455 | wsr a2, WINDOWBASE # switch to user's saved WB | |
456 | rsync | |
457 | rsr a1, DEPC # restore stack pointer | |
458 | l32i a2, a1, PT_WMASK # register frames saved (in bits 4...9) | |
459 | rotw -1 # we restore a4..a7 | |
460 | _bltui a6, 16, 1f # only have to restore current window? | |
461 | ||
462 | /* The working registers are a0 and a3. We are restoring to | |
463 | * a4..a7. Be careful not to destroy what we have just restored. | |
464 | * Note: wmask has the format YYYYM: | |
465 | * Y: number of registers saved in groups of 4 | |
466 | * M: 4 bit mask of first 16 registers | |
467 | */ | |
468 | ||
469 | mov a2, a6 | |
470 | mov a3, a5 | |
471 | ||
472 | 2: rotw -1 # a0..a3 become a4..a7 | |
473 | addi a3, a7, -4*4 # next iteration | |
474 | addi a2, a6, -16 # decrementing Y in WMASK | |
475 | l32i a4, a3, PT_AREG_END + 0 | |
476 | l32i a5, a3, PT_AREG_END + 4 | |
477 | l32i a6, a3, PT_AREG_END + 8 | |
478 | l32i a7, a3, PT_AREG_END + 12 | |
479 | _bgeui a2, 16, 2b | |
480 | ||
481 | /* Clear unrestored registers (don't leak anything to user-land */ | |
482 | ||
483 | 1: rsr a0, WINDOWBASE | |
484 | rsr a3, SAR | |
485 | sub a3, a0, a3 | |
486 | beqz a3, 2f | |
487 | extui a3, a3, 0, WBBITS | |
488 | ||
489 | 1: rotw -1 | |
490 | addi a3, a7, -1 | |
491 | movi a4, 0 | |
492 | movi a5, 0 | |
493 | movi a6, 0 | |
494 | movi a7, 0 | |
495 | bgei a3, 1, 1b | |
496 | ||
497 | /* We are back were we were when we started. | |
498 | * Note: a2 still contains WMASK (if we've returned to the original | |
499 | * frame where we had loaded a2), or at least the lower 4 bits | |
500 | * (if we have restored WSBITS-1 frames). | |
501 | */ | |
502 | ||
503 | 2: j common_exception_exit | |
504 | ||
505 | /* This is the kernel exception exit. | |
506 | * We avoided to do a MOVSP when we entered the exception, but we | |
507 | * have to do it here. | |
508 | */ | |
509 | ||
510 | kernel_exception_exit: | |
511 | ||
512 | /* Disable interrupts (a3 holds PT_PS) */ | |
513 | ||
514 | wsr a3, PS | |
515 | ||
516 | #ifdef PREEMPTIBLE_KERNEL | |
517 | ||
518 | #ifdef CONFIG_PREEMPT | |
519 | ||
520 | /* | |
521 | * Note: We've just returned from a call4, so we have | |
522 | * at least 4 addt'l regs. | |
523 | */ | |
524 | ||
525 | /* Check current_thread_info->preempt_count */ | |
526 | ||
527 | GET_THREAD_INFO(a2) | |
528 | l32i a3, a2, TI_PREEMPT | |
529 | bnez a3, 1f | |
530 | ||
531 | l32i a2, a2, TI_FLAGS | |
532 | ||
533 | 1: | |
534 | ||
535 | #endif | |
536 | ||
537 | #endif | |
538 | ||
539 | /* Check if we have to do a movsp. | |
540 | * | |
541 | * We only have to do a movsp if the previous window-frame has | |
542 | * been spilled to the *temporary* exception stack instead of the | |
543 | * task's stack. This is the case if the corresponding bit in | |
544 | * WINDOWSTART for the previous window-frame was set before | |
545 | * (not spilled) but is zero now (spilled). | |
546 | * If this bit is zero, all other bits except the one for the | |
547 | * current window frame are also zero. So, we can use a simple test: | |
548 | * 'and' WINDOWSTART and WINDOWSTART-1: | |
549 | * | |
550 | * (XXXXXX1[0]* - 1) AND XXXXXX1[0]* = XXXXXX0[0]* | |
551 | * | |
552 | * The result is zero only if one bit was set. | |
553 | * | |
554 | * (Note: We might have gone through several task switches before | |
555 | * we come back to the current task, so WINDOWBASE might be | |
556 | * different from the time the exception occurred.) | |
557 | */ | |
558 | ||
559 | /* Test WINDOWSTART before and after the exception. | |
560 | * We actually have WMASK, so we only have to test if it is 1 or not. | |
561 | */ | |
562 | ||
563 | l32i a2, a1, PT_WMASK | |
564 | _beqi a2, 1, common_exception_exit # Spilled before exception,jump | |
565 | ||
566 | /* Test WINDOWSTART now. If spilled, do the movsp */ | |
567 | ||
568 | rsr a3, WINDOWSTART | |
569 | addi a0, a3, -1 | |
570 | and a3, a3, a0 | |
571 | _bnez a3, common_exception_exit | |
572 | ||
573 | /* Do a movsp (we returned from a call4, so we have at least a0..a7) */ | |
574 | ||
575 | addi a0, a1, -16 | |
576 | l32i a3, a0, 0 | |
577 | l32i a4, a0, 4 | |
578 | s32i a3, a1, PT_SIZE+0 | |
579 | s32i a4, a1, PT_SIZE+4 | |
580 | l32i a3, a0, 8 | |
581 | l32i a4, a0, 12 | |
582 | s32i a3, a1, PT_SIZE+8 | |
583 | s32i a4, a1, PT_SIZE+12 | |
584 | ||
585 | /* Common exception exit. | |
586 | * We restore the special register and the current window frame, and | |
587 | * return from the exception. | |
588 | * | |
589 | * Note: We expect a2 to hold PT_WMASK | |
590 | */ | |
591 | ||
592 | common_exception_exit: | |
593 | ||
c658eac6 CZ |
594 | /* Restore optional registers. */ |
595 | ||
596 | load_xtregs_opt a1 a3 a4 a5 a6 a7 PT_XTREGS_OPT | |
597 | ||
598 | /* Restore address registers. */ | |
599 | ||
5a0015d6 CZ |
600 | _bbsi.l a2, 1, 1f |
601 | l32i a4, a1, PT_AREG4 | |
602 | l32i a5, a1, PT_AREG5 | |
603 | l32i a6, a1, PT_AREG6 | |
604 | l32i a7, a1, PT_AREG7 | |
605 | _bbsi.l a2, 2, 1f | |
606 | l32i a8, a1, PT_AREG8 | |
607 | l32i a9, a1, PT_AREG9 | |
608 | l32i a10, a1, PT_AREG10 | |
609 | l32i a11, a1, PT_AREG11 | |
610 | _bbsi.l a2, 3, 1f | |
611 | l32i a12, a1, PT_AREG12 | |
612 | l32i a13, a1, PT_AREG13 | |
613 | l32i a14, a1, PT_AREG14 | |
614 | l32i a15, a1, PT_AREG15 | |
615 | ||
616 | /* Restore PC, SAR */ | |
617 | ||
618 | 1: l32i a2, a1, PT_PC | |
619 | l32i a3, a1, PT_SAR | |
620 | wsr a2, EPC_1 | |
621 | wsr a3, SAR | |
622 | ||
623 | /* Restore LBEG, LEND, LCOUNT */ | |
624 | ||
625 | l32i a2, a1, PT_LBEG | |
626 | l32i a3, a1, PT_LEND | |
627 | wsr a2, LBEG | |
628 | l32i a2, a1, PT_LCOUNT | |
629 | wsr a3, LEND | |
630 | wsr a2, LCOUNT | |
631 | ||
29c4dfd9 CZ |
632 | /* We control single stepping through the ICOUNTLEVEL register. */ |
633 | ||
634 | l32i a2, a1, PT_ICOUNTLEVEL | |
635 | movi a3, -2 | |
636 | wsr a2, ICOUNTLEVEL | |
637 | wsr a3, ICOUNT | |
638 | ||
5a0015d6 CZ |
639 | /* Check if it was double exception. */ |
640 | ||
641 | l32i a0, a1, PT_DEPC | |
642 | l32i a3, a1, PT_AREG3 | |
643 | l32i a2, a1, PT_AREG2 | |
644 | _bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f | |
645 | ||
646 | /* Restore a0...a3 and return */ | |
647 | ||
648 | l32i a0, a1, PT_AREG0 | |
649 | l32i a1, a1, PT_AREG1 | |
650 | rfe | |
651 | ||
652 | 1: wsr a0, DEPC | |
653 | l32i a0, a1, PT_AREG0 | |
654 | l32i a1, a1, PT_AREG1 | |
655 | rfde | |
656 | ||
657 | /* | |
658 | * Debug exception handler. | |
659 | * | |
660 | * Currently, we don't support KGDB, so only user application can be debugged. | |
661 | * | |
662 | * When we get here, a0 is trashed and saved to excsave[debuglevel] | |
663 | */ | |
664 | ||
665 | ENTRY(debug_exception) | |
666 | ||
667 | rsr a0, EPS + XCHAL_DEBUGLEVEL | |
173d6681 | 668 | bbsi.l a0, PS_EXCM_BIT, 1f # exception mode |
5a0015d6 CZ |
669 | |
670 | /* Set EPC_1 and EXCCAUSE */ | |
671 | ||
672 | wsr a2, DEPC # save a2 temporarily | |
673 | rsr a2, EPC + XCHAL_DEBUGLEVEL | |
674 | wsr a2, EPC_1 | |
675 | ||
676 | movi a2, EXCCAUSE_MAPPED_DEBUG | |
677 | wsr a2, EXCCAUSE | |
678 | ||
679 | /* Restore PS to the value before the debug exc but with PS.EXCM set.*/ | |
680 | ||
173d6681 | 681 | movi a2, 1 << PS_EXCM_BIT |
5a0015d6 CZ |
682 | or a2, a0, a2 |
683 | movi a0, debug_exception # restore a3, debug jump vector | |
684 | wsr a2, PS | |
685 | xsr a0, EXCSAVE + XCHAL_DEBUGLEVEL | |
686 | ||
687 | /* Switch to kernel/user stack, restore jump vector, and save a0 */ | |
688 | ||
173d6681 | 689 | bbsi.l a2, PS_UM_BIT, 2f # jump if user mode |
5a0015d6 CZ |
690 | |
691 | addi a2, a1, -16-PT_SIZE # assume kernel stack | |
692 | s32i a0, a2, PT_AREG0 | |
693 | movi a0, 0 | |
694 | s32i a1, a2, PT_AREG1 | |
695 | s32i a0, a2, PT_DEPC # mark it as a regular exception | |
696 | xsr a0, DEPC | |
697 | s32i a3, a2, PT_AREG3 | |
698 | s32i a0, a2, PT_AREG2 | |
699 | mov a1, a2 | |
700 | j _kernel_exception | |
701 | ||
702 | 2: rsr a2, EXCSAVE_1 | |
703 | l32i a2, a2, EXC_TABLE_KSTK # load kernel stack pointer | |
704 | s32i a0, a2, PT_AREG0 | |
705 | movi a0, 0 | |
706 | s32i a1, a2, PT_AREG1 | |
707 | s32i a0, a2, PT_DEPC | |
708 | xsr a0, DEPC | |
709 | s32i a3, a2, PT_AREG3 | |
710 | s32i a0, a2, PT_AREG2 | |
711 | mov a1, a2 | |
712 | j _user_exception | |
713 | ||
714 | /* Debug exception while in exception mode. */ | |
715 | 1: j 1b // FIXME!! | |
716 | ||
717 | ||
718 | /* | |
719 | * We get here in case of an unrecoverable exception. | |
720 | * The only thing we can do is to be nice and print a panic message. | |
721 | * We only produce a single stack frame for panic, so ??? | |
722 | * | |
723 | * | |
724 | * Entry conditions: | |
725 | * | |
726 | * - a0 contains the caller address; original value saved in excsave1. | |
727 | * - the original a0 contains a valid return address (backtrace) or 0. | |
728 | * - a2 contains a valid stackpointer | |
729 | * | |
730 | * Notes: | |
731 | * | |
732 | * - If the stack pointer could be invalid, the caller has to setup a | |
733 | * dummy stack pointer (e.g. the stack of the init_task) | |
734 | * | |
735 | * - If the return address could be invalid, the caller has to set it | |
736 | * to 0, so the backtrace would stop. | |
737 | * | |
738 | */ | |
739 | .align 4 | |
740 | unrecoverable_text: | |
741 | .ascii "Unrecoverable error in exception handler\0" | |
742 | ||
743 | ENTRY(unrecoverable_exception) | |
744 | ||
745 | movi a0, 1 | |
746 | movi a1, 0 | |
747 | ||
748 | wsr a0, WINDOWSTART | |
749 | wsr a1, WINDOWBASE | |
750 | rsync | |
751 | ||
173d6681 | 752 | movi a1, (1 << PS_WOE_BIT) | 1 |
5a0015d6 CZ |
753 | wsr a1, PS |
754 | rsync | |
755 | ||
756 | movi a1, init_task | |
757 | movi a0, 0 | |
758 | addi a1, a1, PT_REGS_OFFSET | |
759 | ||
760 | movi a4, panic | |
761 | movi a6, unrecoverable_text | |
762 | ||
763 | callx4 a4 | |
764 | ||
765 | 1: j 1b | |
766 | ||
767 | ||
768 | /* -------------------------- FAST EXCEPTION HANDLERS ----------------------- */ | |
769 | ||
770 | /* | |
771 | * Fast-handler for alloca exceptions | |
772 | * | |
773 | * The ALLOCA handler is entered when user code executes the MOVSP | |
774 | * instruction and the caller's frame is not in the register file. | |
775 | * In this case, the caller frame's a0..a3 are on the stack just | |
776 | * below sp (a1), and this handler moves them. | |
777 | * | |
778 | * For "MOVSP <ar>,<as>" without destination register a1, this routine | |
779 | * simply moves the value from <as> to <ar> without moving the save area. | |
780 | * | |
781 | * Entry condition: | |
782 | * | |
783 | * a0: trashed, original value saved on stack (PT_AREG0) | |
784 | * a1: a1 | |
785 | * a2: new stack pointer, original in DEPC | |
786 | * a3: dispatch table | |
787 | * depc: a2, original value saved on stack (PT_DEPC) | |
788 | * excsave_1: a3 | |
789 | * | |
790 | * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC | |
791 | * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception | |
792 | */ | |
793 | ||
794 | #if XCHAL_HAVE_BE | |
795 | #define _EXTUI_MOVSP_SRC(ar) extui ar, ar, 4, 4 | |
796 | #define _EXTUI_MOVSP_DST(ar) extui ar, ar, 0, 4 | |
797 | #else | |
798 | #define _EXTUI_MOVSP_SRC(ar) extui ar, ar, 0, 4 | |
799 | #define _EXTUI_MOVSP_DST(ar) extui ar, ar, 4, 4 | |
800 | #endif | |
801 | ||
802 | ENTRY(fast_alloca) | |
803 | ||
804 | /* We shouldn't be in a double exception. */ | |
805 | ||
806 | l32i a0, a2, PT_DEPC | |
807 | _bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, .Lunhandled_double | |
808 | ||
809 | rsr a0, DEPC # get a2 | |
810 | s32i a4, a2, PT_AREG4 # save a4 and | |
811 | s32i a0, a2, PT_AREG2 # a2 to stack | |
812 | ||
813 | /* Exit critical section. */ | |
814 | ||
815 | movi a0, 0 | |
816 | s32i a0, a3, EXC_TABLE_FIXUP | |
817 | ||
818 | /* Restore a3, excsave_1 */ | |
819 | ||
820 | xsr a3, EXCSAVE_1 # make sure excsave_1 is valid for dbl. | |
821 | rsr a4, EPC_1 # get exception address | |
822 | s32i a3, a2, PT_AREG3 # save a3 to stack | |
823 | ||
824 | #ifdef ALLOCA_EXCEPTION_IN_IRAM | |
825 | #error iram not supported | |
826 | #else | |
827 | /* Note: l8ui not allowed in IRAM/IROM!! */ | |
828 | l8ui a0, a4, 1 # read as(src) from MOVSP instruction | |
829 | #endif | |
830 | movi a3, .Lmovsp_src | |
831 | _EXTUI_MOVSP_SRC(a0) # extract source register number | |
832 | addx8 a3, a0, a3 | |
833 | jx a3 | |
834 | ||
835 | .Lunhandled_double: | |
836 | wsr a0, EXCSAVE_1 | |
837 | movi a0, unrecoverable_exception | |
838 | callx0 a0 | |
839 | ||
840 | .align 8 | |
841 | .Lmovsp_src: | |
842 | l32i a3, a2, PT_AREG0; _j 1f; .align 8 | |
843 | mov a3, a1; _j 1f; .align 8 | |
844 | l32i a3, a2, PT_AREG2; _j 1f; .align 8 | |
845 | l32i a3, a2, PT_AREG3; _j 1f; .align 8 | |
846 | l32i a3, a2, PT_AREG4; _j 1f; .align 8 | |
847 | mov a3, a5; _j 1f; .align 8 | |
848 | mov a3, a6; _j 1f; .align 8 | |
849 | mov a3, a7; _j 1f; .align 8 | |
850 | mov a3, a8; _j 1f; .align 8 | |
851 | mov a3, a9; _j 1f; .align 8 | |
852 | mov a3, a10; _j 1f; .align 8 | |
853 | mov a3, a11; _j 1f; .align 8 | |
854 | mov a3, a12; _j 1f; .align 8 | |
855 | mov a3, a13; _j 1f; .align 8 | |
856 | mov a3, a14; _j 1f; .align 8 | |
857 | mov a3, a15; _j 1f; .align 8 | |
858 | ||
859 | 1: | |
860 | ||
861 | #ifdef ALLOCA_EXCEPTION_IN_IRAM | |
862 | #error iram not supported | |
863 | #else | |
864 | l8ui a0, a4, 0 # read ar(dst) from MOVSP instruction | |
865 | #endif | |
866 | addi a4, a4, 3 # step over movsp | |
867 | _EXTUI_MOVSP_DST(a0) # extract destination register | |
868 | wsr a4, EPC_1 # save new epc_1 | |
869 | ||
870 | _bnei a0, 1, 1f # no 'movsp a1, ax': jump | |
871 | ||
872 | /* Move the save area. This implies the use of the L32E | |
873 | * and S32E instructions, because this move must be done with | |
874 | * the user's PS.RING privilege levels, not with ring 0 | |
875 | * (kernel's) privileges currently active with PS.EXCM | |
876 | * set. Note that we have stil registered a fixup routine with the | |
877 | * double exception vector in case a double exception occurs. | |
878 | */ | |
879 | ||
880 | /* a0,a4:avail a1:old user stack a2:exc. stack a3:new user stack. */ | |
881 | ||
882 | l32e a0, a1, -16 | |
883 | l32e a4, a1, -12 | |
884 | s32e a0, a3, -16 | |
885 | s32e a4, a3, -12 | |
886 | l32e a0, a1, -8 | |
887 | l32e a4, a1, -4 | |
888 | s32e a0, a3, -8 | |
889 | s32e a4, a3, -4 | |
890 | ||
891 | /* Restore stack-pointer and all the other saved registers. */ | |
892 | ||
893 | mov a1, a3 | |
894 | ||
895 | l32i a4, a2, PT_AREG4 | |
896 | l32i a3, a2, PT_AREG3 | |
897 | l32i a0, a2, PT_AREG0 | |
898 | l32i a2, a2, PT_AREG2 | |
899 | rfe | |
900 | ||
901 | /* MOVSP <at>,<as> was invoked with <at> != a1. | |
902 | * Because the stack pointer is not being modified, | |
903 | * we should be able to just modify the pointer | |
904 | * without moving any save area. | |
905 | * The processor only traps these occurrences if the | |
906 | * caller window isn't live, so unfortunately we can't | |
907 | * use this as an alternate trap mechanism. | |
908 | * So we just do the move. This requires that we | |
909 | * resolve the destination register, not just the source, | |
910 | * so there's some extra work. | |
911 | * (PERHAPS NOT REALLY NEEDED, BUT CLEANER...) | |
912 | */ | |
913 | ||
914 | /* a0 dst-reg, a1 user-stack, a2 stack, a3 value of src reg. */ | |
915 | ||
916 | 1: movi a4, .Lmovsp_dst | |
917 | addx8 a4, a0, a4 | |
918 | jx a4 | |
919 | ||
920 | .align 8 | |
921 | .Lmovsp_dst: | |
922 | s32i a3, a2, PT_AREG0; _j 1f; .align 8 | |
923 | mov a1, a3; _j 1f; .align 8 | |
924 | s32i a3, a2, PT_AREG2; _j 1f; .align 8 | |
925 | s32i a3, a2, PT_AREG3; _j 1f; .align 8 | |
926 | s32i a3, a2, PT_AREG4; _j 1f; .align 8 | |
927 | mov a5, a3; _j 1f; .align 8 | |
928 | mov a6, a3; _j 1f; .align 8 | |
929 | mov a7, a3; _j 1f; .align 8 | |
930 | mov a8, a3; _j 1f; .align 8 | |
931 | mov a9, a3; _j 1f; .align 8 | |
932 | mov a10, a3; _j 1f; .align 8 | |
933 | mov a11, a3; _j 1f; .align 8 | |
934 | mov a12, a3; _j 1f; .align 8 | |
935 | mov a13, a3; _j 1f; .align 8 | |
936 | mov a14, a3; _j 1f; .align 8 | |
937 | mov a15, a3; _j 1f; .align 8 | |
938 | ||
939 | 1: l32i a4, a2, PT_AREG4 | |
940 | l32i a3, a2, PT_AREG3 | |
941 | l32i a0, a2, PT_AREG0 | |
942 | l32i a2, a2, PT_AREG2 | |
943 | rfe | |
944 | ||
945 | ||
946 | /* | |
947 | * fast system calls. | |
948 | * | |
949 | * WARNING: The kernel doesn't save the entire user context before | |
950 | * handling a fast system call. These functions are small and short, | |
951 | * usually offering some functionality not available to user tasks. | |
952 | * | |
953 | * BE CAREFUL TO PRESERVE THE USER'S CONTEXT. | |
954 | * | |
955 | * Entry condition: | |
956 | * | |
957 | * a0: trashed, original value saved on stack (PT_AREG0) | |
958 | * a1: a1 | |
959 | * a2: new stack pointer, original in DEPC | |
960 | * a3: dispatch table | |
961 | * depc: a2, original value saved on stack (PT_DEPC) | |
962 | * excsave_1: a3 | |
963 | */ | |
964 | ||
965 | ENTRY(fast_syscall_kernel) | |
966 | ||
967 | /* Skip syscall. */ | |
968 | ||
969 | rsr a0, EPC_1 | |
970 | addi a0, a0, 3 | |
971 | wsr a0, EPC_1 | |
972 | ||
973 | l32i a0, a2, PT_DEPC | |
974 | bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_syscall_unrecoverable | |
975 | ||
976 | rsr a0, DEPC # get syscall-nr | |
977 | _beqz a0, fast_syscall_spill_registers | |
fc4fb2ad | 978 | _beqi a0, __NR_xtensa, fast_syscall_xtensa |
5a0015d6 CZ |
979 | |
980 | j kernel_exception | |
981 | ||
5a0015d6 CZ |
982 | ENTRY(fast_syscall_user) |
983 | ||
984 | /* Skip syscall. */ | |
985 | ||
986 | rsr a0, EPC_1 | |
987 | addi a0, a0, 3 | |
988 | wsr a0, EPC_1 | |
989 | ||
990 | l32i a0, a2, PT_DEPC | |
991 | bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_syscall_unrecoverable | |
992 | ||
993 | rsr a0, DEPC # get syscall-nr | |
994 | _beqz a0, fast_syscall_spill_registers | |
fc4fb2ad | 995 | _beqi a0, __NR_xtensa, fast_syscall_xtensa |
5a0015d6 CZ |
996 | |
997 | j user_exception | |
998 | ||
999 | ENTRY(fast_syscall_unrecoverable) | |
1000 | ||
1001 | /* Restore all states. */ | |
1002 | ||
1003 | l32i a0, a2, PT_AREG0 # restore a0 | |
1004 | xsr a2, DEPC # restore a2, depc | |
1005 | rsr a3, EXCSAVE_1 | |
1006 | ||
1007 | wsr a0, EXCSAVE_1 | |
1008 | movi a0, unrecoverable_exception | |
1009 | callx0 a0 | |
1010 | ||
1011 | ||
1012 | ||
1013 | /* | |
1014 | * sysxtensa syscall handler | |
1015 | * | |
fc4fb2ad CZ |
1016 | * int sysxtensa (SYS_XTENSA_ATOMIC_SET, ptr, val, unused); |
1017 | * int sysxtensa (SYS_XTENSA_ATOMIC_ADD, ptr, val, unused); | |
1018 | * int sysxtensa (SYS_XTENSA_ATOMIC_EXG_ADD, ptr, val, unused); | |
1019 | * int sysxtensa (SYS_XTENSA_ATOMIC_CMP_SWP, ptr, oldval, newval); | |
1020 | * a2 a6 a3 a4 a5 | |
5a0015d6 CZ |
1021 | * |
1022 | * Entry condition: | |
1023 | * | |
fc4fb2ad | 1024 | * a0: a2 (syscall-nr), original value saved on stack (PT_AREG0) |
5a0015d6 | 1025 | * a1: a1 |
fc4fb2ad CZ |
1026 | * a2: new stack pointer, original in a0 and DEPC |
1027 | * a3: dispatch table, original in excsave_1 | |
1028 | * a4..a15: unchanged | |
5a0015d6 CZ |
1029 | * depc: a2, original value saved on stack (PT_DEPC) |
1030 | * excsave_1: a3 | |
1031 | * | |
1032 | * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC | |
1033 | * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception | |
1034 | * | |
1035 | * Note: we don't have to save a2; a2 holds the return value | |
1036 | * | |
1037 | * We use the two macros TRY and CATCH: | |
1038 | * | |
1039 | * TRY adds an entry to the __ex_table fixup table for the immediately | |
1040 | * following instruction. | |
1041 | * | |
1042 | * CATCH catches any exception that occurred at one of the preceeding TRY | |
1043 | * statements and continues from there | |
1044 | * | |
1045 | * Usage TRY l32i a0, a1, 0 | |
1046 | * <other code> | |
1047 | * done: rfe | |
1048 | * CATCH <set return code> | |
1049 | * j done | |
1050 | */ | |
1051 | ||
1052 | #define TRY \ | |
1053 | .section __ex_table, "a"; \ | |
1054 | .word 66f, 67f; \ | |
1055 | .text; \ | |
1056 | 66: | |
1057 | ||
1058 | #define CATCH \ | |
1059 | 67: | |
1060 | ||
fc4fb2ad | 1061 | ENTRY(fast_syscall_xtensa) |
5a0015d6 | 1062 | |
fc4fb2ad | 1063 | xsr a3, EXCSAVE_1 # restore a3, excsave1 |
5a0015d6 | 1064 | |
fc4fb2ad | 1065 | s32i a7, a2, PT_AREG7 # we need an additional register |
5a0015d6 | 1066 | movi a7, 4 # sizeof(unsigned int) |
fc4fb2ad | 1067 | access_ok a3, a7, a0, a2, .Leac # a0: scratch reg, a2: sp |
5a0015d6 | 1068 | |
fc4fb2ad CZ |
1069 | addi a6, a6, -1 # assuming SYS_XTENSA_ATOMIC_SET = 1 |
1070 | _bgeui a6, SYS_XTENSA_COUNT - 1, .Lill | |
1071 | _bnei a6, SYS_XTENSA_ATOMIC_CMP_SWP - 1, .Lnswp | |
5a0015d6 | 1072 | |
fc4fb2ad | 1073 | /* Fall through for ATOMIC_CMP_SWP. */ |
5a0015d6 CZ |
1074 | |
1075 | .Lswp: /* Atomic compare and swap */ | |
1076 | ||
fc4fb2ad CZ |
1077 | TRY l32i a0, a3, 0 # read old value |
1078 | bne a0, a4, 1f # same as old value? jump | |
1079 | TRY s32i a5, a3, 0 # different, modify value | |
1080 | l32i a7, a2, PT_AREG7 # restore a7 | |
1081 | l32i a0, a2, PT_AREG0 # restore a0 | |
1082 | movi a2, 1 # and return 1 | |
1083 | addi a6, a6, 1 # restore a6 (really necessary?) | |
1084 | rfe | |
5a0015d6 | 1085 | |
fc4fb2ad CZ |
1086 | 1: l32i a7, a2, PT_AREG7 # restore a7 |
1087 | l32i a0, a2, PT_AREG0 # restore a0 | |
1088 | movi a2, 0 # return 0 (note that we cannot set | |
1089 | addi a6, a6, 1 # restore a6 (really necessary?) | |
1090 | rfe | |
5a0015d6 | 1091 | |
fc4fb2ad | 1092 | .Lnswp: /* Atomic set, add, and exg_add. */ |
5a0015d6 | 1093 | |
fc4fb2ad CZ |
1094 | TRY l32i a7, a3, 0 # orig |
1095 | add a0, a4, a7 # + arg | |
1096 | moveqz a0, a4, a6 # set | |
1097 | TRY s32i a0, a3, 0 # write new value | |
5a0015d6 | 1098 | |
fc4fb2ad | 1099 | mov a0, a2 |
5a0015d6 | 1100 | mov a2, a7 |
fc4fb2ad CZ |
1101 | l32i a7, a0, PT_AREG7 # restore a7 |
1102 | l32i a0, a0, PT_AREG0 # restore a0 | |
1103 | addi a6, a6, 1 # restore a6 (really necessary?) | |
5a0015d6 CZ |
1104 | rfe |
1105 | ||
1106 | CATCH | |
fc4fb2ad CZ |
1107 | .Leac: l32i a7, a2, PT_AREG7 # restore a7 |
1108 | l32i a0, a2, PT_AREG0 # restore a0 | |
1109 | movi a2, -EFAULT | |
1110 | rfe | |
1111 | ||
1112 | .Lill: l32i a7, a2, PT_AREG0 # restore a7 | |
1113 | l32i a0, a2, PT_AREG0 # restore a0 | |
1114 | movi a2, -EINVAL | |
1115 | rfe | |
1116 | ||
5a0015d6 CZ |
1117 | |
1118 | ||
1119 | ||
1120 | /* fast_syscall_spill_registers. | |
1121 | * | |
1122 | * Entry condition: | |
1123 | * | |
1124 | * a0: trashed, original value saved on stack (PT_AREG0) | |
1125 | * a1: a1 | |
1126 | * a2: new stack pointer, original in DEPC | |
1127 | * a3: dispatch table | |
1128 | * depc: a2, original value saved on stack (PT_DEPC) | |
1129 | * excsave_1: a3 | |
1130 | * | |
1131 | * Note: We assume the stack pointer is EXC_TABLE_KSTK in the fixup handler. | |
5a0015d6 CZ |
1132 | */ |
1133 | ||
1134 | ENTRY(fast_syscall_spill_registers) | |
1135 | ||
1136 | /* Register a FIXUP handler (pass current wb as a parameter) */ | |
1137 | ||
1138 | movi a0, fast_syscall_spill_registers_fixup | |
1139 | s32i a0, a3, EXC_TABLE_FIXUP | |
1140 | rsr a0, WINDOWBASE | |
1141 | s32i a0, a3, EXC_TABLE_PARAM | |
1142 | ||
1143 | /* Save a3 and SAR on stack. */ | |
1144 | ||
1145 | rsr a0, SAR | |
1146 | xsr a3, EXCSAVE_1 # restore a3 and excsave_1 | |
5a0015d6 | 1147 | s32i a3, a2, PT_AREG3 |
c658eac6 CZ |
1148 | s32i a4, a2, PT_AREG4 |
1149 | s32i a0, a2, PT_AREG5 # store SAR to PT_AREG5 | |
5a0015d6 CZ |
1150 | |
1151 | /* The spill routine might clobber a7, a11, and a15. */ | |
1152 | ||
c658eac6 CZ |
1153 | s32i a7, a2, PT_AREG7 |
1154 | s32i a11, a2, PT_AREG11 | |
1155 | s32i a15, a2, PT_AREG15 | |
5a0015d6 | 1156 | |
c658eac6 | 1157 | call0 _spill_registers # destroys a3, a4, and SAR |
5a0015d6 CZ |
1158 | |
1159 | /* Advance PC, restore registers and SAR, and return from exception. */ | |
1160 | ||
c658eac6 CZ |
1161 | l32i a3, a2, PT_AREG5 |
1162 | l32i a4, a2, PT_AREG4 | |
5a0015d6 CZ |
1163 | l32i a0, a2, PT_AREG0 |
1164 | wsr a3, SAR | |
1165 | l32i a3, a2, PT_AREG3 | |
1166 | ||
1167 | /* Restore clobbered registers. */ | |
1168 | ||
c658eac6 CZ |
1169 | l32i a7, a2, PT_AREG7 |
1170 | l32i a11, a2, PT_AREG11 | |
1171 | l32i a15, a2, PT_AREG15 | |
5a0015d6 CZ |
1172 | |
1173 | movi a2, 0 | |
1174 | rfe | |
1175 | ||
1176 | /* Fixup handler. | |
1177 | * | |
1178 | * We get here if the spill routine causes an exception, e.g. tlb miss. | |
1179 | * We basically restore WINDOWBASE and WINDOWSTART to the condition when | |
1180 | * we entered the spill routine and jump to the user exception handler. | |
1181 | * | |
1182 | * a0: value of depc, original value in depc | |
1183 | * a2: trashed, original value in EXC_TABLE_DOUBLE_SAVE | |
1184 | * a3: exctable, original value in excsave1 | |
1185 | */ | |
1186 | ||
1187 | fast_syscall_spill_registers_fixup: | |
1188 | ||
1189 | rsr a2, WINDOWBASE # get current windowbase (a2 is saved) | |
1190 | xsr a0, DEPC # restore depc and a0 | |
1191 | ssl a2 # set shift (32 - WB) | |
1192 | ||
1193 | /* We need to make sure the current registers (a0-a3) are preserved. | |
1194 | * To do this, we simply set the bit for the current window frame | |
1195 | * in WS, so that the exception handlers save them to the task stack. | |
1196 | */ | |
1197 | ||
1198 | rsr a3, EXCSAVE_1 # get spill-mask | |
1199 | slli a2, a3, 1 # shift left by one | |
1200 | ||
1201 | slli a3, a2, 32-WSBITS | |
1202 | src a2, a2, a3 # a1 = xxwww1yyxxxwww1yy...... | |
1203 | wsr a2, WINDOWSTART # set corrected windowstart | |
1204 | ||
1205 | movi a3, exc_table | |
1206 | l32i a2, a3, EXC_TABLE_DOUBLE_SAVE # restore a2 | |
1207 | l32i a3, a3, EXC_TABLE_PARAM # original WB (in user task) | |
1208 | ||
1209 | /* Return to the original (user task) WINDOWBASE. | |
1210 | * We leave the following frame behind: | |
1211 | * a0, a1, a2 same | |
1212 | * a3: trashed (saved in excsave_1) | |
1213 | * depc: depc (we have to return to that address) | |
1214 | * excsave_1: a3 | |
1215 | */ | |
1216 | ||
1217 | wsr a3, WINDOWBASE | |
1218 | rsync | |
1219 | ||
1220 | /* We are now in the original frame when we entered _spill_registers: | |
1221 | * a0: return address | |
1222 | * a1: used, stack pointer | |
1223 | * a2: kernel stack pointer | |
1224 | * a3: available, saved in EXCSAVE_1 | |
1225 | * depc: exception address | |
1226 | * excsave: a3 | |
1227 | * Note: This frame might be the same as above. | |
1228 | */ | |
1229 | ||
5a0015d6 CZ |
1230 | /* Setup stack pointer. */ |
1231 | ||
1232 | addi a2, a2, -PT_USER_SIZE | |
1233 | s32i a0, a2, PT_AREG0 | |
1234 | ||
1235 | /* Make sure we return to this fixup handler. */ | |
1236 | ||
1237 | movi a3, fast_syscall_spill_registers_fixup_return | |
1238 | s32i a3, a2, PT_DEPC # setup depc | |
1239 | ||
1240 | /* Jump to the exception handler. */ | |
1241 | ||
1242 | movi a3, exc_table | |
1243 | rsr a0, EXCCAUSE | |
c658eac6 CZ |
1244 | addx4 a0, a0, a3 # find entry in table |
1245 | l32i a0, a0, EXC_TABLE_FAST_USER # load handler | |
1246 | jx a0 | |
5a0015d6 CZ |
1247 | |
1248 | fast_syscall_spill_registers_fixup_return: | |
1249 | ||
1250 | /* When we return here, all registers have been restored (a2: DEPC) */ | |
1251 | ||
1252 | wsr a2, DEPC # exception address | |
1253 | ||
1254 | /* Restore fixup handler. */ | |
1255 | ||
1256 | xsr a3, EXCSAVE_1 | |
1257 | movi a2, fast_syscall_spill_registers_fixup | |
1258 | s32i a2, a3, EXC_TABLE_FIXUP | |
1259 | rsr a2, WINDOWBASE | |
1260 | s32i a2, a3, EXC_TABLE_PARAM | |
1261 | l32i a2, a3, EXC_TABLE_KSTK | |
1262 | ||
5a0015d6 CZ |
1263 | /* Load WB at the time the exception occurred. */ |
1264 | ||
1265 | rsr a3, SAR # WB is still in SAR | |
1266 | neg a3, a3 | |
1267 | wsr a3, WINDOWBASE | |
1268 | rsync | |
1269 | ||
1270 | /* Restore a3 and return. */ | |
1271 | ||
1272 | movi a3, exc_table | |
1273 | xsr a3, EXCSAVE_1 | |
1274 | ||
1275 | rfde | |
1276 | ||
1277 | ||
1278 | /* | |
1279 | * spill all registers. | |
1280 | * | |
1281 | * This is not a real function. The following conditions must be met: | |
1282 | * | |
1283 | * - must be called with call0. | |
c658eac6 | 1284 | * - uses a3, a4 and SAR. |
5a0015d6 CZ |
1285 | * - the last 'valid' register of each frame are clobbered. |
1286 | * - the caller must have registered a fixup handler | |
1287 | * (or be inside a critical section) | |
1288 | * - PS_EXCM must be set (PS_WOE cleared?) | |
1289 | */ | |
1290 | ||
1291 | ENTRY(_spill_registers) | |
1292 | ||
1293 | /* | |
1294 | * Rotate ws so that the current windowbase is at bit 0. | |
1295 | * Assume ws = xxxwww1yy (www1 current window frame). | |
c658eac6 | 1296 | * Rotate ws right so that a4 = yyxxxwww1. |
5a0015d6 CZ |
1297 | */ |
1298 | ||
c658eac6 | 1299 | rsr a4, WINDOWBASE |
ea0b6b06 | 1300 | rsr a3, WINDOWSTART # a3 = xxxwww1yy |
c658eac6 CZ |
1301 | ssr a4 # holds WB |
1302 | slli a4, a3, WSBITS | |
1303 | or a3, a3, a4 # a3 = xxxwww1yyxxxwww1yy | |
ea0b6b06 | 1304 | srl a3, a3 # a3 = 00xxxwww1yyxxxwww1 |
5a0015d6 CZ |
1305 | |
1306 | /* We are done if there are no more than the current register frame. */ | |
1307 | ||
50c0716a | 1308 | extui a3, a3, 1, WSBITS-1 # a3 = 0yyxxxwww |
c658eac6 | 1309 | movi a4, (1 << (WSBITS-1)) |
5a0015d6 CZ |
1310 | _beqz a3, .Lnospill # only one active frame? jump |
1311 | ||
1312 | /* We want 1 at the top, so that we return to the current windowbase */ | |
1313 | ||
c658eac6 | 1314 | or a3, a3, a4 # 1yyxxxwww |
5a0015d6 CZ |
1315 | |
1316 | /* Skip empty frames - get 'oldest' WINDOWSTART-bit. */ | |
1317 | ||
1318 | wsr a3, WINDOWSTART # save shifted windowstart | |
c658eac6 CZ |
1319 | neg a4, a3 |
1320 | and a3, a4, a3 # first bit set from right: 000010000 | |
5a0015d6 | 1321 | |
c658eac6 | 1322 | ffs_ws a4, a3 # a4: shifts to skip empty frames |
5a0015d6 | 1323 | movi a3, WSBITS |
c658eac6 CZ |
1324 | sub a4, a3, a4 # WSBITS-a4:number of 0-bits from right |
1325 | ssr a4 # save in SAR for later. | |
5a0015d6 CZ |
1326 | |
1327 | rsr a3, WINDOWBASE | |
c658eac6 | 1328 | add a3, a3, a4 |
5a0015d6 CZ |
1329 | wsr a3, WINDOWBASE |
1330 | rsync | |
1331 | ||
1332 | rsr a3, WINDOWSTART | |
1333 | srl a3, a3 # shift windowstart | |
1334 | ||
1335 | /* WB is now just one frame below the oldest frame in the register | |
1336 | window. WS is shifted so the oldest frame is in bit 0, thus, WB | |
1337 | and WS differ by one 4-register frame. */ | |
1338 | ||
1339 | /* Save frames. Depending what call was used (call4, call8, call12), | |
1340 | * we have to save 4,8. or 12 registers. | |
1341 | */ | |
1342 | ||
1343 | _bbsi.l a3, 1, .Lc4 | |
1344 | _bbsi.l a3, 2, .Lc8 | |
1345 | ||
1346 | /* Special case: we have a call12-frame starting at a4. */ | |
1347 | ||
1348 | _bbci.l a3, 3, .Lc12 # bit 3 shouldn't be zero! (Jump to Lc12 first) | |
1349 | ||
1350 | s32e a4, a1, -16 # a1 is valid with an empty spill area | |
1351 | l32e a4, a5, -12 | |
1352 | s32e a8, a4, -48 | |
1353 | mov a8, a4 | |
1354 | l32e a4, a1, -16 | |
1355 | j .Lc12c | |
1356 | ||
50c0716a | 1357 | .Lnospill: |
ea0b6b06 | 1358 | ret |
50c0716a | 1359 | |
5a0015d6 CZ |
1360 | .Lloop: _bbsi.l a3, 1, .Lc4 |
1361 | _bbci.l a3, 2, .Lc12 | |
1362 | ||
1363 | .Lc8: s32e a4, a13, -16 | |
1364 | l32e a4, a5, -12 | |
1365 | s32e a8, a4, -32 | |
1366 | s32e a5, a13, -12 | |
1367 | s32e a6, a13, -8 | |
1368 | s32e a7, a13, -4 | |
1369 | s32e a9, a4, -28 | |
1370 | s32e a10, a4, -24 | |
1371 | s32e a11, a4, -20 | |
1372 | ||
1373 | srli a11, a3, 2 # shift windowbase by 2 | |
1374 | rotw 2 | |
1375 | _bnei a3, 1, .Lloop | |
1376 | ||
1377 | .Lexit: /* Done. Do the final rotation, set WS, and return. */ | |
1378 | ||
1379 | rotw 1 | |
1380 | rsr a3, WINDOWBASE | |
1381 | ssl a3 | |
1382 | movi a3, 1 | |
1383 | sll a3, a3 | |
1384 | wsr a3, WINDOWSTART | |
ea0b6b06 | 1385 | ret |
5a0015d6 CZ |
1386 | |
1387 | .Lc4: s32e a4, a9, -16 | |
1388 | s32e a5, a9, -12 | |
1389 | s32e a6, a9, -8 | |
1390 | s32e a7, a9, -4 | |
1391 | ||
1392 | srli a7, a3, 1 | |
1393 | rotw 1 | |
1394 | _bnei a3, 1, .Lloop | |
1395 | j .Lexit | |
1396 | ||
1397 | .Lc12: _bbci.l a3, 3, .Linvalid_mask # bit 2 shouldn't be zero! | |
1398 | ||
1399 | /* 12-register frame (call12) */ | |
1400 | ||
1401 | l32e a2, a5, -12 | |
1402 | s32e a8, a2, -48 | |
1403 | mov a8, a2 | |
1404 | ||
1405 | .Lc12c: s32e a9, a8, -44 | |
1406 | s32e a10, a8, -40 | |
1407 | s32e a11, a8, -36 | |
1408 | s32e a12, a8, -32 | |
1409 | s32e a13, a8, -28 | |
1410 | s32e a14, a8, -24 | |
1411 | s32e a15, a8, -20 | |
1412 | srli a15, a3, 3 | |
1413 | ||
1414 | /* The stack pointer for a4..a7 is out of reach, so we rotate the | |
1415 | * window, grab the stackpointer, and rotate back. | |
1416 | * Alternatively, we could also use the following approach, but that | |
1417 | * makes the fixup routine much more complicated: | |
1418 | * rotw 1 | |
1419 | * s32e a0, a13, -16 | |
1420 | * ... | |
1421 | * rotw 2 | |
1422 | */ | |
1423 | ||
1424 | rotw 1 | |
1425 | mov a5, a13 | |
1426 | rotw -1 | |
1427 | ||
1428 | s32e a4, a9, -16 | |
1429 | s32e a5, a9, -12 | |
1430 | s32e a6, a9, -8 | |
1431 | s32e a7, a9, -4 | |
1432 | ||
1433 | rotw 3 | |
1434 | ||
1435 | _beqi a3, 1, .Lexit | |
1436 | j .Lloop | |
1437 | ||
1438 | .Linvalid_mask: | |
1439 | ||
1440 | /* We get here because of an unrecoverable error in the window | |
1441 | * registers. If we are in user space, we kill the application, | |
1442 | * however, this condition is unrecoverable in kernel space. | |
1443 | */ | |
1444 | ||
1445 | rsr a0, PS | |
173d6681 | 1446 | _bbci.l a0, PS_UM_BIT, 1f |
5a0015d6 CZ |
1447 | |
1448 | /* User space: Setup a dummy frame and kill application. | |
1449 | * Note: We assume EXC_TABLE_KSTK contains a valid stack pointer. | |
1450 | */ | |
1451 | ||
1452 | movi a0, 1 | |
1453 | movi a1, 0 | |
1454 | ||
1455 | wsr a0, WINDOWSTART | |
1456 | wsr a1, WINDOWBASE | |
1457 | rsync | |
1458 | ||
1459 | movi a0, 0 | |
1460 | ||
1461 | movi a3, exc_table | |
1462 | l32i a1, a3, EXC_TABLE_KSTK | |
1463 | wsr a3, EXCSAVE_1 | |
1464 | ||
173d6681 | 1465 | movi a4, (1 << PS_WOE_BIT) | 1 |
5a0015d6 CZ |
1466 | wsr a4, PS |
1467 | rsync | |
1468 | ||
1469 | movi a6, SIGSEGV | |
1470 | movi a4, do_exit | |
1471 | callx4 a4 | |
1472 | ||
1473 | 1: /* Kernel space: PANIC! */ | |
1474 | ||
1475 | wsr a0, EXCSAVE_1 | |
1476 | movi a0, unrecoverable_exception | |
1477 | callx0 a0 # should not return | |
1478 | 1: j 1b | |
1479 | ||
1480 | /* | |
1481 | * We should never get here. Bail out! | |
1482 | */ | |
1483 | ||
1484 | ENTRY(fast_second_level_miss_double_kernel) | |
1485 | ||
1486 | 1: movi a0, unrecoverable_exception | |
1487 | callx0 a0 # should not return | |
1488 | 1: j 1b | |
1489 | ||
1490 | /* First-level entry handler for user, kernel, and double 2nd-level | |
1491 | * TLB miss exceptions. Note that for now, user and kernel miss | |
1492 | * exceptions share the same entry point and are handled identically. | |
1493 | * | |
1494 | * An old, less-efficient C version of this function used to exist. | |
1495 | * We include it below, interleaved as comments, for reference. | |
1496 | * | |
1497 | * Entry condition: | |
1498 | * | |
1499 | * a0: trashed, original value saved on stack (PT_AREG0) | |
1500 | * a1: a1 | |
1501 | * a2: new stack pointer, original in DEPC | |
1502 | * a3: dispatch table | |
1503 | * depc: a2, original value saved on stack (PT_DEPC) | |
1504 | * excsave_1: a3 | |
1505 | * | |
1506 | * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC | |
1507 | * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception | |
1508 | */ | |
1509 | ||
1510 | ENTRY(fast_second_level_miss) | |
1511 | ||
1512 | /* Save a1. Note: we don't expect a double exception. */ | |
1513 | ||
1514 | s32i a1, a2, PT_AREG1 | |
1515 | ||
1516 | /* We need to map the page of PTEs for the user task. Find | |
1517 | * the pointer to that page. Also, it's possible for tsk->mm | |
1518 | * to be NULL while tsk->active_mm is nonzero if we faulted on | |
1519 | * a vmalloc address. In that rare case, we must use | |
1520 | * active_mm instead to avoid a fault in this handler. See | |
1521 | * | |
1522 | * http://mail.nl.linux.org/linux-mm/2002-08/msg00258.html | |
1523 | * (or search Internet on "mm vs. active_mm") | |
1524 | * | |
1525 | * if (!mm) | |
1526 | * mm = tsk->active_mm; | |
1527 | * pgd = pgd_offset (mm, regs->excvaddr); | |
1528 | * pmd = pmd_offset (pgd, regs->excvaddr); | |
1529 | * pmdval = *pmd; | |
1530 | */ | |
1531 | ||
1532 | GET_CURRENT(a1,a2) | |
1533 | l32i a0, a1, TASK_MM # tsk->mm | |
1534 | beqz a0, 9f | |
1535 | ||
01858d1b CZ |
1536 | |
1537 | /* We deliberately destroy a3 that holds the exception table. */ | |
1538 | ||
1539 | 8: rsr a3, EXCVADDR # fault address | |
1540 | _PGD_OFFSET(a0, a3, a1) | |
5a0015d6 | 1541 | l32i a0, a0, 0 # read pmdval |
5a0015d6 CZ |
1542 | beqz a0, 2f |
1543 | ||
1544 | /* Read ptevaddr and convert to top of page-table page. | |
1545 | * | |
1546 | * vpnval = read_ptevaddr_register() & PAGE_MASK; | |
1547 | * vpnval += DTLB_WAY_PGTABLE; | |
1548 | * pteval = mk_pte (virt_to_page(pmd_val(pmdval)), PAGE_KERNEL); | |
1549 | * write_dtlb_entry (pteval, vpnval); | |
1550 | * | |
1551 | * The messy computation for 'pteval' above really simplifies | |
1552 | * into the following: | |
1553 | * | |
6656920b | 1554 | * pteval = ((pmdval - PAGE_OFFSET) & PAGE_MASK) | PAGE_DIRECTORY |
5a0015d6 CZ |
1555 | */ |
1556 | ||
1557 | movi a1, -PAGE_OFFSET | |
1558 | add a0, a0, a1 # pmdval - PAGE_OFFSET | |
1559 | extui a1, a0, 0, PAGE_SHIFT # ... & PAGE_MASK | |
1560 | xor a0, a0, a1 | |
1561 | ||
01858d1b | 1562 | movi a1, _PAGE_DIRECTORY |
5a0015d6 CZ |
1563 | or a0, a0, a1 # ... | PAGE_DIRECTORY |
1564 | ||
01858d1b | 1565 | /* |
6656920b | 1566 | * We utilize all three wired-ways (7-9) to hold pmd translations. |
01858d1b CZ |
1567 | * Memory regions are mapped to the DTLBs according to bits 28 and 29. |
1568 | * This allows to map the three most common regions to three different | |
1569 | * DTLBs: | |
1570 | * 0,1 -> way 7 program (0040.0000) and virtual (c000.0000) | |
1571 | * 2 -> way 8 shared libaries (2000.0000) | |
1572 | * 3 -> way 0 stack (3000.0000) | |
1573 | */ | |
1574 | ||
1575 | extui a3, a3, 28, 2 # addr. bit 28 and 29 0,1,2,3 | |
5a0015d6 | 1576 | rsr a1, PTEVADDR |
01858d1b | 1577 | addx2 a3, a3, a3 # -> 0,3,6,9 |
5a0015d6 | 1578 | srli a1, a1, PAGE_SHIFT |
01858d1b | 1579 | extui a3, a3, 2, 2 # -> 0,0,1,2 |
5a0015d6 | 1580 | slli a1, a1, PAGE_SHIFT # ptevaddr & PAGE_MASK |
01858d1b CZ |
1581 | addi a3, a3, DTLB_WAY_PGD |
1582 | add a1, a1, a3 # ... + way_number | |
5a0015d6 | 1583 | |
01858d1b | 1584 | 3: wdtlb a0, a1 |
5a0015d6 CZ |
1585 | dsync |
1586 | ||
1587 | /* Exit critical section. */ | |
1588 | ||
01858d1b | 1589 | 4: movi a3, exc_table # restore a3 |
5a0015d6 CZ |
1590 | movi a0, 0 |
1591 | s32i a0, a3, EXC_TABLE_FIXUP | |
1592 | ||
1593 | /* Restore the working registers, and return. */ | |
1594 | ||
1595 | l32i a0, a2, PT_AREG0 | |
1596 | l32i a1, a2, PT_AREG1 | |
1597 | l32i a2, a2, PT_DEPC | |
1598 | xsr a3, EXCSAVE_1 | |
1599 | ||
1600 | bgeui a2, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f | |
1601 | ||
1602 | /* Restore excsave1 and return. */ | |
1603 | ||
1604 | rsr a2, DEPC | |
1605 | rfe | |
1606 | ||
1607 | /* Return from double exception. */ | |
1608 | ||
1609 | 1: xsr a2, DEPC | |
1610 | esync | |
1611 | rfde | |
1612 | ||
1613 | 9: l32i a0, a1, TASK_ACTIVE_MM # unlikely case mm == 0 | |
1614 | j 8b | |
1615 | ||
6656920b CZ |
1616 | #if (DCACHE_WAY_SIZE > PAGE_SIZE) |
1617 | ||
1618 | 2: /* Special case for cache aliasing. | |
1619 | * We (should) only get here if a clear_user_page, copy_user_page | |
1620 | * or the aliased cache flush functions got preemptively interrupted | |
1621 | * by another task. Re-establish temporary mapping to the | |
1622 | * TLBTEMP_BASE areas. | |
1623 | */ | |
1624 | ||
1625 | /* We shouldn't be in a double exception */ | |
1626 | ||
1627 | l32i a0, a2, PT_DEPC | |
1628 | bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, 2f | |
1629 | ||
1630 | /* Make sure the exception originated in the special functions */ | |
1631 | ||
1632 | movi a0, __tlbtemp_mapping_start | |
1633 | rsr a3, EPC_1 | |
1634 | bltu a3, a0, 2f | |
1635 | movi a0, __tlbtemp_mapping_end | |
1636 | bgeu a3, a0, 2f | |
1637 | ||
1638 | /* Check if excvaddr was in one of the TLBTEMP_BASE areas. */ | |
1639 | ||
1640 | movi a3, TLBTEMP_BASE_1 | |
1641 | rsr a0, EXCVADDR | |
1642 | bltu a0, a3, 2f | |
1643 | ||
1644 | addi a1, a0, -(2 << (DCACHE_ALIAS_ORDER + PAGE_SHIFT)) | |
1645 | bgeu a1, a3, 2f | |
1646 | ||
1647 | /* Check if we have to restore an ITLB mapping. */ | |
1648 | ||
1649 | movi a1, __tlbtemp_mapping_itlb | |
1650 | rsr a3, EPC_1 | |
1651 | sub a3, a3, a1 | |
1652 | ||
1653 | /* Calculate VPN */ | |
1654 | ||
1655 | movi a1, PAGE_MASK | |
1656 | and a1, a1, a0 | |
1657 | ||
1658 | /* Jump for ITLB entry */ | |
1659 | ||
1660 | bgez a3, 1f | |
1661 | ||
1662 | /* We can use up to two TLBTEMP areas, one for src and one for dst. */ | |
1663 | ||
1664 | extui a3, a0, PAGE_SHIFT + DCACHE_ALIAS_ORDER, 1 | |
1665 | add a1, a3, a1 | |
1666 | ||
1667 | /* PPN is in a6 for the first TLBTEMP area and in a7 for the second. */ | |
1668 | ||
1669 | mov a0, a6 | |
1670 | movnez a0, a7, a3 | |
1671 | j 3b | |
1672 | ||
1673 | /* ITLB entry. We only use dst in a6. */ | |
1674 | ||
1675 | 1: witlb a6, a1 | |
1676 | isync | |
1677 | j 4b | |
1678 | ||
1679 | ||
1680 | #endif // DCACHE_WAY_SIZE > PAGE_SIZE | |
1681 | ||
1682 | ||
5a0015d6 CZ |
1683 | 2: /* Invalid PGD, default exception handling */ |
1684 | ||
01858d1b | 1685 | movi a3, exc_table |
5a0015d6 CZ |
1686 | rsr a1, DEPC |
1687 | xsr a3, EXCSAVE_1 | |
1688 | s32i a1, a2, PT_AREG2 | |
1689 | s32i a3, a2, PT_AREG3 | |
1690 | mov a1, a2 | |
1691 | ||
1692 | rsr a2, PS | |
173d6681 | 1693 | bbsi.l a2, PS_UM_BIT, 1f |
5a0015d6 CZ |
1694 | j _kernel_exception |
1695 | 1: j _user_exception | |
1696 | ||
1697 | ||
1698 | /* | |
1699 | * StoreProhibitedException | |
1700 | * | |
1701 | * Update the pte and invalidate the itlb mapping for this pte. | |
1702 | * | |
1703 | * Entry condition: | |
1704 | * | |
1705 | * a0: trashed, original value saved on stack (PT_AREG0) | |
1706 | * a1: a1 | |
1707 | * a2: new stack pointer, original in DEPC | |
1708 | * a3: dispatch table | |
1709 | * depc: a2, original value saved on stack (PT_DEPC) | |
1710 | * excsave_1: a3 | |
1711 | * | |
1712 | * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC | |
1713 | * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception | |
1714 | */ | |
1715 | ||
1716 | ENTRY(fast_store_prohibited) | |
1717 | ||
1718 | /* Save a1 and a4. */ | |
1719 | ||
1720 | s32i a1, a2, PT_AREG1 | |
1721 | s32i a4, a2, PT_AREG4 | |
1722 | ||
1723 | GET_CURRENT(a1,a2) | |
1724 | l32i a0, a1, TASK_MM # tsk->mm | |
1725 | beqz a0, 9f | |
1726 | ||
1727 | 8: rsr a1, EXCVADDR # fault address | |
1728 | _PGD_OFFSET(a0, a1, a4) | |
1729 | l32i a0, a0, 0 | |
5a0015d6 CZ |
1730 | beqz a0, 2f |
1731 | ||
01858d1b CZ |
1732 | /* Note that we assume _PAGE_WRITABLE_BIT is only set if pte is valid.*/ |
1733 | ||
5a0015d6 CZ |
1734 | _PTE_OFFSET(a0, a1, a4) |
1735 | l32i a4, a0, 0 # read pteval | |
01858d1b | 1736 | bbci.l a4, _PAGE_WRITABLE_BIT, 2f |
5a0015d6 | 1737 | |
01858d1b | 1738 | movi a1, _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_HW_WRITE |
5a0015d6 CZ |
1739 | or a4, a4, a1 |
1740 | rsr a1, EXCVADDR | |
1741 | s32i a4, a0, 0 | |
1742 | ||
1743 | /* We need to flush the cache if we have page coloring. */ | |
1744 | #if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK | |
1745 | dhwb a0, 0 | |
1746 | #endif | |
1747 | pdtlb a0, a1 | |
5a0015d6 | 1748 | wdtlb a4, a0 |
5a0015d6 CZ |
1749 | |
1750 | /* Exit critical section. */ | |
1751 | ||
1752 | movi a0, 0 | |
1753 | s32i a0, a3, EXC_TABLE_FIXUP | |
1754 | ||
1755 | /* Restore the working registers, and return. */ | |
1756 | ||
1757 | l32i a4, a2, PT_AREG4 | |
1758 | l32i a1, a2, PT_AREG1 | |
1759 | l32i a0, a2, PT_AREG0 | |
1760 | l32i a2, a2, PT_DEPC | |
1761 | ||
1762 | /* Restore excsave1 and a3. */ | |
1763 | ||
1764 | xsr a3, EXCSAVE_1 | |
1765 | bgeui a2, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f | |
1766 | ||
1767 | rsr a2, DEPC | |
1768 | rfe | |
1769 | ||
1770 | /* Double exception. Restore FIXUP handler and return. */ | |
1771 | ||
1772 | 1: xsr a2, DEPC | |
1773 | esync | |
1774 | rfde | |
1775 | ||
1776 | 9: l32i a0, a1, TASK_ACTIVE_MM # unlikely case mm == 0 | |
1777 | j 8b | |
1778 | ||
1779 | 2: /* If there was a problem, handle fault in C */ | |
1780 | ||
1781 | rsr a4, DEPC # still holds a2 | |
1782 | xsr a3, EXCSAVE_1 | |
1783 | s32i a4, a2, PT_AREG2 | |
1784 | s32i a3, a2, PT_AREG3 | |
1785 | l32i a4, a2, PT_AREG4 | |
1786 | mov a1, a2 | |
1787 | ||
1788 | rsr a2, PS | |
173d6681 | 1789 | bbsi.l a2, PS_UM_BIT, 1f |
5a0015d6 CZ |
1790 | j _kernel_exception |
1791 | 1: j _user_exception | |
1792 | ||
1793 | ||
fc4fb2ad CZ |
1794 | /* |
1795 | * System Calls. | |
1796 | * | |
1797 | * void system_call (struct pt_regs* regs, int exccause) | |
1798 | * a2 a3 | |
1799 | */ | |
1800 | ||
1801 | ENTRY(system_call) | |
1802 | entry a1, 32 | |
1803 | ||
1804 | /* regs->syscall = regs->areg[2] */ | |
1805 | ||
1806 | l32i a3, a2, PT_AREG2 | |
1807 | mov a6, a2 | |
1808 | movi a4, do_syscall_trace_enter | |
1809 | s32i a3, a2, PT_SYSCALL | |
1810 | callx4 a4 | |
1811 | ||
1812 | /* syscall = sys_call_table[syscall_nr] */ | |
1813 | ||
1814 | movi a4, sys_call_table; | |
1815 | movi a5, __NR_syscall_count | |
1816 | movi a6, -ENOSYS | |
1817 | bgeu a3, a5, 1f | |
1818 | ||
1819 | addx4 a4, a3, a4 | |
1820 | l32i a4, a4, 0 | |
1821 | movi a5, sys_ni_syscall; | |
1822 | beq a4, a5, 1f | |
1823 | ||
1824 | /* Load args: arg0 - arg5 are passed via regs. */ | |
1825 | ||
1826 | l32i a6, a2, PT_AREG6 | |
1827 | l32i a7, a2, PT_AREG3 | |
1828 | l32i a8, a2, PT_AREG4 | |
1829 | l32i a9, a2, PT_AREG5 | |
1830 | l32i a10, a2, PT_AREG8 | |
1831 | l32i a11, a2, PT_AREG9 | |
1832 | ||
1833 | /* Pass one additional argument to the syscall: pt_regs (on stack) */ | |
1834 | s32i a2, a1, 0 | |
1835 | ||
1836 | callx4 a4 | |
1837 | ||
1838 | 1: /* regs->areg[2] = return_value */ | |
1839 | ||
1840 | s32i a6, a2, PT_AREG2 | |
1841 | movi a4, do_syscall_trace_leave | |
1842 | mov a6, a2 | |
1843 | callx4 a4 | |
1844 | retw | |
1845 | ||
1846 | ||
1847 | /* | |
1848 | * Create a kernel thread | |
1849 | * | |
1850 | * int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags) | |
1851 | * a2 a2 a3 a4 | |
1852 | */ | |
1853 | ||
1854 | ENTRY(kernel_thread) | |
1855 | entry a1, 16 | |
1856 | ||
1857 | mov a5, a2 # preserve fn over syscall | |
1858 | mov a7, a3 # preserve args over syscall | |
1859 | ||
1860 | movi a3, _CLONE_VM | _CLONE_UNTRACED | |
1861 | movi a2, __NR_clone | |
1862 | or a6, a4, a3 # arg0: flags | |
1863 | mov a3, a1 # arg1: sp | |
1864 | syscall | |
1865 | ||
1866 | beq a3, a1, 1f # branch if parent | |
1867 | mov a6, a7 # args | |
1868 | callx4 a5 # fn(args) | |
1869 | ||
1870 | movi a2, __NR_exit | |
1871 | syscall # return value of fn(args) still in a6 | |
1872 | ||
1873 | 1: retw | |
1874 | ||
1875 | /* | |
1876 | * Do a system call from kernel instead of calling sys_execve, so we end up | |
1877 | * with proper pt_regs. | |
1878 | * | |
1879 | * int kernel_execve(const char *fname, char *const argv[], charg *const envp[]) | |
1880 | * a2 a2 a3 a4 | |
1881 | */ | |
1882 | ||
1883 | ENTRY(kernel_execve) | |
1884 | entry a1, 16 | |
1885 | mov a6, a2 # arg0 is in a6 | |
1886 | movi a2, __NR_execve | |
1887 | syscall | |
1888 | ||
1889 | retw | |
1890 | ||
5a0015d6 CZ |
1891 | /* |
1892 | * Task switch. | |
1893 | * | |
1894 | * struct task* _switch_to (struct task* prev, struct task* next) | |
1895 | * a2 a2 a3 | |
1896 | */ | |
1897 | ||
1898 | ENTRY(_switch_to) | |
1899 | ||
1900 | entry a1, 16 | |
1901 | ||
c658eac6 CZ |
1902 | mov a12, a2 # preserve 'prev' (a2) |
1903 | mov a13, a3 # and 'next' (a3) | |
5a0015d6 | 1904 | |
c658eac6 CZ |
1905 | l32i a4, a2, TASK_THREAD_INFO |
1906 | l32i a5, a3, TASK_THREAD_INFO | |
5a0015d6 | 1907 | |
c658eac6 | 1908 | save_xtregs_user a4 a6 a8 a9 a10 a11 THREAD_XTREGS_USER |
5a0015d6 | 1909 | |
c658eac6 CZ |
1910 | s32i a0, a12, THREAD_RA # save return address |
1911 | s32i a1, a12, THREAD_SP # save stack pointer | |
1912 | ||
1913 | /* Disable ints while we manipulate the stack pointer. */ | |
1914 | ||
1915 | movi a14, (1 << PS_EXCM_BIT) | LOCKLEVEL | |
1916 | xsr a14, PS | |
5a0015d6 CZ |
1917 | rsr a3, EXCSAVE_1 |
1918 | rsync | |
1919 | s32i a3, a3, EXC_TABLE_FIXUP /* enter critical section */ | |
1920 | ||
c658eac6 CZ |
1921 | /* Switch CPENABLE */ |
1922 | ||
1923 | #if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS) | |
1924 | l32i a3, a5, THREAD_CPENABLE | |
1925 | xsr a3, CPENABLE | |
1926 | s32i a3, a4, THREAD_CPENABLE | |
1927 | #endif | |
1928 | ||
1929 | /* Flush register file. */ | |
1930 | ||
1931 | call0 _spill_registers # destroys a3, a4, and SAR | |
5a0015d6 CZ |
1932 | |
1933 | /* Set kernel stack (and leave critical section) | |
1934 | * Note: It's save to set it here. The stack will not be overwritten | |
1935 | * because the kernel stack will only be loaded again after | |
1936 | * we return from kernel space. | |
1937 | */ | |
1938 | ||
5a0015d6 | 1939 | rsr a3, EXCSAVE_1 # exc_table |
c658eac6 CZ |
1940 | movi a6, 0 |
1941 | addi a7, a5, PT_REGS_OFFSET | |
1942 | s32i a6, a3, EXC_TABLE_FIXUP | |
1943 | s32i a7, a3, EXC_TABLE_KSTK | |
5a0015d6 CZ |
1944 | |
1945 | /* restore context of the task that 'next' addresses */ | |
1946 | ||
c658eac6 CZ |
1947 | l32i a0, a13, THREAD_RA # restore return address |
1948 | l32i a1, a13, THREAD_SP # restore stack pointer | |
1949 | ||
1950 | load_xtregs_user a5 a6 a8 a9 a10 a11 THREAD_XTREGS_USER | |
5a0015d6 | 1951 | |
c658eac6 CZ |
1952 | wsr a14, PS |
1953 | mov a2, a12 # return 'prev' | |
5a0015d6 CZ |
1954 | rsync |
1955 | ||
1956 | retw | |
1957 | ||
1958 | ||
1959 | ENTRY(ret_from_fork) | |
1960 | ||
1961 | /* void schedule_tail (struct task_struct *prev) | |
1962 | * Note: prev is still in a6 (return value from fake call4 frame) | |
1963 | */ | |
1964 | movi a4, schedule_tail | |
1965 | callx4 a4 | |
1966 | ||
fc4fb2ad CZ |
1967 | movi a4, do_syscall_trace_leave |
1968 | mov a6, a1 | |
5a0015d6 CZ |
1969 | callx4 a4 |
1970 | ||
1971 | j common_exception_return | |
1972 |