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5a0015d6 CZ |
1 | /* |
2 | * arch/xtensa/kernel/process.c | |
3 | * | |
4 | * Xtensa Processor version. | |
5 | * | |
6 | * This file is subject to the terms and conditions of the GNU General Public | |
7 | * License. See the file "COPYING" in the main directory of this archive | |
8 | * for more details. | |
9 | * | |
10 | * Copyright (C) 2001 - 2005 Tensilica Inc. | |
11 | * | |
12 | * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com> | |
13 | * Chris Zankel <chris@zankel.net> | |
14 | * Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca> | |
15 | * Kevin Chea | |
16 | */ | |
17 | ||
5a0015d6 CZ |
18 | #include <linux/errno.h> |
19 | #include <linux/sched.h> | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/mm.h> | |
22 | #include <linux/smp.h> | |
5a0015d6 CZ |
23 | #include <linux/stddef.h> |
24 | #include <linux/unistd.h> | |
25 | #include <linux/ptrace.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/elf.h> | |
28 | #include <linux/init.h> | |
29 | #include <linux/prctl.h> | |
30 | #include <linux/init_task.h> | |
31 | #include <linux/module.h> | |
32 | #include <linux/mqueue.h> | |
33 | ||
34 | #include <asm/pgtable.h> | |
35 | #include <asm/uaccess.h> | |
36 | #include <asm/system.h> | |
37 | #include <asm/io.h> | |
38 | #include <asm/processor.h> | |
39 | #include <asm/platform.h> | |
40 | #include <asm/mmu.h> | |
41 | #include <asm/irq.h> | |
42 | #include <asm/atomic.h> | |
0013a854 | 43 | #include <asm/asm-offsets.h> |
173d6681 | 44 | #include <asm/regs.h> |
5a0015d6 CZ |
45 | |
46 | extern void ret_from_fork(void); | |
47 | ||
48 | static struct fs_struct init_fs = INIT_FS; | |
49 | static struct files_struct init_files = INIT_FILES; | |
50 | static struct signal_struct init_signals = INIT_SIGNALS(init_signals); | |
51 | static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand); | |
52 | struct mm_struct init_mm = INIT_MM(init_mm); | |
53 | EXPORT_SYMBOL(init_mm); | |
54 | ||
55 | union thread_union init_thread_union | |
56 | __attribute__((__section__(".data.init_task"))) = | |
57 | { INIT_THREAD_INFO(init_task) }; | |
58 | ||
59 | struct task_struct init_task = INIT_TASK(init_task); | |
60 | EXPORT_SYMBOL(init_task); | |
61 | ||
62 | struct task_struct *current_set[NR_CPUS] = {&init_task, }; | |
63 | ||
47f3fc94 AB |
64 | void (*pm_power_off)(void) = NULL; |
65 | EXPORT_SYMBOL(pm_power_off); | |
66 | ||
5a0015d6 | 67 | |
5a0015d6 CZ |
68 | /* |
69 | * Powermanagement idle function, if any is provided by the platform. | |
70 | */ | |
71 | ||
72 | void cpu_idle(void) | |
73 | { | |
74 | local_irq_enable(); | |
75 | ||
76 | /* endless idle loop with no priority at all */ | |
77 | while (1) { | |
78 | while (!need_resched()) | |
79 | platform_idle(); | |
5bfb5d69 | 80 | preempt_enable_no_resched(); |
5a0015d6 | 81 | schedule(); |
5bfb5d69 | 82 | preempt_disable(); |
5a0015d6 CZ |
83 | } |
84 | } | |
85 | ||
86 | /* | |
87 | * Free current thread data structures etc.. | |
88 | */ | |
89 | ||
90 | void exit_thread(void) | |
91 | { | |
5a0015d6 CZ |
92 | } |
93 | ||
94 | void flush_thread(void) | |
95 | { | |
5a0015d6 CZ |
96 | } |
97 | ||
98 | /* | |
99 | * Copy thread. | |
100 | * | |
101 | * The stack layout for the new thread looks like this: | |
102 | * | |
103 | * +------------------------+ <- sp in childregs (= tos) | |
104 | * | childregs | | |
105 | * +------------------------+ <- thread.sp = sp in dummy-frame | |
106 | * | dummy-frame | (saved in dummy-frame spill-area) | |
107 | * +------------------------+ | |
108 | * | |
109 | * We create a dummy frame to return to ret_from_fork: | |
110 | * a0 points to ret_from_fork (simulating a call4) | |
111 | * sp points to itself (thread.sp) | |
112 | * a2, a3 are unused. | |
113 | * | |
114 | * Note: This is a pristine frame, so we don't need any spill region on top of | |
115 | * childregs. | |
116 | */ | |
117 | ||
118 | int copy_thread(int nr, unsigned long clone_flags, unsigned long usp, | |
119 | unsigned long unused, | |
120 | struct task_struct * p, struct pt_regs * regs) | |
121 | { | |
122 | struct pt_regs *childregs; | |
123 | unsigned long tos; | |
124 | int user_mode = user_mode(regs); | |
125 | ||
126 | /* Set up new TSS. */ | |
04fe6faf | 127 | tos = (unsigned long)task_stack_page(p) + THREAD_SIZE; |
5a0015d6 CZ |
128 | if (user_mode) |
129 | childregs = (struct pt_regs*)(tos - PT_USER_SIZE); | |
130 | else | |
131 | childregs = (struct pt_regs*)tos - 1; | |
132 | ||
133 | *childregs = *regs; | |
134 | ||
135 | /* Create a call4 dummy-frame: a0 = 0, a1 = childregs. */ | |
136 | *((int*)childregs - 3) = (unsigned long)childregs; | |
137 | *((int*)childregs - 4) = 0; | |
138 | ||
139 | childregs->areg[1] = tos; | |
140 | childregs->areg[2] = 0; | |
141 | p->set_child_tid = p->clear_child_tid = NULL; | |
142 | p->thread.ra = MAKE_RA_FOR_CALL((unsigned long)ret_from_fork, 0x1); | |
143 | p->thread.sp = (unsigned long)childregs; | |
144 | if (user_mode(regs)) { | |
145 | ||
146 | int len = childregs->wmask & ~0xf; | |
147 | childregs->areg[1] = usp; | |
148 | memcpy(&childregs->areg[XCHAL_NUM_AREGS - len/4], | |
149 | ®s->areg[XCHAL_NUM_AREGS - len/4], len); | |
150 | ||
151 | if (clone_flags & CLONE_SETTLS) | |
152 | childregs->areg[2] = childregs->areg[6]; | |
153 | ||
154 | } else { | |
155 | /* In kernel space, we start a new thread with a new stack. */ | |
156 | childregs->wmask = 1; | |
157 | } | |
158 | return 0; | |
159 | } | |
160 | ||
161 | ||
5a0015d6 CZ |
162 | /* |
163 | * These bracket the sleeping functions.. | |
164 | */ | |
165 | ||
166 | unsigned long get_wchan(struct task_struct *p) | |
167 | { | |
168 | unsigned long sp, pc; | |
04fe6faf | 169 | unsigned long stack_page = (unsigned long) task_stack_page(p); |
5a0015d6 CZ |
170 | int count = 0; |
171 | ||
172 | if (!p || p == current || p->state == TASK_RUNNING) | |
173 | return 0; | |
174 | ||
175 | sp = p->thread.sp; | |
176 | pc = MAKE_PC_FROM_RA(p->thread.ra, p->thread.sp); | |
177 | ||
178 | do { | |
179 | if (sp < stack_page + sizeof(struct task_struct) || | |
180 | sp >= (stack_page + THREAD_SIZE) || | |
181 | pc == 0) | |
182 | return 0; | |
183 | if (!in_sched_functions(pc)) | |
184 | return pc; | |
185 | ||
186 | /* Stack layout: sp-4: ra, sp-3: sp' */ | |
187 | ||
188 | pc = MAKE_PC_FROM_RA(*(unsigned long*)sp - 4, sp); | |
189 | sp = *(unsigned long *)sp - 3; | |
190 | } while (count++ < 16); | |
191 | return 0; | |
192 | } | |
193 | ||
194 | /* | |
195 | * do_copy_regs() gathers information from 'struct pt_regs' and | |
196 | * 'current->thread.areg[]' to fill in the xtensa_gregset_t | |
197 | * structure. | |
198 | * | |
199 | * xtensa_gregset_t and 'struct pt_regs' are vastly different formats | |
200 | * of processor registers. Besides different ordering, | |
201 | * xtensa_gregset_t contains non-live register information that | |
202 | * 'struct pt_regs' does not. Exception handling (primarily) uses | |
203 | * 'struct pt_regs'. Core files and ptrace use xtensa_gregset_t. | |
204 | * | |
205 | */ | |
206 | ||
207 | void do_copy_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs, | |
208 | struct task_struct *tsk) | |
209 | { | |
210 | int i, n, wb_offset; | |
211 | ||
212 | elfregs->xchal_config_id0 = XCHAL_HW_CONFIGID0; | |
213 | elfregs->xchal_config_id1 = XCHAL_HW_CONFIGID1; | |
214 | ||
215 | __asm__ __volatile__ ("rsr %0, 176\n" : "=a" (i)); | |
216 | elfregs->cpux = i; | |
217 | __asm__ __volatile__ ("rsr %0, 208\n" : "=a" (i)); | |
218 | elfregs->cpuy = i; | |
219 | ||
220 | /* Note: PS.EXCM is not set while user task is running; its | |
221 | * being set in regs->ps is for exception handling convenience. | |
222 | */ | |
223 | ||
224 | elfregs->pc = regs->pc; | |
173d6681 | 225 | elfregs->ps = (regs->ps & ~(1 << PS_EXCM_BIT)); |
5a0015d6 CZ |
226 | elfregs->exccause = regs->exccause; |
227 | elfregs->excvaddr = regs->excvaddr; | |
228 | elfregs->windowbase = regs->windowbase; | |
229 | elfregs->windowstart = regs->windowstart; | |
230 | elfregs->lbeg = regs->lbeg; | |
231 | elfregs->lend = regs->lend; | |
232 | elfregs->lcount = regs->lcount; | |
233 | elfregs->sar = regs->sar; | |
234 | elfregs->syscall = regs->syscall; | |
235 | ||
236 | /* Copy register file. | |
237 | * The layout looks like this: | |
238 | * | |
239 | * | a0 ... a15 | Z ... Z | arX ... arY | | |
240 | * current window unused saved frames | |
241 | */ | |
242 | ||
243 | memset (elfregs->ar, 0, sizeof(elfregs->ar)); | |
244 | ||
245 | wb_offset = regs->windowbase * 4; | |
246 | n = (regs->wmask&1)? 4 : (regs->wmask&2)? 8 : (regs->wmask&4)? 12 : 16; | |
247 | ||
248 | for (i = 0; i < n; i++) | |
249 | elfregs->ar[(wb_offset + i) % XCHAL_NUM_AREGS] = regs->areg[i]; | |
250 | ||
251 | n = (regs->wmask >> 4) * 4; | |
252 | ||
253 | for (i = XCHAL_NUM_AREGS - n; n > 0; i++, n--) | |
254 | elfregs->ar[(wb_offset + i) % XCHAL_NUM_AREGS] = regs->areg[i]; | |
255 | } | |
256 | ||
257 | void xtensa_elf_core_copy_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs) | |
258 | { | |
259 | do_copy_regs ((xtensa_gregset_t *)elfregs, regs, current); | |
260 | } | |
261 | ||
262 | ||
263 | /* The inverse of do_copy_regs(). No error or sanity checking. */ | |
264 | ||
265 | void do_restore_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs, | |
266 | struct task_struct *tsk) | |
267 | { | |
268 | int i, n, wb_offset; | |
269 | ||
270 | /* Note: PS.EXCM is not set while user task is running; it | |
271 | * needs to be set in regs->ps is for exception handling convenience. | |
272 | */ | |
273 | ||
274 | regs->pc = elfregs->pc; | |
173d6681 | 275 | regs->ps = (elfregs->ps | (1 << PS_EXCM_BIT)); |
5a0015d6 CZ |
276 | regs->exccause = elfregs->exccause; |
277 | regs->excvaddr = elfregs->excvaddr; | |
278 | regs->windowbase = elfregs->windowbase; | |
279 | regs->windowstart = elfregs->windowstart; | |
280 | regs->lbeg = elfregs->lbeg; | |
281 | regs->lend = elfregs->lend; | |
282 | regs->lcount = elfregs->lcount; | |
283 | regs->sar = elfregs->sar; | |
284 | regs->syscall = elfregs->syscall; | |
285 | ||
286 | /* Clear everything. */ | |
287 | ||
288 | memset (regs->areg, 0, sizeof(regs->areg)); | |
289 | ||
290 | /* Copy regs from live window frame. */ | |
291 | ||
292 | wb_offset = regs->windowbase * 4; | |
293 | n = (regs->wmask&1)? 4 : (regs->wmask&2)? 8 : (regs->wmask&4)? 12 : 16; | |
294 | ||
295 | for (i = 0; i < n; i++) | |
296 | regs->areg[(wb_offset+i) % XCHAL_NUM_AREGS] = elfregs->ar[i]; | |
297 | ||
298 | n = (regs->wmask >> 4) * 4; | |
299 | ||
300 | for (i = XCHAL_NUM_AREGS - n; n > 0; i++, n--) | |
301 | regs->areg[(wb_offset+i) % XCHAL_NUM_AREGS] = elfregs->ar[i]; | |
302 | } | |
303 | ||
304 | /* | |
305 | * do_save_fpregs() gathers information from 'struct pt_regs' and | |
306 | * 'current->thread' to fill in the elf_fpregset_t structure. | |
307 | * | |
308 | * Core files and ptrace use elf_fpregset_t. | |
309 | */ | |
310 | ||
311 | void do_save_fpregs (elf_fpregset_t *fpregs, struct pt_regs *regs, | |
312 | struct task_struct *tsk) | |
313 | { | |
314 | #if XCHAL_HAVE_CP | |
315 | ||
316 | extern unsigned char _xtensa_reginfo_tables[]; | |
317 | extern unsigned _xtensa_reginfo_table_size; | |
318 | int i; | |
319 | unsigned long flags; | |
320 | ||
321 | /* Before dumping coprocessor state from memory, | |
322 | * ensure any live coprocessor contents for this | |
323 | * task are first saved to memory: | |
324 | */ | |
325 | local_irq_save(flags); | |
326 | ||
327 | for (i = 0; i < XCHAL_CP_MAX; i++) { | |
328 | if (tsk == coprocessor_info[i].owner) { | |
329 | enable_coprocessor(i); | |
330 | save_coprocessor_registers( | |
331 | tsk->thread.cp_save+coprocessor_info[i].offset,i); | |
332 | disable_coprocessor(i); | |
333 | } | |
334 | } | |
335 | ||
336 | local_irq_restore(flags); | |
337 | ||
338 | /* Now dump coprocessor & extra state: */ | |
339 | memcpy((unsigned char*)fpregs, | |
340 | _xtensa_reginfo_tables, _xtensa_reginfo_table_size); | |
341 | memcpy((unsigned char*)fpregs + _xtensa_reginfo_table_size, | |
342 | tsk->thread.cp_save, XTENSA_CP_EXTRA_SIZE); | |
343 | #endif | |
344 | } | |
345 | ||
346 | /* | |
347 | * The inverse of do_save_fpregs(). | |
348 | * Copies coprocessor and extra state from fpregs into regs and tsk->thread. | |
349 | * Returns 0 on success, non-zero if layout doesn't match. | |
350 | */ | |
351 | ||
352 | int do_restore_fpregs (elf_fpregset_t *fpregs, struct pt_regs *regs, | |
353 | struct task_struct *tsk) | |
354 | { | |
355 | #if XCHAL_HAVE_CP | |
356 | ||
357 | extern unsigned char _xtensa_reginfo_tables[]; | |
358 | extern unsigned _xtensa_reginfo_table_size; | |
359 | int i; | |
360 | unsigned long flags; | |
361 | ||
362 | /* Make sure save area layouts match. | |
363 | * FIXME: in the future we could allow restoring from | |
364 | * a different layout of the same registers, by comparing | |
365 | * fpregs' table with _xtensa_reginfo_tables and matching | |
366 | * entries and copying registers one at a time. | |
367 | * Not too sure yet whether that's very useful. | |
368 | */ | |
369 | ||
370 | if( memcmp((unsigned char*)fpregs, | |
371 | _xtensa_reginfo_tables, _xtensa_reginfo_table_size) ) { | |
372 | return -1; | |
373 | } | |
374 | ||
375 | /* Before restoring coprocessor state from memory, | |
376 | * ensure any live coprocessor contents for this | |
377 | * task are first invalidated. | |
378 | */ | |
379 | ||
380 | local_irq_save(flags); | |
381 | ||
382 | for (i = 0; i < XCHAL_CP_MAX; i++) { | |
383 | if (tsk == coprocessor_info[i].owner) { | |
384 | enable_coprocessor(i); | |
385 | save_coprocessor_registers( | |
386 | tsk->thread.cp_save+coprocessor_info[i].offset,i); | |
387 | coprocessor_info[i].owner = 0; | |
388 | disable_coprocessor(i); | |
389 | } | |
390 | } | |
391 | ||
392 | local_irq_restore(flags); | |
393 | ||
394 | /* Now restore coprocessor & extra state: */ | |
395 | ||
396 | memcpy(tsk->thread.cp_save, | |
397 | (unsigned char*)fpregs + _xtensa_reginfo_table_size, | |
398 | XTENSA_CP_EXTRA_SIZE); | |
399 | #endif | |
400 | return 0; | |
401 | } | |
402 | /* | |
403 | * Fill in the CP structure for a core dump for a particular task. | |
404 | */ | |
405 | ||
406 | int | |
407 | dump_task_fpu(struct pt_regs *regs, struct task_struct *task, elf_fpregset_t *r) | |
408 | { | |
5a0015d6 | 409 | return 0; /* no coprocessors active on this processor */ |
5a0015d6 CZ |
410 | } |
411 | ||
412 | /* | |
413 | * Fill in the CP structure for a core dump. | |
414 | * This includes any FPU coprocessor. | |
415 | * Here, we dump all coprocessors, and other ("extra") custom state. | |
416 | * | |
417 | * This function is called by elf_core_dump() in fs/binfmt_elf.c | |
418 | * (in which case 'regs' comes from calls to do_coredump, see signals.c). | |
419 | */ | |
420 | int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r) | |
421 | { | |
422 | return dump_task_fpu(regs, current, r); | |
423 | } | |
fc4fb2ad CZ |
424 | |
425 | asmlinkage | |
426 | long xtensa_clone(unsigned long clone_flags, unsigned long newsp, | |
427 | void __user *parent_tid, void *child_tls, | |
428 | void __user *child_tid, long a5, | |
429 | struct pt_regs *regs) | |
430 | { | |
431 | if (!newsp) | |
432 | newsp = regs->areg[1]; | |
433 | return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid); | |
434 | } | |
435 | ||
436 | /* | |
437 | * * xtensa_execve() executes a new program. | |
438 | * */ | |
439 | ||
440 | asmlinkage | |
441 | long xtensa_execve(char __user *name, char __user * __user *argv, | |
442 | char __user * __user *envp, | |
443 | long a3, long a4, long a5, | |
444 | struct pt_regs *regs) | |
445 | { | |
446 | long error; | |
447 | char * filename; | |
448 | ||
449 | filename = getname(name); | |
450 | error = PTR_ERR(filename); | |
451 | if (IS_ERR(filename)) | |
452 | goto out; | |
453 | // FIXME: release coprocessor?? | |
454 | error = do_execve(filename, argv, envp, regs); | |
455 | if (error == 0) { | |
456 | task_lock(current); | |
457 | current->ptrace &= ~PT_DTRACE; | |
458 | task_unlock(current); | |
459 | } | |
460 | putname(filename); | |
461 | out: | |
462 | return error; | |
463 | } | |
464 |