[mirror_ubuntu-zesty-kernel.git] / arch / xtensa / kernel / setup.c

/*
 * arch/xtensa/kernel/setup.c
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1995  Linus Torvalds
 * Copyright (C) 2001 - 2005  Tensilica Inc.
 *
 * Chris Zankel	<chris@zankel.net>
 * Joe Taylor	<joe@tensilica.com, joetylr@yahoo.com>
 * Kevin Chea
 * Marc Gauthier<marc@tensilica.com> <marc@alumni.uwaterloo.ca>
 */

#include <linux/errno.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/proc_fs.h>
#include <linux/screen_info.h>
#include <linux/bootmem.h>
#include <linux/kernel.h>

#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
# include <linux/console.h>
#endif

#ifdef CONFIG_RTC
# include <linux/timex.h>
#endif

#ifdef CONFIG_PROC_FS
# include <linux/seq_file.h>
#endif

#include <asm/bootparam.h>
#include <asm/pgtable.h>
#include <asm/processor.h>
#include <asm/timex.h>
#include <asm/platform.h>
#include <asm/page.h>
#include <asm/setup.h>
#include <asm/param.h>

#include <platform/hardware.h>

#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
struct screen_info screen_info = { 0, 24, 0, 0, 0, 80, 0, 0, 0, 24, 1, 16};
#endif

#ifdef CONFIG_BLK_DEV_FD
extern struct fd_ops no_fd_ops;
struct fd_ops *fd_ops;
#endif

extern struct rtc_ops no_rtc_ops;
struct rtc_ops *rtc_ops;

#ifdef CONFIG_BLK_DEV_INITRD
extern void *initrd_start;
extern void *initrd_end;
int initrd_is_mapped = 0;
extern int initrd_below_start_ok;
#endif

unsigned char aux_device_present;
extern unsigned long loops_per_jiffy;

/* Command line specified as configuration option. */

static char __initdata command_line[COMMAND_LINE_SIZE];

#ifdef CONFIG_CMDLINE_BOOL
static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
#endif

sysmem_info_t __initdata sysmem;

#ifdef CONFIG_MMU
extern void init_mmu(void);
#else
static inline void init_mmu(void) { }
#endif

extern void zones_init(void);

/*
 * Boot parameter parsing.
 *
 * The Xtensa port uses a list of variable-sized tags to pass data to
 * the kernel. The first tag must be a BP_TAG_FIRST tag for the list
 * to be recognised. The list is terminated with a zero-sized
 * BP_TAG_LAST tag.
 */

typedef struct tagtable {
	u32 tag;
	int (*parse)(const bp_tag_t*);
} tagtable_t;

#define __tagtable(tag, fn) static tagtable_t __tagtable_##fn 		\
	__attribute__((used, section(".taglist"))) = { tag, fn }

/* parse current tag */

static int __init parse_tag_mem(const bp_tag_t *tag)
{
	meminfo_t *mi = (meminfo_t*)(tag->data);

	if (mi->type != MEMORY_TYPE_CONVENTIONAL)
		return -1;

	if (sysmem.nr_banks >= SYSMEM_BANKS_MAX) {
		printk(KERN_WARNING
		       "Ignoring memory bank 0x%08lx size %ldKB\n",
		       (unsigned long)mi->start,
		       (unsigned long)mi->end - (unsigned long)mi->start);
		return -EINVAL;
	}
	sysmem.bank[sysmem.nr_banks].type  = mi->type;
	sysmem.bank[sysmem.nr_banks].start = PAGE_ALIGN(mi->start);
	sysmem.bank[sysmem.nr_banks].end   = mi->end & PAGE_MASK;
	sysmem.nr_banks++;

	return 0;
}

__tagtable(BP_TAG_MEMORY, parse_tag_mem);

#ifdef CONFIG_BLK_DEV_INITRD

static int __init parse_tag_initrd(const bp_tag_t* tag)
{
	meminfo_t* mi;
	mi = (meminfo_t*)(tag->data);
	initrd_start = (void*)(mi->start);
	initrd_end = (void*)(mi->end);

	return 0;
}

__tagtable(BP_TAG_INITRD, parse_tag_initrd);

#endif /* CONFIG_BLK_DEV_INITRD */

static int __init parse_tag_cmdline(const bp_tag_t* tag)
{
	strncpy(command_line, (char*)(tag->data), COMMAND_LINE_SIZE);
	command_line[COMMAND_LINE_SIZE - 1] = '\0';
	return 0;
}

__tagtable(BP_TAG_COMMAND_LINE, parse_tag_cmdline);

static int __init parse_bootparam(const bp_tag_t* tag)
{
	extern tagtable_t __tagtable_begin, __tagtable_end;
	tagtable_t *t;

	/* Boot parameters must start with a BP_TAG_FIRST tag. */

	if (tag->id != BP_TAG_FIRST) {
		printk(KERN_WARNING "Invalid boot parameters!\n");
		return 0;
	}

	tag = (bp_tag_t*)((unsigned long)tag + sizeof(bp_tag_t) + tag->size);

	/* Parse all tags. */

	while (tag != NULL && tag->id != BP_TAG_LAST) {
	 	for (t = &__tagtable_begin; t < &__tagtable_end; t++) {
			if (tag->id == t->tag) {
				t->parse(tag);
				break;
			}
		}
		if (t == &__tagtable_end)
			printk(KERN_WARNING "Ignoring tag "
			       "0x%08x\n", tag->id);
		tag = (bp_tag_t*)((unsigned long)(tag + 1) + tag->size);
	}

	return 0;
}

/*
 * Initialize architecture. (Early stage)
 */

void __init init_arch(bp_tag_t *bp_start)
{
	sysmem.nr_banks = 0;

#ifdef CONFIG_CMDLINE_BOOL
	strcpy(command_line, default_command_line);
#endif

	/* Parse boot parameters */

        if (bp_start)
	  parse_bootparam(bp_start);

	if (sysmem.nr_banks == 0) {
		sysmem.nr_banks = 1;
		sysmem.bank[0].start = PLATFORM_DEFAULT_MEM_START;
		sysmem.bank[0].end = PLATFORM_DEFAULT_MEM_START
				     + PLATFORM_DEFAULT_MEM_SIZE;
	}

	/* Early hook for platforms */

	platform_init(bp_start);

	/* Initialize MMU. */

	init_mmu();
}

/*
 * Initialize system. Setup memory and reserve regions.
 */

extern char _end;
extern char _stext;
extern char _WindowVectors_text_start;
extern char _WindowVectors_text_end;
extern char _DebugInterruptVector_literal_start;
extern char _DebugInterruptVector_text_end;
extern char _KernelExceptionVector_literal_start;
extern char _KernelExceptionVector_text_end;
extern char _UserExceptionVector_literal_start;
extern char _UserExceptionVector_text_end;
extern char _DoubleExceptionVector_literal_start;
extern char _DoubleExceptionVector_text_end;

void __init setup_arch(char **cmdline_p)
{
	extern int mem_reserve(unsigned long, unsigned long, int);
	extern void bootmem_init(void);

	memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
	boot_command_line[COMMAND_LINE_SIZE-1] = '\0';
	*cmdline_p = command_line;

	/* Reserve some memory regions */

#ifdef CONFIG_BLK_DEV_INITRD
	if (initrd_start < initrd_end) {
		initrd_is_mapped = mem_reserve(__pa(initrd_start),
					       __pa(initrd_end), 0);
		initrd_below_start_ok = 1;
 	} else {
		initrd_start = 0;
	}
#endif

	mem_reserve(__pa(&_stext),__pa(&_end), 1);

	mem_reserve(__pa(&_WindowVectors_text_start),
		    __pa(&_WindowVectors_text_end), 0);

	mem_reserve(__pa(&_DebugInterruptVector_literal_start),
		    __pa(&_DebugInterruptVector_text_end), 0);

	mem_reserve(__pa(&_KernelExceptionVector_literal_start),
		    __pa(&_KernelExceptionVector_text_end), 0);

	mem_reserve(__pa(&_UserExceptionVector_literal_start),
		    __pa(&_UserExceptionVector_text_end), 0);

	mem_reserve(__pa(&_DoubleExceptionVector_literal_start),
		    __pa(&_DoubleExceptionVector_text_end), 0);

	bootmem_init();

	platform_setup(cmdline_p);


	paging_init();
	zones_init();

#ifdef CONFIG_VT
# if defined(CONFIG_VGA_CONSOLE)
	conswitchp = &vga_con;
# elif defined(CONFIG_DUMMY_CONSOLE)
	conswitchp = &dummy_con;
# endif
#endif

#ifdef CONFIG_PCI
	platform_pcibios_init();
#endif
}

void machine_restart(char * cmd)
{
	platform_restart();
}

void machine_halt(void)
{
	platform_halt();
	while (1);
}

void machine_power_off(void)
{
	platform_power_off();
	while (1);
}
#ifdef CONFIG_PROC_FS

/*
 * Display some core information through /proc/cpuinfo.
 */

static int
c_show(struct seq_file *f, void *slot)
{
	/* high-level stuff */
	seq_printf(f,"processor\t: 0\n"
		     "vendor_id\t: Tensilica\n"
		     "model\t\t: Xtensa " XCHAL_HW_VERSION_NAME "\n"
		     "core ID\t\t: " XCHAL_CORE_ID "\n"
		     "build ID\t: 0x%x\n"
		     "byte order\t: %s\n"
 		     "cpu MHz\t\t: %lu.%02lu\n"
		     "bogomips\t: %lu.%02lu\n",
		     XCHAL_BUILD_UNIQUE_ID,
		     XCHAL_HAVE_BE ?  "big" : "little",
		     CCOUNT_PER_JIFFY/(1000000/HZ),
		     (CCOUNT_PER_JIFFY/(10000/HZ)) % 100,
		     loops_per_jiffy/(500000/HZ),
		     (loops_per_jiffy/(5000/HZ)) % 100);

	seq_printf(f,"flags\t\t: "
#if XCHAL_HAVE_NMI
		     "nmi "
#endif
#if XCHAL_HAVE_DEBUG
		     "debug "
# if XCHAL_HAVE_OCD
		     "ocd "
# endif
#endif
#if XCHAL_HAVE_DENSITY
	    	     "density "
#endif
#if XCHAL_HAVE_BOOLEANS
		     "boolean "
#endif
#if XCHAL_HAVE_LOOPS
		     "loop "
#endif
#if XCHAL_HAVE_NSA
		     "nsa "
#endif
#if XCHAL_HAVE_MINMAX
		     "minmax "
#endif
#if XCHAL_HAVE_SEXT
		     "sext "
#endif
#if XCHAL_HAVE_CLAMPS
		     "clamps "
#endif
#if XCHAL_HAVE_MAC16
		     "mac16 "
#endif
#if XCHAL_HAVE_MUL16
		     "mul16 "
#endif
#if XCHAL_HAVE_MUL32
		     "mul32 "
#endif
#if XCHAL_HAVE_MUL32_HIGH
		     "mul32h "
#endif
#if XCHAL_HAVE_FP
		     "fpu "
#endif
		     "\n");

	/* Registers. */
	seq_printf(f,"physical aregs\t: %d\n"
		     "misc regs\t: %d\n"
		     "ibreak\t\t: %d\n"
		     "dbreak\t\t: %d\n",
		     XCHAL_NUM_AREGS,
		     XCHAL_NUM_MISC_REGS,
		     XCHAL_NUM_IBREAK,
		     XCHAL_NUM_DBREAK);


	/* Interrupt. */
	seq_printf(f,"num ints\t: %d\n"
		     "ext ints\t: %d\n"
		     "int levels\t: %d\n"
		     "timers\t\t: %d\n"
		     "debug level\t: %d\n",
		     XCHAL_NUM_INTERRUPTS,
		     XCHAL_NUM_EXTINTERRUPTS,
		     XCHAL_NUM_INTLEVELS,
		     XCHAL_NUM_TIMERS,
		     XCHAL_DEBUGLEVEL);

	/* Cache */
	seq_printf(f,"icache line size: %d\n"
		     "icache ways\t: %d\n"
		     "icache size\t: %d\n"
		     "icache flags\t: "
#if XCHAL_ICACHE_LINE_LOCKABLE
		     "lock"
#endif
		     "\n"
		     "dcache line size: %d\n"
		     "dcache ways\t: %d\n"
		     "dcache size\t: %d\n"
		     "dcache flags\t: "
#if XCHAL_DCACHE_IS_WRITEBACK
		     "writeback"
#endif
#if XCHAL_DCACHE_LINE_LOCKABLE
		     "lock"
#endif
		     "\n",
		     XCHAL_ICACHE_LINESIZE,
		     XCHAL_ICACHE_WAYS,
		     XCHAL_ICACHE_SIZE,
		     XCHAL_DCACHE_LINESIZE,
		     XCHAL_DCACHE_WAYS,
		     XCHAL_DCACHE_SIZE);

	return 0;
}

/*
 * We show only CPU #0 info.
 */
static void *
c_start(struct seq_file *f, loff_t *pos)
{
	return (void *) ((*pos == 0) ? (void *)1 : NULL);
}

static void *
c_next(struct seq_file *f, void *v, loff_t *pos)
{
	return NULL;
}

static void
c_stop(struct seq_file *f, void *v)
{
}

const struct seq_operations cpuinfo_op =
{
	start:  c_start,
	next:   c_next,
	stop:   c_stop,
	show:   c_show
};

#endif /* CONFIG_PROC_FS */
Commit	Line	Data
5a0015d6	1	/*
f30c2269	2	* arch/xtensa/kernel/setup.c
5a0015d6 CZ	3	*
	4	* This file is subject to the terms and conditions of the GNU General Public
	5	* License. See the file "COPYING" in the main directory of this archive
	6	* for more details.
	7	*
	8	* Copyright (C) 1995 Linus Torvalds
	9	* Copyright (C) 2001 - 2005 Tensilica Inc.
	10	*
	11	* Chris Zankel <chris@zankel.net>
	12	* Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
	13	* Kevin Chea
	14	* Marc Gauthier<marc@tensilica.com> <marc@alumni.uwaterloo.ca>
	15	*/
	16
5a0015d6 CZ	17	#include <linux/errno.h>
5a0015d6 CZ	18	#include <linux/init.h>
27ac792c	19	#include <linux/mm.h>
5a0015d6	20	#include <linux/proc_fs.h>
894673ee	21	#include <linux/screen_info.h>
5a0015d6 CZ	22	#include <linux/bootmem.h>
	23	#include <linux/kernel.h>
	24
	25	#if defined(CONFIG_VGA_CONSOLE) \|\| defined(CONFIG_DUMMY_CONSOLE)
	26	# include <linux/console.h>
	27	#endif
	28
	29	#ifdef CONFIG_RTC
	30	# include <linux/timex.h>
	31	#endif
	32
	33	#ifdef CONFIG_PROC_FS
	34	# include <linux/seq_file.h>
	35	#endif
	36
5a0015d6 CZ	37	#include <asm/bootparam.h>
	38	#include <asm/pgtable.h>
	39	#include <asm/processor.h>
	40	#include <asm/timex.h>
	41	#include <asm/platform.h>
	42	#include <asm/page.h>
	43	#include <asm/setup.h>
de4f6e5b	44	#include <asm/param.h>
5a0015d6	45
5a891ed5 AD	46	#include <platform/hardware.h>
5a891ed5 AD	47
5a0015d6 CZ	48	#if defined(CONFIG_VGA_CONSOLE) \|\| defined(CONFIG_DUMMY_CONSOLE)
	49	struct screen_info screen_info = { 0, 24, 0, 0, 0, 80, 0, 0, 0, 24, 1, 16};
	50	#endif
	51
	52	#ifdef CONFIG_BLK_DEV_FD
	53	extern struct fd_ops no_fd_ops;
	54	struct fd_ops *fd_ops;
	55	#endif
	56
5a0015d6 CZ	57	extern struct rtc_ops no_rtc_ops;
	58	struct rtc_ops *rtc_ops;
	59
5a0015d6 CZ	60	#ifdef CONFIG_BLK_DEV_INITRD
	61	extern void *initrd_start;
	62	extern void *initrd_end;
5a0015d6 CZ	63	int initrd_is_mapped = 0;
	64	extern int initrd_below_start_ok;
	65	#endif
	66
	67	unsigned char aux_device_present;
	68	extern unsigned long loops_per_jiffy;
	69
	70	/* Command line specified as configuration option. */
	71
d3e9ccea	72	static char __initdata command_line[COMMAND_LINE_SIZE];
5a0015d6 CZ	73
	74	#ifdef CONFIG_CMDLINE_BOOL
	75	static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
	76	#endif
	77
	78	sysmem_info_t __initdata sysmem;
	79
e5083a63	80	#ifdef CONFIG_MMU
5a0015d6	81	extern void init_mmu(void);
e5083a63 JW	82	#else
	83	static inline void init_mmu(void) { }
	84	#endif
	85
	86	extern void zones_init(void);
5a0015d6 CZ	87
	88	/*
	89	* Boot parameter parsing.
	90	*
	91	* The Xtensa port uses a list of variable-sized tags to pass data to
	92	* the kernel. The first tag must be a BP_TAG_FIRST tag for the list
	93	* to be recognised. The list is terminated with a zero-sized
	94	* BP_TAG_LAST tag.
	95	*/
	96
	97	typedef struct tagtable {
	98	u32 tag;
	99	int (parse)(const bp_tag_t);
	100	} tagtable_t;
	101
	102	#define __tagtable(tag, fn) static tagtable_t __tagtable_##fn \
f4349b6e	103	__attribute__((used, section(".taglist"))) = { tag, fn }
5a0015d6 CZ	104
	105	/* parse current tag */
	106
	107	static int __init parse_tag_mem(const bp_tag_t *tag)
	108	{
	109	meminfo_t mi = (meminfo_t)(tag->data);
	110
	111	if (mi->type != MEMORY_TYPE_CONVENTIONAL)
	112	return -1;
	113
	114	if (sysmem.nr_banks >= SYSMEM_BANKS_MAX) {
	115	printk(KERN_WARNING
	116	"Ignoring memory bank 0x%08lx size %ldKB\n",
	117	(unsigned long)mi->start,
	118	(unsigned long)mi->end - (unsigned long)mi->start);
	119	return -EINVAL;
	120	}
	121	sysmem.bank[sysmem.nr_banks].type = mi->type;
	122	sysmem.bank[sysmem.nr_banks].start = PAGE_ALIGN(mi->start);
f4349b6e	123	sysmem.bank[sysmem.nr_banks].end = mi->end & PAGE_MASK;
5a0015d6 CZ	124	sysmem.nr_banks++;
	125
	126	return 0;
	127	}
	128
	129	__tagtable(BP_TAG_MEMORY, parse_tag_mem);
	130
	131	#ifdef CONFIG_BLK_DEV_INITRD
	132
	133	static int __init parse_tag_initrd(const bp_tag_t* tag)
	134	{
	135	meminfo_t* mi;
	136	mi = (meminfo_t*)(tag->data);
	137	initrd_start = (void*)(mi->start);
	138	initrd_end = (void*)(mi->end);
	139
	140	return 0;
	141	}
	142
	143	__tagtable(BP_TAG_INITRD, parse_tag_initrd);
	144
	145	#endif /* CONFIG_BLK_DEV_INITRD */
	146
	147	static int __init parse_tag_cmdline(const bp_tag_t* tag)
	148	{
	149	strncpy(command_line, (char*)(tag->data), COMMAND_LINE_SIZE);
	150	command_line[COMMAND_LINE_SIZE - 1] = '\0';
	151	return 0;
	152	}
	153
	154	__tagtable(BP_TAG_COMMAND_LINE, parse_tag_cmdline);
	155
	156	static int __init parse_bootparam(const bp_tag_t* tag)
	157	{
	158	extern tagtable_t __tagtable_begin, __tagtable_end;
	159	tagtable_t *t;
	160
	161	/* Boot parameters must start with a BP_TAG_FIRST tag. */
	162
	163	if (tag->id != BP_TAG_FIRST) {
	164	printk(KERN_WARNING "Invalid boot parameters!\n");
	165	return 0;
	166	}
	167
	168	tag = (bp_tag_t*)((unsigned long)tag + sizeof(bp_tag_t) + tag->size);
	169
	170	/* Parse all tags. */
	171
	172	while (tag != NULL && tag->id != BP_TAG_LAST) {
	173	for (t = &__tagtable_begin; t < &__tagtable_end; t++) {
	174	if (tag->id == t->tag) {
	175	t->parse(tag);
	176	break;
	177	}
	178	}
	179	if (t == &__tagtable_end)
	180	printk(KERN_WARNING "Ignoring tag "
	181	"0x%08x\n", tag->id);
	182	tag = (bp_tag_t*)((unsigned long)(tag + 1) + tag->size);
	183	}
	184
	185	return 0;
	186	}
	187
188	/*
189	* Initialize architecture. (Early stage)
190	*/
191
192	void __init init_arch(bp_tag_t *bp_start)
193	{
5a0015d6 CZ	194	sysmem.nr_banks = 0;
	195
	196	#ifdef CONFIG_CMDLINE_BOOL
	197	strcpy(command_line, default_command_line);
	198	#endif
	199
	200	/* Parse boot parameters */
	201
	202	if (bp_start)
	203	parse_bootparam(bp_start);
	204
	205	if (sysmem.nr_banks == 0) {
	206	sysmem.nr_banks = 1;
	207	sysmem.bank[0].start = PLATFORM_DEFAULT_MEM_START;
	208	sysmem.bank[0].end = PLATFORM_DEFAULT_MEM_START
	209	+ PLATFORM_DEFAULT_MEM_SIZE;
	210	}
	211
	212	/* Early hook for platforms */
	213
	214	platform_init(bp_start);
	215
	216	/* Initialize MMU. */
	217
	218	init_mmu();
	219	}
	220
	221	/*
	222	* Initialize system. Setup memory and reserve regions.
	223	*/
	224
	225	extern char _end;
	226	extern char _stext;
	227	extern char _WindowVectors_text_start;
	228	extern char _WindowVectors_text_end;
	229	extern char _DebugInterruptVector_literal_start;
	230	extern char _DebugInterruptVector_text_end;
	231	extern char _KernelExceptionVector_literal_start;
	232	extern char _KernelExceptionVector_text_end;
	233	extern char _UserExceptionVector_literal_start;
	234	extern char _UserExceptionVector_text_end;
	235	extern char _DoubleExceptionVector_literal_start;
	236	extern char _DoubleExceptionVector_text_end;
	237
	238	void __init setup_arch(char **cmdline_p)
	239	{
	240	extern int mem_reserve(unsigned long, unsigned long, int);
	241	extern void bootmem_init(void);
	242
d3e9ccea ABL	243	memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
d3e9ccea ABL	244	boot_command_line[COMMAND_LINE_SIZE-1] = '\0';
5a0015d6 CZ	245	*cmdline_p = command_line;
	246
	247	/* Reserve some memory regions */
	248
	249	#ifdef CONFIG_BLK_DEV_INITRD
	250	if (initrd_start < initrd_end) {
	251	initrd_is_mapped = mem_reserve(__pa(initrd_start),
	252	__pa(initrd_end), 0);
	253	initrd_below_start_ok = 1;
	254	} else {
	255	initrd_start = 0;
	256	}
	257	#endif
	258
	259	mem_reserve(__pa(&_stext),__pa(&_end), 1);
	260
	261	mem_reserve(__pa(&_WindowVectors_text_start),
	262	__pa(&_WindowVectors_text_end), 0);
	263
	264	mem_reserve(__pa(&_DebugInterruptVector_literal_start),
	265	__pa(&_DebugInterruptVector_text_end), 0);
	266
	267	mem_reserve(__pa(&_KernelExceptionVector_literal_start),
	268	__pa(&_KernelExceptionVector_text_end), 0);
	269
	270	mem_reserve(__pa(&_UserExceptionVector_literal_start),
	271	__pa(&_UserExceptionVector_text_end), 0);
	272
	273	mem_reserve(__pa(&_DoubleExceptionVector_literal_start),
	274	__pa(&_DoubleExceptionVector_text_end), 0);
	275
	276	bootmem_init();
	277
	278	platform_setup(cmdline_p);
	279
	280
	281	paging_init();
e5083a63	282	zones_init();
5a0015d6 CZ	283
	284	#ifdef CONFIG_VT
	285	# if defined(CONFIG_VGA_CONSOLE)
	286	conswitchp = &vga_con;
	287	# elif defined(CONFIG_DUMMY_CONSOLE)
	288	conswitchp = &dummy_con;
	289	# endif
	290	#endif
	291
288a60cf	292	#ifdef CONFIG_PCI
5a0015d6 CZ	293	platform_pcibios_init();
	294	#endif
	295	}
	296
	297	void machine_restart(char * cmd)
	298	{
	299	platform_restart();
	300	}
	301
	302	void machine_halt(void)
	303	{
	304	platform_halt();
	305	while (1);
	306	}
	307
	308	void machine_power_off(void)
	309	{
	310	platform_power_off();
	311	while (1);
	312	}
	313	#ifdef CONFIG_PROC_FS
	314
	315	/*
	316	* Display some core information through /proc/cpuinfo.
	317	*/
	318
	319	static int
	320	c_show(struct seq_file f, void slot)
	321	{
	322	/* high-level stuff */
	323	seq_printf(f,"processor\t: 0\n"
	324	"vendor_id\t: Tensilica\n"
173d6681	325	"model\t\t: Xtensa " XCHAL_HW_VERSION_NAME "\n"
5a0015d6 CZ	326	"core ID\t\t: " XCHAL_CORE_ID "\n"
	327	"build ID\t: 0x%x\n"
	328	"byte order\t: %s\n"
	329	"cpu MHz\t\t: %lu.%02lu\n"
	330	"bogomips\t: %lu.%02lu\n",
	331	XCHAL_BUILD_UNIQUE_ID,
	332	XCHAL_HAVE_BE ? "big" : "little",
	333	CCOUNT_PER_JIFFY/(1000000/HZ),
	334	(CCOUNT_PER_JIFFY/(10000/HZ)) % 100,
	335	loops_per_jiffy/(500000/HZ),
	336	(loops_per_jiffy/(5000/HZ)) % 100);
	337
	338	seq_printf(f,"flags\t\t: "
	339	#if XCHAL_HAVE_NMI
	340	"nmi "
	341	#endif
	342	#if XCHAL_HAVE_DEBUG
	343	"debug "
	344	# if XCHAL_HAVE_OCD
	345	"ocd "
	346	# endif
	347	#endif
	348	#if XCHAL_HAVE_DENSITY
	349	"density "
	350	#endif
	351	#if XCHAL_HAVE_BOOLEANS
	352	"boolean "
	353	#endif
	354	#if XCHAL_HAVE_LOOPS
	355	"loop "
	356	#endif
	357	#if XCHAL_HAVE_NSA
	358	"nsa "
	359	#endif
	360	#if XCHAL_HAVE_MINMAX
	361	"minmax "
	362	#endif
	363	#if XCHAL_HAVE_SEXT
	364	"sext "
	365	#endif
	366	#if XCHAL_HAVE_CLAMPS
	367	"clamps "
	368	#endif
	369	#if XCHAL_HAVE_MAC16
	370	"mac16 "
	371	#endif
	372	#if XCHAL_HAVE_MUL16
	373	"mul16 "
	374	#endif
	375	#if XCHAL_HAVE_MUL32
	376	"mul32 "
	377	#endif
	378	#if XCHAL_HAVE_MUL32_HIGH
	379	"mul32h "
	380	#endif
	381	#if XCHAL_HAVE_FP
	382	"fpu "
	383	#endif
	384	"\n");
	385
	386	/* Registers. */
	387	seq_printf(f,"physical aregs\t: %d\n"
	388	"misc regs\t: %d\n"
	389	"ibreak\t\t: %d\n"
390	"dbreak\t\t: %d\n",
391	XCHAL_NUM_AREGS,
392	XCHAL_NUM_MISC_REGS,
393	XCHAL_NUM_IBREAK,
394	XCHAL_NUM_DBREAK);
395
396
397	/* Interrupt. */
398	seq_printf(f,"num ints\t: %d\n"
399	"ext ints\t: %d\n"
400	"int levels\t: %d\n"
401	"timers\t\t: %d\n"
402	"debug level\t: %d\n",
403	XCHAL_NUM_INTERRUPTS,
404	XCHAL_NUM_EXTINTERRUPTS,
405	XCHAL_NUM_INTLEVELS,
406	XCHAL_NUM_TIMERS,
407	XCHAL_DEBUGLEVEL);
408
5a0015d6 CZ	409	/* Cache */
	410	seq_printf(f,"icache line size: %d\n"
	411	"icache ways\t: %d\n"
	412	"icache size\t: %d\n"
	413	"icache flags\t: "
	414	#if XCHAL_ICACHE_LINE_LOCKABLE
	415	"lock"
	416	#endif
	417	"\n"
	418	"dcache line size: %d\n"
	419	"dcache ways\t: %d\n"
	420	"dcache size\t: %d\n"
	421	"dcache flags\t: "
	422	#if XCHAL_DCACHE_IS_WRITEBACK
	423	"writeback"
	424	#endif
	425	#if XCHAL_DCACHE_LINE_LOCKABLE
	426	"lock"
	427	#endif
	428	"\n",
	429	XCHAL_ICACHE_LINESIZE,
	430	XCHAL_ICACHE_WAYS,
	431	XCHAL_ICACHE_SIZE,
	432	XCHAL_DCACHE_LINESIZE,
	433	XCHAL_DCACHE_WAYS,
	434	XCHAL_DCACHE_SIZE);
	435
5a0015d6 CZ	436	return 0;
	437	}
	438
	439	/*
	440	* We show only CPU #0 info.
	441	*/
	442	static void *
	443	c_start(struct seq_file f, loff_t pos)
	444	{
	445	return (void ) ((pos == 0) ? (void *)1 : NULL);
	446	}
	447
	448	static void *
	449	c_next(struct seq_file f, void v, loff_t *pos)
	450	{
	451	return NULL;
	452	}
	453
	454	static void
	455	c_stop(struct seq_file f, void v)
	456	{
	457	}
	458
03a44825	459	const struct seq_operations cpuinfo_op =
5a0015d6 CZ	460	{
	461	start: c_start,
	462	next: c_next,
	463	stop: c_stop,
	464	show: c_show
	465	};
	466
	467	#endif /* CONFIG_PROC_FS */
	468