[mirror_ubuntu-jammy-kernel.git] / arch / xtensa / kernel / traps.c

/*
 * arch/xtensa/kernel/traps.c
 *
 * Exception handling.
 *
 * Derived from code with the following copyrights:
 * Copyright (C) 1994 - 1999 by Ralf Baechle
 * Modified for R3000 by Paul M. Antoine, 1995, 1996
 * Complete output from die() by Ulf Carlsson, 1998
 * Copyright (C) 1999 Silicon Graphics, Inc.
 *
 * Essentially rewritten for the Xtensa architecture port.
 *
 * Copyright (C) 2001 - 2013 Tensilica Inc.
 *
 * Joe Taylor	<joe@tensilica.com, joetylr@yahoo.com>
 * Chris Zankel	<chris@zankel.net>
 * Marc Gauthier<marc@tensilica.com, marc@alumni.uwaterloo.ca>
 * Kevin Chea
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */

#include <linux/kernel.h>
#include <linux/sched/signal.h>
#include <linux/sched/debug.h>
#include <linux/sched/task_stack.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/stringify.h>
#include <linux/kallsyms.h>
#include <linux/delay.h>
#include <linux/hardirq.h>
#include <linux/ratelimit.h>
#include <linux/pgtable.h>

#include <asm/stacktrace.h>
#include <asm/ptrace.h>
#include <asm/timex.h>
#include <linux/uaccess.h>
#include <asm/processor.h>
#include <asm/traps.h>
#include <asm/hw_breakpoint.h>

/*
 * Machine specific interrupt handlers
 */

extern void kernel_exception(void);
extern void user_exception(void);

extern void fast_illegal_instruction_user(void);
extern void fast_syscall_user(void);
extern void fast_alloca(void);
extern void fast_unaligned(void);
extern void fast_second_level_miss(void);
extern void fast_store_prohibited(void);
extern void fast_coprocessor(void);

extern void do_illegal_instruction (struct pt_regs*);
extern void do_interrupt (struct pt_regs*);
extern void do_nmi(struct pt_regs *);
extern void do_unaligned_user (struct pt_regs*);
extern void do_multihit (struct pt_regs*, unsigned long);
extern void do_page_fault (struct pt_regs*, unsigned long);
extern void do_debug (struct pt_regs*);
extern void system_call (struct pt_regs*);

/*
 * The vector table must be preceded by a save area (which
 * implies it must be in RAM, unless one places RAM immediately
 * before a ROM and puts the vector at the start of the ROM (!))
 */

#define KRNL		0x01
#define USER		0x02

#define COPROCESSOR(x)							\
{ EXCCAUSE_COPROCESSOR ## x ## _DISABLED, USER, fast_coprocessor }

typedef struct {
	int cause;
	int fast;
	void* handler;
} dispatch_init_table_t;

static dispatch_init_table_t __initdata dispatch_init_table[] = {

#ifdef CONFIG_USER_ABI_CALL0_PROBE
{ EXCCAUSE_ILLEGAL_INSTRUCTION,	USER,	   fast_illegal_instruction_user },
#endif
{ EXCCAUSE_ILLEGAL_INSTRUCTION,	0,	   do_illegal_instruction},
{ EXCCAUSE_SYSTEM_CALL,		USER,	   fast_syscall_user },
{ EXCCAUSE_SYSTEM_CALL,		0,	   system_call },
/* EXCCAUSE_INSTRUCTION_FETCH unhandled */
/* EXCCAUSE_LOAD_STORE_ERROR unhandled*/
{ EXCCAUSE_LEVEL1_INTERRUPT,	0,	   do_interrupt },
{ EXCCAUSE_ALLOCA,		USER|KRNL, fast_alloca },
/* EXCCAUSE_INTEGER_DIVIDE_BY_ZERO unhandled */
/* EXCCAUSE_PRIVILEGED unhandled */
#if XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION
#ifdef CONFIG_XTENSA_UNALIGNED_USER
{ EXCCAUSE_UNALIGNED,		USER,	   fast_unaligned },
#endif
{ EXCCAUSE_UNALIGNED,		0,	   do_unaligned_user },
{ EXCCAUSE_UNALIGNED,		KRNL,	   fast_unaligned },
#endif
#ifdef CONFIG_MMU
{ EXCCAUSE_ITLB_MISS,		0,	   do_page_fault },
{ EXCCAUSE_ITLB_MISS,		USER|KRNL, fast_second_level_miss},
{ EXCCAUSE_ITLB_MULTIHIT,		0,	   do_multihit },
{ EXCCAUSE_ITLB_PRIVILEGE,	0,	   do_page_fault },
/* EXCCAUSE_SIZE_RESTRICTION unhandled */
{ EXCCAUSE_FETCH_CACHE_ATTRIBUTE,	0,	   do_page_fault },
{ EXCCAUSE_DTLB_MISS,		USER|KRNL, fast_second_level_miss},
{ EXCCAUSE_DTLB_MISS,		0,	   do_page_fault },
{ EXCCAUSE_DTLB_MULTIHIT,		0,	   do_multihit },
{ EXCCAUSE_DTLB_PRIVILEGE,	0,	   do_page_fault },
/* EXCCAUSE_DTLB_SIZE_RESTRICTION unhandled */
{ EXCCAUSE_STORE_CACHE_ATTRIBUTE,	USER|KRNL, fast_store_prohibited },
{ EXCCAUSE_STORE_CACHE_ATTRIBUTE,	0,	   do_page_fault },
{ EXCCAUSE_LOAD_CACHE_ATTRIBUTE,	0,	   do_page_fault },
#endif /* CONFIG_MMU */
/* XCCHAL_EXCCAUSE_FLOATING_POINT unhandled */
#if XTENSA_HAVE_COPROCESSOR(0)
COPROCESSOR(0),
#endif
#if XTENSA_HAVE_COPROCESSOR(1)
COPROCESSOR(1),
#endif
#if XTENSA_HAVE_COPROCESSOR(2)
COPROCESSOR(2),
#endif
#if XTENSA_HAVE_COPROCESSOR(3)
COPROCESSOR(3),
#endif
#if XTENSA_HAVE_COPROCESSOR(4)
COPROCESSOR(4),
#endif
#if XTENSA_HAVE_COPROCESSOR(5)
COPROCESSOR(5),
#endif
#if XTENSA_HAVE_COPROCESSOR(6)
COPROCESSOR(6),
#endif
#if XTENSA_HAVE_COPROCESSOR(7)
COPROCESSOR(7),
#endif
#if XTENSA_FAKE_NMI
{ EXCCAUSE_MAPPED_NMI,			0,		do_nmi },
#endif
{ EXCCAUSE_MAPPED_DEBUG,		0,		do_debug },
{ -1, -1, 0 }

};

/* The exception table <exc_table> serves two functions:
 * 1. it contains three dispatch tables (fast_user, fast_kernel, default-c)
 * 2. it is a temporary memory buffer for the exception handlers.
 */

DEFINE_PER_CPU(struct exc_table, exc_table);
DEFINE_PER_CPU(struct debug_table, debug_table);

void die(const char*, struct pt_regs*, long);

static inline void
__die_if_kernel(const char *str, struct pt_regs *regs, long err)
{
	if (!user_mode(regs))
		die(str, regs, err);
}

/*
 * Unhandled Exceptions. Kill user task or panic if in kernel space.
 */

void do_unhandled(struct pt_regs *regs, unsigned long exccause)
{
	__die_if_kernel("Caught unhandled exception - should not happen",
			regs, SIGKILL);

	/* If in user mode, send SIGILL signal to current process */
	pr_info_ratelimited("Caught unhandled exception in '%s' "
			    "(pid = %d, pc = %#010lx) - should not happen\n"
			    "\tEXCCAUSE is %ld\n",
			    current->comm, task_pid_nr(current), regs->pc,
			    exccause);
	force_sig(SIGILL);
}

/*
 * Multi-hit exception. This if fatal!
 */

void do_multihit(struct pt_regs *regs, unsigned long exccause)
{
	die("Caught multihit exception", regs, SIGKILL);
}

/*
 * IRQ handler.
 */

extern void do_IRQ(int, struct pt_regs *);

#if XTENSA_FAKE_NMI

#define IS_POW2(v) (((v) & ((v) - 1)) == 0)

#if !(PROFILING_INTLEVEL == XCHAL_EXCM_LEVEL && \
      IS_POW2(XTENSA_INTLEVEL_MASK(PROFILING_INTLEVEL)))
#warning "Fake NMI is requested for PMM, but there are other IRQs at or above its level."
#warning "Fake NMI will be used, but there will be a bugcheck if one of those IRQs fire."

static inline void check_valid_nmi(void)
{
	unsigned intread = xtensa_get_sr(interrupt);
	unsigned intenable = xtensa_get_sr(intenable);

	BUG_ON(intread & intenable &
	       ~(XTENSA_INTLEVEL_ANDBELOW_MASK(PROFILING_INTLEVEL) ^
		 XTENSA_INTLEVEL_MASK(PROFILING_INTLEVEL) ^
		 BIT(XCHAL_PROFILING_INTERRUPT)));
}

#else

static inline void check_valid_nmi(void)
{
}

#endif

irqreturn_t xtensa_pmu_irq_handler(int irq, void *dev_id);

DEFINE_PER_CPU(unsigned long, nmi_count);

void do_nmi(struct pt_regs *regs)
{
	struct pt_regs *old_regs;

	if ((regs->ps & PS_INTLEVEL_MASK) < LOCKLEVEL)
		trace_hardirqs_off();

	old_regs = set_irq_regs(regs);
	nmi_enter();
	++*this_cpu_ptr(&nmi_count);
	check_valid_nmi();
	xtensa_pmu_irq_handler(0, NULL);
	nmi_exit();
	set_irq_regs(old_regs);
}
#endif

void do_interrupt(struct pt_regs *regs)
{
	static const unsigned int_level_mask[] = {
		0,
		XCHAL_INTLEVEL1_MASK,
		XCHAL_INTLEVEL2_MASK,
		XCHAL_INTLEVEL3_MASK,
		XCHAL_INTLEVEL4_MASK,
		XCHAL_INTLEVEL5_MASK,
		XCHAL_INTLEVEL6_MASK,
		XCHAL_INTLEVEL7_MASK,
	};
	struct pt_regs *old_regs;

	trace_hardirqs_off();

	old_regs = set_irq_regs(regs);
	irq_enter();

	for (;;) {
		unsigned intread = xtensa_get_sr(interrupt);
		unsigned intenable = xtensa_get_sr(intenable);
		unsigned int_at_level = intread & intenable;
		unsigned level;

		for (level = LOCKLEVEL; level > 0; --level) {
			if (int_at_level & int_level_mask[level]) {
				int_at_level &= int_level_mask[level];
				break;
			}
		}

		if (level == 0)
			break;

		do_IRQ(__ffs(int_at_level), regs);
	}

	irq_exit();
	set_irq_regs(old_regs);
}

/*
 * Illegal instruction. Fatal if in kernel space.
 */

void
do_illegal_instruction(struct pt_regs *regs)
{
	__die_if_kernel("Illegal instruction in kernel", regs, SIGKILL);

	/* If in user mode, send SIGILL signal to current process. */

	pr_info_ratelimited("Illegal Instruction in '%s' (pid = %d, pc = %#010lx)\n",
			    current->comm, task_pid_nr(current), regs->pc);
	force_sig(SIGILL);
}


/*
 * Handle unaligned memory accesses from user space. Kill task.
 *
 * If CONFIG_UNALIGNED_USER is not set, we don't allow unaligned memory
 * accesses causes from user space.
 */

#if XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION
void
do_unaligned_user (struct pt_regs *regs)
{
	__die_if_kernel("Unhandled unaligned exception in kernel",
			regs, SIGKILL);

	current->thread.bad_vaddr = regs->excvaddr;
	current->thread.error_code = -3;
	pr_info_ratelimited("Unaligned memory access to %08lx in '%s' "
			    "(pid = %d, pc = %#010lx)\n",
			    regs->excvaddr, current->comm,
			    task_pid_nr(current), regs->pc);
	force_sig_fault(SIGBUS, BUS_ADRALN, (void *) regs->excvaddr);
}
#endif

/* Handle debug events.
 * When CONFIG_HAVE_HW_BREAKPOINT is on this handler is called with
 * preemption disabled to avoid rescheduling and keep mapping of hardware
 * breakpoint structures to debug registers intact, so that
 * DEBUGCAUSE.DBNUM could be used in case of data breakpoint hit.
 */
void
do_debug(struct pt_regs *regs)
{
#ifdef CONFIG_HAVE_HW_BREAKPOINT
	int ret = check_hw_breakpoint(regs);

	preempt_enable();
	if (ret == 0)
		return;
#endif
	__die_if_kernel("Breakpoint in kernel", regs, SIGKILL);

	/* If in user mode, send SIGTRAP signal to current process */

	force_sig(SIGTRAP);
}


#define set_handler(type, cause, handler)				\
	do {								\
		unsigned int cpu;					\
									\
		for_each_possible_cpu(cpu)				\
			per_cpu(exc_table, cpu).type[cause] = (handler);\
	} while (0)

/* Set exception C handler - for temporary use when probing exceptions */

void * __init trap_set_handler(int cause, void *handler)
{
	void *previous = per_cpu(exc_table, 0).default_handler[cause];

	set_handler(default_handler, cause, handler);
	return previous;
}


static void trap_init_excsave(void)
{
	unsigned long excsave1 = (unsigned long)this_cpu_ptr(&exc_table);
	__asm__ __volatile__("wsr  %0, excsave1\n" : : "a" (excsave1));
}

static void trap_init_debug(void)
{
	unsigned long debugsave = (unsigned long)this_cpu_ptr(&debug_table);

	this_cpu_ptr(&debug_table)->debug_exception = debug_exception;
	__asm__ __volatile__("wsr %0, excsave" __stringify(XCHAL_DEBUGLEVEL)
			     :: "a"(debugsave));
}

/*
 * Initialize dispatch tables.
 *
 * The exception vectors are stored compressed the __init section in the
 * dispatch_init_table. This function initializes the following three tables
 * from that compressed table:
 * - fast user		first dispatch table for user exceptions
 * - fast kernel	first dispatch table for kernel exceptions
 * - default C-handler	C-handler called by the default fast handler.
 *
 * See vectors.S for more details.
 */

void __init trap_init(void)
{
	int i;

	/* Setup default vectors. */

	for (i = 0; i < EXCCAUSE_N; i++) {
		set_handler(fast_user_handler, i, user_exception);
		set_handler(fast_kernel_handler, i, kernel_exception);
		set_handler(default_handler, i, do_unhandled);
	}

	/* Setup specific handlers. */

	for(i = 0; dispatch_init_table[i].cause >= 0; i++) {
		int fast = dispatch_init_table[i].fast;
		int cause = dispatch_init_table[i].cause;
		void *handler = dispatch_init_table[i].handler;

		if (fast == 0)
			set_handler(default_handler, cause, handler);
		if ((fast & USER) != 0)
			set_handler(fast_user_handler, cause, handler);
		if ((fast & KRNL) != 0)
			set_handler(fast_kernel_handler, cause, handler);
	}

	/* Initialize EXCSAVE_1 to hold the address of the exception table. */
	trap_init_excsave();
	trap_init_debug();
}

#ifdef CONFIG_SMP
void secondary_trap_init(void)
{
	trap_init_excsave();
	trap_init_debug();
}
#endif

/*
 * This function dumps the current valid window frame and other base registers.
 */

void show_regs(struct pt_regs * regs)
{
	int i, wmask;

	show_regs_print_info(KERN_DEFAULT);

	wmask = regs->wmask & ~1;

	for (i = 0; i < 16; i++) {
		if ((i % 8) == 0)
			pr_info("a%02d:", i);
		pr_cont(" %08lx", regs->areg[i]);
	}
	pr_cont("\n");
	pr_info("pc: %08lx, ps: %08lx, depc: %08lx, excvaddr: %08lx\n",
		regs->pc, regs->ps, regs->depc, regs->excvaddr);
	pr_info("lbeg: %08lx, lend: %08lx lcount: %08lx, sar: %08lx\n",
		regs->lbeg, regs->lend, regs->lcount, regs->sar);
	if (user_mode(regs))
		pr_cont("wb: %08lx, ws: %08lx, wmask: %08lx, syscall: %ld\n",
			regs->windowbase, regs->windowstart, regs->wmask,
			regs->syscall);
}

static int show_trace_cb(struct stackframe *frame, void *data)
{
	const char *loglvl = data;

	if (kernel_text_address(frame->pc))
		printk("%s [<%08lx>] %pB\n",
			loglvl, frame->pc, (void *)frame->pc);
	return 0;
}

static void show_trace(struct task_struct *task, unsigned long *sp,
		       const char *loglvl)
{
	if (!sp)
		sp = stack_pointer(task);

	printk("%sCall Trace:\n", loglvl);
	walk_stackframe(sp, show_trace_cb, (void *)loglvl);
}

#define STACK_DUMP_ENTRY_SIZE 4
#define STACK_DUMP_LINE_SIZE 32
static size_t kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;

void show_stack(struct task_struct *task, unsigned long *sp, const char *loglvl)
{
	size_t len;

	if (!sp)
		sp = stack_pointer(task);

	len = min((-(size_t)sp) & (THREAD_SIZE - STACK_DUMP_ENTRY_SIZE),
		  kstack_depth_to_print * STACK_DUMP_ENTRY_SIZE);

	printk("%sStack:\n", loglvl);
	print_hex_dump(loglvl, " ", DUMP_PREFIX_NONE,
		       STACK_DUMP_LINE_SIZE, STACK_DUMP_ENTRY_SIZE,
		       sp, len, false);
	show_trace(task, sp, loglvl);
}

DEFINE_SPINLOCK(die_lock);

void die(const char * str, struct pt_regs * regs, long err)
{
	static int die_counter;
	const char *pr = "";

	if (IS_ENABLED(CONFIG_PREEMPTION))
		pr = IS_ENABLED(CONFIG_PREEMPT_RT) ? " PREEMPT_RT" : " PREEMPT";

	console_verbose();
	spin_lock_irq(&die_lock);

	pr_info("%s: sig: %ld [#%d]%s\n", str, err, ++die_counter, pr);
	show_regs(regs);
	if (!user_mode(regs))
		show_stack(NULL, (unsigned long *)regs->areg[1], KERN_INFO);

	add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
	spin_unlock_irq(&die_lock);

	if (in_interrupt())
		panic("Fatal exception in interrupt");

	if (panic_on_oops)
		panic("Fatal exception");

	do_exit(err);
}
Commit	Line	Data
5a0015d6 CZ	1	/*
	2	* arch/xtensa/kernel/traps.c
	3	*
	4	* Exception handling.
	5	*
	6	* Derived from code with the following copyrights:
	7	* Copyright (C) 1994 - 1999 by Ralf Baechle
	8	* Modified for R3000 by Paul M. Antoine, 1995, 1996
	9	* Complete output from die() by Ulf Carlsson, 1998
	10	* Copyright (C) 1999 Silicon Graphics, Inc.
	11	*
	12	* Essentially rewritten for the Xtensa architecture port.
	13	*
3e4196a5	14	* Copyright (C) 2001 - 2013 Tensilica Inc.
5a0015d6 CZ	15	*
	16	* Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
	17	* Chris Zankel <chris@zankel.net>
	18	* Marc Gauthier<marc@tensilica.com, marc@alumni.uwaterloo.ca>
	19	* Kevin Chea
	20	*
	21	* This file is subject to the terms and conditions of the GNU General Public
	22	* License. See the file "COPYING" in the main directory of this archive
	23	* for more details.
	24	*/
	25
	26	#include <linux/kernel.h>
3f07c014	27	#include <linux/sched/signal.h>
b17b0153	28	#include <linux/sched/debug.h>
3f8c2452	29	#include <linux/sched/task_stack.h>
5a0015d6 CZ	30	#include <linux/init.h>
	31	#include <linux/module.h>
	32	#include <linux/stringify.h>
	33	#include <linux/kallsyms.h>
5c888d53	34	#include <linux/delay.h>
5a891ed5	35	#include <linux/hardirq.h>
c130d3be	36	#include <linux/ratelimit.h>
65fddcfc	37	#include <linux/pgtable.h>
5a0015d6	38
3e4196a5	39	#include <asm/stacktrace.h>
5a0015d6 CZ	40	#include <asm/ptrace.h>
5a0015d6 CZ	41	#include <asm/timex.h>
7c0f6ba6	42	#include <linux/uaccess.h>
5a0015d6	43	#include <asm/processor.h>
2d6f82fe	44	#include <asm/traps.h>
c91e02bd	45	#include <asm/hw_breakpoint.h>
5a0015d6	46
5a0015d6 CZ	47	/*
	48	* Machine specific interrupt handlers
	49	*/
	50
	51	extern void kernel_exception(void);
	52	extern void user_exception(void);
	53
09f8a6db	54	extern void fast_illegal_instruction_user(void);
5a0015d6 CZ	55	extern void fast_syscall_user(void);
	56	extern void fast_alloca(void);
	57	extern void fast_unaligned(void);
	58	extern void fast_second_level_miss(void);
	59	extern void fast_store_prohibited(void);
	60	extern void fast_coprocessor(void);
	61
	62	extern void do_illegal_instruction (struct pt_regs*);
	63	extern void do_interrupt (struct pt_regs*);
38fef73c	64	extern void do_nmi(struct pt_regs *);
5a0015d6 CZ	65	extern void do_unaligned_user (struct pt_regs*);
	66	extern void do_multihit (struct pt_regs*, unsigned long);
	67	extern void do_page_fault (struct pt_regs*, unsigned long);
	68	extern void do_debug (struct pt_regs*);
	69	extern void system_call (struct pt_regs*);
	70
	71	/*
	72	* The vector table must be preceded by a save area (which
	73	* implies it must be in RAM, unless one places RAM immediately
	74	* before a ROM and puts the vector at the start of the ROM (!))
	75	*/
	76
	77	#define KRNL 0x01
	78	#define USER 0x02
	79
	80	#define COPROCESSOR(x) \
173d6681	81	{ EXCCAUSE_COPROCESSOR ## x ## _DISABLED, USER, fast_coprocessor }
5a0015d6 CZ	82
	83	typedef struct {
	84	int cause;
	85	int fast;
	86	void* handler;
	87	} dispatch_init_table_t;
	88
b91dc336	89	static dispatch_init_table_t __initdata dispatch_init_table[] = {
5a0015d6	90
09f8a6db MF	91	#ifdef CONFIG_USER_ABI_CALL0_PROBE
	92	{ EXCCAUSE_ILLEGAL_INSTRUCTION, USER, fast_illegal_instruction_user },
	93	#endif
173d6681	94	{ EXCCAUSE_ILLEGAL_INSTRUCTION, 0, do_illegal_instruction},
173d6681 CZ	95	{ EXCCAUSE_SYSTEM_CALL, USER, fast_syscall_user },
	96	{ EXCCAUSE_SYSTEM_CALL, 0, system_call },
	97	/* EXCCAUSE_INSTRUCTION_FETCH unhandled */
	98	/* EXCCAUSE_LOAD_STORE_ERROR unhandled*/
	99	{ EXCCAUSE_LEVEL1_INTERRUPT, 0, do_interrupt },
	100	{ EXCCAUSE_ALLOCA, USER\|KRNL, fast_alloca },
	101	/* EXCCAUSE_INTEGER_DIVIDE_BY_ZERO unhandled */
	102	/* EXCCAUSE_PRIVILEGED unhandled */
5a0015d6	103	#if XCHAL_UNALIGNED_LOAD_EXCEPTION \|\| XCHAL_UNALIGNED_STORE_EXCEPTION
4ded6282	104	#ifdef CONFIG_XTENSA_UNALIGNED_USER
173d6681	105	{ EXCCAUSE_UNALIGNED, USER, fast_unaligned },
5a0015d6	106	#endif
3cfc096e	107	{ EXCCAUSE_UNALIGNED, 0, do_unaligned_user },
173d6681	108	{ EXCCAUSE_UNALIGNED, KRNL, fast_unaligned },
5a0015d6	109	#endif
e5083a63	110	#ifdef CONFIG_MMU
173d6681 CZ	111	{ EXCCAUSE_ITLB_MISS, 0, do_page_fault },
	112	{ EXCCAUSE_ITLB_MISS, USER\|KRNL, fast_second_level_miss},
	113	{ EXCCAUSE_ITLB_MULTIHIT, 0, do_multihit },
	114	{ EXCCAUSE_ITLB_PRIVILEGE, 0, do_page_fault },
	115	/* EXCCAUSE_SIZE_RESTRICTION unhandled */
	116	{ EXCCAUSE_FETCH_CACHE_ATTRIBUTE, 0, do_page_fault },
	117	{ EXCCAUSE_DTLB_MISS, USER\|KRNL, fast_second_level_miss},
	118	{ EXCCAUSE_DTLB_MISS, 0, do_page_fault },
	119	{ EXCCAUSE_DTLB_MULTIHIT, 0, do_multihit },
	120	{ EXCCAUSE_DTLB_PRIVILEGE, 0, do_page_fault },
	121	/* EXCCAUSE_DTLB_SIZE_RESTRICTION unhandled */
	122	{ EXCCAUSE_STORE_CACHE_ATTRIBUTE, USER\|KRNL, fast_store_prohibited },
	123	{ EXCCAUSE_STORE_CACHE_ATTRIBUTE, 0, do_page_fault },
	124	{ EXCCAUSE_LOAD_CACHE_ATTRIBUTE, 0, do_page_fault },
e5083a63	125	#endif /* CONFIG_MMU */
5a0015d6	126	/* XCCHAL_EXCCAUSE_FLOATING_POINT unhandled */
c658eac6	127	#if XTENSA_HAVE_COPROCESSOR(0)
5a0015d6 CZ	128	COPROCESSOR(0),
5a0015d6 CZ	129	#endif
c658eac6	130	#if XTENSA_HAVE_COPROCESSOR(1)
5a0015d6 CZ	131	COPROCESSOR(1),
5a0015d6 CZ	132	#endif
c658eac6	133	#if XTENSA_HAVE_COPROCESSOR(2)
5a0015d6 CZ	134	COPROCESSOR(2),
5a0015d6 CZ	135	#endif
c658eac6	136	#if XTENSA_HAVE_COPROCESSOR(3)
5a0015d6 CZ	137	COPROCESSOR(3),
5a0015d6 CZ	138	#endif
c658eac6	139	#if XTENSA_HAVE_COPROCESSOR(4)
5a0015d6 CZ	140	COPROCESSOR(4),
5a0015d6 CZ	141	#endif
c658eac6	142	#if XTENSA_HAVE_COPROCESSOR(5)
5a0015d6 CZ	143	COPROCESSOR(5),
5a0015d6 CZ	144	#endif
c658eac6	145	#if XTENSA_HAVE_COPROCESSOR(6)
5a0015d6 CZ	146	COPROCESSOR(6),
5a0015d6 CZ	147	#endif
c658eac6	148	#if XTENSA_HAVE_COPROCESSOR(7)
5a0015d6 CZ	149	COPROCESSOR(7),
5a0015d6 CZ	150	#endif
38fef73c MF	151	#if XTENSA_FAKE_NMI
	152	{ EXCCAUSE_MAPPED_NMI, 0, do_nmi },
	153	#endif
5a0015d6 CZ	154	{ EXCCAUSE_MAPPED_DEBUG, 0, do_debug },
	155	{ -1, -1, 0 }
	156
	157	};
	158
	159	/* The exception table <exc_table> serves two functions:
	160	* 1. it contains three dispatch tables (fast_user, fast_kernel, default-c)
	161	* 2. it is a temporary memory buffer for the exception handlers.
	162	*/
	163
f21a79ca	164	DEFINE_PER_CPU(struct exc_table, exc_table);
6ec7026a MF	165	DEFINE_PER_CPU(struct debug_table, debug_table);
6ec7026a MF	166
5a0015d6 CZ	167	void die(const char, struct pt_regs, long);
	168
	169	static inline void
	170	__die_if_kernel(const char str, struct pt_regs regs, long err)
	171	{
	172	if (!user_mode(regs))
	173	die(str, regs, err);
	174	}
	175
	176	/*
	177	* Unhandled Exceptions. Kill user task or panic if in kernel space.
	178	*/
	179
	180	void do_unhandled(struct pt_regs *regs, unsigned long exccause)
	181	{
	182	__die_if_kernel("Caught unhandled exception - should not happen",
c130d3be	183	regs, SIGKILL);
5a0015d6 CZ	184
5a0015d6 CZ	185	/* If in user mode, send SIGILL signal to current process */
c130d3be MF	186	pr_info_ratelimited("Caught unhandled exception in '%s' "
	187	"(pid = %d, pc = %#010lx) - should not happen\n"
	188	"\tEXCCAUSE is %ld\n",
	189	current->comm, task_pid_nr(current), regs->pc,
	190	exccause);
3cf5d076	191	force_sig(SIGILL);
5a0015d6 CZ	192	}
	193
	194	/*
	195	* Multi-hit exception. This if fatal!
	196	*/
	197
	198	void do_multihit(struct pt_regs *regs, unsigned long exccause)
	199	{
	200	die("Caught multihit exception", regs, SIGKILL);
	201	}
	202
	203	/*
2d1c645c	204	* IRQ handler.
5a0015d6 CZ	205	*/
5a0015d6 CZ	206
5a0015d6 CZ	207	extern void do_IRQ(int, struct pt_regs *);
5a0015d6 CZ	208
38fef73c MF	209	#if XTENSA_FAKE_NMI
38fef73c MF	210
e4629194 MF	211	#define IS_POW2(v) (((v) & ((v) - 1)) == 0)
	212
	213	#if !(PROFILING_INTLEVEL == XCHAL_EXCM_LEVEL && \
	214	IS_POW2(XTENSA_INTLEVEL_MASK(PROFILING_INTLEVEL)))
	215	#warning "Fake NMI is requested for PMM, but there are other IRQs at or above its level."
	216	#warning "Fake NMI will be used, but there will be a bugcheck if one of those IRQs fire."
	217
	218	static inline void check_valid_nmi(void)
	219	{
cad6fade MF	220	unsigned intread = xtensa_get_sr(interrupt);
cad6fade MF	221	unsigned intenable = xtensa_get_sr(intenable);
e4629194 MF	222
	223	BUG_ON(intread & intenable &
	224	~(XTENSA_INTLEVEL_ANDBELOW_MASK(PROFILING_INTLEVEL) ^
	225	XTENSA_INTLEVEL_MASK(PROFILING_INTLEVEL) ^
	226	BIT(XCHAL_PROFILING_INTERRUPT)));
	227	}
	228
	229	#else
	230
	231	static inline void check_valid_nmi(void)
	232	{
	233	}
	234
	235	#endif
	236
38fef73c MF	237	irqreturn_t xtensa_pmu_irq_handler(int irq, void *dev_id);
	238
	239	DEFINE_PER_CPU(unsigned long, nmi_count);
	240
	241	void do_nmi(struct pt_regs *regs)
	242	{
	243	struct pt_regs *old_regs;
	244
	245	if ((regs->ps & PS_INTLEVEL_MASK) < LOCKLEVEL)
	246	trace_hardirqs_off();
	247
	248	old_regs = set_irq_regs(regs);
	249	nmi_enter();
	250	++*this_cpu_ptr(&nmi_count);
e4629194	251	check_valid_nmi();
38fef73c MF	252	xtensa_pmu_irq_handler(0, NULL);
	253	nmi_exit();
	254	set_irq_regs(old_regs);
	255	}
	256	#endif
	257
2d1c645c	258	void do_interrupt(struct pt_regs *regs)
5a0015d6	259	{
2d1c645c MG	260	static const unsigned int_level_mask[] = {
	261	0,
	262	XCHAL_INTLEVEL1_MASK,
	263	XCHAL_INTLEVEL2_MASK,
	264	XCHAL_INTLEVEL3_MASK,
	265	XCHAL_INTLEVEL4_MASK,
	266	XCHAL_INTLEVEL5_MASK,
	267	XCHAL_INTLEVEL6_MASK,
	268	XCHAL_INTLEVEL7_MASK,
	269	};
7d5f6a9a	270	struct pt_regs *old_regs;
99623239	271
7d5f6a9a MF	272	trace_hardirqs_off();
	273
	274	old_regs = set_irq_regs(regs);
99623239	275	irq_enter();
5a0015d6	276
2d1c645c	277	for (;;) {
cad6fade MF	278	unsigned intread = xtensa_get_sr(interrupt);
cad6fade MF	279	unsigned intenable = xtensa_get_sr(intenable);
895666a9 MF	280	unsigned int_at_level = intread & intenable;
	281	unsigned level;
	282
	283	for (level = LOCKLEVEL; level > 0; --level) {
	284	if (int_at_level & int_level_mask[level]) {
	285	int_at_level &= int_level_mask[level];
	286	break;
	287	}
	288	}
2d1c645c	289
895666a9	290	if (level == 0)
99623239 MF	291	break;
	292
	293	do_IRQ(__ffs(int_at_level), regs);
5a0015d6	294	}
99623239 MF	295
	296	irq_exit();
	297	set_irq_regs(old_regs);
5a0015d6 CZ	298	}
	299
	300	/*
	301	* Illegal instruction. Fatal if in kernel space.
	302	*/
	303
	304	void
	305	do_illegal_instruction(struct pt_regs *regs)
	306	{
	307	__die_if_kernel("Illegal instruction in kernel", regs, SIGKILL);
	308
	309	/* If in user mode, send SIGILL signal to current process. */
	310
c130d3be MF	311	pr_info_ratelimited("Illegal Instruction in '%s' (pid = %d, pc = %#010lx)\n",
c130d3be MF	312	current->comm, task_pid_nr(current), regs->pc);
3cf5d076	313	force_sig(SIGILL);
5a0015d6 CZ	314	}
	315
	316
	317	/*
	318	* Handle unaligned memory accesses from user space. Kill task.
	319	*
	320	* If CONFIG_UNALIGNED_USER is not set, we don't allow unaligned memory
	321	* accesses causes from user space.
	322	*/
	323
	324	#if XCHAL_UNALIGNED_LOAD_EXCEPTION \|\| XCHAL_UNALIGNED_STORE_EXCEPTION
5a0015d6 CZ	325	void
	326	do_unaligned_user (struct pt_regs *regs)
	327	{
5a0015d6	328	__die_if_kernel("Unhandled unaligned exception in kernel",
c130d3be	329	regs, SIGKILL);
5a0015d6 CZ	330
	331	current->thread.bad_vaddr = regs->excvaddr;
	332	current->thread.error_code = -3;
c130d3be MF	333	pr_info_ratelimited("Unaligned memory access to %08lx in '%s' "
	334	"(pid = %d, pc = %#010lx)\n",
	335	regs->excvaddr, current->comm,
	336	task_pid_nr(current), regs->pc);
2e1661d2	337	force_sig_fault(SIGBUS, BUS_ADRALN, (void *) regs->excvaddr);
5a0015d6 CZ	338	}
5a0015d6 CZ	339	#endif
5a0015d6	340
c91e02bd MF	341	/* Handle debug events.
	342	* When CONFIG_HAVE_HW_BREAKPOINT is on this handler is called with
	343	* preemption disabled to avoid rescheduling and keep mapping of hardware
	344	* breakpoint structures to debug registers intact, so that
	345	* DEBUGCAUSE.DBNUM could be used in case of data breakpoint hit.
	346	*/
5a0015d6 CZ	347	void
	348	do_debug(struct pt_regs *regs)
	349	{
c91e02bd MF	350	#ifdef CONFIG_HAVE_HW_BREAKPOINT
	351	int ret = check_hw_breakpoint(regs);
	352
	353	preempt_enable();
	354	if (ret == 0)
	355	return;
	356	#endif
5a0015d6 CZ	357	__die_if_kernel("Breakpoint in kernel", regs, SIGKILL);
	358
	359	/* If in user mode, send SIGTRAP signal to current process */
	360
3cf5d076	361	force_sig(SIGTRAP);
5a0015d6 CZ	362	}
	363
	364
f21a79ca MF	365	#define set_handler(type, cause, handler) \
	366	do { \
	367	unsigned int cpu; \
	368	\
	369	for_each_possible_cpu(cpu) \
	370	per_cpu(exc_table, cpu).type[cause] = (handler);\
	371	} while (0)
f615136c	372
28570e8d MF	373	/* Set exception C handler - for temporary use when probing exceptions */
	374
	375	void * __init trap_set_handler(int cause, void *handler)
	376	{
f21a79ca MF	377	void *previous = per_cpu(exc_table, 0).default_handler[cause];
	378
	379	set_handler(default_handler, cause, handler);
28570e8d MF	380	return previous;
	381	}
	382
	383
49b424fe	384	static void trap_init_excsave(void)
f615136c	385	{
f21a79ca	386	unsigned long excsave1 = (unsigned long)this_cpu_ptr(&exc_table);
f615136c MF	387	__asm__ __volatile__("wsr %0, excsave1\n" : : "a" (excsave1));
	388	}
	389
6ec7026a MF	390	static void trap_init_debug(void)
	391	{
	392	unsigned long debugsave = (unsigned long)this_cpu_ptr(&debug_table);
	393
	394	this_cpu_ptr(&debug_table)->debug_exception = debug_exception;
	395	__asm__ __volatile__("wsr %0, excsave" __stringify(XCHAL_DEBUGLEVEL)
	396	:: "a"(debugsave));
	397	}
	398
5a0015d6 CZ	399	/*
	400	* Initialize dispatch tables.
	401	*
	402	* The exception vectors are stored compressed the __init section in the
	403	* dispatch_init_table. This function initializes the following three tables
	404	* from that compressed table:
	405	* - fast user first dispatch table for user exceptions
	406	* - fast kernel first dispatch table for kernel exceptions
	407	* - default C-handler C-handler called by the default fast handler.
	408	*
	409	* See vectors.S for more details.
	410	*/
	411
b91dc336	412	void __init trap_init(void)
5a0015d6 CZ	413	{
	414	int i;
	415
	416	/* Setup default vectors. */
	417
f21a79ca MF	418	for (i = 0; i < EXCCAUSE_N; i++) {
	419	set_handler(fast_user_handler, i, user_exception);
	420	set_handler(fast_kernel_handler, i, kernel_exception);
	421	set_handler(default_handler, i, do_unhandled);
5a0015d6 CZ	422	}
	423
	424	/* Setup specific handlers. */
	425
	426	for(i = 0; dispatch_init_table[i].cause >= 0; i++) {
5a0015d6 CZ	427	int fast = dispatch_init_table[i].fast;
	428	int cause = dispatch_init_table[i].cause;
	429	void *handler = dispatch_init_table[i].handler;
	430
	431	if (fast == 0)
f21a79ca	432	set_handler(default_handler, cause, handler);
60deebe6	433	if ((fast & USER) != 0)
f21a79ca	434	set_handler(fast_user_handler, cause, handler);
60deebe6	435	if ((fast & KRNL) != 0)
f21a79ca	436	set_handler(fast_kernel_handler, cause, handler);
5a0015d6 CZ	437	}
	438
	439	/* Initialize EXCSAVE_1 to hold the address of the exception table. */
f615136c	440	trap_init_excsave();
6ec7026a	441	trap_init_debug();
f615136c	442	}
5a0015d6	443
f615136c	444	#ifdef CONFIG_SMP
49b424fe	445	void secondary_trap_init(void)
f615136c MF	446	{
f615136c MF	447	trap_init_excsave();
6ec7026a	448	trap_init_debug();
5a0015d6	449	}
f615136c	450	#endif
5a0015d6 CZ	451
	452	/*
	453	* This function dumps the current valid window frame and other base registers.
	454	*/
	455
	456	void show_regs(struct pt_regs * regs)
	457	{
	458	int i, wmask;
	459
a43cb95d TH	460	show_regs_print_info(KERN_DEFAULT);
a43cb95d TH	461
5a0015d6 CZ	462	wmask = regs->wmask & ~1;
5a0015d6 CZ	463
8d7e8240	464	for (i = 0; i < 16; i++) {
5a0015d6	465	if ((i % 8) == 0)
d4eccafc MF	466	pr_info("a%02d:", i);
d4eccafc MF	467	pr_cont(" %08lx", regs->areg[i]);
5a0015d6	468	}
d4eccafc MF	469	pr_cont("\n");
	470	pr_info("pc: %08lx, ps: %08lx, depc: %08lx, excvaddr: %08lx\n",
	471	regs->pc, regs->ps, regs->depc, regs->excvaddr);
	472	pr_info("lbeg: %08lx, lend: %08lx lcount: %08lx, sar: %08lx\n",
	473	regs->lbeg, regs->lend, regs->lcount, regs->sar);
5a0015d6	474	if (user_mode(regs))
d4eccafc MF	475	pr_cont("wb: %08lx, ws: %08lx, wmask: %08lx, syscall: %ld\n",
	476	regs->windowbase, regs->windowstart, regs->wmask,
	477	regs->syscall);
5a0015d6 CZ	478	}
5a0015d6 CZ	479
3e4196a5	480	static int show_trace_cb(struct stackframe frame, void data)
586411dc	481	{
47fb7029 DS	482	const char *loglvl = data;
47fb7029 DS	483
e640cc30	484	if (kernel_text_address(frame->pc))
47fb7029 DS	485	printk("%s [<%08lx>] %pB\n",
47fb7029 DS	486	loglvl, frame->pc, (void *)frame->pc);
3e4196a5	487	return 0;
586411dc JW	488	}
586411dc JW	489
47fb7029 DS	490	static void show_trace(struct task_struct task, unsigned long sp,
47fb7029 DS	491	const char *loglvl)
5a0015d6	492	{
3e4196a5 MF	493	if (!sp)
3e4196a5 MF	494	sp = stack_pointer(task);
5a0015d6	495
47fb7029 DS	496	printk("%sCall Trace:\n", loglvl);
47fb7029 DS	497	walk_stackframe(sp, show_trace_cb, (void *)loglvl);
5a0015d6 CZ	498	}
5a0015d6 CZ	499
c5fccebc MF	500	#define STACK_DUMP_ENTRY_SIZE 4
c5fccebc MF	501	#define STACK_DUMP_LINE_SIZE 32
8951eb15	502	static size_t kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
5a0015d6	503
9cb8f069	504	void show_stack(struct task_struct task, unsigned long sp, const char *loglvl)
5a0015d6	505	{
c5fccebc	506	size_t len;
5a0015d6	507
28a0ce7f	508	if (!sp)
586411dc	509	sp = stack_pointer(task);
5a0015d6	510
c5fccebc MF	511	len = min((-(size_t)sp) & (THREAD_SIZE - STACK_DUMP_ENTRY_SIZE),
c5fccebc MF	512	kstack_depth_to_print * STACK_DUMP_ENTRY_SIZE);
5a0015d6	513
20da1e8b DS	514	printk("%sStack:\n", loglvl);
20da1e8b DS	515	print_hex_dump(loglvl, " ", DUMP_PREFIX_NONE,
c5fccebc MF	516	STACK_DUMP_LINE_SIZE, STACK_DUMP_ENTRY_SIZE,
c5fccebc MF	517	sp, len, false);
20da1e8b DS	518	show_trace(task, sp, loglvl);
	519	}
	520
34af946a	521	DEFINE_SPINLOCK(die_lock);
5a0015d6 CZ	522
	523	void die(const char * str, struct pt_regs * regs, long err)
	524	{
	525	static int die_counter;
6c5260d7 TG	526	const char *pr = "";
	527
	528	if (IS_ENABLED(CONFIG_PREEMPTION))
	529	pr = IS_ENABLED(CONFIG_PREEMPT_RT) ? " PREEMPT_RT" : " PREEMPT";
5a0015d6 CZ	530
	531	console_verbose();
	532	spin_lock_irq(&die_lock);
	533
6c5260d7	534	pr_info("%s: sig: %ld [#%d]%s\n", str, err, ++die_counter, pr);
5a0015d6 CZ	535	show_regs(regs);
5a0015d6 CZ	536	if (!user_mode(regs))
9cb8f069	537	show_stack(NULL, (unsigned long *)regs->areg[1], KERN_INFO);
5a0015d6	538
373d4d09	539	add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
5a0015d6 CZ	540	spin_unlock_irq(&die_lock);
	541
	542	if (in_interrupt())
	543	panic("Fatal exception in interrupt");
	544
cea6a4ba	545	if (panic_on_oops)
012c437d	546	panic("Fatal exception");
cea6a4ba	547
5a0015d6 CZ	548	do_exit(err);
5a0015d6 CZ	549	}