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Commit | Line | Data |
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5a0015d6 CZ |
1 | /* |
2 | * arch/xtensa/kernel/traps.c | |
3 | * | |
4 | * Exception handling. | |
5 | * | |
6 | * Derived from code with the following copyrights: | |
7 | * Copyright (C) 1994 - 1999 by Ralf Baechle | |
8 | * Modified for R3000 by Paul M. Antoine, 1995, 1996 | |
9 | * Complete output from die() by Ulf Carlsson, 1998 | |
10 | * Copyright (C) 1999 Silicon Graphics, Inc. | |
11 | * | |
12 | * Essentially rewritten for the Xtensa architecture port. | |
13 | * | |
3e4196a5 | 14 | * Copyright (C) 2001 - 2013 Tensilica Inc. |
5a0015d6 CZ |
15 | * |
16 | * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com> | |
17 | * Chris Zankel <chris@zankel.net> | |
18 | * Marc Gauthier<marc@tensilica.com, marc@alumni.uwaterloo.ca> | |
19 | * Kevin Chea | |
20 | * | |
21 | * This file is subject to the terms and conditions of the GNU General Public | |
22 | * License. See the file "COPYING" in the main directory of this archive | |
23 | * for more details. | |
24 | */ | |
25 | ||
26 | #include <linux/kernel.h> | |
3f07c014 | 27 | #include <linux/sched/signal.h> |
b17b0153 | 28 | #include <linux/sched/debug.h> |
5a0015d6 CZ |
29 | #include <linux/init.h> |
30 | #include <linux/module.h> | |
31 | #include <linux/stringify.h> | |
32 | #include <linux/kallsyms.h> | |
5c888d53 | 33 | #include <linux/delay.h> |
5a891ed5 | 34 | #include <linux/hardirq.h> |
5a0015d6 | 35 | |
3e4196a5 | 36 | #include <asm/stacktrace.h> |
5a0015d6 CZ |
37 | #include <asm/ptrace.h> |
38 | #include <asm/timex.h> | |
7c0f6ba6 | 39 | #include <linux/uaccess.h> |
5a0015d6 CZ |
40 | #include <asm/pgtable.h> |
41 | #include <asm/processor.h> | |
2d6f82fe | 42 | #include <asm/traps.h> |
c91e02bd | 43 | #include <asm/hw_breakpoint.h> |
5a0015d6 | 44 | |
5a0015d6 CZ |
45 | /* |
46 | * Machine specific interrupt handlers | |
47 | */ | |
48 | ||
49 | extern void kernel_exception(void); | |
50 | extern void user_exception(void); | |
51 | ||
52 | extern void fast_syscall_kernel(void); | |
53 | extern void fast_syscall_user(void); | |
54 | extern void fast_alloca(void); | |
55 | extern void fast_unaligned(void); | |
56 | extern void fast_second_level_miss(void); | |
57 | extern void fast_store_prohibited(void); | |
58 | extern void fast_coprocessor(void); | |
59 | ||
60 | extern void do_illegal_instruction (struct pt_regs*); | |
61 | extern void do_interrupt (struct pt_regs*); | |
38fef73c | 62 | extern void do_nmi(struct pt_regs *); |
5a0015d6 CZ |
63 | extern void do_unaligned_user (struct pt_regs*); |
64 | extern void do_multihit (struct pt_regs*, unsigned long); | |
65 | extern void do_page_fault (struct pt_regs*, unsigned long); | |
66 | extern void do_debug (struct pt_regs*); | |
67 | extern void system_call (struct pt_regs*); | |
68 | ||
69 | /* | |
70 | * The vector table must be preceded by a save area (which | |
71 | * implies it must be in RAM, unless one places RAM immediately | |
72 | * before a ROM and puts the vector at the start of the ROM (!)) | |
73 | */ | |
74 | ||
75 | #define KRNL 0x01 | |
76 | #define USER 0x02 | |
77 | ||
78 | #define COPROCESSOR(x) \ | |
173d6681 | 79 | { EXCCAUSE_COPROCESSOR ## x ## _DISABLED, USER, fast_coprocessor } |
5a0015d6 CZ |
80 | |
81 | typedef struct { | |
82 | int cause; | |
83 | int fast; | |
84 | void* handler; | |
85 | } dispatch_init_table_t; | |
86 | ||
b91dc336 | 87 | static dispatch_init_table_t __initdata dispatch_init_table[] = { |
5a0015d6 | 88 | |
173d6681 CZ |
89 | { EXCCAUSE_ILLEGAL_INSTRUCTION, 0, do_illegal_instruction}, |
90 | { EXCCAUSE_SYSTEM_CALL, KRNL, fast_syscall_kernel }, | |
91 | { EXCCAUSE_SYSTEM_CALL, USER, fast_syscall_user }, | |
92 | { EXCCAUSE_SYSTEM_CALL, 0, system_call }, | |
93 | /* EXCCAUSE_INSTRUCTION_FETCH unhandled */ | |
94 | /* EXCCAUSE_LOAD_STORE_ERROR unhandled*/ | |
95 | { EXCCAUSE_LEVEL1_INTERRUPT, 0, do_interrupt }, | |
96 | { EXCCAUSE_ALLOCA, USER|KRNL, fast_alloca }, | |
97 | /* EXCCAUSE_INTEGER_DIVIDE_BY_ZERO unhandled */ | |
98 | /* EXCCAUSE_PRIVILEGED unhandled */ | |
5a0015d6 | 99 | #if XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION |
4ded6282 | 100 | #ifdef CONFIG_XTENSA_UNALIGNED_USER |
173d6681 | 101 | { EXCCAUSE_UNALIGNED, USER, fast_unaligned }, |
5a0015d6 | 102 | #endif |
3cfc096e | 103 | { EXCCAUSE_UNALIGNED, 0, do_unaligned_user }, |
173d6681 | 104 | { EXCCAUSE_UNALIGNED, KRNL, fast_unaligned }, |
5a0015d6 | 105 | #endif |
e5083a63 | 106 | #ifdef CONFIG_MMU |
173d6681 CZ |
107 | { EXCCAUSE_ITLB_MISS, 0, do_page_fault }, |
108 | { EXCCAUSE_ITLB_MISS, USER|KRNL, fast_second_level_miss}, | |
109 | { EXCCAUSE_ITLB_MULTIHIT, 0, do_multihit }, | |
110 | { EXCCAUSE_ITLB_PRIVILEGE, 0, do_page_fault }, | |
111 | /* EXCCAUSE_SIZE_RESTRICTION unhandled */ | |
112 | { EXCCAUSE_FETCH_CACHE_ATTRIBUTE, 0, do_page_fault }, | |
113 | { EXCCAUSE_DTLB_MISS, USER|KRNL, fast_second_level_miss}, | |
114 | { EXCCAUSE_DTLB_MISS, 0, do_page_fault }, | |
115 | { EXCCAUSE_DTLB_MULTIHIT, 0, do_multihit }, | |
116 | { EXCCAUSE_DTLB_PRIVILEGE, 0, do_page_fault }, | |
117 | /* EXCCAUSE_DTLB_SIZE_RESTRICTION unhandled */ | |
118 | { EXCCAUSE_STORE_CACHE_ATTRIBUTE, USER|KRNL, fast_store_prohibited }, | |
119 | { EXCCAUSE_STORE_CACHE_ATTRIBUTE, 0, do_page_fault }, | |
120 | { EXCCAUSE_LOAD_CACHE_ATTRIBUTE, 0, do_page_fault }, | |
e5083a63 | 121 | #endif /* CONFIG_MMU */ |
5a0015d6 | 122 | /* XCCHAL_EXCCAUSE_FLOATING_POINT unhandled */ |
c658eac6 | 123 | #if XTENSA_HAVE_COPROCESSOR(0) |
5a0015d6 CZ |
124 | COPROCESSOR(0), |
125 | #endif | |
c658eac6 | 126 | #if XTENSA_HAVE_COPROCESSOR(1) |
5a0015d6 CZ |
127 | COPROCESSOR(1), |
128 | #endif | |
c658eac6 | 129 | #if XTENSA_HAVE_COPROCESSOR(2) |
5a0015d6 CZ |
130 | COPROCESSOR(2), |
131 | #endif | |
c658eac6 | 132 | #if XTENSA_HAVE_COPROCESSOR(3) |
5a0015d6 CZ |
133 | COPROCESSOR(3), |
134 | #endif | |
c658eac6 | 135 | #if XTENSA_HAVE_COPROCESSOR(4) |
5a0015d6 CZ |
136 | COPROCESSOR(4), |
137 | #endif | |
c658eac6 | 138 | #if XTENSA_HAVE_COPROCESSOR(5) |
5a0015d6 CZ |
139 | COPROCESSOR(5), |
140 | #endif | |
c658eac6 | 141 | #if XTENSA_HAVE_COPROCESSOR(6) |
5a0015d6 CZ |
142 | COPROCESSOR(6), |
143 | #endif | |
c658eac6 | 144 | #if XTENSA_HAVE_COPROCESSOR(7) |
5a0015d6 CZ |
145 | COPROCESSOR(7), |
146 | #endif | |
38fef73c MF |
147 | #if XTENSA_FAKE_NMI |
148 | { EXCCAUSE_MAPPED_NMI, 0, do_nmi }, | |
149 | #endif | |
5a0015d6 CZ |
150 | { EXCCAUSE_MAPPED_DEBUG, 0, do_debug }, |
151 | { -1, -1, 0 } | |
152 | ||
153 | }; | |
154 | ||
155 | /* The exception table <exc_table> serves two functions: | |
156 | * 1. it contains three dispatch tables (fast_user, fast_kernel, default-c) | |
157 | * 2. it is a temporary memory buffer for the exception handlers. | |
158 | */ | |
159 | ||
f615136c | 160 | DEFINE_PER_CPU(unsigned long, exc_table[EXC_TABLE_SIZE/4]); |
5a0015d6 | 161 | |
6ec7026a MF |
162 | DEFINE_PER_CPU(struct debug_table, debug_table); |
163 | ||
5a0015d6 CZ |
164 | void die(const char*, struct pt_regs*, long); |
165 | ||
166 | static inline void | |
167 | __die_if_kernel(const char *str, struct pt_regs *regs, long err) | |
168 | { | |
169 | if (!user_mode(regs)) | |
170 | die(str, regs, err); | |
171 | } | |
172 | ||
173 | /* | |
174 | * Unhandled Exceptions. Kill user task or panic if in kernel space. | |
175 | */ | |
176 | ||
177 | void do_unhandled(struct pt_regs *regs, unsigned long exccause) | |
178 | { | |
179 | __die_if_kernel("Caught unhandled exception - should not happen", | |
180 | regs, SIGKILL); | |
181 | ||
182 | /* If in user mode, send SIGILL signal to current process */ | |
183 | printk("Caught unhandled exception in '%s' " | |
184 | "(pid = %d, pc = %#010lx) - should not happen\n" | |
185 | "\tEXCCAUSE is %ld\n", | |
19c5870c | 186 | current->comm, task_pid_nr(current), regs->pc, exccause); |
5a0015d6 CZ |
187 | force_sig(SIGILL, current); |
188 | } | |
189 | ||
190 | /* | |
191 | * Multi-hit exception. This if fatal! | |
192 | */ | |
193 | ||
194 | void do_multihit(struct pt_regs *regs, unsigned long exccause) | |
195 | { | |
196 | die("Caught multihit exception", regs, SIGKILL); | |
197 | } | |
198 | ||
199 | /* | |
2d1c645c | 200 | * IRQ handler. |
5a0015d6 CZ |
201 | */ |
202 | ||
5a0015d6 CZ |
203 | extern void do_IRQ(int, struct pt_regs *); |
204 | ||
38fef73c MF |
205 | #if XTENSA_FAKE_NMI |
206 | ||
e4629194 MF |
207 | #define IS_POW2(v) (((v) & ((v) - 1)) == 0) |
208 | ||
209 | #if !(PROFILING_INTLEVEL == XCHAL_EXCM_LEVEL && \ | |
210 | IS_POW2(XTENSA_INTLEVEL_MASK(PROFILING_INTLEVEL))) | |
211 | #warning "Fake NMI is requested for PMM, but there are other IRQs at or above its level." | |
212 | #warning "Fake NMI will be used, but there will be a bugcheck if one of those IRQs fire." | |
213 | ||
214 | static inline void check_valid_nmi(void) | |
215 | { | |
216 | unsigned intread = get_sr(interrupt); | |
217 | unsigned intenable = get_sr(intenable); | |
218 | ||
219 | BUG_ON(intread & intenable & | |
220 | ~(XTENSA_INTLEVEL_ANDBELOW_MASK(PROFILING_INTLEVEL) ^ | |
221 | XTENSA_INTLEVEL_MASK(PROFILING_INTLEVEL) ^ | |
222 | BIT(XCHAL_PROFILING_INTERRUPT))); | |
223 | } | |
224 | ||
225 | #else | |
226 | ||
227 | static inline void check_valid_nmi(void) | |
228 | { | |
229 | } | |
230 | ||
231 | #endif | |
232 | ||
38fef73c MF |
233 | irqreturn_t xtensa_pmu_irq_handler(int irq, void *dev_id); |
234 | ||
235 | DEFINE_PER_CPU(unsigned long, nmi_count); | |
236 | ||
237 | void do_nmi(struct pt_regs *regs) | |
238 | { | |
239 | struct pt_regs *old_regs; | |
240 | ||
241 | if ((regs->ps & PS_INTLEVEL_MASK) < LOCKLEVEL) | |
242 | trace_hardirqs_off(); | |
243 | ||
244 | old_regs = set_irq_regs(regs); | |
245 | nmi_enter(); | |
246 | ++*this_cpu_ptr(&nmi_count); | |
e4629194 | 247 | check_valid_nmi(); |
38fef73c MF |
248 | xtensa_pmu_irq_handler(0, NULL); |
249 | nmi_exit(); | |
250 | set_irq_regs(old_regs); | |
251 | } | |
252 | #endif | |
253 | ||
2d1c645c | 254 | void do_interrupt(struct pt_regs *regs) |
5a0015d6 | 255 | { |
2d1c645c MG |
256 | static const unsigned int_level_mask[] = { |
257 | 0, | |
258 | XCHAL_INTLEVEL1_MASK, | |
259 | XCHAL_INTLEVEL2_MASK, | |
260 | XCHAL_INTLEVEL3_MASK, | |
261 | XCHAL_INTLEVEL4_MASK, | |
262 | XCHAL_INTLEVEL5_MASK, | |
263 | XCHAL_INTLEVEL6_MASK, | |
264 | XCHAL_INTLEVEL7_MASK, | |
265 | }; | |
7d5f6a9a | 266 | struct pt_regs *old_regs; |
99623239 | 267 | |
7d5f6a9a MF |
268 | trace_hardirqs_off(); |
269 | ||
270 | old_regs = set_irq_regs(regs); | |
99623239 | 271 | irq_enter(); |
5a0015d6 | 272 | |
2d1c645c MG |
273 | for (;;) { |
274 | unsigned intread = get_sr(interrupt); | |
275 | unsigned intenable = get_sr(intenable); | |
895666a9 MF |
276 | unsigned int_at_level = intread & intenable; |
277 | unsigned level; | |
278 | ||
279 | for (level = LOCKLEVEL; level > 0; --level) { | |
280 | if (int_at_level & int_level_mask[level]) { | |
281 | int_at_level &= int_level_mask[level]; | |
282 | break; | |
283 | } | |
284 | } | |
2d1c645c | 285 | |
895666a9 | 286 | if (level == 0) |
99623239 MF |
287 | break; |
288 | ||
289 | do_IRQ(__ffs(int_at_level), regs); | |
5a0015d6 | 290 | } |
99623239 MF |
291 | |
292 | irq_exit(); | |
293 | set_irq_regs(old_regs); | |
5a0015d6 CZ |
294 | } |
295 | ||
296 | /* | |
297 | * Illegal instruction. Fatal if in kernel space. | |
298 | */ | |
299 | ||
300 | void | |
301 | do_illegal_instruction(struct pt_regs *regs) | |
302 | { | |
303 | __die_if_kernel("Illegal instruction in kernel", regs, SIGKILL); | |
304 | ||
305 | /* If in user mode, send SIGILL signal to current process. */ | |
306 | ||
307 | printk("Illegal Instruction in '%s' (pid = %d, pc = %#010lx)\n", | |
19c5870c | 308 | current->comm, task_pid_nr(current), regs->pc); |
5a0015d6 CZ |
309 | force_sig(SIGILL, current); |
310 | } | |
311 | ||
312 | ||
313 | /* | |
314 | * Handle unaligned memory accesses from user space. Kill task. | |
315 | * | |
316 | * If CONFIG_UNALIGNED_USER is not set, we don't allow unaligned memory | |
317 | * accesses causes from user space. | |
318 | */ | |
319 | ||
320 | #if XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION | |
5a0015d6 CZ |
321 | void |
322 | do_unaligned_user (struct pt_regs *regs) | |
323 | { | |
324 | siginfo_t info; | |
325 | ||
326 | __die_if_kernel("Unhandled unaligned exception in kernel", | |
327 | regs, SIGKILL); | |
328 | ||
329 | current->thread.bad_vaddr = regs->excvaddr; | |
330 | current->thread.error_code = -3; | |
331 | printk("Unaligned memory access to %08lx in '%s' " | |
332 | "(pid = %d, pc = %#010lx)\n", | |
19c5870c | 333 | regs->excvaddr, current->comm, task_pid_nr(current), regs->pc); |
5a0015d6 CZ |
334 | info.si_signo = SIGBUS; |
335 | info.si_errno = 0; | |
336 | info.si_code = BUS_ADRALN; | |
337 | info.si_addr = (void *) regs->excvaddr; | |
338 | force_sig_info(SIGSEGV, &info, current); | |
339 | ||
340 | } | |
341 | #endif | |
5a0015d6 | 342 | |
c91e02bd MF |
343 | /* Handle debug events. |
344 | * When CONFIG_HAVE_HW_BREAKPOINT is on this handler is called with | |
345 | * preemption disabled to avoid rescheduling and keep mapping of hardware | |
346 | * breakpoint structures to debug registers intact, so that | |
347 | * DEBUGCAUSE.DBNUM could be used in case of data breakpoint hit. | |
348 | */ | |
5a0015d6 CZ |
349 | void |
350 | do_debug(struct pt_regs *regs) | |
351 | { | |
c91e02bd MF |
352 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
353 | int ret = check_hw_breakpoint(regs); | |
354 | ||
355 | preempt_enable(); | |
356 | if (ret == 0) | |
357 | return; | |
358 | #endif | |
5a0015d6 CZ |
359 | __die_if_kernel("Breakpoint in kernel", regs, SIGKILL); |
360 | ||
361 | /* If in user mode, send SIGTRAP signal to current process */ | |
362 | ||
363 | force_sig(SIGTRAP, current); | |
364 | } | |
365 | ||
366 | ||
f615136c MF |
367 | static void set_handler(int idx, void *handler) |
368 | { | |
369 | unsigned int cpu; | |
370 | ||
371 | for_each_possible_cpu(cpu) | |
372 | per_cpu(exc_table, cpu)[idx] = (unsigned long)handler; | |
373 | } | |
374 | ||
28570e8d MF |
375 | /* Set exception C handler - for temporary use when probing exceptions */ |
376 | ||
377 | void * __init trap_set_handler(int cause, void *handler) | |
378 | { | |
f615136c MF |
379 | void *previous = (void *)per_cpu(exc_table, 0)[ |
380 | EXC_TABLE_DEFAULT / 4 + cause]; | |
381 | set_handler(EXC_TABLE_DEFAULT / 4 + cause, handler); | |
28570e8d MF |
382 | return previous; |
383 | } | |
384 | ||
385 | ||
49b424fe | 386 | static void trap_init_excsave(void) |
f615136c MF |
387 | { |
388 | unsigned long excsave1 = (unsigned long)this_cpu_ptr(exc_table); | |
389 | __asm__ __volatile__("wsr %0, excsave1\n" : : "a" (excsave1)); | |
390 | } | |
391 | ||
6ec7026a MF |
392 | static void trap_init_debug(void) |
393 | { | |
394 | unsigned long debugsave = (unsigned long)this_cpu_ptr(&debug_table); | |
395 | ||
396 | this_cpu_ptr(&debug_table)->debug_exception = debug_exception; | |
397 | __asm__ __volatile__("wsr %0, excsave" __stringify(XCHAL_DEBUGLEVEL) | |
398 | :: "a"(debugsave)); | |
399 | } | |
400 | ||
5a0015d6 CZ |
401 | /* |
402 | * Initialize dispatch tables. | |
403 | * | |
404 | * The exception vectors are stored compressed the __init section in the | |
405 | * dispatch_init_table. This function initializes the following three tables | |
406 | * from that compressed table: | |
407 | * - fast user first dispatch table for user exceptions | |
408 | * - fast kernel first dispatch table for kernel exceptions | |
409 | * - default C-handler C-handler called by the default fast handler. | |
410 | * | |
411 | * See vectors.S for more details. | |
412 | */ | |
413 | ||
b91dc336 | 414 | void __init trap_init(void) |
5a0015d6 CZ |
415 | { |
416 | int i; | |
417 | ||
418 | /* Setup default vectors. */ | |
419 | ||
420 | for(i = 0; i < 64; i++) { | |
421 | set_handler(EXC_TABLE_FAST_USER/4 + i, user_exception); | |
422 | set_handler(EXC_TABLE_FAST_KERNEL/4 + i, kernel_exception); | |
423 | set_handler(EXC_TABLE_DEFAULT/4 + i, do_unhandled); | |
424 | } | |
425 | ||
426 | /* Setup specific handlers. */ | |
427 | ||
428 | for(i = 0; dispatch_init_table[i].cause >= 0; i++) { | |
429 | ||
430 | int fast = dispatch_init_table[i].fast; | |
431 | int cause = dispatch_init_table[i].cause; | |
432 | void *handler = dispatch_init_table[i].handler; | |
433 | ||
434 | if (fast == 0) | |
435 | set_handler (EXC_TABLE_DEFAULT/4 + cause, handler); | |
436 | if (fast && fast & USER) | |
437 | set_handler (EXC_TABLE_FAST_USER/4 + cause, handler); | |
438 | if (fast && fast & KRNL) | |
439 | set_handler (EXC_TABLE_FAST_KERNEL/4 + cause, handler); | |
440 | } | |
441 | ||
442 | /* Initialize EXCSAVE_1 to hold the address of the exception table. */ | |
f615136c | 443 | trap_init_excsave(); |
6ec7026a | 444 | trap_init_debug(); |
f615136c | 445 | } |
5a0015d6 | 446 | |
f615136c | 447 | #ifdef CONFIG_SMP |
49b424fe | 448 | void secondary_trap_init(void) |
f615136c MF |
449 | { |
450 | trap_init_excsave(); | |
6ec7026a | 451 | trap_init_debug(); |
5a0015d6 | 452 | } |
f615136c | 453 | #endif |
5a0015d6 CZ |
454 | |
455 | /* | |
456 | * This function dumps the current valid window frame and other base registers. | |
457 | */ | |
458 | ||
459 | void show_regs(struct pt_regs * regs) | |
460 | { | |
461 | int i, wmask; | |
462 | ||
a43cb95d TH |
463 | show_regs_print_info(KERN_DEFAULT); |
464 | ||
5a0015d6 CZ |
465 | wmask = regs->wmask & ~1; |
466 | ||
8d7e8240 | 467 | for (i = 0; i < 16; i++) { |
5a0015d6 | 468 | if ((i % 8) == 0) |
d4eccafc MF |
469 | pr_info("a%02d:", i); |
470 | pr_cont(" %08lx", regs->areg[i]); | |
5a0015d6 | 471 | } |
d4eccafc MF |
472 | pr_cont("\n"); |
473 | pr_info("pc: %08lx, ps: %08lx, depc: %08lx, excvaddr: %08lx\n", | |
474 | regs->pc, regs->ps, regs->depc, regs->excvaddr); | |
475 | pr_info("lbeg: %08lx, lend: %08lx lcount: %08lx, sar: %08lx\n", | |
476 | regs->lbeg, regs->lend, regs->lcount, regs->sar); | |
5a0015d6 | 477 | if (user_mode(regs)) |
d4eccafc MF |
478 | pr_cont("wb: %08lx, ws: %08lx, wmask: %08lx, syscall: %ld\n", |
479 | regs->windowbase, regs->windowstart, regs->wmask, | |
480 | regs->syscall); | |
5a0015d6 CZ |
481 | } |
482 | ||
3e4196a5 | 483 | static int show_trace_cb(struct stackframe *frame, void *data) |
586411dc | 484 | { |
3e4196a5 | 485 | if (kernel_text_address(frame->pc)) { |
d4eccafc MF |
486 | pr_cont(" [<%08lx>]", frame->pc); |
487 | print_symbol(" %s\n", frame->pc); | |
3e4196a5 MF |
488 | } |
489 | return 0; | |
586411dc JW |
490 | } |
491 | ||
5a0015d6 CZ |
492 | void show_trace(struct task_struct *task, unsigned long *sp) |
493 | { | |
3e4196a5 MF |
494 | if (!sp) |
495 | sp = stack_pointer(task); | |
5a0015d6 | 496 | |
d4eccafc | 497 | pr_info("Call Trace:\n"); |
3e4196a5 | 498 | walk_stackframe(sp, show_trace_cb, NULL); |
d4eccafc MF |
499 | #ifndef CONFIG_KALLSYMS |
500 | pr_cont("\n"); | |
501 | #endif | |
5a0015d6 CZ |
502 | } |
503 | ||
5a0015d6 CZ |
504 | static int kstack_depth_to_print = 24; |
505 | ||
506 | void show_stack(struct task_struct *task, unsigned long *sp) | |
507 | { | |
508 | int i = 0; | |
509 | unsigned long *stack; | |
510 | ||
28a0ce7f | 511 | if (!sp) |
586411dc | 512 | sp = stack_pointer(task); |
c4c4594b | 513 | stack = sp; |
5a0015d6 | 514 | |
d4eccafc | 515 | pr_info("Stack:\n"); |
5a0015d6 CZ |
516 | |
517 | for (i = 0; i < kstack_depth_to_print; i++) { | |
518 | if (kstack_end(sp)) | |
519 | break; | |
d4eccafc MF |
520 | pr_cont(" %08lx", *sp++); |
521 | if (i % 8 == 7) | |
522 | pr_cont("\n"); | |
5a0015d6 | 523 | } |
5a0015d6 CZ |
524 | show_trace(task, stack); |
525 | } | |
526 | ||
34af946a | 527 | DEFINE_SPINLOCK(die_lock); |
5a0015d6 CZ |
528 | |
529 | void die(const char * str, struct pt_regs * regs, long err) | |
530 | { | |
531 | static int die_counter; | |
5a0015d6 CZ |
532 | |
533 | console_verbose(); | |
534 | spin_lock_irq(&die_lock); | |
535 | ||
d4eccafc MF |
536 | pr_info("%s: sig: %ld [#%d]%s\n", str, err, ++die_counter, |
537 | IS_ENABLED(CONFIG_PREEMPT) ? " PREEMPT" : ""); | |
5a0015d6 CZ |
538 | show_regs(regs); |
539 | if (!user_mode(regs)) | |
540 | show_stack(NULL, (unsigned long*)regs->areg[1]); | |
541 | ||
373d4d09 | 542 | add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE); |
5a0015d6 CZ |
543 | spin_unlock_irq(&die_lock); |
544 | ||
545 | if (in_interrupt()) | |
546 | panic("Fatal exception in interrupt"); | |
547 | ||
cea6a4ba | 548 | if (panic_on_oops) |
012c437d | 549 | panic("Fatal exception"); |
cea6a4ba | 550 | |
5a0015d6 CZ |
551 | do_exit(err); |
552 | } |