[mirror_ubuntu-artful-kernel.git] / arch / xtensa / kernel / vmlinux.lds.S

/*
 * arch/xtensa/kernel/vmlinux.lds.S
 *
 * Xtensa linker script
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2001 - 2008 Tensilica Inc.
 *
 * Chris Zankel <chris@zankel.net>
 * Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
 * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
 */

#include <asm-generic/vmlinux.lds.h>
#include <asm/page.h>
#include <asm/thread_info.h>

#include <asm/vectors.h>
#include <variant/core.h>
#include <platform/hardware.h>
OUTPUT_ARCH(xtensa)
ENTRY(_start)

#ifdef __XTENSA_EB__
jiffies = jiffies_64 + 4;
#else
jiffies = jiffies_64;
#endif

/* Note: In the following macros, it would be nice to specify only the
   vector name and section kind and construct "sym" and "section" using
   CPP concatenation, but that does not work reliably.  Concatenating a
   string with "." produces an invalid token.  CPP will not print a
   warning because it thinks this is an assembly file, but it leaves
   them as multiple tokens and there may or may not be whitespace
   between them.  */

/* Macro for a relocation entry */

#define RELOCATE_ENTRY(sym, section)		\
	LONG(sym ## _start);			\
	LONG(sym ## _end);			\
	LONG(LOADADDR(section))

/* Macro to define a section for a vector.
 *
 * Use of the MIN function catches the types of errors illustrated in
 * the following example:
 *
 * Assume the section .DoubleExceptionVector.literal is completely
 * full.  Then a programmer adds code to .DoubleExceptionVector.text
 * that produces another literal.  The final literal position will
 * overlay onto the first word of the adjacent code section
 * .DoubleExceptionVector.text.  (In practice, the literals will
 * overwrite the code, and the first few instructions will be
 * garbage.)
 */

#ifdef CONFIG_VECTORS_OFFSET
#define SECTION_VECTOR(sym, section, addr, max_prevsec_size, prevsec)       \
  section addr : AT((MIN(LOADADDR(prevsec) + max_prevsec_size,		    \
		         LOADADDR(prevsec) + SIZEOF(prevsec)) + 3) & ~ 3)   \
  {									    \
    . = ALIGN(4);							    \
    sym ## _start = ABSOLUTE(.);		 			    \
    *(section)								    \
    sym ## _end = ABSOLUTE(.);						    \
  }
#else
#define SECTION_VECTOR(section, addr)					    \
  . = addr;								    \
  *(section)
#endif

/*
 *  Mapping of input sections to output sections when linking.
 */

SECTIONS
{
  . = KERNELOFFSET;
  /* .text section */

  _text = .;
  _stext = .;

  .text :
  {
    /* The HEAD_TEXT section must be the first section! */
    HEAD_TEXT

#ifndef CONFIG_VECTORS_OFFSET
  . = ALIGN(PAGE_SIZE);
  _vecbase = .;

  SECTION_VECTOR (.WindowVectors.text, WINDOW_VECTORS_VADDR)
#if XCHAL_EXCM_LEVEL >= 2
  SECTION_VECTOR (.Level2InterruptVector.text, INTLEVEL2_VECTOR_VADDR)
#endif
#if XCHAL_EXCM_LEVEL >= 3
  SECTION_VECTOR (.Level3InterruptVector.text, INTLEVEL3_VECTOR_VADDR)
#endif
#if XCHAL_EXCM_LEVEL >= 4
  SECTION_VECTOR (.Level4InterruptVector.text, INTLEVEL4_VECTOR_VADDR)
#endif
#if XCHAL_EXCM_LEVEL >= 5
  SECTION_VECTOR (.Level5InterruptVector.text, INTLEVEL5_VECTOR_VADDR)
#endif
#if XCHAL_EXCM_LEVEL >= 6
  SECTION_VECTOR (.Level6InterruptVector.text, INTLEVEL6_VECTOR_VADDR)
#endif
  SECTION_VECTOR (.DebugInterruptVector.literal, DEBUG_VECTOR_VADDR - 4)
  SECTION_VECTOR (.DebugInterruptVector.text, DEBUG_VECTOR_VADDR)
  SECTION_VECTOR (.KernelExceptionVector.literal, KERNEL_VECTOR_VADDR - 4)
  SECTION_VECTOR (.KernelExceptionVector.text, KERNEL_VECTOR_VADDR)
  SECTION_VECTOR (.UserExceptionVector.literal, USER_VECTOR_VADDR - 4)
  SECTION_VECTOR (.UserExceptionVector.text, USER_VECTOR_VADDR)
  SECTION_VECTOR (.DoubleExceptionVector.literal, DOUBLEEXC_VECTOR_VADDR - 20)
  SECTION_VECTOR (.DoubleExceptionVector.text, DOUBLEEXC_VECTOR_VADDR)
#endif

    TEXT_TEXT
    VMLINUX_SYMBOL(__sched_text_start) = .;
    *(.sched.literal .sched.text)
    VMLINUX_SYMBOL(__sched_text_end) = .;
    VMLINUX_SYMBOL(__cpuidle_text_start) = .;
    *(.cpuidle.literal .cpuidle.text)
    VMLINUX_SYMBOL(__cpuidle_text_end) = .;
    VMLINUX_SYMBOL(__lock_text_start) = .;
    *(.spinlock.literal .spinlock.text)
    VMLINUX_SYMBOL(__lock_text_end) = .;

  }
  _etext = .;
  PROVIDE (etext = .);

  . = ALIGN(16);

  RODATA

  /*  Relocation table */

  .fixup   : { *(.fixup) }

  EXCEPTION_TABLE(16)
  /* Data section */

  _sdata = .;
  RW_DATA_SECTION(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, THREAD_SIZE)
  _edata = .;

  /* Initialization code and data: */

  . = ALIGN(PAGE_SIZE);
  __init_begin = .;
  INIT_TEXT_SECTION(PAGE_SIZE)

  .init.data :
  {
    INIT_DATA
    . = ALIGN(0x4);
    __tagtable_begin = .;
    *(.taglist)
    __tagtable_end = .;

    . = ALIGN(16);
    __boot_reloc_table_start = ABSOLUTE(.);

#ifdef CONFIG_VECTORS_OFFSET
    RELOCATE_ENTRY(_WindowVectors_text,
		   .WindowVectors.text);
#if XCHAL_EXCM_LEVEL >= 2
    RELOCATE_ENTRY(_Level2InterruptVector_text,
		   .Level2InterruptVector.text);
#endif
#if XCHAL_EXCM_LEVEL >= 3
    RELOCATE_ENTRY(_Level3InterruptVector_text,
		   .Level3InterruptVector.text);
#endif
#if XCHAL_EXCM_LEVEL >= 4
    RELOCATE_ENTRY(_Level4InterruptVector_text,
		   .Level4InterruptVector.text);
#endif
#if XCHAL_EXCM_LEVEL >= 5
    RELOCATE_ENTRY(_Level5InterruptVector_text,
		   .Level5InterruptVector.text);
#endif
#if XCHAL_EXCM_LEVEL >= 6
    RELOCATE_ENTRY(_Level6InterruptVector_text,
		   .Level6InterruptVector.text);
#endif
    RELOCATE_ENTRY(_KernelExceptionVector_text,
		   .KernelExceptionVector.text);
    RELOCATE_ENTRY(_UserExceptionVector_text,
		   .UserExceptionVector.text);
    RELOCATE_ENTRY(_DoubleExceptionVector_literal,
		   .DoubleExceptionVector.literal);
    RELOCATE_ENTRY(_DoubleExceptionVector_text,
		   .DoubleExceptionVector.text);
    RELOCATE_ENTRY(_DebugInterruptVector_text,
		   .DebugInterruptVector.text);
#endif
#if defined(CONFIG_SMP)
    RELOCATE_ENTRY(_SecondaryResetVector_text,
		   .SecondaryResetVector.text);
#endif

  
    __boot_reloc_table_end = ABSOLUTE(.) ;

    INIT_SETUP(XCHAL_ICACHE_LINESIZE)
    INIT_CALLS
    CON_INITCALL
    SECURITY_INITCALL
    INIT_RAM_FS
  }

  PERCPU_SECTION(XCHAL_ICACHE_LINESIZE)

  /* We need this dummy segment here */

  . = ALIGN(4);
  .dummy : { LONG(0) }

#ifdef CONFIG_VECTORS_OFFSET
  /* The vectors are relocated to the real position at startup time */

  SECTION_VECTOR (_WindowVectors_text,
		  .WindowVectors.text,
		  WINDOW_VECTORS_VADDR, 4,
		  .dummy)
  SECTION_VECTOR (_DebugInterruptVector_literal,
		  .DebugInterruptVector.literal,
		  DEBUG_VECTOR_VADDR - 4,
		  SIZEOF(.WindowVectors.text),
		  .WindowVectors.text)
  SECTION_VECTOR (_DebugInterruptVector_text,
		  .DebugInterruptVector.text,
		  DEBUG_VECTOR_VADDR,
		  4,
		  .DebugInterruptVector.literal)
#undef LAST
#define LAST	.DebugInterruptVector.text
#if XCHAL_EXCM_LEVEL >= 2
  SECTION_VECTOR (_Level2InterruptVector_text,
		  .Level2InterruptVector.text,
		  INTLEVEL2_VECTOR_VADDR,
		  SIZEOF(LAST), LAST)
# undef LAST
# define LAST	.Level2InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 3
  SECTION_VECTOR (_Level3InterruptVector_text,
		  .Level3InterruptVector.text,
		  INTLEVEL3_VECTOR_VADDR,
		  SIZEOF(LAST), LAST)
# undef LAST
# define LAST	.Level3InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 4
  SECTION_VECTOR (_Level4InterruptVector_text,
		  .Level4InterruptVector.text,
		  INTLEVEL4_VECTOR_VADDR,
		  SIZEOF(LAST), LAST)
# undef LAST
# define LAST	.Level4InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 5
  SECTION_VECTOR (_Level5InterruptVector_text,
		  .Level5InterruptVector.text,
		  INTLEVEL5_VECTOR_VADDR,
		  SIZEOF(LAST), LAST)
# undef LAST
# define LAST	.Level5InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 6
  SECTION_VECTOR (_Level6InterruptVector_text,
		  .Level6InterruptVector.text,
		  INTLEVEL6_VECTOR_VADDR,
		  SIZEOF(LAST), LAST)
# undef LAST
# define LAST	.Level6InterruptVector.text
#endif
  SECTION_VECTOR (_KernelExceptionVector_literal,
		  .KernelExceptionVector.literal,
		  KERNEL_VECTOR_VADDR - 4,
		  SIZEOF(LAST), LAST)
#undef LAST
  SECTION_VECTOR (_KernelExceptionVector_text,
		  .KernelExceptionVector.text,
		  KERNEL_VECTOR_VADDR,
		  4,
		  .KernelExceptionVector.literal)
  SECTION_VECTOR (_UserExceptionVector_literal,
		  .UserExceptionVector.literal,
		  USER_VECTOR_VADDR - 4,
		  SIZEOF(.KernelExceptionVector.text),
		  .KernelExceptionVector.text)
  SECTION_VECTOR (_UserExceptionVector_text,
		  .UserExceptionVector.text,
		  USER_VECTOR_VADDR,
		  4,
		  .UserExceptionVector.literal)
  SECTION_VECTOR (_DoubleExceptionVector_literal,
		  .DoubleExceptionVector.literal,
		  DOUBLEEXC_VECTOR_VADDR - 20,
		  SIZEOF(.UserExceptionVector.text),
		  .UserExceptionVector.text)
  SECTION_VECTOR (_DoubleExceptionVector_text,
		  .DoubleExceptionVector.text,
		  DOUBLEEXC_VECTOR_VADDR,
		  20,
		  .DoubleExceptionVector.literal)

  . = (LOADADDR( .DoubleExceptionVector.text ) + SIZEOF( .DoubleExceptionVector.text ) + 3) & ~ 3;

#endif
#if defined(CONFIG_SMP)

  SECTION_VECTOR (_SecondaryResetVector_text,
		  .SecondaryResetVector.text,
		  RESET_VECTOR1_VADDR,
		  SIZEOF(.DoubleExceptionVector.text),
		  .DoubleExceptionVector.text)

  . = LOADADDR(.SecondaryResetVector.text)+SIZEOF(.SecondaryResetVector.text);

#endif

  . = ALIGN(PAGE_SIZE);

  __init_end = .;

  BSS_SECTION(0, 8192, 0)

  _end = .;

  .xt.lit : { *(.xt.lit) }
  .xt.prop : { *(.xt.prop) }

  .debug  0 :  { *(.debug) }
  .line  0 :  { *(.line) }
  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
  .debug_sfnames  0 :  { *(.debug_sfnames) }
  .debug_aranges  0 :  { *(.debug_aranges) }
  .debug_pubnames  0 :  { *(.debug_pubnames) }
  .debug_info  0 :  { *(.debug_info) }
  .debug_abbrev  0 :  { *(.debug_abbrev) }
  .debug_line  0 :  { *(.debug_line) }
  .debug_frame  0 :  { *(.debug_frame) }
  .debug_str  0 :  { *(.debug_str) }
  .debug_loc  0 :  { *(.debug_loc) }
  .debug_macinfo  0 :  { *(.debug_macinfo) }
  .debug_weaknames  0 :  { *(.debug_weaknames) }
  .debug_funcnames  0 :  { *(.debug_funcnames) }
  .debug_typenames  0 :  { *(.debug_typenames) }
  .debug_varnames  0 :  { *(.debug_varnames) }

  .xt.insn 0 :
  {
    *(.xt.insn)
    *(.gnu.linkonce.x*)
  }

  .xt.lit 0 :
  {
    *(.xt.lit)
    *(.gnu.linkonce.p*)
  }

  /* Sections to be discarded */
  DISCARDS
  /DISCARD/ : { *(.exit.literal) }
}
Commit	Line	Data
5a0015d6 CZ	1	/*
	2	* arch/xtensa/kernel/vmlinux.lds.S
	3	*
	4	* Xtensa linker script
	5	*
	6	* This file is subject to the terms and conditions of the GNU General Public
	7	* License. See the file "COPYING" in the main directory of this archive
	8	* for more details.
	9	*
2d1c645c	10	* Copyright (C) 2001 - 2008 Tensilica Inc.
5a0015d6 CZ	11	*
	12	* Chris Zankel <chris@zankel.net>
	13	* Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
	14	* Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
	15	*/
	16
	17	#include <asm-generic/vmlinux.lds.h>
cd3db323 TA	18	#include <asm/page.h>
cd3db323 TA	19	#include <asm/thread_info.h>
5a0015d6	20
e85e335f	21	#include <asm/vectors.h>
367b8112	22	#include <variant/core.h>
6770fa02	23	#include <platform/hardware.h>
5a0015d6 CZ	24	OUTPUT_ARCH(xtensa)
	25	ENTRY(_start)
	26
173d6681	27	#ifdef __XTENSA_EB__
5a0015d6 CZ	28	jiffies = jiffies_64 + 4;
	29	#else
	30	jiffies = jiffies_64;
	31	#endif
	32
5a0015d6 CZ	33	/* Note: In the following macros, it would be nice to specify only the
	34	vector name and section kind and construct "sym" and "section" using
	35	CPP concatenation, but that does not work reliably. Concatenating a
	36	string with "." produces an invalid token. CPP will not print a
	37	warning because it thinks this is an assembly file, but it leaves
	38	them as multiple tokens and there may or may not be whitespace
	39	between them. */
	40
	41	/* Macro for a relocation entry */
	42
	43	#define RELOCATE_ENTRY(sym, section) \
	44	LONG(sym ## _start); \
	45	LONG(sym ## _end); \
	46	LONG(LOADADDR(section))
	47
	48	/* Macro to define a section for a vector.
	49	*
	50	* Use of the MIN function catches the types of errors illustrated in
	51	* the following example:
	52	*
	53	* Assume the section .DoubleExceptionVector.literal is completely
	54	* full. Then a programmer adds code to .DoubleExceptionVector.text
	55	* that produces another literal. The final literal position will
	56	* overlay onto the first word of the adjacent code section
	57	* .DoubleExceptionVector.text. (In practice, the literals will
	58	* overwrite the code, and the first few instructions will be
	59	* garbage.)
	60	*/
	61
b46dcfa3	62	#ifdef CONFIG_VECTORS_OFFSET
5a0015d6 CZ	63	#define SECTION_VECTOR(sym, section, addr, max_prevsec_size, prevsec) \
	64	section addr : AT((MIN(LOADADDR(prevsec) + max_prevsec_size, \
	65	LOADADDR(prevsec) + SIZEOF(prevsec)) + 3) & ~ 3) \
	66	{ \
	67	. = ALIGN(4); \
	68	sym ## _start = ABSOLUTE(.); \
	69	*(section) \
	70	sym ## _end = ABSOLUTE(.); \
	71	}
b46dcfa3 MF	72	#else
	73	#define SECTION_VECTOR(section, addr) \
	74	. = addr; \
	75	*(section)
	76	#endif
5a0015d6 CZ	77
	78	/*
	79	* Mapping of input sections to output sections when linking.
	80	*/
	81
	82	SECTIONS
	83	{
173d6681	84	. = KERNELOFFSET;
5a0015d6 CZ	85	/* .text section */
	86
	87	_text = .;
	88	_stext = .;
5a0015d6 CZ	89
	90	.text :
	91	{
0ebdcb4d TA	92	/* The HEAD_TEXT section must be the first section! */
0ebdcb4d TA	93	HEAD_TEXT
b46dcfa3 MF	94
	95	#ifndef CONFIG_VECTORS_OFFSET
	96	. = ALIGN(PAGE_SIZE);
	97	_vecbase = .;
	98
	99	SECTION_VECTOR (.WindowVectors.text, WINDOW_VECTORS_VADDR)
	100	#if XCHAL_EXCM_LEVEL >= 2
	101	SECTION_VECTOR (.Level2InterruptVector.text, INTLEVEL2_VECTOR_VADDR)
	102	#endif
	103	#if XCHAL_EXCM_LEVEL >= 3
	104	SECTION_VECTOR (.Level3InterruptVector.text, INTLEVEL3_VECTOR_VADDR)
	105	#endif
	106	#if XCHAL_EXCM_LEVEL >= 4
	107	SECTION_VECTOR (.Level4InterruptVector.text, INTLEVEL4_VECTOR_VADDR)
	108	#endif
	109	#if XCHAL_EXCM_LEVEL >= 5
	110	SECTION_VECTOR (.Level5InterruptVector.text, INTLEVEL5_VECTOR_VADDR)
	111	#endif
	112	#if XCHAL_EXCM_LEVEL >= 6
	113	SECTION_VECTOR (.Level6InterruptVector.text, INTLEVEL6_VECTOR_VADDR)
	114	#endif
	115	SECTION_VECTOR (.DebugInterruptVector.literal, DEBUG_VECTOR_VADDR - 4)
	116	SECTION_VECTOR (.DebugInterruptVector.text, DEBUG_VECTOR_VADDR)
	117	SECTION_VECTOR (.KernelExceptionVector.literal, KERNEL_VECTOR_VADDR - 4)
	118	SECTION_VECTOR (.KernelExceptionVector.text, KERNEL_VECTOR_VADDR)
	119	SECTION_VECTOR (.UserExceptionVector.literal, USER_VECTOR_VADDR - 4)
	120	SECTION_VECTOR (.UserExceptionVector.text, USER_VECTOR_VADDR)
6bf28969	121	SECTION_VECTOR (.DoubleExceptionVector.literal, DOUBLEEXC_VECTOR_VADDR - 20)
b46dcfa3 MF	122	SECTION_VECTOR (.DoubleExceptionVector.text, DOUBLEEXC_VECTOR_VADDR)
	123	#endif
	124
78f3cdfa	125	TEXT_TEXT
5a0015d6	126	VMLINUX_SYMBOL(__sched_text_start) = .;
813e6783	127	*(.sched.literal .sched.text)
5a0015d6	128	VMLINUX_SYMBOL(__sched_text_end) = .;
6727ad9e CM	129	VMLINUX_SYMBOL(__cpuidle_text_start) = .;
	130	*(.cpuidle.literal .cpuidle.text)
	131	VMLINUX_SYMBOL(__cpuidle_text_end) = .;
5a0015d6	132	VMLINUX_SYMBOL(__lock_text_start) = .;
813e6783	133	*(.spinlock.literal .spinlock.text)
5a0015d6 CZ	134	VMLINUX_SYMBOL(__lock_text_end) = .;
	135
	136	}
	137	_etext = .;
de4f6e5b	138	PROVIDE (etext = .);
5a0015d6 CZ	139
	140	. = ALIGN(16);
	141
	142	RODATA
	143
	144	/* Relocation table */
	145
5a0015d6 CZ	146	.fixup : { *(.fixup) }
5a0015d6 CZ	147
cd3db323	148	EXCEPTION_TABLE(16)
5a0015d6 CZ	149	/* Data section */
5a0015d6 CZ	150
5e7b6ed8	151	_sdata = .;
cd3db323	152	RW_DATA_SECTION(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, THREAD_SIZE)
5a0015d6 CZ	153	_edata = .;
5a0015d6 CZ	154
5a0015d6 CZ	155	/* Initialization code and data: */
5a0015d6 CZ	156
cd3db323	157	. = ALIGN(PAGE_SIZE);
5a0015d6	158	__init_begin = .;
cd3db323	159	INIT_TEXT_SECTION(PAGE_SIZE)
5a0015d6 CZ	160
	161	.init.data :
	162	{
01ba2bdc	163	INIT_DATA
5a0015d6 CZ	164	. = ALIGN(0x4);
	165	__tagtable_begin = .;
	166	*(.taglist)
	167	__tagtable_end = .;
de4f6e5b CZ	168
	169	. = ALIGN(16);
	170	__boot_reloc_table_start = ABSOLUTE(.);
	171
b46dcfa3	172	#ifdef CONFIG_VECTORS_OFFSET
de4f6e5b CZ	173	RELOCATE_ENTRY(_WindowVectors_text,
de4f6e5b CZ	174	.WindowVectors.text);
2d1c645c MG	175	#if XCHAL_EXCM_LEVEL >= 2
	176	RELOCATE_ENTRY(_Level2InterruptVector_text,
	177	.Level2InterruptVector.text);
	178	#endif
	179	#if XCHAL_EXCM_LEVEL >= 3
	180	RELOCATE_ENTRY(_Level3InterruptVector_text,
	181	.Level3InterruptVector.text);
	182	#endif
	183	#if XCHAL_EXCM_LEVEL >= 4
	184	RELOCATE_ENTRY(_Level4InterruptVector_text,
	185	.Level4InterruptVector.text);
	186	#endif
	187	#if XCHAL_EXCM_LEVEL >= 5
	188	RELOCATE_ENTRY(_Level5InterruptVector_text,
	189	.Level5InterruptVector.text);
	190	#endif
	191	#if XCHAL_EXCM_LEVEL >= 6
	192	RELOCATE_ENTRY(_Level6InterruptVector_text,
	193	.Level6InterruptVector.text);
	194	#endif
de4f6e5b CZ	195	RELOCATE_ENTRY(_KernelExceptionVector_text,
	196	.KernelExceptionVector.text);
	197	RELOCATE_ENTRY(_UserExceptionVector_text,
	198	.UserExceptionVector.text);
	199	RELOCATE_ENTRY(_DoubleExceptionVector_literal,
	200	.DoubleExceptionVector.literal);
	201	RELOCATE_ENTRY(_DoubleExceptionVector_text,
	202	.DoubleExceptionVector.text);
6d15d109 MG	203	RELOCATE_ENTRY(_DebugInterruptVector_text,
6d15d109 MG	204	.DebugInterruptVector.text);
b46dcfa3	205	#endif
f615136c	206	#if defined(CONFIG_SMP)
f615136c MF	207	RELOCATE_ENTRY(_SecondaryResetVector_text,
	208	.SecondaryResetVector.text);
	209	#endif
	210
de4f6e5b CZ	211
de4f6e5b CZ	212	__boot_reloc_table_end = ABSOLUTE(.) ;
5a0015d6	213
cd3db323 TA	214	INIT_SETUP(XCHAL_ICACHE_LINESIZE)
	215	INIT_CALLS
	216	CON_INITCALL
	217	SECURITY_INITCALL
	218	INIT_RAM_FS
5a0015d6	219	}
de4f6e5b	220
0415b00d	221	PERCPU_SECTION(XCHAL_ICACHE_LINESIZE)
de4f6e5b	222
5a0015d6 CZ	223	/* We need this dummy segment here */
	224
	225	. = ALIGN(4);
	226	.dummy : { LONG(0) }
	227
b46dcfa3	228	#ifdef CONFIG_VECTORS_OFFSET
5a0015d6 CZ	229	/* The vectors are relocated to the real position at startup time */
	230
	231	SECTION_VECTOR (_WindowVectors_text,
	232	.WindowVectors.text,
e85e335f	233	WINDOW_VECTORS_VADDR, 4,
5a0015d6 CZ	234	.dummy)
	235	SECTION_VECTOR (_DebugInterruptVector_literal,
	236	.DebugInterruptVector.literal,
e85e335f	237	DEBUG_VECTOR_VADDR - 4,
5a0015d6 CZ	238	SIZEOF(.WindowVectors.text),
	239	.WindowVectors.text)
	240	SECTION_VECTOR (_DebugInterruptVector_text,
	241	.DebugInterruptVector.text,
e85e335f	242	DEBUG_VECTOR_VADDR,
5a0015d6 CZ	243	4,
5a0015d6 CZ	244	.DebugInterruptVector.literal)
2d1c645c MG	245	#undef LAST
	246	#define LAST .DebugInterruptVector.text
	247	#if XCHAL_EXCM_LEVEL >= 2
	248	SECTION_VECTOR (_Level2InterruptVector_text,
	249	.Level2InterruptVector.text,
e85e335f	250	INTLEVEL2_VECTOR_VADDR,
2d1c645c MG	251	SIZEOF(LAST), LAST)
	252	# undef LAST
	253	# define LAST .Level2InterruptVector.text
	254	#endif
	255	#if XCHAL_EXCM_LEVEL >= 3
	256	SECTION_VECTOR (_Level3InterruptVector_text,
	257	.Level3InterruptVector.text,
e85e335f	258	INTLEVEL3_VECTOR_VADDR,
2d1c645c MG	259	SIZEOF(LAST), LAST)
	260	# undef LAST
	261	# define LAST .Level3InterruptVector.text
	262	#endif
	263	#if XCHAL_EXCM_LEVEL >= 4
	264	SECTION_VECTOR (_Level4InterruptVector_text,
	265	.Level4InterruptVector.text,
e85e335f	266	INTLEVEL4_VECTOR_VADDR,
2d1c645c MG	267	SIZEOF(LAST), LAST)
	268	# undef LAST
	269	# define LAST .Level4InterruptVector.text
	270	#endif
	271	#if XCHAL_EXCM_LEVEL >= 5
	272	SECTION_VECTOR (_Level5InterruptVector_text,
	273	.Level5InterruptVector.text,
e85e335f	274	INTLEVEL5_VECTOR_VADDR,
2d1c645c MG	275	SIZEOF(LAST), LAST)
	276	# undef LAST
	277	# define LAST .Level5InterruptVector.text
	278	#endif
	279	#if XCHAL_EXCM_LEVEL >= 6
	280	SECTION_VECTOR (_Level6InterruptVector_text,
	281	.Level6InterruptVector.text,
e85e335f	282	INTLEVEL6_VECTOR_VADDR,
2d1c645c MG	283	SIZEOF(LAST), LAST)
	284	# undef LAST
	285	# define LAST .Level6InterruptVector.text
	286	#endif
5a0015d6 CZ	287	SECTION_VECTOR (_KernelExceptionVector_literal,
5a0015d6 CZ	288	.KernelExceptionVector.literal,
e85e335f	289	KERNEL_VECTOR_VADDR - 4,
2d1c645c MG	290	SIZEOF(LAST), LAST)
2d1c645c MG	291	#undef LAST
5a0015d6 CZ	292	SECTION_VECTOR (_KernelExceptionVector_text,
5a0015d6 CZ	293	.KernelExceptionVector.text,
e85e335f	294	KERNEL_VECTOR_VADDR,
5a0015d6 CZ	295	4,
	296	.KernelExceptionVector.literal)
	297	SECTION_VECTOR (_UserExceptionVector_literal,
	298	.UserExceptionVector.literal,
e85e335f	299	USER_VECTOR_VADDR - 4,
5a0015d6 CZ	300	SIZEOF(.KernelExceptionVector.text),
	301	.KernelExceptionVector.text)
	302	SECTION_VECTOR (_UserExceptionVector_text,
	303	.UserExceptionVector.text,
e85e335f	304	USER_VECTOR_VADDR,
5a0015d6 CZ	305	4,
	306	.UserExceptionVector.literal)
	307	SECTION_VECTOR (_DoubleExceptionVector_literal,
	308	.DoubleExceptionVector.literal,
6bf28969	309	DOUBLEEXC_VECTOR_VADDR - 20,
5a0015d6 CZ	310	SIZEOF(.UserExceptionVector.text),
	311	.UserExceptionVector.text)
	312	SECTION_VECTOR (_DoubleExceptionVector_text,
	313	.DoubleExceptionVector.text,
e85e335f	314	DOUBLEEXC_VECTOR_VADDR,
6bf28969	315	20,
5a0015d6 CZ	316	.DoubleExceptionVector.literal)
	317
	318	. = (LOADADDR( .DoubleExceptionVector.text ) + SIZEOF( .DoubleExceptionVector.text ) + 3) & ~ 3;
f615136c	319
b46dcfa3	320	#endif
f615136c MF	321	#if defined(CONFIG_SMP)
f615136c MF	322
f615136c MF	323	SECTION_VECTOR (_SecondaryResetVector_text,
	324	.SecondaryResetVector.text,
	325	RESET_VECTOR1_VADDR,
ab45fb14 MF	326	SIZEOF(.DoubleExceptionVector.text),
ab45fb14 MF	327	.DoubleExceptionVector.text)
f615136c MF	328
	329	. = LOADADDR(.SecondaryResetVector.text)+SIZEOF(.SecondaryResetVector.text);
	330
	331	#endif
	332
cd3db323	333	. = ALIGN(PAGE_SIZE);
5a0015d6 CZ	334
	335	__init_end = .;
	336
cd3db323	337	BSS_SECTION(0, 8192, 0)
de4f6e5b	338
5a0015d6 CZ	339	_end = .;
5a0015d6 CZ	340
de4f6e5b CZ	341	.xt.lit : { *(.xt.lit) }
de4f6e5b CZ	342	.xt.prop : { *(.xt.prop) }
5a0015d6 CZ	343
	344	.debug 0 : { *(.debug) }
	345	.line 0 : { *(.line) }
	346	.debug_srcinfo 0 : { *(.debug_srcinfo) }
	347	.debug_sfnames 0 : { *(.debug_sfnames) }
	348	.debug_aranges 0 : { *(.debug_aranges) }
	349	.debug_pubnames 0 : { *(.debug_pubnames) }
	350	.debug_info 0 : { *(.debug_info) }
	351	.debug_abbrev 0 : { *(.debug_abbrev) }
	352	.debug_line 0 : { *(.debug_line) }
	353	.debug_frame 0 : { *(.debug_frame) }
	354	.debug_str 0 : { *(.debug_str) }
	355	.debug_loc 0 : { *(.debug_loc) }
	356	.debug_macinfo 0 : { *(.debug_macinfo) }
	357	.debug_weaknames 0 : { *(.debug_weaknames) }
	358	.debug_funcnames 0 : { *(.debug_funcnames) }
	359	.debug_typenames 0 : { *(.debug_typenames) }
	360	.debug_varnames 0 : { *(.debug_varnames) }
	361
	362	.xt.insn 0 :
	363	{
	364	*(.xt.insn)
	365	(.gnu.linkonce.x)
	366	}
	367
	368	.xt.lit 0 :
	369	{
	370	*(.xt.lit)
	371	(.gnu.linkonce.p)
	372	}
023bf6f1 TH	373
	374	/* Sections to be discarded */
	375	DISCARDS
	376	/DISCARD/ : { *(.exit.literal) }
5a0015d6	377	}