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ad96090a BS |
1 | /* |
2 | * QEMU System Emulator | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | #include <stdint.h> | |
25 | #include <stdarg.h> | |
b2e0a138 | 26 | #include <stdlib.h> |
ad96090a | 27 | #ifndef _WIN32 |
1c47cb16 | 28 | #include <sys/types.h> |
ad96090a BS |
29 | #include <sys/mman.h> |
30 | #endif | |
31 | #include "config.h" | |
83c9089e | 32 | #include "monitor/monitor.h" |
9c17d615 | 33 | #include "sysemu/sysemu.h" |
1de7afc9 PB |
34 | #include "qemu/bitops.h" |
35 | #include "qemu/bitmap.h" | |
9c17d615 | 36 | #include "sysemu/arch_init.h" |
ad96090a | 37 | #include "audio/audio.h" |
0d09e41a | 38 | #include "hw/i386/pc.h" |
a2cb15b0 | 39 | #include "hw/pci/pci.h" |
0d09e41a | 40 | #include "hw/audio/audio.h" |
9c17d615 | 41 | #include "sysemu/kvm.h" |
caf71f86 | 42 | #include "migration/migration.h" |
0d09e41a | 43 | #include "hw/i386/smbios.h" |
022c62cb | 44 | #include "exec/address-spaces.h" |
0d09e41a | 45 | #include "hw/audio/pcspk.h" |
caf71f86 | 46 | #include "migration/page_cache.h" |
1de7afc9 | 47 | #include "qemu/config-file.h" |
99afc91d | 48 | #include "qmp-commands.h" |
3c12193d | 49 | #include "trace.h" |
0d6d3c87 | 50 | #include "exec/cpu-all.h" |
12291ec1 | 51 | #include "exec/ram_addr.h" |
0445259b | 52 | #include "hw/acpi/acpi.h" |
aa8dc044 | 53 | #include "qemu/host-utils.h" |
ad96090a | 54 | |
3a697f69 OW |
55 | #ifdef DEBUG_ARCH_INIT |
56 | #define DPRINTF(fmt, ...) \ | |
57 | do { fprintf(stdout, "arch_init: " fmt, ## __VA_ARGS__); } while (0) | |
58 | #else | |
59 | #define DPRINTF(fmt, ...) \ | |
60 | do { } while (0) | |
61 | #endif | |
62 | ||
ad96090a BS |
63 | #ifdef TARGET_SPARC |
64 | int graphic_width = 1024; | |
65 | int graphic_height = 768; | |
66 | int graphic_depth = 8; | |
67 | #else | |
68 | int graphic_width = 800; | |
69 | int graphic_height = 600; | |
f1ff0e89 | 70 | int graphic_depth = 32; |
ad96090a BS |
71 | #endif |
72 | ||
ad96090a BS |
73 | |
74 | #if defined(TARGET_ALPHA) | |
75 | #define QEMU_ARCH QEMU_ARCH_ALPHA | |
76 | #elif defined(TARGET_ARM) | |
77 | #define QEMU_ARCH QEMU_ARCH_ARM | |
78 | #elif defined(TARGET_CRIS) | |
79 | #define QEMU_ARCH QEMU_ARCH_CRIS | |
80 | #elif defined(TARGET_I386) | |
81 | #define QEMU_ARCH QEMU_ARCH_I386 | |
82 | #elif defined(TARGET_M68K) | |
83 | #define QEMU_ARCH QEMU_ARCH_M68K | |
81ea0e13 MW |
84 | #elif defined(TARGET_LM32) |
85 | #define QEMU_ARCH QEMU_ARCH_LM32 | |
ad96090a BS |
86 | #elif defined(TARGET_MICROBLAZE) |
87 | #define QEMU_ARCH QEMU_ARCH_MICROBLAZE | |
88 | #elif defined(TARGET_MIPS) | |
89 | #define QEMU_ARCH QEMU_ARCH_MIPS | |
d15a9c23 AG |
90 | #elif defined(TARGET_MOXIE) |
91 | #define QEMU_ARCH QEMU_ARCH_MOXIE | |
e67db06e JL |
92 | #elif defined(TARGET_OPENRISC) |
93 | #define QEMU_ARCH QEMU_ARCH_OPENRISC | |
ad96090a BS |
94 | #elif defined(TARGET_PPC) |
95 | #define QEMU_ARCH QEMU_ARCH_PPC | |
96 | #elif defined(TARGET_S390X) | |
97 | #define QEMU_ARCH QEMU_ARCH_S390X | |
98 | #elif defined(TARGET_SH4) | |
99 | #define QEMU_ARCH QEMU_ARCH_SH4 | |
100 | #elif defined(TARGET_SPARC) | |
101 | #define QEMU_ARCH QEMU_ARCH_SPARC | |
2328826b MF |
102 | #elif defined(TARGET_XTENSA) |
103 | #define QEMU_ARCH QEMU_ARCH_XTENSA | |
4f23a1e6 GX |
104 | #elif defined(TARGET_UNICORE32) |
105 | #define QEMU_ARCH QEMU_ARCH_UNICORE32 | |
ad96090a BS |
106 | #endif |
107 | ||
108 | const uint32_t arch_type = QEMU_ARCH; | |
7ca1dfad CV |
109 | static bool mig_throttle_on; |
110 | static int dirty_rate_high_cnt; | |
111 | static void check_guest_throttling(void); | |
ad96090a BS |
112 | |
113 | /***********************************************************/ | |
114 | /* ram save/restore */ | |
115 | ||
d20878d2 YT |
116 | #define RAM_SAVE_FLAG_FULL 0x01 /* Obsolete, not used anymore */ |
117 | #define RAM_SAVE_FLAG_COMPRESS 0x02 | |
118 | #define RAM_SAVE_FLAG_MEM_SIZE 0x04 | |
119 | #define RAM_SAVE_FLAG_PAGE 0x08 | |
120 | #define RAM_SAVE_FLAG_EOS 0x10 | |
121 | #define RAM_SAVE_FLAG_CONTINUE 0x20 | |
17ad9b35 | 122 | #define RAM_SAVE_FLAG_XBZRLE 0x40 |
0033b8b4 | 123 | /* 0x80 is reserved in migration.h start with 0x100 next */ |
ad96090a | 124 | |
756557de EH |
125 | static struct defconfig_file { |
126 | const char *filename; | |
f29a5614 EH |
127 | /* Indicates it is an user config file (disabled by -no-user-config) */ |
128 | bool userconfig; | |
756557de | 129 | } default_config_files[] = { |
f29a5614 | 130 | { CONFIG_QEMU_CONFDIR "/qemu.conf", true }, |
2e59915d | 131 | { CONFIG_QEMU_CONFDIR "/target-" TARGET_NAME ".conf", true }, |
756557de EH |
132 | { NULL }, /* end of list */ |
133 | }; | |
134 | ||
6d3cb1f9 | 135 | static const uint8_t ZERO_TARGET_PAGE[TARGET_PAGE_SIZE]; |
756557de | 136 | |
f29a5614 | 137 | int qemu_read_default_config_files(bool userconfig) |
b5a8fe5e EH |
138 | { |
139 | int ret; | |
756557de | 140 | struct defconfig_file *f; |
b5a8fe5e | 141 | |
756557de | 142 | for (f = default_config_files; f->filename; f++) { |
f29a5614 EH |
143 | if (!userconfig && f->userconfig) { |
144 | continue; | |
145 | } | |
756557de EH |
146 | ret = qemu_read_config_file(f->filename); |
147 | if (ret < 0 && ret != -ENOENT) { | |
148 | return ret; | |
149 | } | |
b5a8fe5e | 150 | } |
4d8b3c63 | 151 | |
b5a8fe5e EH |
152 | return 0; |
153 | } | |
154 | ||
dc3c26a4 | 155 | static inline bool is_zero_range(uint8_t *p, uint64_t size) |
ad96090a | 156 | { |
dc3c26a4 | 157 | return buffer_find_nonzero_offset(p, size) == size; |
ad96090a BS |
158 | } |
159 | ||
17ad9b35 OW |
160 | /* struct contains XBZRLE cache and a static page |
161 | used by the compression */ | |
162 | static struct { | |
163 | /* buffer used for XBZRLE encoding */ | |
164 | uint8_t *encoded_buf; | |
165 | /* buffer for storing page content */ | |
166 | uint8_t *current_buf; | |
fd8cec93 | 167 | /* Cache for XBZRLE, Protected by lock. */ |
17ad9b35 | 168 | PageCache *cache; |
fd8cec93 | 169 | QemuMutex lock; |
17ad9b35 OW |
170 | } XBZRLE = { |
171 | .encoded_buf = NULL, | |
172 | .current_buf = NULL, | |
17ad9b35 OW |
173 | .cache = NULL, |
174 | }; | |
905f26f2 GA |
175 | /* buffer used for XBZRLE decoding */ |
176 | static uint8_t *xbzrle_decoded_buf; | |
9e1ba4cc | 177 | |
fd8cec93 GA |
178 | static void XBZRLE_cache_lock(void) |
179 | { | |
180 | if (migrate_use_xbzrle()) | |
181 | qemu_mutex_lock(&XBZRLE.lock); | |
182 | } | |
183 | ||
184 | static void XBZRLE_cache_unlock(void) | |
185 | { | |
186 | if (migrate_use_xbzrle()) | |
187 | qemu_mutex_unlock(&XBZRLE.lock); | |
188 | } | |
189 | ||
9e1ba4cc OW |
190 | int64_t xbzrle_cache_resize(int64_t new_size) |
191 | { | |
fd8cec93 GA |
192 | PageCache *new_cache, *cache_to_free; |
193 | ||
c91e681a OW |
194 | if (new_size < TARGET_PAGE_SIZE) { |
195 | return -1; | |
196 | } | |
197 | ||
fd8cec93 | 198 | /* no need to lock, the current thread holds qemu big lock */ |
9e1ba4cc | 199 | if (XBZRLE.cache != NULL) { |
fd8cec93 GA |
200 | /* check XBZRLE.cache again later */ |
201 | if (pow2floor(new_size) == migrate_xbzrle_cache_size()) { | |
202 | return pow2floor(new_size); | |
203 | } | |
204 | new_cache = cache_init(new_size / TARGET_PAGE_SIZE, | |
205 | TARGET_PAGE_SIZE); | |
206 | if (!new_cache) { | |
207 | DPRINTF("Error creating cache\n"); | |
208 | return -1; | |
209 | } | |
210 | ||
211 | XBZRLE_cache_lock(); | |
212 | /* the XBZRLE.cache may have be destroyed, check it again */ | |
213 | if (XBZRLE.cache != NULL) { | |
214 | cache_to_free = XBZRLE.cache; | |
215 | XBZRLE.cache = new_cache; | |
216 | } else { | |
217 | cache_to_free = new_cache; | |
218 | } | |
219 | XBZRLE_cache_unlock(); | |
220 | ||
221 | cache_fini(cache_to_free); | |
9e1ba4cc | 222 | } |
fd8cec93 | 223 | |
9e1ba4cc OW |
224 | return pow2floor(new_size); |
225 | } | |
226 | ||
004d4c10 OW |
227 | /* accounting for migration statistics */ |
228 | typedef struct AccountingInfo { | |
229 | uint64_t dup_pages; | |
f1c72795 | 230 | uint64_t skipped_pages; |
004d4c10 OW |
231 | uint64_t norm_pages; |
232 | uint64_t iterations; | |
f36d55af OW |
233 | uint64_t xbzrle_bytes; |
234 | uint64_t xbzrle_pages; | |
235 | uint64_t xbzrle_cache_miss; | |
236 | uint64_t xbzrle_overflows; | |
004d4c10 OW |
237 | } AccountingInfo; |
238 | ||
239 | static AccountingInfo acct_info; | |
240 | ||
241 | static void acct_clear(void) | |
242 | { | |
243 | memset(&acct_info, 0, sizeof(acct_info)); | |
244 | } | |
245 | ||
246 | uint64_t dup_mig_bytes_transferred(void) | |
247 | { | |
248 | return acct_info.dup_pages * TARGET_PAGE_SIZE; | |
249 | } | |
250 | ||
251 | uint64_t dup_mig_pages_transferred(void) | |
252 | { | |
253 | return acct_info.dup_pages; | |
254 | } | |
255 | ||
f1c72795 PL |
256 | uint64_t skipped_mig_bytes_transferred(void) |
257 | { | |
258 | return acct_info.skipped_pages * TARGET_PAGE_SIZE; | |
259 | } | |
260 | ||
261 | uint64_t skipped_mig_pages_transferred(void) | |
262 | { | |
263 | return acct_info.skipped_pages; | |
264 | } | |
265 | ||
004d4c10 OW |
266 | uint64_t norm_mig_bytes_transferred(void) |
267 | { | |
268 | return acct_info.norm_pages * TARGET_PAGE_SIZE; | |
269 | } | |
270 | ||
271 | uint64_t norm_mig_pages_transferred(void) | |
272 | { | |
273 | return acct_info.norm_pages; | |
274 | } | |
275 | ||
f36d55af OW |
276 | uint64_t xbzrle_mig_bytes_transferred(void) |
277 | { | |
278 | return acct_info.xbzrle_bytes; | |
279 | } | |
280 | ||
281 | uint64_t xbzrle_mig_pages_transferred(void) | |
282 | { | |
283 | return acct_info.xbzrle_pages; | |
284 | } | |
285 | ||
286 | uint64_t xbzrle_mig_pages_cache_miss(void) | |
287 | { | |
288 | return acct_info.xbzrle_cache_miss; | |
289 | } | |
290 | ||
291 | uint64_t xbzrle_mig_pages_overflow(void) | |
292 | { | |
293 | return acct_info.xbzrle_overflows; | |
294 | } | |
295 | ||
3f7d7b09 JQ |
296 | static size_t save_block_hdr(QEMUFile *f, RAMBlock *block, ram_addr_t offset, |
297 | int cont, int flag) | |
0c51f43d | 298 | { |
3f7d7b09 JQ |
299 | size_t size; |
300 | ||
301 | qemu_put_be64(f, offset | cont | flag); | |
302 | size = 8; | |
0c51f43d | 303 | |
3f7d7b09 JQ |
304 | if (!cont) { |
305 | qemu_put_byte(f, strlen(block->idstr)); | |
306 | qemu_put_buffer(f, (uint8_t *)block->idstr, | |
307 | strlen(block->idstr)); | |
308 | size += 1 + strlen(block->idstr); | |
309 | } | |
310 | return size; | |
0c51f43d OW |
311 | } |
312 | ||
6d3cb1f9 DDAG |
313 | /* This is the last block that we have visited serching for dirty pages |
314 | */ | |
315 | static RAMBlock *last_seen_block; | |
316 | /* This is the last block from where we have sent data */ | |
317 | static RAMBlock *last_sent_block; | |
318 | static ram_addr_t last_offset; | |
319 | static unsigned long *migration_bitmap; | |
320 | static uint64_t migration_dirty_pages; | |
321 | static uint32_t last_version; | |
322 | static bool ram_bulk_stage; | |
323 | ||
324 | /* Update the xbzrle cache to reflect a page that's been sent as all 0. | |
325 | * The important thing is that a stale (not-yet-0'd) page be replaced | |
326 | * by the new data. | |
327 | * As a bonus, if the page wasn't in the cache it gets added so that | |
328 | * when a small write is made into the 0'd page it gets XBZRLE sent | |
329 | */ | |
330 | static void xbzrle_cache_zero_page(ram_addr_t current_addr) | |
331 | { | |
332 | if (ram_bulk_stage || !migrate_use_xbzrle()) { | |
333 | return; | |
334 | } | |
335 | ||
336 | /* We don't care if this fails to allocate a new cache page | |
337 | * as long as it updated an old one */ | |
338 | cache_insert(XBZRLE.cache, current_addr, ZERO_TARGET_PAGE); | |
339 | } | |
340 | ||
17ad9b35 OW |
341 | #define ENCODING_FLAG_XBZRLE 0x1 |
342 | ||
343 | static int save_xbzrle_page(QEMUFile *f, uint8_t *current_data, | |
344 | ram_addr_t current_addr, RAMBlock *block, | |
dd051c72 | 345 | ram_addr_t offset, int cont, bool last_stage) |
17ad9b35 OW |
346 | { |
347 | int encoded_len = 0, bytes_sent = -1; | |
348 | uint8_t *prev_cached_page; | |
349 | ||
350 | if (!cache_is_cached(XBZRLE.cache, current_addr)) { | |
dd051c72 | 351 | if (!last_stage) { |
89db9987 OW |
352 | if (cache_insert(XBZRLE.cache, current_addr, current_data) == -1) { |
353 | return -1; | |
354 | } | |
dd051c72 | 355 | } |
f36d55af | 356 | acct_info.xbzrle_cache_miss++; |
17ad9b35 OW |
357 | return -1; |
358 | } | |
359 | ||
360 | prev_cached_page = get_cached_data(XBZRLE.cache, current_addr); | |
361 | ||
362 | /* save current buffer into memory */ | |
363 | memcpy(XBZRLE.current_buf, current_data, TARGET_PAGE_SIZE); | |
364 | ||
365 | /* XBZRLE encoding (if there is no overflow) */ | |
366 | encoded_len = xbzrle_encode_buffer(prev_cached_page, XBZRLE.current_buf, | |
367 | TARGET_PAGE_SIZE, XBZRLE.encoded_buf, | |
368 | TARGET_PAGE_SIZE); | |
369 | if (encoded_len == 0) { | |
370 | DPRINTF("Skipping unmodified page\n"); | |
371 | return 0; | |
372 | } else if (encoded_len == -1) { | |
373 | DPRINTF("Overflow\n"); | |
f36d55af | 374 | acct_info.xbzrle_overflows++; |
17ad9b35 OW |
375 | /* update data in the cache */ |
376 | memcpy(prev_cached_page, current_data, TARGET_PAGE_SIZE); | |
377 | return -1; | |
378 | } | |
379 | ||
380 | /* we need to update the data in the cache, in order to get the same data */ | |
dd051c72 JQ |
381 | if (!last_stage) { |
382 | memcpy(prev_cached_page, XBZRLE.current_buf, TARGET_PAGE_SIZE); | |
383 | } | |
17ad9b35 OW |
384 | |
385 | /* Send XBZRLE based compressed page */ | |
3f7d7b09 | 386 | bytes_sent = save_block_hdr(f, block, offset, cont, RAM_SAVE_FLAG_XBZRLE); |
17ad9b35 OW |
387 | qemu_put_byte(f, ENCODING_FLAG_XBZRLE); |
388 | qemu_put_be16(f, encoded_len); | |
389 | qemu_put_buffer(f, XBZRLE.encoded_buf, encoded_len); | |
3f7d7b09 | 390 | bytes_sent += encoded_len + 1 + 2; |
f36d55af OW |
391 | acct_info.xbzrle_pages++; |
392 | acct_info.xbzrle_bytes += bytes_sent; | |
17ad9b35 OW |
393 | |
394 | return bytes_sent; | |
395 | } | |
396 | ||
4c8ae0f6 JQ |
397 | static inline |
398 | ram_addr_t migration_bitmap_find_and_reset_dirty(MemoryRegion *mr, | |
399 | ram_addr_t start) | |
69268cde | 400 | { |
4c8ae0f6 JQ |
401 | unsigned long base = mr->ram_addr >> TARGET_PAGE_BITS; |
402 | unsigned long nr = base + (start >> TARGET_PAGE_BITS); | |
0851c9f7 MT |
403 | uint64_t mr_size = TARGET_PAGE_ALIGN(memory_region_size(mr)); |
404 | unsigned long size = base + (mr_size >> TARGET_PAGE_BITS); | |
c6bf8e0e | 405 | |
70c8652b PL |
406 | unsigned long next; |
407 | ||
408 | if (ram_bulk_stage && nr > base) { | |
409 | next = nr + 1; | |
410 | } else { | |
411 | next = find_next_bit(migration_bitmap, size, nr); | |
412 | } | |
69268cde | 413 | |
4c8ae0f6 JQ |
414 | if (next < size) { |
415 | clear_bit(next, migration_bitmap); | |
c6bf8e0e | 416 | migration_dirty_pages--; |
69268cde | 417 | } |
4c8ae0f6 | 418 | return (next - base) << TARGET_PAGE_BITS; |
69268cde JQ |
419 | } |
420 | ||
791fa2a2 | 421 | static inline bool migration_bitmap_set_dirty(ram_addr_t addr) |
e44d26c8 | 422 | { |
c6bf8e0e | 423 | bool ret; |
791fa2a2 | 424 | int nr = addr >> TARGET_PAGE_BITS; |
e44d26c8 | 425 | |
c6bf8e0e JQ |
426 | ret = test_and_set_bit(nr, migration_bitmap); |
427 | ||
428 | if (!ret) { | |
429 | migration_dirty_pages++; | |
e44d26c8 | 430 | } |
c6bf8e0e | 431 | return ret; |
e44d26c8 JQ |
432 | } |
433 | ||
791fa2a2 JQ |
434 | static void migration_bitmap_sync_range(ram_addr_t start, ram_addr_t length) |
435 | { | |
436 | ram_addr_t addr; | |
aa8dc044 JQ |
437 | unsigned long page = BIT_WORD(start >> TARGET_PAGE_BITS); |
438 | ||
439 | /* start address is aligned at the start of a word? */ | |
440 | if (((page * BITS_PER_LONG) << TARGET_PAGE_BITS) == start) { | |
441 | int k; | |
442 | int nr = BITS_TO_LONGS(length >> TARGET_PAGE_BITS); | |
443 | unsigned long *src = ram_list.dirty_memory[DIRTY_MEMORY_MIGRATION]; | |
444 | ||
445 | for (k = page; k < page + nr; k++) { | |
446 | if (src[k]) { | |
447 | unsigned long new_dirty; | |
448 | new_dirty = ~migration_bitmap[k]; | |
449 | migration_bitmap[k] |= src[k]; | |
450 | new_dirty &= src[k]; | |
451 | migration_dirty_pages += ctpopl(new_dirty); | |
452 | src[k] = 0; | |
453 | } | |
454 | } | |
455 | } else { | |
456 | for (addr = 0; addr < length; addr += TARGET_PAGE_SIZE) { | |
457 | if (cpu_physical_memory_get_dirty(start + addr, | |
458 | TARGET_PAGE_SIZE, | |
459 | DIRTY_MEMORY_MIGRATION)) { | |
460 | cpu_physical_memory_reset_dirty(start + addr, | |
461 | TARGET_PAGE_SIZE, | |
462 | DIRTY_MEMORY_MIGRATION); | |
463 | migration_bitmap_set_dirty(start + addr); | |
464 | } | |
791fa2a2 JQ |
465 | } |
466 | } | |
467 | } | |
468 | ||
469 | ||
32c835ba PB |
470 | /* Needs iothread lock! */ |
471 | ||
dd2df737 JQ |
472 | static void migration_bitmap_sync(void) |
473 | { | |
c6bf8e0e | 474 | RAMBlock *block; |
c6bf8e0e | 475 | uint64_t num_dirty_pages_init = migration_dirty_pages; |
8d017193 JQ |
476 | MigrationState *s = migrate_get_current(); |
477 | static int64_t start_time; | |
7ca1dfad | 478 | static int64_t bytes_xfer_prev; |
8d017193 JQ |
479 | static int64_t num_dirty_pages_period; |
480 | int64_t end_time; | |
7ca1dfad CV |
481 | int64_t bytes_xfer_now; |
482 | ||
483 | if (!bytes_xfer_prev) { | |
484 | bytes_xfer_prev = ram_bytes_transferred(); | |
485 | } | |
8d017193 JQ |
486 | |
487 | if (!start_time) { | |
bc72ad67 | 488 | start_time = qemu_clock_get_ms(QEMU_CLOCK_REALTIME); |
8d017193 | 489 | } |
3c12193d JQ |
490 | |
491 | trace_migration_bitmap_sync_start(); | |
1d671369 | 492 | address_space_sync_dirty_bitmap(&address_space_memory); |
c6bf8e0e | 493 | |
a3161038 | 494 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
791fa2a2 | 495 | migration_bitmap_sync_range(block->mr->ram_addr, block->length); |
c6bf8e0e JQ |
496 | } |
497 | trace_migration_bitmap_sync_end(migration_dirty_pages | |
3c12193d | 498 | - num_dirty_pages_init); |
8d017193 | 499 | num_dirty_pages_period += migration_dirty_pages - num_dirty_pages_init; |
bc72ad67 | 500 | end_time = qemu_clock_get_ms(QEMU_CLOCK_REALTIME); |
8d017193 JQ |
501 | |
502 | /* more than 1 second = 1000 millisecons */ | |
503 | if (end_time > start_time + 1000) { | |
7ca1dfad CV |
504 | if (migrate_auto_converge()) { |
505 | /* The following detection logic can be refined later. For now: | |
506 | Check to see if the dirtied bytes is 50% more than the approx. | |
507 | amount of bytes that just got transferred since the last time we | |
508 | were in this routine. If that happens >N times (for now N==4) | |
509 | we turn on the throttle down logic */ | |
510 | bytes_xfer_now = ram_bytes_transferred(); | |
511 | if (s->dirty_pages_rate && | |
512 | (num_dirty_pages_period * TARGET_PAGE_SIZE > | |
513 | (bytes_xfer_now - bytes_xfer_prev)/2) && | |
514 | (dirty_rate_high_cnt++ > 4)) { | |
515 | trace_migration_throttle(); | |
516 | mig_throttle_on = true; | |
517 | dirty_rate_high_cnt = 0; | |
518 | } | |
519 | bytes_xfer_prev = bytes_xfer_now; | |
520 | } else { | |
521 | mig_throttle_on = false; | |
522 | } | |
8d017193 JQ |
523 | s->dirty_pages_rate = num_dirty_pages_period * 1000 |
524 | / (end_time - start_time); | |
90f8ae72 | 525 | s->dirty_bytes_rate = s->dirty_pages_rate * TARGET_PAGE_SIZE; |
8d017193 JQ |
526 | start_time = end_time; |
527 | num_dirty_pages_period = 0; | |
528 | } | |
dd2df737 JQ |
529 | } |
530 | ||
6c779f22 OW |
531 | /* |
532 | * ram_save_block: Writes a page of memory to the stream f | |
533 | * | |
b823ceaa JQ |
534 | * Returns: The number of bytes written. |
535 | * 0 means no dirty pages | |
6c779f22 OW |
536 | */ |
537 | ||
dd051c72 | 538 | static int ram_save_block(QEMUFile *f, bool last_stage) |
ad96090a | 539 | { |
b23a9a5c | 540 | RAMBlock *block = last_seen_block; |
e44359c3 | 541 | ram_addr_t offset = last_offset; |
4c8ae0f6 | 542 | bool complete_round = false; |
b823ceaa | 543 | int bytes_sent = 0; |
71c510e2 | 544 | MemoryRegion *mr; |
17ad9b35 | 545 | ram_addr_t current_addr; |
ad96090a | 546 | |
e44359c3 | 547 | if (!block) |
a3161038 | 548 | block = QTAILQ_FIRST(&ram_list.blocks); |
e44359c3 | 549 | |
4c8ae0f6 | 550 | while (true) { |
71c510e2 | 551 | mr = block->mr; |
4c8ae0f6 JQ |
552 | offset = migration_bitmap_find_and_reset_dirty(mr, offset); |
553 | if (complete_round && block == last_seen_block && | |
554 | offset >= last_offset) { | |
555 | break; | |
556 | } | |
557 | if (offset >= block->length) { | |
558 | offset = 0; | |
559 | block = QTAILQ_NEXT(block, next); | |
560 | if (!block) { | |
561 | block = QTAILQ_FIRST(&ram_list.blocks); | |
562 | complete_round = true; | |
78d07ae7 | 563 | ram_bulk_stage = false; |
4c8ae0f6 JQ |
564 | } |
565 | } else { | |
0033b8b4 | 566 | int ret; |
ad96090a | 567 | uint8_t *p; |
6d3cb1f9 | 568 | bool send_async = true; |
5f718a15 | 569 | int cont = (block == last_sent_block) ? |
b23a9a5c | 570 | RAM_SAVE_FLAG_CONTINUE : 0; |
ad96090a | 571 | |
71c510e2 | 572 | p = memory_region_get_ram_ptr(mr) + offset; |
ad96090a | 573 | |
b823ceaa JQ |
574 | /* In doubt sent page as normal */ |
575 | bytes_sent = -1; | |
0033b8b4 MH |
576 | ret = ram_control_save_page(f, block->offset, |
577 | offset, TARGET_PAGE_SIZE, &bytes_sent); | |
578 | ||
fd8cec93 GA |
579 | XBZRLE_cache_lock(); |
580 | ||
6d3cb1f9 | 581 | current_addr = block->offset + offset; |
0033b8b4 MH |
582 | if (ret != RAM_SAVE_CONTROL_NOT_SUPP) { |
583 | if (ret != RAM_SAVE_CONTROL_DELAYED) { | |
584 | if (bytes_sent > 0) { | |
585 | acct_info.norm_pages++; | |
586 | } else if (bytes_sent == 0) { | |
587 | acct_info.dup_pages++; | |
588 | } | |
589 | } | |
dc3c26a4 | 590 | } else if (is_zero_range(p, TARGET_PAGE_SIZE)) { |
004d4c10 | 591 | acct_info.dup_pages++; |
9ef051e5 PL |
592 | bytes_sent = save_block_hdr(f, block, offset, cont, |
593 | RAM_SAVE_FLAG_COMPRESS); | |
594 | qemu_put_byte(f, 0); | |
595 | bytes_sent++; | |
6d3cb1f9 DDAG |
596 | /* Must let xbzrle know, otherwise a previous (now 0'd) cached |
597 | * page would be stale | |
598 | */ | |
599 | xbzrle_cache_zero_page(current_addr); | |
5cc11c46 | 600 | } else if (!ram_bulk_stage && migrate_use_xbzrle()) { |
17ad9b35 | 601 | bytes_sent = save_xbzrle_page(f, p, current_addr, block, |
dd051c72 JQ |
602 | offset, cont, last_stage); |
603 | if (!last_stage) { | |
6d3cb1f9 DDAG |
604 | /* We must send exactly what's in the xbzrle cache |
605 | * even if the page wasn't xbzrle compressed, so that | |
606 | * it's right next time. | |
607 | */ | |
dd051c72 | 608 | p = get_cached_data(XBZRLE.cache, current_addr); |
6d3cb1f9 DDAG |
609 | |
610 | /* Can't send this cached data async, since the cache page | |
611 | * might get updated before it gets to the wire | |
612 | */ | |
613 | send_async = false; | |
dd051c72 | 614 | } |
17ad9b35 OW |
615 | } |
616 | ||
b823ceaa | 617 | /* XBZRLE overflow or normal page */ |
17ad9b35 | 618 | if (bytes_sent == -1) { |
3f7d7b09 | 619 | bytes_sent = save_block_hdr(f, block, offset, cont, RAM_SAVE_FLAG_PAGE); |
6d3cb1f9 DDAG |
620 | if (send_async) { |
621 | qemu_put_buffer_async(f, p, TARGET_PAGE_SIZE); | |
622 | } else { | |
623 | qemu_put_buffer(f, p, TARGET_PAGE_SIZE); | |
624 | } | |
3f7d7b09 | 625 | bytes_sent += TARGET_PAGE_SIZE; |
004d4c10 | 626 | acct_info.norm_pages++; |
ad96090a BS |
627 | } |
628 | ||
fd8cec93 | 629 | XBZRLE_cache_unlock(); |
17ad9b35 | 630 | /* if page is unmodified, continue to the next */ |
b823ceaa | 631 | if (bytes_sent > 0) { |
5f718a15 | 632 | last_sent_block = block; |
17ad9b35 OW |
633 | break; |
634 | } | |
ad96090a | 635 | } |
4c8ae0f6 | 636 | } |
b23a9a5c | 637 | last_seen_block = block; |
e44359c3 | 638 | last_offset = offset; |
ad96090a | 639 | |
3fc250b4 | 640 | return bytes_sent; |
ad96090a BS |
641 | } |
642 | ||
643 | static uint64_t bytes_transferred; | |
644 | ||
2b0ce079 MH |
645 | void acct_update_position(QEMUFile *f, size_t size, bool zero) |
646 | { | |
647 | uint64_t pages = size / TARGET_PAGE_SIZE; | |
648 | if (zero) { | |
649 | acct_info.dup_pages += pages; | |
650 | } else { | |
651 | acct_info.norm_pages += pages; | |
652 | bytes_transferred += size; | |
653 | qemu_update_position(f, size); | |
654 | } | |
655 | } | |
656 | ||
ad96090a BS |
657 | static ram_addr_t ram_save_remaining(void) |
658 | { | |
c6bf8e0e | 659 | return migration_dirty_pages; |
ad96090a BS |
660 | } |
661 | ||
662 | uint64_t ram_bytes_remaining(void) | |
663 | { | |
664 | return ram_save_remaining() * TARGET_PAGE_SIZE; | |
665 | } | |
666 | ||
667 | uint64_t ram_bytes_transferred(void) | |
668 | { | |
669 | return bytes_transferred; | |
670 | } | |
671 | ||
672 | uint64_t ram_bytes_total(void) | |
673 | { | |
d17b5288 AW |
674 | RAMBlock *block; |
675 | uint64_t total = 0; | |
676 | ||
a3161038 | 677 | QTAILQ_FOREACH(block, &ram_list.blocks, next) |
d17b5288 AW |
678 | total += block->length; |
679 | ||
680 | return total; | |
ad96090a BS |
681 | } |
682 | ||
905f26f2 GA |
683 | void free_xbzrle_decoded_buf(void) |
684 | { | |
685 | g_free(xbzrle_decoded_buf); | |
686 | xbzrle_decoded_buf = NULL; | |
687 | } | |
688 | ||
8e21cd32 OW |
689 | static void migration_end(void) |
690 | { | |
244eaa75 PB |
691 | if (migration_bitmap) { |
692 | memory_global_dirty_log_stop(); | |
693 | g_free(migration_bitmap); | |
694 | migration_bitmap = NULL; | |
695 | } | |
17ad9b35 | 696 | |
fd8cec93 | 697 | XBZRLE_cache_lock(); |
244eaa75 | 698 | if (XBZRLE.cache) { |
17ad9b35 OW |
699 | cache_fini(XBZRLE.cache); |
700 | g_free(XBZRLE.cache); | |
701 | g_free(XBZRLE.encoded_buf); | |
702 | g_free(XBZRLE.current_buf); | |
17ad9b35 | 703 | XBZRLE.cache = NULL; |
f6c6483b OW |
704 | XBZRLE.encoded_buf = NULL; |
705 | XBZRLE.current_buf = NULL; | |
17ad9b35 | 706 | } |
fd8cec93 | 707 | XBZRLE_cache_unlock(); |
8e21cd32 OW |
708 | } |
709 | ||
9b5bfab0 JQ |
710 | static void ram_migration_cancel(void *opaque) |
711 | { | |
712 | migration_end(); | |
713 | } | |
714 | ||
5a170775 JQ |
715 | static void reset_ram_globals(void) |
716 | { | |
b23a9a5c | 717 | last_seen_block = NULL; |
5f718a15 | 718 | last_sent_block = NULL; |
5a170775 | 719 | last_offset = 0; |
f798b07f | 720 | last_version = ram_list.version; |
78d07ae7 | 721 | ram_bulk_stage = true; |
5a170775 JQ |
722 | } |
723 | ||
4508bd9e JQ |
724 | #define MAX_WAIT 50 /* ms, half buffered_file limit */ |
725 | ||
d1315aac | 726 | static int ram_save_setup(QEMUFile *f, void *opaque) |
ad96090a | 727 | { |
d1315aac | 728 | RAMBlock *block; |
c6bf8e0e JQ |
729 | int64_t ram_pages = last_ram_offset() >> TARGET_PAGE_BITS; |
730 | ||
731 | migration_bitmap = bitmap_new(ram_pages); | |
7ec81e56 | 732 | bitmap_set(migration_bitmap, 0, ram_pages); |
c6bf8e0e | 733 | migration_dirty_pages = ram_pages; |
7ca1dfad CV |
734 | mig_throttle_on = false; |
735 | dirty_rate_high_cnt = 0; | |
ad96090a | 736 | |
17ad9b35 | 737 | if (migrate_use_xbzrle()) { |
fd8cec93 | 738 | qemu_mutex_lock_iothread(); |
17ad9b35 OW |
739 | XBZRLE.cache = cache_init(migrate_xbzrle_cache_size() / |
740 | TARGET_PAGE_SIZE, | |
741 | TARGET_PAGE_SIZE); | |
742 | if (!XBZRLE.cache) { | |
fd8cec93 | 743 | qemu_mutex_unlock_iothread(); |
17ad9b35 OW |
744 | DPRINTF("Error creating cache\n"); |
745 | return -1; | |
746 | } | |
fd8cec93 GA |
747 | qemu_mutex_init(&XBZRLE.lock); |
748 | qemu_mutex_unlock_iothread(); | |
a17b2fd3 OW |
749 | |
750 | /* We prefer not to abort if there is no memory */ | |
751 | XBZRLE.encoded_buf = g_try_malloc0(TARGET_PAGE_SIZE); | |
752 | if (!XBZRLE.encoded_buf) { | |
753 | DPRINTF("Error allocating encoded_buf\n"); | |
754 | return -1; | |
755 | } | |
756 | ||
757 | XBZRLE.current_buf = g_try_malloc(TARGET_PAGE_SIZE); | |
758 | if (!XBZRLE.current_buf) { | |
759 | DPRINTF("Error allocating current_buf\n"); | |
760 | g_free(XBZRLE.encoded_buf); | |
761 | XBZRLE.encoded_buf = NULL; | |
762 | return -1; | |
763 | } | |
764 | ||
004d4c10 | 765 | acct_clear(); |
17ad9b35 OW |
766 | } |
767 | ||
9b095037 PB |
768 | qemu_mutex_lock_iothread(); |
769 | qemu_mutex_lock_ramlist(); | |
770 | bytes_transferred = 0; | |
771 | reset_ram_globals(); | |
772 | ||
d1315aac | 773 | memory_global_dirty_log_start(); |
c6bf8e0e | 774 | migration_bitmap_sync(); |
9b095037 | 775 | qemu_mutex_unlock_iothread(); |
ad96090a | 776 | |
d1315aac | 777 | qemu_put_be64(f, ram_bytes_total() | RAM_SAVE_FLAG_MEM_SIZE); |
97ab12d4 | 778 | |
a3161038 | 779 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
d1315aac JQ |
780 | qemu_put_byte(f, strlen(block->idstr)); |
781 | qemu_put_buffer(f, (uint8_t *)block->idstr, strlen(block->idstr)); | |
782 | qemu_put_be64(f, block->length); | |
ad96090a BS |
783 | } |
784 | ||
b2a8658e | 785 | qemu_mutex_unlock_ramlist(); |
0033b8b4 MH |
786 | |
787 | ram_control_before_iterate(f, RAM_CONTROL_SETUP); | |
788 | ram_control_after_iterate(f, RAM_CONTROL_SETUP); | |
789 | ||
d1315aac JQ |
790 | qemu_put_be64(f, RAM_SAVE_FLAG_EOS); |
791 | ||
792 | return 0; | |
793 | } | |
794 | ||
16310a3c | 795 | static int ram_save_iterate(QEMUFile *f, void *opaque) |
d1315aac | 796 | { |
d1315aac JQ |
797 | int ret; |
798 | int i; | |
e4ed1541 | 799 | int64_t t0; |
b823ceaa | 800 | int total_sent = 0; |
d1315aac | 801 | |
b2a8658e UD |
802 | qemu_mutex_lock_ramlist(); |
803 | ||
f798b07f UD |
804 | if (ram_list.version != last_version) { |
805 | reset_ram_globals(); | |
806 | } | |
807 | ||
0033b8b4 MH |
808 | ram_control_before_iterate(f, RAM_CONTROL_ROUND); |
809 | ||
bc72ad67 | 810 | t0 = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); |
4508bd9e | 811 | i = 0; |
2975725f | 812 | while ((ret = qemu_file_rate_limit(f)) == 0) { |
3fc250b4 | 813 | int bytes_sent; |
ad96090a | 814 | |
dd051c72 | 815 | bytes_sent = ram_save_block(f, false); |
6c779f22 | 816 | /* no more blocks to sent */ |
b823ceaa | 817 | if (bytes_sent == 0) { |
ad96090a BS |
818 | break; |
819 | } | |
b823ceaa | 820 | total_sent += bytes_sent; |
004d4c10 | 821 | acct_info.iterations++; |
7ca1dfad | 822 | check_guest_throttling(); |
4508bd9e JQ |
823 | /* we want to check in the 1st loop, just in case it was the 1st time |
824 | and we had to sync the dirty bitmap. | |
825 | qemu_get_clock_ns() is a bit expensive, so we only check each some | |
826 | iterations | |
827 | */ | |
828 | if ((i & 63) == 0) { | |
bc72ad67 | 829 | uint64_t t1 = (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - t0) / 1000000; |
4508bd9e | 830 | if (t1 > MAX_WAIT) { |
ef37a699 | 831 | DPRINTF("big wait: %" PRIu64 " milliseconds, %d iterations\n", |
4508bd9e JQ |
832 | t1, i); |
833 | break; | |
834 | } | |
835 | } | |
836 | i++; | |
ad96090a BS |
837 | } |
838 | ||
fb3409de PB |
839 | qemu_mutex_unlock_ramlist(); |
840 | ||
0033b8b4 MH |
841 | /* |
842 | * Must occur before EOS (or any QEMUFile operation) | |
843 | * because of RDMA protocol. | |
844 | */ | |
845 | ram_control_after_iterate(f, RAM_CONTROL_ROUND); | |
846 | ||
6cd0beda LL |
847 | bytes_transferred += total_sent; |
848 | ||
849 | /* | |
850 | * Do not count these 8 bytes into total_sent, so that we can | |
851 | * return 0 if no page had been dirtied. | |
852 | */ | |
853 | qemu_put_be64(f, RAM_SAVE_FLAG_EOS); | |
854 | bytes_transferred += 8; | |
855 | ||
856 | ret = qemu_file_get_error(f); | |
2975725f JQ |
857 | if (ret < 0) { |
858 | return ret; | |
859 | } | |
860 | ||
b823ceaa | 861 | return total_sent; |
16310a3c JQ |
862 | } |
863 | ||
864 | static int ram_save_complete(QEMUFile *f, void *opaque) | |
865 | { | |
b2a8658e | 866 | qemu_mutex_lock_ramlist(); |
9c339485 | 867 | migration_bitmap_sync(); |
b2a8658e | 868 | |
0033b8b4 MH |
869 | ram_control_before_iterate(f, RAM_CONTROL_FINISH); |
870 | ||
ad96090a | 871 | /* try transferring iterative blocks of memory */ |
3a697f69 | 872 | |
16310a3c | 873 | /* flush all remaining blocks regardless of rate limiting */ |
6c779f22 | 874 | while (true) { |
3fc250b4 PR |
875 | int bytes_sent; |
876 | ||
dd051c72 | 877 | bytes_sent = ram_save_block(f, true); |
6c779f22 | 878 | /* no more blocks to sent */ |
b823ceaa | 879 | if (bytes_sent == 0) { |
6c779f22 | 880 | break; |
ad96090a | 881 | } |
16310a3c | 882 | bytes_transferred += bytes_sent; |
ad96090a | 883 | } |
0033b8b4 MH |
884 | |
885 | ram_control_after_iterate(f, RAM_CONTROL_FINISH); | |
244eaa75 | 886 | migration_end(); |
ad96090a | 887 | |
b2a8658e | 888 | qemu_mutex_unlock_ramlist(); |
ad96090a BS |
889 | qemu_put_be64(f, RAM_SAVE_FLAG_EOS); |
890 | ||
5b3c9638 | 891 | return 0; |
ad96090a BS |
892 | } |
893 | ||
e4ed1541 JQ |
894 | static uint64_t ram_save_pending(QEMUFile *f, void *opaque, uint64_t max_size) |
895 | { | |
896 | uint64_t remaining_size; | |
897 | ||
898 | remaining_size = ram_save_remaining() * TARGET_PAGE_SIZE; | |
899 | ||
900 | if (remaining_size < max_size) { | |
32c835ba | 901 | qemu_mutex_lock_iothread(); |
e4ed1541 | 902 | migration_bitmap_sync(); |
32c835ba | 903 | qemu_mutex_unlock_iothread(); |
e4ed1541 JQ |
904 | remaining_size = ram_save_remaining() * TARGET_PAGE_SIZE; |
905 | } | |
906 | return remaining_size; | |
907 | } | |
908 | ||
17ad9b35 OW |
909 | static int load_xbzrle(QEMUFile *f, ram_addr_t addr, void *host) |
910 | { | |
911 | int ret, rc = 0; | |
912 | unsigned int xh_len; | |
913 | int xh_flags; | |
914 | ||
905f26f2 GA |
915 | if (!xbzrle_decoded_buf) { |
916 | xbzrle_decoded_buf = g_malloc(TARGET_PAGE_SIZE); | |
17ad9b35 OW |
917 | } |
918 | ||
919 | /* extract RLE header */ | |
920 | xh_flags = qemu_get_byte(f); | |
921 | xh_len = qemu_get_be16(f); | |
922 | ||
923 | if (xh_flags != ENCODING_FLAG_XBZRLE) { | |
924 | fprintf(stderr, "Failed to load XBZRLE page - wrong compression!\n"); | |
925 | return -1; | |
926 | } | |
927 | ||
928 | if (xh_len > TARGET_PAGE_SIZE) { | |
929 | fprintf(stderr, "Failed to load XBZRLE page - len overflow!\n"); | |
930 | return -1; | |
931 | } | |
932 | /* load data and decode */ | |
905f26f2 | 933 | qemu_get_buffer(f, xbzrle_decoded_buf, xh_len); |
17ad9b35 OW |
934 | |
935 | /* decode RLE */ | |
905f26f2 | 936 | ret = xbzrle_decode_buffer(xbzrle_decoded_buf, xh_len, host, |
17ad9b35 OW |
937 | TARGET_PAGE_SIZE); |
938 | if (ret == -1) { | |
939 | fprintf(stderr, "Failed to load XBZRLE page - decode error!\n"); | |
940 | rc = -1; | |
941 | } else if (ret > TARGET_PAGE_SIZE) { | |
942 | fprintf(stderr, "Failed to load XBZRLE page - size %d exceeds %d!\n", | |
943 | ret, TARGET_PAGE_SIZE); | |
944 | abort(); | |
945 | } | |
946 | ||
947 | return rc; | |
948 | } | |
949 | ||
a55bbe31 AW |
950 | static inline void *host_from_stream_offset(QEMUFile *f, |
951 | ram_addr_t offset, | |
952 | int flags) | |
953 | { | |
954 | static RAMBlock *block = NULL; | |
955 | char id[256]; | |
956 | uint8_t len; | |
957 | ||
958 | if (flags & RAM_SAVE_FLAG_CONTINUE) { | |
959 | if (!block) { | |
960 | fprintf(stderr, "Ack, bad migration stream!\n"); | |
961 | return NULL; | |
962 | } | |
963 | ||
dc94a7ed | 964 | return memory_region_get_ram_ptr(block->mr) + offset; |
a55bbe31 AW |
965 | } |
966 | ||
967 | len = qemu_get_byte(f); | |
968 | qemu_get_buffer(f, (uint8_t *)id, len); | |
969 | id[len] = 0; | |
970 | ||
a3161038 | 971 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
a55bbe31 | 972 | if (!strncmp(id, block->idstr, sizeof(id))) |
dc94a7ed | 973 | return memory_region_get_ram_ptr(block->mr) + offset; |
a55bbe31 AW |
974 | } |
975 | ||
976 | fprintf(stderr, "Can't find block %s!\n", id); | |
977 | return NULL; | |
978 | } | |
979 | ||
44c3b58c MH |
980 | /* |
981 | * If a page (or a whole RDMA chunk) has been | |
982 | * determined to be zero, then zap it. | |
983 | */ | |
984 | void ram_handle_compressed(void *host, uint8_t ch, uint64_t size) | |
985 | { | |
d613a56f | 986 | if (ch != 0 || !is_zero_range(host, size)) { |
44c3b58c | 987 | memset(host, ch, size); |
44c3b58c MH |
988 | } |
989 | } | |
990 | ||
7908c78d | 991 | static int ram_load(QEMUFile *f, void *opaque, int version_id) |
ad96090a BS |
992 | { |
993 | ram_addr_t addr; | |
3a697f69 | 994 | int flags, ret = 0; |
42802d47 | 995 | int error; |
3a697f69 OW |
996 | static uint64_t seq_iter; |
997 | ||
998 | seq_iter++; | |
ad96090a | 999 | |
f09f2189 | 1000 | if (version_id < 4 || version_id > 4) { |
ad96090a BS |
1001 | return -EINVAL; |
1002 | } | |
1003 | ||
1004 | do { | |
1005 | addr = qemu_get_be64(f); | |
1006 | ||
1007 | flags = addr & ~TARGET_PAGE_MASK; | |
1008 | addr &= TARGET_PAGE_MASK; | |
1009 | ||
1010 | if (flags & RAM_SAVE_FLAG_MEM_SIZE) { | |
f09f2189 | 1011 | if (version_id == 4) { |
97ab12d4 AW |
1012 | /* Synchronize RAM block list */ |
1013 | char id[256]; | |
1014 | ram_addr_t length; | |
1015 | ram_addr_t total_ram_bytes = addr; | |
1016 | ||
1017 | while (total_ram_bytes) { | |
1018 | RAMBlock *block; | |
1019 | uint8_t len; | |
1020 | ||
1021 | len = qemu_get_byte(f); | |
1022 | qemu_get_buffer(f, (uint8_t *)id, len); | |
1023 | id[len] = 0; | |
1024 | length = qemu_get_be64(f); | |
1025 | ||
a3161038 | 1026 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
97ab12d4 | 1027 | if (!strncmp(id, block->idstr, sizeof(id))) { |
3a697f69 | 1028 | if (block->length != length) { |
6bedfe94 SW |
1029 | fprintf(stderr, |
1030 | "Length mismatch: %s: " RAM_ADDR_FMT | |
1031 | " in != " RAM_ADDR_FMT "\n", id, length, | |
87d2f825 | 1032 | block->length); |
3a697f69 OW |
1033 | ret = -EINVAL; |
1034 | goto done; | |
1035 | } | |
97ab12d4 AW |
1036 | break; |
1037 | } | |
1038 | } | |
1039 | ||
1040 | if (!block) { | |
fb787f81 AW |
1041 | fprintf(stderr, "Unknown ramblock \"%s\", cannot " |
1042 | "accept migration\n", id); | |
3a697f69 OW |
1043 | ret = -EINVAL; |
1044 | goto done; | |
97ab12d4 AW |
1045 | } |
1046 | ||
1047 | total_ram_bytes -= length; | |
1048 | } | |
ad96090a BS |
1049 | } |
1050 | } | |
1051 | ||
1052 | if (flags & RAM_SAVE_FLAG_COMPRESS) { | |
97ab12d4 AW |
1053 | void *host; |
1054 | uint8_t ch; | |
1055 | ||
f09f2189 | 1056 | host = host_from_stream_offset(f, addr, flags); |
492fb99c MT |
1057 | if (!host) { |
1058 | return -EINVAL; | |
1059 | } | |
97ab12d4 | 1060 | |
97ab12d4 | 1061 | ch = qemu_get_byte(f); |
44c3b58c | 1062 | ram_handle_compressed(host, ch, TARGET_PAGE_SIZE); |
ad96090a | 1063 | } else if (flags & RAM_SAVE_FLAG_PAGE) { |
97ab12d4 AW |
1064 | void *host; |
1065 | ||
f09f2189 | 1066 | host = host_from_stream_offset(f, addr, flags); |
0ff1f9f5 OW |
1067 | if (!host) { |
1068 | return -EINVAL; | |
1069 | } | |
97ab12d4 | 1070 | |
97ab12d4 | 1071 | qemu_get_buffer(f, host, TARGET_PAGE_SIZE); |
17ad9b35 | 1072 | } else if (flags & RAM_SAVE_FLAG_XBZRLE) { |
17ad9b35 OW |
1073 | void *host = host_from_stream_offset(f, addr, flags); |
1074 | if (!host) { | |
1075 | return -EINVAL; | |
1076 | } | |
1077 | ||
1078 | if (load_xbzrle(f, addr, host) < 0) { | |
1079 | ret = -EINVAL; | |
1080 | goto done; | |
1081 | } | |
0033b8b4 MH |
1082 | } else if (flags & RAM_SAVE_FLAG_HOOK) { |
1083 | ram_control_load_hook(f, flags); | |
ad96090a | 1084 | } |
42802d47 JQ |
1085 | error = qemu_file_get_error(f); |
1086 | if (error) { | |
3a697f69 OW |
1087 | ret = error; |
1088 | goto done; | |
ad96090a BS |
1089 | } |
1090 | } while (!(flags & RAM_SAVE_FLAG_EOS)); | |
1091 | ||
3a697f69 | 1092 | done: |
ef37a699 IM |
1093 | DPRINTF("Completed load of VM with exit code %d seq iteration " |
1094 | "%" PRIu64 "\n", ret, seq_iter); | |
3a697f69 | 1095 | return ret; |
ad96090a BS |
1096 | } |
1097 | ||
7908c78d | 1098 | SaveVMHandlers savevm_ram_handlers = { |
d1315aac | 1099 | .save_live_setup = ram_save_setup, |
16310a3c JQ |
1100 | .save_live_iterate = ram_save_iterate, |
1101 | .save_live_complete = ram_save_complete, | |
e4ed1541 | 1102 | .save_live_pending = ram_save_pending, |
7908c78d | 1103 | .load_state = ram_load, |
9b5bfab0 | 1104 | .cancel = ram_migration_cancel, |
7908c78d JQ |
1105 | }; |
1106 | ||
0dfa5ef9 IY |
1107 | struct soundhw { |
1108 | const char *name; | |
1109 | const char *descr; | |
1110 | int enabled; | |
1111 | int isa; | |
1112 | union { | |
4a0f031d | 1113 | int (*init_isa) (ISABus *bus); |
0dfa5ef9 IY |
1114 | int (*init_pci) (PCIBus *bus); |
1115 | } init; | |
1116 | }; | |
1117 | ||
36cd6f6f PB |
1118 | static struct soundhw soundhw[9]; |
1119 | static int soundhw_count; | |
ad96090a | 1120 | |
36cd6f6f PB |
1121 | void isa_register_soundhw(const char *name, const char *descr, |
1122 | int (*init_isa)(ISABus *bus)) | |
1123 | { | |
1124 | assert(soundhw_count < ARRAY_SIZE(soundhw) - 1); | |
1125 | soundhw[soundhw_count].name = name; | |
1126 | soundhw[soundhw_count].descr = descr; | |
1127 | soundhw[soundhw_count].isa = 1; | |
1128 | soundhw[soundhw_count].init.init_isa = init_isa; | |
1129 | soundhw_count++; | |
1130 | } | |
ad96090a | 1131 | |
36cd6f6f PB |
1132 | void pci_register_soundhw(const char *name, const char *descr, |
1133 | int (*init_pci)(PCIBus *bus)) | |
1134 | { | |
1135 | assert(soundhw_count < ARRAY_SIZE(soundhw) - 1); | |
1136 | soundhw[soundhw_count].name = name; | |
1137 | soundhw[soundhw_count].descr = descr; | |
1138 | soundhw[soundhw_count].isa = 0; | |
1139 | soundhw[soundhw_count].init.init_pci = init_pci; | |
1140 | soundhw_count++; | |
1141 | } | |
ad96090a BS |
1142 | |
1143 | void select_soundhw(const char *optarg) | |
1144 | { | |
1145 | struct soundhw *c; | |
1146 | ||
c8057f95 | 1147 | if (is_help_option(optarg)) { |
ad96090a BS |
1148 | show_valid_cards: |
1149 | ||
36cd6f6f PB |
1150 | if (soundhw_count) { |
1151 | printf("Valid sound card names (comma separated):\n"); | |
1152 | for (c = soundhw; c->name; ++c) { | |
1153 | printf ("%-11s %s\n", c->name, c->descr); | |
1154 | } | |
1155 | printf("\n-soundhw all will enable all of the above\n"); | |
1156 | } else { | |
1157 | printf("Machine has no user-selectable audio hardware " | |
1158 | "(it may or may not have always-present audio hardware).\n"); | |
ad96090a | 1159 | } |
c8057f95 | 1160 | exit(!is_help_option(optarg)); |
ad96090a BS |
1161 | } |
1162 | else { | |
1163 | size_t l; | |
1164 | const char *p; | |
1165 | char *e; | |
1166 | int bad_card = 0; | |
1167 | ||
1168 | if (!strcmp(optarg, "all")) { | |
1169 | for (c = soundhw; c->name; ++c) { | |
1170 | c->enabled = 1; | |
1171 | } | |
1172 | return; | |
1173 | } | |
1174 | ||
1175 | p = optarg; | |
1176 | while (*p) { | |
1177 | e = strchr(p, ','); | |
1178 | l = !e ? strlen(p) : (size_t) (e - p); | |
1179 | ||
1180 | for (c = soundhw; c->name; ++c) { | |
1181 | if (!strncmp(c->name, p, l) && !c->name[l]) { | |
1182 | c->enabled = 1; | |
1183 | break; | |
1184 | } | |
1185 | } | |
1186 | ||
1187 | if (!c->name) { | |
1188 | if (l > 80) { | |
1189 | fprintf(stderr, | |
1190 | "Unknown sound card name (too big to show)\n"); | |
1191 | } | |
1192 | else { | |
1193 | fprintf(stderr, "Unknown sound card name `%.*s'\n", | |
1194 | (int) l, p); | |
1195 | } | |
1196 | bad_card = 1; | |
1197 | } | |
1198 | p += l + (e != NULL); | |
1199 | } | |
1200 | ||
1201 | if (bad_card) { | |
1202 | goto show_valid_cards; | |
1203 | } | |
1204 | } | |
1205 | } | |
0dfa5ef9 | 1206 | |
f81222bc | 1207 | void audio_init(void) |
0dfa5ef9 IY |
1208 | { |
1209 | struct soundhw *c; | |
f81222bc PB |
1210 | ISABus *isa_bus = (ISABus *) object_resolve_path_type("", TYPE_ISA_BUS, NULL); |
1211 | PCIBus *pci_bus = (PCIBus *) object_resolve_path_type("", TYPE_PCI_BUS, NULL); | |
0dfa5ef9 IY |
1212 | |
1213 | for (c = soundhw; c->name; ++c) { | |
1214 | if (c->enabled) { | |
1215 | if (c->isa) { | |
f81222bc PB |
1216 | if (!isa_bus) { |
1217 | fprintf(stderr, "ISA bus not available for %s\n", c->name); | |
1218 | exit(1); | |
0dfa5ef9 | 1219 | } |
f81222bc | 1220 | c->init.init_isa(isa_bus); |
0dfa5ef9 | 1221 | } else { |
f81222bc PB |
1222 | if (!pci_bus) { |
1223 | fprintf(stderr, "PCI bus not available for %s\n", c->name); | |
1224 | exit(1); | |
0dfa5ef9 | 1225 | } |
f81222bc | 1226 | c->init.init_pci(pci_bus); |
0dfa5ef9 IY |
1227 | } |
1228 | } | |
1229 | } | |
1230 | } | |
ad96090a BS |
1231 | |
1232 | int qemu_uuid_parse(const char *str, uint8_t *uuid) | |
1233 | { | |
1234 | int ret; | |
1235 | ||
1236 | if (strlen(str) != 36) { | |
1237 | return -1; | |
1238 | } | |
1239 | ||
1240 | ret = sscanf(str, UUID_FMT, &uuid[0], &uuid[1], &uuid[2], &uuid[3], | |
1241 | &uuid[4], &uuid[5], &uuid[6], &uuid[7], &uuid[8], &uuid[9], | |
1242 | &uuid[10], &uuid[11], &uuid[12], &uuid[13], &uuid[14], | |
1243 | &uuid[15]); | |
1244 | ||
1245 | if (ret != 16) { | |
1246 | return -1; | |
1247 | } | |
ad96090a BS |
1248 | return 0; |
1249 | } | |
1250 | ||
0c764a9d | 1251 | void do_acpitable_option(const QemuOpts *opts) |
ad96090a BS |
1252 | { |
1253 | #ifdef TARGET_I386 | |
23084327 LE |
1254 | Error *err = NULL; |
1255 | ||
1256 | acpi_table_add(opts, &err); | |
1257 | if (err) { | |
4a44d85e SA |
1258 | error_report("Wrong acpi table provided: %s", |
1259 | error_get_pretty(err)); | |
23084327 | 1260 | error_free(err); |
ad96090a BS |
1261 | exit(1); |
1262 | } | |
1263 | #endif | |
1264 | } | |
1265 | ||
4f953d2f | 1266 | void do_smbios_option(QemuOpts *opts) |
ad96090a BS |
1267 | { |
1268 | #ifdef TARGET_I386 | |
4f953d2f | 1269 | smbios_entry_add(opts); |
ad96090a BS |
1270 | #endif |
1271 | } | |
1272 | ||
1273 | void cpudef_init(void) | |
1274 | { | |
1275 | #if defined(cpudef_setup) | |
1276 | cpudef_setup(); /* parse cpu definitions in target config file */ | |
1277 | #endif | |
1278 | } | |
1279 | ||
303d4e86 AP |
1280 | int tcg_available(void) |
1281 | { | |
1282 | return 1; | |
1283 | } | |
1284 | ||
ad96090a BS |
1285 | int kvm_available(void) |
1286 | { | |
1287 | #ifdef CONFIG_KVM | |
1288 | return 1; | |
1289 | #else | |
1290 | return 0; | |
1291 | #endif | |
1292 | } | |
1293 | ||
1294 | int xen_available(void) | |
1295 | { | |
1296 | #ifdef CONFIG_XEN | |
1297 | return 1; | |
1298 | #else | |
1299 | return 0; | |
1300 | #endif | |
1301 | } | |
99afc91d DB |
1302 | |
1303 | ||
1304 | TargetInfo *qmp_query_target(Error **errp) | |
1305 | { | |
1306 | TargetInfo *info = g_malloc0(sizeof(*info)); | |
1307 | ||
c02a9552 | 1308 | info->arch = g_strdup(TARGET_NAME); |
99afc91d DB |
1309 | |
1310 | return info; | |
1311 | } | |
7ca1dfad CV |
1312 | |
1313 | /* Stub function that's gets run on the vcpu when its brought out of the | |
1314 | VM to run inside qemu via async_run_on_cpu()*/ | |
1315 | static void mig_sleep_cpu(void *opq) | |
1316 | { | |
1317 | qemu_mutex_unlock_iothread(); | |
1318 | g_usleep(30*1000); | |
1319 | qemu_mutex_lock_iothread(); | |
1320 | } | |
1321 | ||
1322 | /* To reduce the dirty rate explicitly disallow the VCPUs from spending | |
1323 | much time in the VM. The migration thread will try to catchup. | |
1324 | Workload will experience a performance drop. | |
1325 | */ | |
7ca1dfad CV |
1326 | static void mig_throttle_guest_down(void) |
1327 | { | |
38fcbd3f AF |
1328 | CPUState *cpu; |
1329 | ||
7ca1dfad | 1330 | qemu_mutex_lock_iothread(); |
38fcbd3f AF |
1331 | CPU_FOREACH(cpu) { |
1332 | async_run_on_cpu(cpu, mig_sleep_cpu, NULL); | |
1333 | } | |
7ca1dfad CV |
1334 | qemu_mutex_unlock_iothread(); |
1335 | } | |
1336 | ||
1337 | static void check_guest_throttling(void) | |
1338 | { | |
1339 | static int64_t t0; | |
1340 | int64_t t1; | |
1341 | ||
1342 | if (!mig_throttle_on) { | |
1343 | return; | |
1344 | } | |
1345 | ||
1346 | if (!t0) { | |
bc72ad67 | 1347 | t0 = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); |
7ca1dfad CV |
1348 | return; |
1349 | } | |
1350 | ||
bc72ad67 | 1351 | t1 = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); |
7ca1dfad CV |
1352 | |
1353 | /* If it has been more than 40 ms since the last time the guest | |
1354 | * was throttled then do it again. | |
1355 | */ | |
1356 | if (40 < (t1-t0)/1000000) { | |
1357 | mig_throttle_guest_down(); | |
1358 | t0 = t1; | |
1359 | } | |
1360 | } |