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ad96090a BS |
1 | /* |
2 | * QEMU System Emulator | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | #include <stdint.h> | |
25 | #include <stdarg.h> | |
b2e0a138 | 26 | #include <stdlib.h> |
ad96090a | 27 | #ifndef _WIN32 |
1c47cb16 | 28 | #include <sys/types.h> |
ad96090a BS |
29 | #include <sys/mman.h> |
30 | #endif | |
31 | #include "config.h" | |
83c9089e | 32 | #include "monitor/monitor.h" |
9c17d615 | 33 | #include "sysemu/sysemu.h" |
1de7afc9 PB |
34 | #include "qemu/bitops.h" |
35 | #include "qemu/bitmap.h" | |
9c17d615 | 36 | #include "sysemu/arch_init.h" |
ad96090a | 37 | #include "audio/audio.h" |
0d09e41a | 38 | #include "hw/i386/pc.h" |
a2cb15b0 | 39 | #include "hw/pci/pci.h" |
0d09e41a | 40 | #include "hw/audio/audio.h" |
9c17d615 | 41 | #include "sysemu/kvm.h" |
caf71f86 | 42 | #include "migration/migration.h" |
0d09e41a | 43 | #include "hw/i386/smbios.h" |
022c62cb | 44 | #include "exec/address-spaces.h" |
0d09e41a | 45 | #include "hw/audio/pcspk.h" |
caf71f86 | 46 | #include "migration/page_cache.h" |
1de7afc9 | 47 | #include "qemu/config-file.h" |
d97326ee | 48 | #include "qemu/error-report.h" |
99afc91d | 49 | #include "qmp-commands.h" |
3c12193d | 50 | #include "trace.h" |
0d6d3c87 | 51 | #include "exec/cpu-all.h" |
12291ec1 | 52 | #include "exec/ram_addr.h" |
0445259b | 53 | #include "hw/acpi/acpi.h" |
aa8dc044 | 54 | #include "qemu/host-utils.h" |
ad96090a | 55 | |
3a697f69 OW |
56 | #ifdef DEBUG_ARCH_INIT |
57 | #define DPRINTF(fmt, ...) \ | |
58 | do { fprintf(stdout, "arch_init: " fmt, ## __VA_ARGS__); } while (0) | |
59 | #else | |
60 | #define DPRINTF(fmt, ...) \ | |
61 | do { } while (0) | |
62 | #endif | |
63 | ||
ad96090a BS |
64 | #ifdef TARGET_SPARC |
65 | int graphic_width = 1024; | |
66 | int graphic_height = 768; | |
67 | int graphic_depth = 8; | |
68 | #else | |
69 | int graphic_width = 800; | |
70 | int graphic_height = 600; | |
f1ff0e89 | 71 | int graphic_depth = 32; |
ad96090a BS |
72 | #endif |
73 | ||
ad96090a BS |
74 | |
75 | #if defined(TARGET_ALPHA) | |
76 | #define QEMU_ARCH QEMU_ARCH_ALPHA | |
77 | #elif defined(TARGET_ARM) | |
78 | #define QEMU_ARCH QEMU_ARCH_ARM | |
79 | #elif defined(TARGET_CRIS) | |
80 | #define QEMU_ARCH QEMU_ARCH_CRIS | |
81 | #elif defined(TARGET_I386) | |
82 | #define QEMU_ARCH QEMU_ARCH_I386 | |
83 | #elif defined(TARGET_M68K) | |
84 | #define QEMU_ARCH QEMU_ARCH_M68K | |
81ea0e13 MW |
85 | #elif defined(TARGET_LM32) |
86 | #define QEMU_ARCH QEMU_ARCH_LM32 | |
ad96090a BS |
87 | #elif defined(TARGET_MICROBLAZE) |
88 | #define QEMU_ARCH QEMU_ARCH_MICROBLAZE | |
89 | #elif defined(TARGET_MIPS) | |
90 | #define QEMU_ARCH QEMU_ARCH_MIPS | |
d15a9c23 AG |
91 | #elif defined(TARGET_MOXIE) |
92 | #define QEMU_ARCH QEMU_ARCH_MOXIE | |
e67db06e JL |
93 | #elif defined(TARGET_OPENRISC) |
94 | #define QEMU_ARCH QEMU_ARCH_OPENRISC | |
ad96090a BS |
95 | #elif defined(TARGET_PPC) |
96 | #define QEMU_ARCH QEMU_ARCH_PPC | |
97 | #elif defined(TARGET_S390X) | |
98 | #define QEMU_ARCH QEMU_ARCH_S390X | |
99 | #elif defined(TARGET_SH4) | |
100 | #define QEMU_ARCH QEMU_ARCH_SH4 | |
101 | #elif defined(TARGET_SPARC) | |
102 | #define QEMU_ARCH QEMU_ARCH_SPARC | |
2328826b MF |
103 | #elif defined(TARGET_XTENSA) |
104 | #define QEMU_ARCH QEMU_ARCH_XTENSA | |
4f23a1e6 GX |
105 | #elif defined(TARGET_UNICORE32) |
106 | #define QEMU_ARCH QEMU_ARCH_UNICORE32 | |
ad96090a BS |
107 | #endif |
108 | ||
109 | const uint32_t arch_type = QEMU_ARCH; | |
7ca1dfad CV |
110 | static bool mig_throttle_on; |
111 | static int dirty_rate_high_cnt; | |
112 | static void check_guest_throttling(void); | |
ad96090a | 113 | |
71411d35 C |
114 | static uint64_t bitmap_sync_count; |
115 | ||
ad96090a BS |
116 | /***********************************************************/ |
117 | /* ram save/restore */ | |
118 | ||
d20878d2 YT |
119 | #define RAM_SAVE_FLAG_FULL 0x01 /* Obsolete, not used anymore */ |
120 | #define RAM_SAVE_FLAG_COMPRESS 0x02 | |
121 | #define RAM_SAVE_FLAG_MEM_SIZE 0x04 | |
122 | #define RAM_SAVE_FLAG_PAGE 0x08 | |
123 | #define RAM_SAVE_FLAG_EOS 0x10 | |
124 | #define RAM_SAVE_FLAG_CONTINUE 0x20 | |
17ad9b35 | 125 | #define RAM_SAVE_FLAG_XBZRLE 0x40 |
0033b8b4 | 126 | /* 0x80 is reserved in migration.h start with 0x100 next */ |
ad96090a | 127 | |
756557de EH |
128 | static struct defconfig_file { |
129 | const char *filename; | |
f29a5614 EH |
130 | /* Indicates it is an user config file (disabled by -no-user-config) */ |
131 | bool userconfig; | |
756557de | 132 | } default_config_files[] = { |
f29a5614 | 133 | { CONFIG_QEMU_CONFDIR "/qemu.conf", true }, |
2e59915d | 134 | { CONFIG_QEMU_CONFDIR "/target-" TARGET_NAME ".conf", true }, |
756557de EH |
135 | { NULL }, /* end of list */ |
136 | }; | |
137 | ||
6d3cb1f9 | 138 | static const uint8_t ZERO_TARGET_PAGE[TARGET_PAGE_SIZE]; |
756557de | 139 | |
f29a5614 | 140 | int qemu_read_default_config_files(bool userconfig) |
b5a8fe5e EH |
141 | { |
142 | int ret; | |
756557de | 143 | struct defconfig_file *f; |
b5a8fe5e | 144 | |
756557de | 145 | for (f = default_config_files; f->filename; f++) { |
f29a5614 EH |
146 | if (!userconfig && f->userconfig) { |
147 | continue; | |
148 | } | |
756557de EH |
149 | ret = qemu_read_config_file(f->filename); |
150 | if (ret < 0 && ret != -ENOENT) { | |
151 | return ret; | |
152 | } | |
b5a8fe5e | 153 | } |
4d8b3c63 | 154 | |
b5a8fe5e EH |
155 | return 0; |
156 | } | |
157 | ||
dc3c26a4 | 158 | static inline bool is_zero_range(uint8_t *p, uint64_t size) |
ad96090a | 159 | { |
dc3c26a4 | 160 | return buffer_find_nonzero_offset(p, size) == size; |
ad96090a BS |
161 | } |
162 | ||
17ad9b35 OW |
163 | /* struct contains XBZRLE cache and a static page |
164 | used by the compression */ | |
165 | static struct { | |
166 | /* buffer used for XBZRLE encoding */ | |
167 | uint8_t *encoded_buf; | |
168 | /* buffer for storing page content */ | |
169 | uint8_t *current_buf; | |
fd8cec93 | 170 | /* Cache for XBZRLE, Protected by lock. */ |
17ad9b35 | 171 | PageCache *cache; |
fd8cec93 | 172 | QemuMutex lock; |
d97326ee DDAG |
173 | } XBZRLE; |
174 | ||
905f26f2 GA |
175 | /* buffer used for XBZRLE decoding */ |
176 | static uint8_t *xbzrle_decoded_buf; | |
9e1ba4cc | 177 | |
fd8cec93 GA |
178 | static void XBZRLE_cache_lock(void) |
179 | { | |
180 | if (migrate_use_xbzrle()) | |
181 | qemu_mutex_lock(&XBZRLE.lock); | |
182 | } | |
183 | ||
184 | static void XBZRLE_cache_unlock(void) | |
185 | { | |
186 | if (migrate_use_xbzrle()) | |
187 | qemu_mutex_unlock(&XBZRLE.lock); | |
188 | } | |
189 | ||
d97326ee DDAG |
190 | /* |
191 | * called from qmp_migrate_set_cache_size in main thread, possibly while | |
192 | * a migration is in progress. | |
193 | * A running migration maybe using the cache and might finish during this | |
194 | * call, hence changes to the cache are protected by XBZRLE.lock(). | |
195 | */ | |
9e1ba4cc OW |
196 | int64_t xbzrle_cache_resize(int64_t new_size) |
197 | { | |
d97326ee DDAG |
198 | PageCache *new_cache; |
199 | int64_t ret; | |
fd8cec93 | 200 | |
c91e681a OW |
201 | if (new_size < TARGET_PAGE_SIZE) { |
202 | return -1; | |
203 | } | |
204 | ||
d97326ee DDAG |
205 | XBZRLE_cache_lock(); |
206 | ||
9e1ba4cc | 207 | if (XBZRLE.cache != NULL) { |
fd8cec93 | 208 | if (pow2floor(new_size) == migrate_xbzrle_cache_size()) { |
d97326ee | 209 | goto out_new_size; |
fd8cec93 GA |
210 | } |
211 | new_cache = cache_init(new_size / TARGET_PAGE_SIZE, | |
212 | TARGET_PAGE_SIZE); | |
213 | if (!new_cache) { | |
d97326ee DDAG |
214 | error_report("Error creating cache"); |
215 | ret = -1; | |
216 | goto out; | |
fd8cec93 | 217 | } |
fd8cec93 | 218 | |
d97326ee DDAG |
219 | cache_fini(XBZRLE.cache); |
220 | XBZRLE.cache = new_cache; | |
9e1ba4cc | 221 | } |
fd8cec93 | 222 | |
d97326ee DDAG |
223 | out_new_size: |
224 | ret = pow2floor(new_size); | |
225 | out: | |
226 | XBZRLE_cache_unlock(); | |
227 | return ret; | |
9e1ba4cc OW |
228 | } |
229 | ||
004d4c10 OW |
230 | /* accounting for migration statistics */ |
231 | typedef struct AccountingInfo { | |
232 | uint64_t dup_pages; | |
f1c72795 | 233 | uint64_t skipped_pages; |
004d4c10 OW |
234 | uint64_t norm_pages; |
235 | uint64_t iterations; | |
f36d55af OW |
236 | uint64_t xbzrle_bytes; |
237 | uint64_t xbzrle_pages; | |
238 | uint64_t xbzrle_cache_miss; | |
8bc39233 | 239 | double xbzrle_cache_miss_rate; |
f36d55af | 240 | uint64_t xbzrle_overflows; |
004d4c10 OW |
241 | } AccountingInfo; |
242 | ||
243 | static AccountingInfo acct_info; | |
244 | ||
245 | static void acct_clear(void) | |
246 | { | |
247 | memset(&acct_info, 0, sizeof(acct_info)); | |
248 | } | |
249 | ||
250 | uint64_t dup_mig_bytes_transferred(void) | |
251 | { | |
252 | return acct_info.dup_pages * TARGET_PAGE_SIZE; | |
253 | } | |
254 | ||
255 | uint64_t dup_mig_pages_transferred(void) | |
256 | { | |
257 | return acct_info.dup_pages; | |
258 | } | |
259 | ||
f1c72795 PL |
260 | uint64_t skipped_mig_bytes_transferred(void) |
261 | { | |
262 | return acct_info.skipped_pages * TARGET_PAGE_SIZE; | |
263 | } | |
264 | ||
265 | uint64_t skipped_mig_pages_transferred(void) | |
266 | { | |
267 | return acct_info.skipped_pages; | |
268 | } | |
269 | ||
004d4c10 OW |
270 | uint64_t norm_mig_bytes_transferred(void) |
271 | { | |
272 | return acct_info.norm_pages * TARGET_PAGE_SIZE; | |
273 | } | |
274 | ||
275 | uint64_t norm_mig_pages_transferred(void) | |
276 | { | |
277 | return acct_info.norm_pages; | |
278 | } | |
279 | ||
f36d55af OW |
280 | uint64_t xbzrle_mig_bytes_transferred(void) |
281 | { | |
282 | return acct_info.xbzrle_bytes; | |
283 | } | |
284 | ||
285 | uint64_t xbzrle_mig_pages_transferred(void) | |
286 | { | |
287 | return acct_info.xbzrle_pages; | |
288 | } | |
289 | ||
290 | uint64_t xbzrle_mig_pages_cache_miss(void) | |
291 | { | |
292 | return acct_info.xbzrle_cache_miss; | |
293 | } | |
294 | ||
8bc39233 C |
295 | double xbzrle_mig_cache_miss_rate(void) |
296 | { | |
297 | return acct_info.xbzrle_cache_miss_rate; | |
298 | } | |
299 | ||
f36d55af OW |
300 | uint64_t xbzrle_mig_pages_overflow(void) |
301 | { | |
302 | return acct_info.xbzrle_overflows; | |
303 | } | |
304 | ||
3f7d7b09 JQ |
305 | static size_t save_block_hdr(QEMUFile *f, RAMBlock *block, ram_addr_t offset, |
306 | int cont, int flag) | |
0c51f43d | 307 | { |
3f7d7b09 JQ |
308 | size_t size; |
309 | ||
310 | qemu_put_be64(f, offset | cont | flag); | |
311 | size = 8; | |
0c51f43d | 312 | |
3f7d7b09 JQ |
313 | if (!cont) { |
314 | qemu_put_byte(f, strlen(block->idstr)); | |
315 | qemu_put_buffer(f, (uint8_t *)block->idstr, | |
316 | strlen(block->idstr)); | |
317 | size += 1 + strlen(block->idstr); | |
318 | } | |
319 | return size; | |
0c51f43d OW |
320 | } |
321 | ||
6d3cb1f9 DDAG |
322 | /* This is the last block that we have visited serching for dirty pages |
323 | */ | |
324 | static RAMBlock *last_seen_block; | |
325 | /* This is the last block from where we have sent data */ | |
326 | static RAMBlock *last_sent_block; | |
327 | static ram_addr_t last_offset; | |
328 | static unsigned long *migration_bitmap; | |
329 | static uint64_t migration_dirty_pages; | |
330 | static uint32_t last_version; | |
331 | static bool ram_bulk_stage; | |
332 | ||
333 | /* Update the xbzrle cache to reflect a page that's been sent as all 0. | |
334 | * The important thing is that a stale (not-yet-0'd) page be replaced | |
335 | * by the new data. | |
336 | * As a bonus, if the page wasn't in the cache it gets added so that | |
337 | * when a small write is made into the 0'd page it gets XBZRLE sent | |
338 | */ | |
339 | static void xbzrle_cache_zero_page(ram_addr_t current_addr) | |
340 | { | |
341 | if (ram_bulk_stage || !migrate_use_xbzrle()) { | |
342 | return; | |
343 | } | |
344 | ||
345 | /* We don't care if this fails to allocate a new cache page | |
346 | * as long as it updated an old one */ | |
347 | cache_insert(XBZRLE.cache, current_addr, ZERO_TARGET_PAGE); | |
348 | } | |
349 | ||
17ad9b35 OW |
350 | #define ENCODING_FLAG_XBZRLE 0x1 |
351 | ||
1534ee93 | 352 | static int save_xbzrle_page(QEMUFile *f, uint8_t **current_data, |
17ad9b35 | 353 | ram_addr_t current_addr, RAMBlock *block, |
dd051c72 | 354 | ram_addr_t offset, int cont, bool last_stage) |
17ad9b35 OW |
355 | { |
356 | int encoded_len = 0, bytes_sent = -1; | |
357 | uint8_t *prev_cached_page; | |
358 | ||
359 | if (!cache_is_cached(XBZRLE.cache, current_addr)) { | |
1534ee93 | 360 | acct_info.xbzrle_cache_miss++; |
dd051c72 | 361 | if (!last_stage) { |
1534ee93 | 362 | if (cache_insert(XBZRLE.cache, current_addr, *current_data) == -1) { |
89db9987 | 363 | return -1; |
1534ee93 C |
364 | } else { |
365 | /* update *current_data when the page has been | |
366 | inserted into cache */ | |
367 | *current_data = get_cached_data(XBZRLE.cache, current_addr); | |
89db9987 | 368 | } |
dd051c72 | 369 | } |
17ad9b35 OW |
370 | return -1; |
371 | } | |
372 | ||
373 | prev_cached_page = get_cached_data(XBZRLE.cache, current_addr); | |
374 | ||
375 | /* save current buffer into memory */ | |
1534ee93 | 376 | memcpy(XBZRLE.current_buf, *current_data, TARGET_PAGE_SIZE); |
17ad9b35 OW |
377 | |
378 | /* XBZRLE encoding (if there is no overflow) */ | |
379 | encoded_len = xbzrle_encode_buffer(prev_cached_page, XBZRLE.current_buf, | |
380 | TARGET_PAGE_SIZE, XBZRLE.encoded_buf, | |
381 | TARGET_PAGE_SIZE); | |
382 | if (encoded_len == 0) { | |
383 | DPRINTF("Skipping unmodified page\n"); | |
384 | return 0; | |
385 | } else if (encoded_len == -1) { | |
386 | DPRINTF("Overflow\n"); | |
f36d55af | 387 | acct_info.xbzrle_overflows++; |
17ad9b35 | 388 | /* update data in the cache */ |
1534ee93 C |
389 | if (!last_stage) { |
390 | memcpy(prev_cached_page, *current_data, TARGET_PAGE_SIZE); | |
391 | *current_data = prev_cached_page; | |
392 | } | |
17ad9b35 OW |
393 | return -1; |
394 | } | |
395 | ||
396 | /* we need to update the data in the cache, in order to get the same data */ | |
dd051c72 JQ |
397 | if (!last_stage) { |
398 | memcpy(prev_cached_page, XBZRLE.current_buf, TARGET_PAGE_SIZE); | |
399 | } | |
17ad9b35 OW |
400 | |
401 | /* Send XBZRLE based compressed page */ | |
3f7d7b09 | 402 | bytes_sent = save_block_hdr(f, block, offset, cont, RAM_SAVE_FLAG_XBZRLE); |
17ad9b35 OW |
403 | qemu_put_byte(f, ENCODING_FLAG_XBZRLE); |
404 | qemu_put_be16(f, encoded_len); | |
405 | qemu_put_buffer(f, XBZRLE.encoded_buf, encoded_len); | |
3f7d7b09 | 406 | bytes_sent += encoded_len + 1 + 2; |
f36d55af OW |
407 | acct_info.xbzrle_pages++; |
408 | acct_info.xbzrle_bytes += bytes_sent; | |
17ad9b35 OW |
409 | |
410 | return bytes_sent; | |
411 | } | |
412 | ||
4c8ae0f6 JQ |
413 | static inline |
414 | ram_addr_t migration_bitmap_find_and_reset_dirty(MemoryRegion *mr, | |
415 | ram_addr_t start) | |
69268cde | 416 | { |
4c8ae0f6 JQ |
417 | unsigned long base = mr->ram_addr >> TARGET_PAGE_BITS; |
418 | unsigned long nr = base + (start >> TARGET_PAGE_BITS); | |
0851c9f7 MT |
419 | uint64_t mr_size = TARGET_PAGE_ALIGN(memory_region_size(mr)); |
420 | unsigned long size = base + (mr_size >> TARGET_PAGE_BITS); | |
c6bf8e0e | 421 | |
70c8652b PL |
422 | unsigned long next; |
423 | ||
424 | if (ram_bulk_stage && nr > base) { | |
425 | next = nr + 1; | |
426 | } else { | |
427 | next = find_next_bit(migration_bitmap, size, nr); | |
428 | } | |
69268cde | 429 | |
4c8ae0f6 JQ |
430 | if (next < size) { |
431 | clear_bit(next, migration_bitmap); | |
c6bf8e0e | 432 | migration_dirty_pages--; |
69268cde | 433 | } |
4c8ae0f6 | 434 | return (next - base) << TARGET_PAGE_BITS; |
69268cde JQ |
435 | } |
436 | ||
791fa2a2 | 437 | static inline bool migration_bitmap_set_dirty(ram_addr_t addr) |
e44d26c8 | 438 | { |
c6bf8e0e | 439 | bool ret; |
791fa2a2 | 440 | int nr = addr >> TARGET_PAGE_BITS; |
e44d26c8 | 441 | |
c6bf8e0e JQ |
442 | ret = test_and_set_bit(nr, migration_bitmap); |
443 | ||
444 | if (!ret) { | |
445 | migration_dirty_pages++; | |
e44d26c8 | 446 | } |
c6bf8e0e | 447 | return ret; |
e44d26c8 JQ |
448 | } |
449 | ||
791fa2a2 JQ |
450 | static void migration_bitmap_sync_range(ram_addr_t start, ram_addr_t length) |
451 | { | |
452 | ram_addr_t addr; | |
aa8dc044 JQ |
453 | unsigned long page = BIT_WORD(start >> TARGET_PAGE_BITS); |
454 | ||
455 | /* start address is aligned at the start of a word? */ | |
456 | if (((page * BITS_PER_LONG) << TARGET_PAGE_BITS) == start) { | |
457 | int k; | |
458 | int nr = BITS_TO_LONGS(length >> TARGET_PAGE_BITS); | |
459 | unsigned long *src = ram_list.dirty_memory[DIRTY_MEMORY_MIGRATION]; | |
460 | ||
461 | for (k = page; k < page + nr; k++) { | |
462 | if (src[k]) { | |
463 | unsigned long new_dirty; | |
464 | new_dirty = ~migration_bitmap[k]; | |
465 | migration_bitmap[k] |= src[k]; | |
466 | new_dirty &= src[k]; | |
467 | migration_dirty_pages += ctpopl(new_dirty); | |
468 | src[k] = 0; | |
469 | } | |
470 | } | |
471 | } else { | |
472 | for (addr = 0; addr < length; addr += TARGET_PAGE_SIZE) { | |
473 | if (cpu_physical_memory_get_dirty(start + addr, | |
474 | TARGET_PAGE_SIZE, | |
475 | DIRTY_MEMORY_MIGRATION)) { | |
476 | cpu_physical_memory_reset_dirty(start + addr, | |
477 | TARGET_PAGE_SIZE, | |
478 | DIRTY_MEMORY_MIGRATION); | |
479 | migration_bitmap_set_dirty(start + addr); | |
480 | } | |
791fa2a2 JQ |
481 | } |
482 | } | |
483 | } | |
484 | ||
485 | ||
32c835ba PB |
486 | /* Needs iothread lock! */ |
487 | ||
dd2df737 JQ |
488 | static void migration_bitmap_sync(void) |
489 | { | |
c6bf8e0e | 490 | RAMBlock *block; |
c6bf8e0e | 491 | uint64_t num_dirty_pages_init = migration_dirty_pages; |
8d017193 JQ |
492 | MigrationState *s = migrate_get_current(); |
493 | static int64_t start_time; | |
7ca1dfad | 494 | static int64_t bytes_xfer_prev; |
8d017193 JQ |
495 | static int64_t num_dirty_pages_period; |
496 | int64_t end_time; | |
7ca1dfad | 497 | int64_t bytes_xfer_now; |
8bc39233 C |
498 | static uint64_t xbzrle_cache_miss_prev; |
499 | static uint64_t iterations_prev; | |
7ca1dfad | 500 | |
71411d35 C |
501 | bitmap_sync_count++; |
502 | ||
7ca1dfad CV |
503 | if (!bytes_xfer_prev) { |
504 | bytes_xfer_prev = ram_bytes_transferred(); | |
505 | } | |
8d017193 JQ |
506 | |
507 | if (!start_time) { | |
bc72ad67 | 508 | start_time = qemu_clock_get_ms(QEMU_CLOCK_REALTIME); |
8d017193 | 509 | } |
3c12193d JQ |
510 | |
511 | trace_migration_bitmap_sync_start(); | |
1d671369 | 512 | address_space_sync_dirty_bitmap(&address_space_memory); |
c6bf8e0e | 513 | |
a3161038 | 514 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
791fa2a2 | 515 | migration_bitmap_sync_range(block->mr->ram_addr, block->length); |
c6bf8e0e JQ |
516 | } |
517 | trace_migration_bitmap_sync_end(migration_dirty_pages | |
3c12193d | 518 | - num_dirty_pages_init); |
8d017193 | 519 | num_dirty_pages_period += migration_dirty_pages - num_dirty_pages_init; |
bc72ad67 | 520 | end_time = qemu_clock_get_ms(QEMU_CLOCK_REALTIME); |
8d017193 JQ |
521 | |
522 | /* more than 1 second = 1000 millisecons */ | |
523 | if (end_time > start_time + 1000) { | |
7ca1dfad CV |
524 | if (migrate_auto_converge()) { |
525 | /* The following detection logic can be refined later. For now: | |
526 | Check to see if the dirtied bytes is 50% more than the approx. | |
527 | amount of bytes that just got transferred since the last time we | |
528 | were in this routine. If that happens >N times (for now N==4) | |
529 | we turn on the throttle down logic */ | |
530 | bytes_xfer_now = ram_bytes_transferred(); | |
531 | if (s->dirty_pages_rate && | |
532 | (num_dirty_pages_period * TARGET_PAGE_SIZE > | |
533 | (bytes_xfer_now - bytes_xfer_prev)/2) && | |
534 | (dirty_rate_high_cnt++ > 4)) { | |
535 | trace_migration_throttle(); | |
536 | mig_throttle_on = true; | |
537 | dirty_rate_high_cnt = 0; | |
538 | } | |
539 | bytes_xfer_prev = bytes_xfer_now; | |
540 | } else { | |
541 | mig_throttle_on = false; | |
542 | } | |
8bc39233 C |
543 | if (migrate_use_xbzrle()) { |
544 | if (iterations_prev != 0) { | |
545 | acct_info.xbzrle_cache_miss_rate = | |
546 | (double)(acct_info.xbzrle_cache_miss - | |
547 | xbzrle_cache_miss_prev) / | |
548 | (acct_info.iterations - iterations_prev); | |
549 | } | |
550 | iterations_prev = acct_info.iterations; | |
551 | xbzrle_cache_miss_prev = acct_info.xbzrle_cache_miss; | |
552 | } | |
8d017193 JQ |
553 | s->dirty_pages_rate = num_dirty_pages_period * 1000 |
554 | / (end_time - start_time); | |
90f8ae72 | 555 | s->dirty_bytes_rate = s->dirty_pages_rate * TARGET_PAGE_SIZE; |
8d017193 JQ |
556 | start_time = end_time; |
557 | num_dirty_pages_period = 0; | |
58570ed8 | 558 | s->dirty_sync_count = bitmap_sync_count; |
8d017193 | 559 | } |
dd2df737 JQ |
560 | } |
561 | ||
6c779f22 OW |
562 | /* |
563 | * ram_save_block: Writes a page of memory to the stream f | |
564 | * | |
b823ceaa JQ |
565 | * Returns: The number of bytes written. |
566 | * 0 means no dirty pages | |
6c779f22 OW |
567 | */ |
568 | ||
dd051c72 | 569 | static int ram_save_block(QEMUFile *f, bool last_stage) |
ad96090a | 570 | { |
b23a9a5c | 571 | RAMBlock *block = last_seen_block; |
e44359c3 | 572 | ram_addr_t offset = last_offset; |
4c8ae0f6 | 573 | bool complete_round = false; |
b823ceaa | 574 | int bytes_sent = 0; |
71c510e2 | 575 | MemoryRegion *mr; |
17ad9b35 | 576 | ram_addr_t current_addr; |
ad96090a | 577 | |
e44359c3 | 578 | if (!block) |
a3161038 | 579 | block = QTAILQ_FIRST(&ram_list.blocks); |
e44359c3 | 580 | |
4c8ae0f6 | 581 | while (true) { |
71c510e2 | 582 | mr = block->mr; |
4c8ae0f6 JQ |
583 | offset = migration_bitmap_find_and_reset_dirty(mr, offset); |
584 | if (complete_round && block == last_seen_block && | |
585 | offset >= last_offset) { | |
586 | break; | |
587 | } | |
588 | if (offset >= block->length) { | |
589 | offset = 0; | |
590 | block = QTAILQ_NEXT(block, next); | |
591 | if (!block) { | |
592 | block = QTAILQ_FIRST(&ram_list.blocks); | |
593 | complete_round = true; | |
78d07ae7 | 594 | ram_bulk_stage = false; |
4c8ae0f6 JQ |
595 | } |
596 | } else { | |
0033b8b4 | 597 | int ret; |
ad96090a | 598 | uint8_t *p; |
6d3cb1f9 | 599 | bool send_async = true; |
5f718a15 | 600 | int cont = (block == last_sent_block) ? |
b23a9a5c | 601 | RAM_SAVE_FLAG_CONTINUE : 0; |
ad96090a | 602 | |
71c510e2 | 603 | p = memory_region_get_ram_ptr(mr) + offset; |
ad96090a | 604 | |
b823ceaa JQ |
605 | /* In doubt sent page as normal */ |
606 | bytes_sent = -1; | |
0033b8b4 MH |
607 | ret = ram_control_save_page(f, block->offset, |
608 | offset, TARGET_PAGE_SIZE, &bytes_sent); | |
609 | ||
fd8cec93 GA |
610 | XBZRLE_cache_lock(); |
611 | ||
6d3cb1f9 | 612 | current_addr = block->offset + offset; |
0033b8b4 MH |
613 | if (ret != RAM_SAVE_CONTROL_NOT_SUPP) { |
614 | if (ret != RAM_SAVE_CONTROL_DELAYED) { | |
615 | if (bytes_sent > 0) { | |
616 | acct_info.norm_pages++; | |
617 | } else if (bytes_sent == 0) { | |
618 | acct_info.dup_pages++; | |
619 | } | |
620 | } | |
dc3c26a4 | 621 | } else if (is_zero_range(p, TARGET_PAGE_SIZE)) { |
004d4c10 | 622 | acct_info.dup_pages++; |
9ef051e5 PL |
623 | bytes_sent = save_block_hdr(f, block, offset, cont, |
624 | RAM_SAVE_FLAG_COMPRESS); | |
625 | qemu_put_byte(f, 0); | |
626 | bytes_sent++; | |
6d3cb1f9 DDAG |
627 | /* Must let xbzrle know, otherwise a previous (now 0'd) cached |
628 | * page would be stale | |
629 | */ | |
630 | xbzrle_cache_zero_page(current_addr); | |
5cc11c46 | 631 | } else if (!ram_bulk_stage && migrate_use_xbzrle()) { |
1534ee93 | 632 | bytes_sent = save_xbzrle_page(f, &p, current_addr, block, |
dd051c72 JQ |
633 | offset, cont, last_stage); |
634 | if (!last_stage) { | |
6d3cb1f9 DDAG |
635 | /* Can't send this cached data async, since the cache page |
636 | * might get updated before it gets to the wire | |
637 | */ | |
638 | send_async = false; | |
dd051c72 | 639 | } |
17ad9b35 OW |
640 | } |
641 | ||
b823ceaa | 642 | /* XBZRLE overflow or normal page */ |
17ad9b35 | 643 | if (bytes_sent == -1) { |
3f7d7b09 | 644 | bytes_sent = save_block_hdr(f, block, offset, cont, RAM_SAVE_FLAG_PAGE); |
6d3cb1f9 DDAG |
645 | if (send_async) { |
646 | qemu_put_buffer_async(f, p, TARGET_PAGE_SIZE); | |
647 | } else { | |
648 | qemu_put_buffer(f, p, TARGET_PAGE_SIZE); | |
649 | } | |
3f7d7b09 | 650 | bytes_sent += TARGET_PAGE_SIZE; |
004d4c10 | 651 | acct_info.norm_pages++; |
ad96090a BS |
652 | } |
653 | ||
fd8cec93 | 654 | XBZRLE_cache_unlock(); |
17ad9b35 | 655 | /* if page is unmodified, continue to the next */ |
b823ceaa | 656 | if (bytes_sent > 0) { |
5f718a15 | 657 | last_sent_block = block; |
17ad9b35 OW |
658 | break; |
659 | } | |
ad96090a | 660 | } |
4c8ae0f6 | 661 | } |
b23a9a5c | 662 | last_seen_block = block; |
e44359c3 | 663 | last_offset = offset; |
ad96090a | 664 | |
3fc250b4 | 665 | return bytes_sent; |
ad96090a BS |
666 | } |
667 | ||
668 | static uint64_t bytes_transferred; | |
669 | ||
2b0ce079 MH |
670 | void acct_update_position(QEMUFile *f, size_t size, bool zero) |
671 | { | |
672 | uint64_t pages = size / TARGET_PAGE_SIZE; | |
673 | if (zero) { | |
674 | acct_info.dup_pages += pages; | |
675 | } else { | |
676 | acct_info.norm_pages += pages; | |
677 | bytes_transferred += size; | |
678 | qemu_update_position(f, size); | |
679 | } | |
680 | } | |
681 | ||
ad96090a BS |
682 | static ram_addr_t ram_save_remaining(void) |
683 | { | |
c6bf8e0e | 684 | return migration_dirty_pages; |
ad96090a BS |
685 | } |
686 | ||
687 | uint64_t ram_bytes_remaining(void) | |
688 | { | |
689 | return ram_save_remaining() * TARGET_PAGE_SIZE; | |
690 | } | |
691 | ||
692 | uint64_t ram_bytes_transferred(void) | |
693 | { | |
694 | return bytes_transferred; | |
695 | } | |
696 | ||
697 | uint64_t ram_bytes_total(void) | |
698 | { | |
d17b5288 AW |
699 | RAMBlock *block; |
700 | uint64_t total = 0; | |
701 | ||
a3161038 | 702 | QTAILQ_FOREACH(block, &ram_list.blocks, next) |
d17b5288 AW |
703 | total += block->length; |
704 | ||
705 | return total; | |
ad96090a BS |
706 | } |
707 | ||
905f26f2 GA |
708 | void free_xbzrle_decoded_buf(void) |
709 | { | |
710 | g_free(xbzrle_decoded_buf); | |
711 | xbzrle_decoded_buf = NULL; | |
712 | } | |
713 | ||
8e21cd32 OW |
714 | static void migration_end(void) |
715 | { | |
244eaa75 PB |
716 | if (migration_bitmap) { |
717 | memory_global_dirty_log_stop(); | |
718 | g_free(migration_bitmap); | |
719 | migration_bitmap = NULL; | |
720 | } | |
17ad9b35 | 721 | |
fd8cec93 | 722 | XBZRLE_cache_lock(); |
244eaa75 | 723 | if (XBZRLE.cache) { |
17ad9b35 OW |
724 | cache_fini(XBZRLE.cache); |
725 | g_free(XBZRLE.cache); | |
726 | g_free(XBZRLE.encoded_buf); | |
727 | g_free(XBZRLE.current_buf); | |
17ad9b35 | 728 | XBZRLE.cache = NULL; |
f6c6483b OW |
729 | XBZRLE.encoded_buf = NULL; |
730 | XBZRLE.current_buf = NULL; | |
17ad9b35 | 731 | } |
fd8cec93 | 732 | XBZRLE_cache_unlock(); |
8e21cd32 OW |
733 | } |
734 | ||
9b5bfab0 JQ |
735 | static void ram_migration_cancel(void *opaque) |
736 | { | |
737 | migration_end(); | |
738 | } | |
739 | ||
5a170775 JQ |
740 | static void reset_ram_globals(void) |
741 | { | |
b23a9a5c | 742 | last_seen_block = NULL; |
5f718a15 | 743 | last_sent_block = NULL; |
5a170775 | 744 | last_offset = 0; |
f798b07f | 745 | last_version = ram_list.version; |
78d07ae7 | 746 | ram_bulk_stage = true; |
5a170775 JQ |
747 | } |
748 | ||
4508bd9e JQ |
749 | #define MAX_WAIT 50 /* ms, half buffered_file limit */ |
750 | ||
d1315aac | 751 | static int ram_save_setup(QEMUFile *f, void *opaque) |
ad96090a | 752 | { |
d1315aac | 753 | RAMBlock *block; |
e30d1d8c | 754 | int64_t ram_bitmap_pages; /* Size of bitmap in pages, including gaps */ |
c6bf8e0e | 755 | |
7ca1dfad CV |
756 | mig_throttle_on = false; |
757 | dirty_rate_high_cnt = 0; | |
71411d35 | 758 | bitmap_sync_count = 0; |
ad96090a | 759 | |
17ad9b35 | 760 | if (migrate_use_xbzrle()) { |
d97326ee | 761 | XBZRLE_cache_lock(); |
17ad9b35 OW |
762 | XBZRLE.cache = cache_init(migrate_xbzrle_cache_size() / |
763 | TARGET_PAGE_SIZE, | |
764 | TARGET_PAGE_SIZE); | |
765 | if (!XBZRLE.cache) { | |
d97326ee DDAG |
766 | XBZRLE_cache_unlock(); |
767 | error_report("Error creating cache"); | |
17ad9b35 OW |
768 | return -1; |
769 | } | |
d97326ee | 770 | XBZRLE_cache_unlock(); |
a17b2fd3 OW |
771 | |
772 | /* We prefer not to abort if there is no memory */ | |
773 | XBZRLE.encoded_buf = g_try_malloc0(TARGET_PAGE_SIZE); | |
774 | if (!XBZRLE.encoded_buf) { | |
d97326ee | 775 | error_report("Error allocating encoded_buf"); |
a17b2fd3 OW |
776 | return -1; |
777 | } | |
778 | ||
779 | XBZRLE.current_buf = g_try_malloc(TARGET_PAGE_SIZE); | |
780 | if (!XBZRLE.current_buf) { | |
d97326ee | 781 | error_report("Error allocating current_buf"); |
a17b2fd3 OW |
782 | g_free(XBZRLE.encoded_buf); |
783 | XBZRLE.encoded_buf = NULL; | |
784 | return -1; | |
785 | } | |
786 | ||
004d4c10 | 787 | acct_clear(); |
17ad9b35 OW |
788 | } |
789 | ||
9b095037 PB |
790 | qemu_mutex_lock_iothread(); |
791 | qemu_mutex_lock_ramlist(); | |
792 | bytes_transferred = 0; | |
793 | reset_ram_globals(); | |
794 | ||
e30d1d8c DDAG |
795 | ram_bitmap_pages = last_ram_offset() >> TARGET_PAGE_BITS; |
796 | migration_bitmap = bitmap_new(ram_bitmap_pages); | |
797 | bitmap_set(migration_bitmap, 0, ram_bitmap_pages); | |
798 | ||
799 | /* | |
800 | * Count the total number of pages used by ram blocks not including any | |
801 | * gaps due to alignment or unplugs. | |
802 | */ | |
803 | migration_dirty_pages = 0; | |
804 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { | |
805 | uint64_t block_pages; | |
806 | ||
807 | block_pages = block->length >> TARGET_PAGE_BITS; | |
808 | migration_dirty_pages += block_pages; | |
809 | } | |
810 | ||
d1315aac | 811 | memory_global_dirty_log_start(); |
c6bf8e0e | 812 | migration_bitmap_sync(); |
9b095037 | 813 | qemu_mutex_unlock_iothread(); |
ad96090a | 814 | |
d1315aac | 815 | qemu_put_be64(f, ram_bytes_total() | RAM_SAVE_FLAG_MEM_SIZE); |
97ab12d4 | 816 | |
a3161038 | 817 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
d1315aac JQ |
818 | qemu_put_byte(f, strlen(block->idstr)); |
819 | qemu_put_buffer(f, (uint8_t *)block->idstr, strlen(block->idstr)); | |
820 | qemu_put_be64(f, block->length); | |
ad96090a BS |
821 | } |
822 | ||
b2a8658e | 823 | qemu_mutex_unlock_ramlist(); |
0033b8b4 MH |
824 | |
825 | ram_control_before_iterate(f, RAM_CONTROL_SETUP); | |
826 | ram_control_after_iterate(f, RAM_CONTROL_SETUP); | |
827 | ||
d1315aac JQ |
828 | qemu_put_be64(f, RAM_SAVE_FLAG_EOS); |
829 | ||
830 | return 0; | |
831 | } | |
832 | ||
16310a3c | 833 | static int ram_save_iterate(QEMUFile *f, void *opaque) |
d1315aac | 834 | { |
d1315aac JQ |
835 | int ret; |
836 | int i; | |
e4ed1541 | 837 | int64_t t0; |
b823ceaa | 838 | int total_sent = 0; |
d1315aac | 839 | |
b2a8658e UD |
840 | qemu_mutex_lock_ramlist(); |
841 | ||
f798b07f UD |
842 | if (ram_list.version != last_version) { |
843 | reset_ram_globals(); | |
844 | } | |
845 | ||
0033b8b4 MH |
846 | ram_control_before_iterate(f, RAM_CONTROL_ROUND); |
847 | ||
bc72ad67 | 848 | t0 = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); |
4508bd9e | 849 | i = 0; |
2975725f | 850 | while ((ret = qemu_file_rate_limit(f)) == 0) { |
3fc250b4 | 851 | int bytes_sent; |
ad96090a | 852 | |
dd051c72 | 853 | bytes_sent = ram_save_block(f, false); |
6c779f22 | 854 | /* no more blocks to sent */ |
b823ceaa | 855 | if (bytes_sent == 0) { |
ad96090a BS |
856 | break; |
857 | } | |
b823ceaa | 858 | total_sent += bytes_sent; |
004d4c10 | 859 | acct_info.iterations++; |
7ca1dfad | 860 | check_guest_throttling(); |
4508bd9e JQ |
861 | /* we want to check in the 1st loop, just in case it was the 1st time |
862 | and we had to sync the dirty bitmap. | |
863 | qemu_get_clock_ns() is a bit expensive, so we only check each some | |
864 | iterations | |
865 | */ | |
866 | if ((i & 63) == 0) { | |
bc72ad67 | 867 | uint64_t t1 = (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - t0) / 1000000; |
4508bd9e | 868 | if (t1 > MAX_WAIT) { |
ef37a699 | 869 | DPRINTF("big wait: %" PRIu64 " milliseconds, %d iterations\n", |
4508bd9e JQ |
870 | t1, i); |
871 | break; | |
872 | } | |
873 | } | |
874 | i++; | |
ad96090a BS |
875 | } |
876 | ||
fb3409de PB |
877 | qemu_mutex_unlock_ramlist(); |
878 | ||
0033b8b4 MH |
879 | /* |
880 | * Must occur before EOS (or any QEMUFile operation) | |
881 | * because of RDMA protocol. | |
882 | */ | |
883 | ram_control_after_iterate(f, RAM_CONTROL_ROUND); | |
884 | ||
6cd0beda LL |
885 | bytes_transferred += total_sent; |
886 | ||
887 | /* | |
888 | * Do not count these 8 bytes into total_sent, so that we can | |
889 | * return 0 if no page had been dirtied. | |
890 | */ | |
891 | qemu_put_be64(f, RAM_SAVE_FLAG_EOS); | |
892 | bytes_transferred += 8; | |
893 | ||
894 | ret = qemu_file_get_error(f); | |
2975725f JQ |
895 | if (ret < 0) { |
896 | return ret; | |
897 | } | |
898 | ||
b823ceaa | 899 | return total_sent; |
16310a3c JQ |
900 | } |
901 | ||
902 | static int ram_save_complete(QEMUFile *f, void *opaque) | |
903 | { | |
b2a8658e | 904 | qemu_mutex_lock_ramlist(); |
9c339485 | 905 | migration_bitmap_sync(); |
b2a8658e | 906 | |
0033b8b4 MH |
907 | ram_control_before_iterate(f, RAM_CONTROL_FINISH); |
908 | ||
ad96090a | 909 | /* try transferring iterative blocks of memory */ |
3a697f69 | 910 | |
16310a3c | 911 | /* flush all remaining blocks regardless of rate limiting */ |
6c779f22 | 912 | while (true) { |
3fc250b4 PR |
913 | int bytes_sent; |
914 | ||
dd051c72 | 915 | bytes_sent = ram_save_block(f, true); |
6c779f22 | 916 | /* no more blocks to sent */ |
b823ceaa | 917 | if (bytes_sent == 0) { |
6c779f22 | 918 | break; |
ad96090a | 919 | } |
16310a3c | 920 | bytes_transferred += bytes_sent; |
ad96090a | 921 | } |
0033b8b4 MH |
922 | |
923 | ram_control_after_iterate(f, RAM_CONTROL_FINISH); | |
244eaa75 | 924 | migration_end(); |
ad96090a | 925 | |
b2a8658e | 926 | qemu_mutex_unlock_ramlist(); |
ad96090a BS |
927 | qemu_put_be64(f, RAM_SAVE_FLAG_EOS); |
928 | ||
5b3c9638 | 929 | return 0; |
ad96090a BS |
930 | } |
931 | ||
e4ed1541 JQ |
932 | static uint64_t ram_save_pending(QEMUFile *f, void *opaque, uint64_t max_size) |
933 | { | |
934 | uint64_t remaining_size; | |
935 | ||
936 | remaining_size = ram_save_remaining() * TARGET_PAGE_SIZE; | |
937 | ||
938 | if (remaining_size < max_size) { | |
32c835ba | 939 | qemu_mutex_lock_iothread(); |
e4ed1541 | 940 | migration_bitmap_sync(); |
32c835ba | 941 | qemu_mutex_unlock_iothread(); |
e4ed1541 JQ |
942 | remaining_size = ram_save_remaining() * TARGET_PAGE_SIZE; |
943 | } | |
944 | return remaining_size; | |
945 | } | |
946 | ||
17ad9b35 OW |
947 | static int load_xbzrle(QEMUFile *f, ram_addr_t addr, void *host) |
948 | { | |
949 | int ret, rc = 0; | |
950 | unsigned int xh_len; | |
951 | int xh_flags; | |
952 | ||
905f26f2 GA |
953 | if (!xbzrle_decoded_buf) { |
954 | xbzrle_decoded_buf = g_malloc(TARGET_PAGE_SIZE); | |
17ad9b35 OW |
955 | } |
956 | ||
957 | /* extract RLE header */ | |
958 | xh_flags = qemu_get_byte(f); | |
959 | xh_len = qemu_get_be16(f); | |
960 | ||
961 | if (xh_flags != ENCODING_FLAG_XBZRLE) { | |
962 | fprintf(stderr, "Failed to load XBZRLE page - wrong compression!\n"); | |
963 | return -1; | |
964 | } | |
965 | ||
966 | if (xh_len > TARGET_PAGE_SIZE) { | |
967 | fprintf(stderr, "Failed to load XBZRLE page - len overflow!\n"); | |
968 | return -1; | |
969 | } | |
970 | /* load data and decode */ | |
905f26f2 | 971 | qemu_get_buffer(f, xbzrle_decoded_buf, xh_len); |
17ad9b35 OW |
972 | |
973 | /* decode RLE */ | |
905f26f2 | 974 | ret = xbzrle_decode_buffer(xbzrle_decoded_buf, xh_len, host, |
17ad9b35 OW |
975 | TARGET_PAGE_SIZE); |
976 | if (ret == -1) { | |
977 | fprintf(stderr, "Failed to load XBZRLE page - decode error!\n"); | |
978 | rc = -1; | |
979 | } else if (ret > TARGET_PAGE_SIZE) { | |
980 | fprintf(stderr, "Failed to load XBZRLE page - size %d exceeds %d!\n", | |
981 | ret, TARGET_PAGE_SIZE); | |
982 | abort(); | |
983 | } | |
984 | ||
985 | return rc; | |
986 | } | |
987 | ||
a55bbe31 AW |
988 | static inline void *host_from_stream_offset(QEMUFile *f, |
989 | ram_addr_t offset, | |
990 | int flags) | |
991 | { | |
992 | static RAMBlock *block = NULL; | |
993 | char id[256]; | |
994 | uint8_t len; | |
995 | ||
996 | if (flags & RAM_SAVE_FLAG_CONTINUE) { | |
997 | if (!block) { | |
998 | fprintf(stderr, "Ack, bad migration stream!\n"); | |
999 | return NULL; | |
1000 | } | |
1001 | ||
dc94a7ed | 1002 | return memory_region_get_ram_ptr(block->mr) + offset; |
a55bbe31 AW |
1003 | } |
1004 | ||
1005 | len = qemu_get_byte(f); | |
1006 | qemu_get_buffer(f, (uint8_t *)id, len); | |
1007 | id[len] = 0; | |
1008 | ||
a3161038 | 1009 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
a55bbe31 | 1010 | if (!strncmp(id, block->idstr, sizeof(id))) |
dc94a7ed | 1011 | return memory_region_get_ram_ptr(block->mr) + offset; |
a55bbe31 AW |
1012 | } |
1013 | ||
1014 | fprintf(stderr, "Can't find block %s!\n", id); | |
1015 | return NULL; | |
1016 | } | |
1017 | ||
44c3b58c MH |
1018 | /* |
1019 | * If a page (or a whole RDMA chunk) has been | |
1020 | * determined to be zero, then zap it. | |
1021 | */ | |
1022 | void ram_handle_compressed(void *host, uint8_t ch, uint64_t size) | |
1023 | { | |
d613a56f | 1024 | if (ch != 0 || !is_zero_range(host, size)) { |
44c3b58c | 1025 | memset(host, ch, size); |
44c3b58c MH |
1026 | } |
1027 | } | |
1028 | ||
7908c78d | 1029 | static int ram_load(QEMUFile *f, void *opaque, int version_id) |
ad96090a BS |
1030 | { |
1031 | ram_addr_t addr; | |
3a697f69 | 1032 | int flags, ret = 0; |
42802d47 | 1033 | int error; |
3a697f69 OW |
1034 | static uint64_t seq_iter; |
1035 | ||
1036 | seq_iter++; | |
ad96090a | 1037 | |
21a246a4 | 1038 | if (version_id != 4) { |
4798fe55 CG |
1039 | ret = -EINVAL; |
1040 | goto done; | |
ad96090a BS |
1041 | } |
1042 | ||
1043 | do { | |
1044 | addr = qemu_get_be64(f); | |
1045 | ||
1046 | flags = addr & ~TARGET_PAGE_MASK; | |
1047 | addr &= TARGET_PAGE_MASK; | |
1048 | ||
1049 | if (flags & RAM_SAVE_FLAG_MEM_SIZE) { | |
21a246a4 C |
1050 | /* Synchronize RAM block list */ |
1051 | char id[256]; | |
1052 | ram_addr_t length; | |
1053 | ram_addr_t total_ram_bytes = addr; | |
1054 | ||
1055 | while (total_ram_bytes) { | |
1056 | RAMBlock *block; | |
1057 | uint8_t len; | |
1058 | ||
1059 | len = qemu_get_byte(f); | |
1060 | qemu_get_buffer(f, (uint8_t *)id, len); | |
1061 | id[len] = 0; | |
1062 | length = qemu_get_be64(f); | |
1063 | ||
1064 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { | |
1065 | if (!strncmp(id, block->idstr, sizeof(id))) { | |
1066 | if (block->length != length) { | |
1067 | fprintf(stderr, | |
1068 | "Length mismatch: %s: " RAM_ADDR_FMT | |
1069 | " in != " RAM_ADDR_FMT "\n", id, length, | |
1070 | block->length); | |
1071 | ret = -EINVAL; | |
1072 | goto done; | |
97ab12d4 | 1073 | } |
21a246a4 | 1074 | break; |
97ab12d4 | 1075 | } |
21a246a4 | 1076 | } |
97ab12d4 | 1077 | |
21a246a4 C |
1078 | if (!block) { |
1079 | fprintf(stderr, "Unknown ramblock \"%s\", cannot " | |
1080 | "accept migration\n", id); | |
1081 | ret = -EINVAL; | |
1082 | goto done; | |
97ab12d4 | 1083 | } |
21a246a4 C |
1084 | |
1085 | total_ram_bytes -= length; | |
ad96090a BS |
1086 | } |
1087 | } | |
1088 | ||
1089 | if (flags & RAM_SAVE_FLAG_COMPRESS) { | |
97ab12d4 AW |
1090 | void *host; |
1091 | uint8_t ch; | |
1092 | ||
f09f2189 | 1093 | host = host_from_stream_offset(f, addr, flags); |
492fb99c | 1094 | if (!host) { |
4798fe55 CG |
1095 | ret = -EINVAL; |
1096 | goto done; | |
492fb99c | 1097 | } |
97ab12d4 | 1098 | |
97ab12d4 | 1099 | ch = qemu_get_byte(f); |
44c3b58c | 1100 | ram_handle_compressed(host, ch, TARGET_PAGE_SIZE); |
ad96090a | 1101 | } else if (flags & RAM_SAVE_FLAG_PAGE) { |
97ab12d4 AW |
1102 | void *host; |
1103 | ||
f09f2189 | 1104 | host = host_from_stream_offset(f, addr, flags); |
0ff1f9f5 | 1105 | if (!host) { |
4798fe55 CG |
1106 | ret = -EINVAL; |
1107 | goto done; | |
0ff1f9f5 | 1108 | } |
97ab12d4 | 1109 | |
97ab12d4 | 1110 | qemu_get_buffer(f, host, TARGET_PAGE_SIZE); |
17ad9b35 | 1111 | } else if (flags & RAM_SAVE_FLAG_XBZRLE) { |
17ad9b35 OW |
1112 | void *host = host_from_stream_offset(f, addr, flags); |
1113 | if (!host) { | |
4798fe55 CG |
1114 | ret = -EINVAL; |
1115 | goto done; | |
17ad9b35 OW |
1116 | } |
1117 | ||
1118 | if (load_xbzrle(f, addr, host) < 0) { | |
1119 | ret = -EINVAL; | |
1120 | goto done; | |
1121 | } | |
0033b8b4 MH |
1122 | } else if (flags & RAM_SAVE_FLAG_HOOK) { |
1123 | ram_control_load_hook(f, flags); | |
ad96090a | 1124 | } |
42802d47 JQ |
1125 | error = qemu_file_get_error(f); |
1126 | if (error) { | |
3a697f69 OW |
1127 | ret = error; |
1128 | goto done; | |
ad96090a BS |
1129 | } |
1130 | } while (!(flags & RAM_SAVE_FLAG_EOS)); | |
1131 | ||
3a697f69 | 1132 | done: |
ef37a699 IM |
1133 | DPRINTF("Completed load of VM with exit code %d seq iteration " |
1134 | "%" PRIu64 "\n", ret, seq_iter); | |
3a697f69 | 1135 | return ret; |
ad96090a BS |
1136 | } |
1137 | ||
0d6ab3ab | 1138 | static SaveVMHandlers savevm_ram_handlers = { |
d1315aac | 1139 | .save_live_setup = ram_save_setup, |
16310a3c JQ |
1140 | .save_live_iterate = ram_save_iterate, |
1141 | .save_live_complete = ram_save_complete, | |
e4ed1541 | 1142 | .save_live_pending = ram_save_pending, |
7908c78d | 1143 | .load_state = ram_load, |
9b5bfab0 | 1144 | .cancel = ram_migration_cancel, |
7908c78d JQ |
1145 | }; |
1146 | ||
0d6ab3ab DDAG |
1147 | void ram_mig_init(void) |
1148 | { | |
d97326ee | 1149 | qemu_mutex_init(&XBZRLE.lock); |
0d6ab3ab DDAG |
1150 | register_savevm_live(NULL, "ram", 0, 4, &savevm_ram_handlers, NULL); |
1151 | } | |
1152 | ||
0dfa5ef9 IY |
1153 | struct soundhw { |
1154 | const char *name; | |
1155 | const char *descr; | |
1156 | int enabled; | |
1157 | int isa; | |
1158 | union { | |
4a0f031d | 1159 | int (*init_isa) (ISABus *bus); |
0dfa5ef9 IY |
1160 | int (*init_pci) (PCIBus *bus); |
1161 | } init; | |
1162 | }; | |
1163 | ||
36cd6f6f PB |
1164 | static struct soundhw soundhw[9]; |
1165 | static int soundhw_count; | |
ad96090a | 1166 | |
36cd6f6f PB |
1167 | void isa_register_soundhw(const char *name, const char *descr, |
1168 | int (*init_isa)(ISABus *bus)) | |
1169 | { | |
1170 | assert(soundhw_count < ARRAY_SIZE(soundhw) - 1); | |
1171 | soundhw[soundhw_count].name = name; | |
1172 | soundhw[soundhw_count].descr = descr; | |
1173 | soundhw[soundhw_count].isa = 1; | |
1174 | soundhw[soundhw_count].init.init_isa = init_isa; | |
1175 | soundhw_count++; | |
1176 | } | |
ad96090a | 1177 | |
36cd6f6f PB |
1178 | void pci_register_soundhw(const char *name, const char *descr, |
1179 | int (*init_pci)(PCIBus *bus)) | |
1180 | { | |
1181 | assert(soundhw_count < ARRAY_SIZE(soundhw) - 1); | |
1182 | soundhw[soundhw_count].name = name; | |
1183 | soundhw[soundhw_count].descr = descr; | |
1184 | soundhw[soundhw_count].isa = 0; | |
1185 | soundhw[soundhw_count].init.init_pci = init_pci; | |
1186 | soundhw_count++; | |
1187 | } | |
ad96090a BS |
1188 | |
1189 | void select_soundhw(const char *optarg) | |
1190 | { | |
1191 | struct soundhw *c; | |
1192 | ||
c8057f95 | 1193 | if (is_help_option(optarg)) { |
ad96090a BS |
1194 | show_valid_cards: |
1195 | ||
36cd6f6f PB |
1196 | if (soundhw_count) { |
1197 | printf("Valid sound card names (comma separated):\n"); | |
1198 | for (c = soundhw; c->name; ++c) { | |
1199 | printf ("%-11s %s\n", c->name, c->descr); | |
1200 | } | |
1201 | printf("\n-soundhw all will enable all of the above\n"); | |
1202 | } else { | |
1203 | printf("Machine has no user-selectable audio hardware " | |
1204 | "(it may or may not have always-present audio hardware).\n"); | |
ad96090a | 1205 | } |
c8057f95 | 1206 | exit(!is_help_option(optarg)); |
ad96090a BS |
1207 | } |
1208 | else { | |
1209 | size_t l; | |
1210 | const char *p; | |
1211 | char *e; | |
1212 | int bad_card = 0; | |
1213 | ||
1214 | if (!strcmp(optarg, "all")) { | |
1215 | for (c = soundhw; c->name; ++c) { | |
1216 | c->enabled = 1; | |
1217 | } | |
1218 | return; | |
1219 | } | |
1220 | ||
1221 | p = optarg; | |
1222 | while (*p) { | |
1223 | e = strchr(p, ','); | |
1224 | l = !e ? strlen(p) : (size_t) (e - p); | |
1225 | ||
1226 | for (c = soundhw; c->name; ++c) { | |
1227 | if (!strncmp(c->name, p, l) && !c->name[l]) { | |
1228 | c->enabled = 1; | |
1229 | break; | |
1230 | } | |
1231 | } | |
1232 | ||
1233 | if (!c->name) { | |
1234 | if (l > 80) { | |
1235 | fprintf(stderr, | |
1236 | "Unknown sound card name (too big to show)\n"); | |
1237 | } | |
1238 | else { | |
1239 | fprintf(stderr, "Unknown sound card name `%.*s'\n", | |
1240 | (int) l, p); | |
1241 | } | |
1242 | bad_card = 1; | |
1243 | } | |
1244 | p += l + (e != NULL); | |
1245 | } | |
1246 | ||
1247 | if (bad_card) { | |
1248 | goto show_valid_cards; | |
1249 | } | |
1250 | } | |
1251 | } | |
0dfa5ef9 | 1252 | |
f81222bc | 1253 | void audio_init(void) |
0dfa5ef9 IY |
1254 | { |
1255 | struct soundhw *c; | |
f81222bc PB |
1256 | ISABus *isa_bus = (ISABus *) object_resolve_path_type("", TYPE_ISA_BUS, NULL); |
1257 | PCIBus *pci_bus = (PCIBus *) object_resolve_path_type("", TYPE_PCI_BUS, NULL); | |
0dfa5ef9 IY |
1258 | |
1259 | for (c = soundhw; c->name; ++c) { | |
1260 | if (c->enabled) { | |
1261 | if (c->isa) { | |
f81222bc PB |
1262 | if (!isa_bus) { |
1263 | fprintf(stderr, "ISA bus not available for %s\n", c->name); | |
1264 | exit(1); | |
0dfa5ef9 | 1265 | } |
f81222bc | 1266 | c->init.init_isa(isa_bus); |
0dfa5ef9 | 1267 | } else { |
f81222bc PB |
1268 | if (!pci_bus) { |
1269 | fprintf(stderr, "PCI bus not available for %s\n", c->name); | |
1270 | exit(1); | |
0dfa5ef9 | 1271 | } |
f81222bc | 1272 | c->init.init_pci(pci_bus); |
0dfa5ef9 IY |
1273 | } |
1274 | } | |
1275 | } | |
1276 | } | |
ad96090a BS |
1277 | |
1278 | int qemu_uuid_parse(const char *str, uint8_t *uuid) | |
1279 | { | |
1280 | int ret; | |
1281 | ||
1282 | if (strlen(str) != 36) { | |
1283 | return -1; | |
1284 | } | |
1285 | ||
1286 | ret = sscanf(str, UUID_FMT, &uuid[0], &uuid[1], &uuid[2], &uuid[3], | |
1287 | &uuid[4], &uuid[5], &uuid[6], &uuid[7], &uuid[8], &uuid[9], | |
1288 | &uuid[10], &uuid[11], &uuid[12], &uuid[13], &uuid[14], | |
1289 | &uuid[15]); | |
1290 | ||
1291 | if (ret != 16) { | |
1292 | return -1; | |
1293 | } | |
ad96090a BS |
1294 | return 0; |
1295 | } | |
1296 | ||
0c764a9d | 1297 | void do_acpitable_option(const QemuOpts *opts) |
ad96090a BS |
1298 | { |
1299 | #ifdef TARGET_I386 | |
23084327 LE |
1300 | Error *err = NULL; |
1301 | ||
1302 | acpi_table_add(opts, &err); | |
1303 | if (err) { | |
4a44d85e SA |
1304 | error_report("Wrong acpi table provided: %s", |
1305 | error_get_pretty(err)); | |
23084327 | 1306 | error_free(err); |
ad96090a BS |
1307 | exit(1); |
1308 | } | |
1309 | #endif | |
1310 | } | |
1311 | ||
4f953d2f | 1312 | void do_smbios_option(QemuOpts *opts) |
ad96090a BS |
1313 | { |
1314 | #ifdef TARGET_I386 | |
4f953d2f | 1315 | smbios_entry_add(opts); |
ad96090a BS |
1316 | #endif |
1317 | } | |
1318 | ||
1319 | void cpudef_init(void) | |
1320 | { | |
1321 | #if defined(cpudef_setup) | |
1322 | cpudef_setup(); /* parse cpu definitions in target config file */ | |
1323 | #endif | |
1324 | } | |
1325 | ||
303d4e86 AP |
1326 | int tcg_available(void) |
1327 | { | |
1328 | return 1; | |
1329 | } | |
1330 | ||
ad96090a BS |
1331 | int kvm_available(void) |
1332 | { | |
1333 | #ifdef CONFIG_KVM | |
1334 | return 1; | |
1335 | #else | |
1336 | return 0; | |
1337 | #endif | |
1338 | } | |
1339 | ||
1340 | int xen_available(void) | |
1341 | { | |
1342 | #ifdef CONFIG_XEN | |
1343 | return 1; | |
1344 | #else | |
1345 | return 0; | |
1346 | #endif | |
1347 | } | |
99afc91d DB |
1348 | |
1349 | ||
1350 | TargetInfo *qmp_query_target(Error **errp) | |
1351 | { | |
1352 | TargetInfo *info = g_malloc0(sizeof(*info)); | |
1353 | ||
c02a9552 | 1354 | info->arch = g_strdup(TARGET_NAME); |
99afc91d DB |
1355 | |
1356 | return info; | |
1357 | } | |
7ca1dfad CV |
1358 | |
1359 | /* Stub function that's gets run on the vcpu when its brought out of the | |
1360 | VM to run inside qemu via async_run_on_cpu()*/ | |
1361 | static void mig_sleep_cpu(void *opq) | |
1362 | { | |
1363 | qemu_mutex_unlock_iothread(); | |
1364 | g_usleep(30*1000); | |
1365 | qemu_mutex_lock_iothread(); | |
1366 | } | |
1367 | ||
1368 | /* To reduce the dirty rate explicitly disallow the VCPUs from spending | |
1369 | much time in the VM. The migration thread will try to catchup. | |
1370 | Workload will experience a performance drop. | |
1371 | */ | |
7ca1dfad CV |
1372 | static void mig_throttle_guest_down(void) |
1373 | { | |
38fcbd3f AF |
1374 | CPUState *cpu; |
1375 | ||
7ca1dfad | 1376 | qemu_mutex_lock_iothread(); |
38fcbd3f AF |
1377 | CPU_FOREACH(cpu) { |
1378 | async_run_on_cpu(cpu, mig_sleep_cpu, NULL); | |
1379 | } | |
7ca1dfad CV |
1380 | qemu_mutex_unlock_iothread(); |
1381 | } | |
1382 | ||
1383 | static void check_guest_throttling(void) | |
1384 | { | |
1385 | static int64_t t0; | |
1386 | int64_t t1; | |
1387 | ||
1388 | if (!mig_throttle_on) { | |
1389 | return; | |
1390 | } | |
1391 | ||
1392 | if (!t0) { | |
bc72ad67 | 1393 | t0 = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); |
7ca1dfad CV |
1394 | return; |
1395 | } | |
1396 | ||
bc72ad67 | 1397 | t1 = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); |
7ca1dfad CV |
1398 | |
1399 | /* If it has been more than 40 ms since the last time the guest | |
1400 | * was throttled then do it again. | |
1401 | */ | |
1402 | if (40 < (t1-t0)/1000000) { | |
1403 | mig_throttle_guest_down(); | |
1404 | t0 = t1; | |
1405 | } | |
1406 | } |