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ad96090a
BS
1/*
2 * QEMU System Emulator
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#include <stdint.h>
25#include <stdarg.h>
b2e0a138 26#include <stdlib.h>
ad96090a 27#ifndef _WIN32
1c47cb16 28#include <sys/types.h>
ad96090a
BS
29#include <sys/mman.h>
30#endif
31#include "config.h"
32#include "monitor.h"
33#include "sysemu.h"
34#include "arch_init.h"
35#include "audio/audio.h"
36#include "hw/pc.h"
37#include "hw/pci.h"
38#include "hw/audiodev.h"
39#include "kvm.h"
40#include "migration.h"
41#include "net.h"
42#include "gdbstub.h"
43#include "hw/smbios.h"
86e775c6 44#include "exec-memory.h"
ad96090a
BS
45
46#ifdef TARGET_SPARC
47int graphic_width = 1024;
48int graphic_height = 768;
49int graphic_depth = 8;
50#else
51int graphic_width = 800;
52int graphic_height = 600;
53int graphic_depth = 15;
54#endif
55
56const char arch_config_name[] = CONFIG_QEMU_CONFDIR "/target-" TARGET_ARCH ".conf";
57
58#if defined(TARGET_ALPHA)
59#define QEMU_ARCH QEMU_ARCH_ALPHA
60#elif defined(TARGET_ARM)
61#define QEMU_ARCH QEMU_ARCH_ARM
62#elif defined(TARGET_CRIS)
63#define QEMU_ARCH QEMU_ARCH_CRIS
64#elif defined(TARGET_I386)
65#define QEMU_ARCH QEMU_ARCH_I386
66#elif defined(TARGET_M68K)
67#define QEMU_ARCH QEMU_ARCH_M68K
81ea0e13
MW
68#elif defined(TARGET_LM32)
69#define QEMU_ARCH QEMU_ARCH_LM32
ad96090a
BS
70#elif defined(TARGET_MICROBLAZE)
71#define QEMU_ARCH QEMU_ARCH_MICROBLAZE
72#elif defined(TARGET_MIPS)
73#define QEMU_ARCH QEMU_ARCH_MIPS
74#elif defined(TARGET_PPC)
75#define QEMU_ARCH QEMU_ARCH_PPC
76#elif defined(TARGET_S390X)
77#define QEMU_ARCH QEMU_ARCH_S390X
78#elif defined(TARGET_SH4)
79#define QEMU_ARCH QEMU_ARCH_SH4
80#elif defined(TARGET_SPARC)
81#define QEMU_ARCH QEMU_ARCH_SPARC
2328826b
MF
82#elif defined(TARGET_XTENSA)
83#define QEMU_ARCH QEMU_ARCH_XTENSA
ad96090a
BS
84#endif
85
86const uint32_t arch_type = QEMU_ARCH;
87
88/***********************************************************/
89/* ram save/restore */
90
d20878d2
YT
91#define RAM_SAVE_FLAG_FULL 0x01 /* Obsolete, not used anymore */
92#define RAM_SAVE_FLAG_COMPRESS 0x02
93#define RAM_SAVE_FLAG_MEM_SIZE 0x04
94#define RAM_SAVE_FLAG_PAGE 0x08
95#define RAM_SAVE_FLAG_EOS 0x10
96#define RAM_SAVE_FLAG_CONTINUE 0x20
ad96090a
BS
97
98static int is_dup_page(uint8_t *page, uint8_t ch)
99{
100 uint32_t val = ch << 24 | ch << 16 | ch << 8 | ch;
101 uint32_t *array = (uint32_t *)page;
102 int i;
103
104 for (i = 0; i < (TARGET_PAGE_SIZE / 4); i++) {
105 if (array[i] != val) {
106 return 0;
107 }
108 }
109
110 return 1;
111}
112
760e77ea
AW
113static RAMBlock *last_block;
114static ram_addr_t last_offset;
115
ad96090a
BS
116static int ram_save_block(QEMUFile *f)
117{
e44359c3
AW
118 RAMBlock *block = last_block;
119 ram_addr_t offset = last_offset;
120 ram_addr_t current_addr;
3fc250b4 121 int bytes_sent = 0;
ad96090a 122
e44359c3
AW
123 if (!block)
124 block = QLIST_FIRST(&ram_list.blocks);
125
126 current_addr = block->offset + offset;
127
128 do {
ad96090a
BS
129 if (cpu_physical_memory_get_dirty(current_addr, MIGRATION_DIRTY_FLAG)) {
130 uint8_t *p;
a55bbe31 131 int cont = (block == last_block) ? RAM_SAVE_FLAG_CONTINUE : 0;
ad96090a
BS
132
133 cpu_physical_memory_reset_dirty(current_addr,
134 current_addr + TARGET_PAGE_SIZE,
135 MIGRATION_DIRTY_FLAG);
136
97ab12d4 137 p = block->host + offset;
ad96090a
BS
138
139 if (is_dup_page(p, *p)) {
a55bbe31
AW
140 qemu_put_be64(f, offset | cont | RAM_SAVE_FLAG_COMPRESS);
141 if (!cont) {
142 qemu_put_byte(f, strlen(block->idstr));
143 qemu_put_buffer(f, (uint8_t *)block->idstr,
144 strlen(block->idstr));
145 }
ad96090a 146 qemu_put_byte(f, *p);
3fc250b4 147 bytes_sent = 1;
ad96090a 148 } else {
a55bbe31
AW
149 qemu_put_be64(f, offset | cont | RAM_SAVE_FLAG_PAGE);
150 if (!cont) {
151 qemu_put_byte(f, strlen(block->idstr));
152 qemu_put_buffer(f, (uint8_t *)block->idstr,
153 strlen(block->idstr));
154 }
ad96090a 155 qemu_put_buffer(f, p, TARGET_PAGE_SIZE);
3fc250b4 156 bytes_sent = TARGET_PAGE_SIZE;
ad96090a
BS
157 }
158
ad96090a
BS
159 break;
160 }
e44359c3
AW
161
162 offset += TARGET_PAGE_SIZE;
163 if (offset >= block->length) {
164 offset = 0;
165 block = QLIST_NEXT(block, next);
166 if (!block)
167 block = QLIST_FIRST(&ram_list.blocks);
168 }
169
170 current_addr = block->offset + offset;
171
172 } while (current_addr != last_block->offset + last_offset);
173
174 last_block = block;
175 last_offset = offset;
ad96090a 176
3fc250b4 177 return bytes_sent;
ad96090a
BS
178}
179
180static uint64_t bytes_transferred;
181
182static ram_addr_t ram_save_remaining(void)
183{
e44359c3 184 RAMBlock *block;
ad96090a
BS
185 ram_addr_t count = 0;
186
e44359c3
AW
187 QLIST_FOREACH(block, &ram_list.blocks, next) {
188 ram_addr_t addr;
189 for (addr = block->offset; addr < block->offset + block->length;
190 addr += TARGET_PAGE_SIZE) {
191 if (cpu_physical_memory_get_dirty(addr, MIGRATION_DIRTY_FLAG)) {
192 count++;
193 }
ad96090a
BS
194 }
195 }
196
197 return count;
198}
199
200uint64_t ram_bytes_remaining(void)
201{
202 return ram_save_remaining() * TARGET_PAGE_SIZE;
203}
204
205uint64_t ram_bytes_transferred(void)
206{
207 return bytes_transferred;
208}
209
210uint64_t ram_bytes_total(void)
211{
d17b5288
AW
212 RAMBlock *block;
213 uint64_t total = 0;
214
215 QLIST_FOREACH(block, &ram_list.blocks, next)
216 total += block->length;
217
218 return total;
ad96090a
BS
219}
220
b2e0a138
MT
221static int block_compar(const void *a, const void *b)
222{
223 RAMBlock * const *ablock = a;
224 RAMBlock * const *bblock = b;
225 if ((*ablock)->offset < (*bblock)->offset) {
226 return -1;
227 } else if ((*ablock)->offset > (*bblock)->offset) {
228 return 1;
229 }
230 return 0;
231}
232
233static void sort_ram_list(void)
234{
235 RAMBlock *block, *nblock, **blocks;
236 int n;
237 n = 0;
238 QLIST_FOREACH(block, &ram_list.blocks, next) {
239 ++n;
240 }
7267c094 241 blocks = g_malloc(n * sizeof *blocks);
b2e0a138
MT
242 n = 0;
243 QLIST_FOREACH_SAFE(block, &ram_list.blocks, next, nblock) {
244 blocks[n++] = block;
245 QLIST_REMOVE(block, next);
246 }
247 qsort(blocks, n, sizeof *blocks, block_compar);
248 while (--n >= 0) {
249 QLIST_INSERT_HEAD(&ram_list.blocks, blocks[n], next);
250 }
7267c094 251 g_free(blocks);
b2e0a138
MT
252}
253
ad96090a
BS
254int ram_save_live(Monitor *mon, QEMUFile *f, int stage, void *opaque)
255{
256 ram_addr_t addr;
257 uint64_t bytes_transferred_last;
258 double bwidth = 0;
259 uint64_t expected_time = 0;
2975725f 260 int ret;
ad96090a
BS
261
262 if (stage < 0) {
263 cpu_physical_memory_set_dirty_tracking(0);
264 return 0;
265 }
266
86e775c6 267 memory_global_sync_dirty_bitmap(get_system_memory());
ad96090a
BS
268
269 if (stage == 1) {
97ab12d4 270 RAMBlock *block;
ad96090a 271 bytes_transferred = 0;
760e77ea
AW
272 last_block = NULL;
273 last_offset = 0;
b2e0a138 274 sort_ram_list();
ad96090a
BS
275
276 /* Make sure all dirty bits are set */
e44359c3
AW
277 QLIST_FOREACH(block, &ram_list.blocks, next) {
278 for (addr = block->offset; addr < block->offset + block->length;
279 addr += TARGET_PAGE_SIZE) {
280 if (!cpu_physical_memory_get_dirty(addr,
281 MIGRATION_DIRTY_FLAG)) {
282 cpu_physical_memory_set_dirty(addr);
283 }
ad96090a
BS
284 }
285 }
286
287 /* Enable dirty memory tracking */
288 cpu_physical_memory_set_dirty_tracking(1);
289
e44359c3 290 qemu_put_be64(f, ram_bytes_total() | RAM_SAVE_FLAG_MEM_SIZE);
97ab12d4
AW
291
292 QLIST_FOREACH(block, &ram_list.blocks, next) {
293 qemu_put_byte(f, strlen(block->idstr));
294 qemu_put_buffer(f, (uint8_t *)block->idstr, strlen(block->idstr));
295 qemu_put_be64(f, block->length);
296 }
ad96090a
BS
297 }
298
299 bytes_transferred_last = bytes_transferred;
300 bwidth = qemu_get_clock_ns(rt_clock);
301
2975725f 302 while ((ret = qemu_file_rate_limit(f)) == 0) {
3fc250b4 303 int bytes_sent;
ad96090a 304
3fc250b4
PR
305 bytes_sent = ram_save_block(f);
306 bytes_transferred += bytes_sent;
307 if (bytes_sent == 0) { /* no more blocks */
ad96090a
BS
308 break;
309 }
310 }
311
2975725f
JQ
312 if (ret < 0) {
313 return ret;
314 }
315
ad96090a
BS
316 bwidth = qemu_get_clock_ns(rt_clock) - bwidth;
317 bwidth = (bytes_transferred - bytes_transferred_last) / bwidth;
318
319 /* if we haven't transferred anything this round, force expected_time to a
320 * a very high value, but without crashing */
321 if (bwidth == 0) {
322 bwidth = 0.000001;
323 }
324
325 /* try transferring iterative blocks of memory */
326 if (stage == 3) {
3fc250b4
PR
327 int bytes_sent;
328
ad96090a 329 /* flush all remaining blocks regardless of rate limiting */
3fc250b4
PR
330 while ((bytes_sent = ram_save_block(f)) != 0) {
331 bytes_transferred += bytes_sent;
ad96090a
BS
332 }
333 cpu_physical_memory_set_dirty_tracking(0);
334 }
335
336 qemu_put_be64(f, RAM_SAVE_FLAG_EOS);
337
338 expected_time = ram_save_remaining() * TARGET_PAGE_SIZE / bwidth;
339
340 return (stage == 2) && (expected_time <= migrate_max_downtime());
341}
342
a55bbe31
AW
343static inline void *host_from_stream_offset(QEMUFile *f,
344 ram_addr_t offset,
345 int flags)
346{
347 static RAMBlock *block = NULL;
348 char id[256];
349 uint8_t len;
350
351 if (flags & RAM_SAVE_FLAG_CONTINUE) {
352 if (!block) {
353 fprintf(stderr, "Ack, bad migration stream!\n");
354 return NULL;
355 }
356
357 return block->host + offset;
358 }
359
360 len = qemu_get_byte(f);
361 qemu_get_buffer(f, (uint8_t *)id, len);
362 id[len] = 0;
363
364 QLIST_FOREACH(block, &ram_list.blocks, next) {
365 if (!strncmp(id, block->idstr, sizeof(id)))
366 return block->host + offset;
367 }
368
369 fprintf(stderr, "Can't find block %s!\n", id);
370 return NULL;
371}
372
ad96090a
BS
373int ram_load(QEMUFile *f, void *opaque, int version_id)
374{
375 ram_addr_t addr;
376 int flags;
42802d47 377 int error;
ad96090a 378
97ab12d4 379 if (version_id < 3 || version_id > 4) {
ad96090a
BS
380 return -EINVAL;
381 }
382
383 do {
384 addr = qemu_get_be64(f);
385
386 flags = addr & ~TARGET_PAGE_MASK;
387 addr &= TARGET_PAGE_MASK;
388
389 if (flags & RAM_SAVE_FLAG_MEM_SIZE) {
97ab12d4
AW
390 if (version_id == 3) {
391 if (addr != ram_bytes_total()) {
392 return -EINVAL;
393 }
394 } else {
395 /* Synchronize RAM block list */
396 char id[256];
397 ram_addr_t length;
398 ram_addr_t total_ram_bytes = addr;
399
400 while (total_ram_bytes) {
401 RAMBlock *block;
402 uint8_t len;
403
404 len = qemu_get_byte(f);
405 qemu_get_buffer(f, (uint8_t *)id, len);
406 id[len] = 0;
407 length = qemu_get_be64(f);
408
409 QLIST_FOREACH(block, &ram_list.blocks, next) {
410 if (!strncmp(id, block->idstr, sizeof(id))) {
411 if (block->length != length)
412 return -EINVAL;
413 break;
414 }
415 }
416
417 if (!block) {
fb787f81
AW
418 fprintf(stderr, "Unknown ramblock \"%s\", cannot "
419 "accept migration\n", id);
420 return -EINVAL;
97ab12d4
AW
421 }
422
423 total_ram_bytes -= length;
424 }
ad96090a
BS
425 }
426 }
427
428 if (flags & RAM_SAVE_FLAG_COMPRESS) {
97ab12d4
AW
429 void *host;
430 uint8_t ch;
431
a55bbe31 432 if (version_id == 3)
97ab12d4 433 host = qemu_get_ram_ptr(addr);
a55bbe31
AW
434 else
435 host = host_from_stream_offset(f, addr, flags);
492fb99c
MT
436 if (!host) {
437 return -EINVAL;
438 }
97ab12d4 439
97ab12d4
AW
440 ch = qemu_get_byte(f);
441 memset(host, ch, TARGET_PAGE_SIZE);
ad96090a
BS
442#ifndef _WIN32
443 if (ch == 0 &&
444 (!kvm_enabled() || kvm_has_sync_mmu())) {
e78815a5 445 qemu_madvise(host, TARGET_PAGE_SIZE, QEMU_MADV_DONTNEED);
ad96090a
BS
446 }
447#endif
448 } else if (flags & RAM_SAVE_FLAG_PAGE) {
97ab12d4
AW
449 void *host;
450
a55bbe31 451 if (version_id == 3)
97ab12d4 452 host = qemu_get_ram_ptr(addr);
a55bbe31
AW
453 else
454 host = host_from_stream_offset(f, addr, flags);
97ab12d4 455
97ab12d4 456 qemu_get_buffer(f, host, TARGET_PAGE_SIZE);
ad96090a 457 }
42802d47
JQ
458 error = qemu_file_get_error(f);
459 if (error) {
460 return error;
ad96090a
BS
461 }
462 } while (!(flags & RAM_SAVE_FLAG_EOS));
463
464 return 0;
465}
466
ad96090a 467#ifdef HAS_AUDIO
0dfa5ef9
IY
468struct soundhw {
469 const char *name;
470 const char *descr;
471 int enabled;
472 int isa;
473 union {
4a0f031d 474 int (*init_isa) (ISABus *bus);
0dfa5ef9
IY
475 int (*init_pci) (PCIBus *bus);
476 } init;
477};
478
479static struct soundhw soundhw[] = {
ad96090a
BS
480#ifdef HAS_AUDIO_CHOICE
481#if defined(TARGET_I386) || defined(TARGET_MIPS)
482 {
483 "pcspk",
484 "PC speaker",
485 0,
486 1,
487 { .init_isa = pcspk_audio_init }
488 },
489#endif
490
491#ifdef CONFIG_SB16
492 {
493 "sb16",
494 "Creative Sound Blaster 16",
495 0,
496 1,
497 { .init_isa = SB16_init }
498 },
499#endif
500
501#ifdef CONFIG_CS4231A
502 {
503 "cs4231a",
504 "CS4231A",
505 0,
506 1,
507 { .init_isa = cs4231a_init }
508 },
509#endif
510
511#ifdef CONFIG_ADLIB
512 {
513 "adlib",
514#ifdef HAS_YMF262
515 "Yamaha YMF262 (OPL3)",
516#else
517 "Yamaha YM3812 (OPL2)",
518#endif
519 0,
520 1,
521 { .init_isa = Adlib_init }
522 },
523#endif
524
525#ifdef CONFIG_GUS
526 {
527 "gus",
528 "Gravis Ultrasound GF1",
529 0,
530 1,
531 { .init_isa = GUS_init }
532 },
533#endif
534
535#ifdef CONFIG_AC97
536 {
537 "ac97",
538 "Intel 82801AA AC97 Audio",
539 0,
540 0,
541 { .init_pci = ac97_init }
542 },
543#endif
544
545#ifdef CONFIG_ES1370
546 {
547 "es1370",
548 "ENSONIQ AudioPCI ES1370",
549 0,
550 0,
551 { .init_pci = es1370_init }
552 },
553#endif
554
d61a4ce8
GH
555#ifdef CONFIG_HDA
556 {
557 "hda",
558 "Intel HD Audio",
559 0,
560 0,
561 { .init_pci = intel_hda_and_codec_init }
562 },
563#endif
564
ad96090a
BS
565#endif /* HAS_AUDIO_CHOICE */
566
567 { NULL, NULL, 0, 0, { NULL } }
568};
569
570void select_soundhw(const char *optarg)
571{
572 struct soundhw *c;
573
574 if (*optarg == '?') {
575 show_valid_cards:
576
577 printf("Valid sound card names (comma separated):\n");
578 for (c = soundhw; c->name; ++c) {
579 printf ("%-11s %s\n", c->name, c->descr);
580 }
581 printf("\n-soundhw all will enable all of the above\n");
582 exit(*optarg != '?');
583 }
584 else {
585 size_t l;
586 const char *p;
587 char *e;
588 int bad_card = 0;
589
590 if (!strcmp(optarg, "all")) {
591 for (c = soundhw; c->name; ++c) {
592 c->enabled = 1;
593 }
594 return;
595 }
596
597 p = optarg;
598 while (*p) {
599 e = strchr(p, ',');
600 l = !e ? strlen(p) : (size_t) (e - p);
601
602 for (c = soundhw; c->name; ++c) {
603 if (!strncmp(c->name, p, l) && !c->name[l]) {
604 c->enabled = 1;
605 break;
606 }
607 }
608
609 if (!c->name) {
610 if (l > 80) {
611 fprintf(stderr,
612 "Unknown sound card name (too big to show)\n");
613 }
614 else {
615 fprintf(stderr, "Unknown sound card name `%.*s'\n",
616 (int) l, p);
617 }
618 bad_card = 1;
619 }
620 p += l + (e != NULL);
621 }
622
623 if (bad_card) {
624 goto show_valid_cards;
625 }
626 }
627}
0dfa5ef9 628
4a0f031d 629void audio_init(ISABus *isa_bus, PCIBus *pci_bus)
0dfa5ef9
IY
630{
631 struct soundhw *c;
632
633 for (c = soundhw; c->name; ++c) {
634 if (c->enabled) {
635 if (c->isa) {
4a0f031d
HP
636 if (isa_bus) {
637 c->init.init_isa(isa_bus);
0dfa5ef9
IY
638 }
639 } else {
640 if (pci_bus) {
641 c->init.init_pci(pci_bus);
642 }
643 }
644 }
645 }
646}
ad96090a
BS
647#else
648void select_soundhw(const char *optarg)
649{
650}
4a0f031d 651void audio_init(ISABus *isa_bus, PCIBus *pci_bus)
0dfa5ef9
IY
652{
653}
ad96090a
BS
654#endif
655
656int qemu_uuid_parse(const char *str, uint8_t *uuid)
657{
658 int ret;
659
660 if (strlen(str) != 36) {
661 return -1;
662 }
663
664 ret = sscanf(str, UUID_FMT, &uuid[0], &uuid[1], &uuid[2], &uuid[3],
665 &uuid[4], &uuid[5], &uuid[6], &uuid[7], &uuid[8], &uuid[9],
666 &uuid[10], &uuid[11], &uuid[12], &uuid[13], &uuid[14],
667 &uuid[15]);
668
669 if (ret != 16) {
670 return -1;
671 }
672#ifdef TARGET_I386
673 smbios_add_field(1, offsetof(struct smbios_type_1, uuid), 16, uuid);
674#endif
675 return 0;
676}
677
678void do_acpitable_option(const char *optarg)
679{
680#ifdef TARGET_I386
681 if (acpi_table_add(optarg) < 0) {
682 fprintf(stderr, "Wrong acpi table provided\n");
683 exit(1);
684 }
685#endif
686}
687
688void do_smbios_option(const char *optarg)
689{
690#ifdef TARGET_I386
691 if (smbios_entry_add(optarg) < 0) {
692 fprintf(stderr, "Wrong smbios provided\n");
693 exit(1);
694 }
695#endif
696}
697
698void cpudef_init(void)
699{
700#if defined(cpudef_setup)
701 cpudef_setup(); /* parse cpu definitions in target config file */
702#endif
703}
704
705int audio_available(void)
706{
707#ifdef HAS_AUDIO
708 return 1;
709#else
710 return 0;
711#endif
712}
713
303d4e86
AP
714int tcg_available(void)
715{
716 return 1;
717}
718
ad96090a
BS
719int kvm_available(void)
720{
721#ifdef CONFIG_KVM
722 return 1;
723#else
724 return 0;
725#endif
726}
727
728int xen_available(void)
729{
730#ifdef CONFIG_XEN
731 return 1;
732#else
733 return 0;
734#endif
735}