[mirror_qemu.git] / bsd-user / arm / target_arch_cpu.h

/*
 *  arm cpu init and loop
 *
 *  Copyright (c) 2013 Stacey D. Son
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, see <http://www.gnu.org/licenses/>.
 */

#ifndef TARGET_ARCH_CPU_H
#define TARGET_ARCH_CPU_H

#include "target_arch.h"
#include "signal-common.h"

#define TARGET_DEFAULT_CPU_MODEL "any"

static inline void target_cpu_init(CPUARMState *env,
        struct target_pt_regs *regs)
{
    int i;

    cpsr_write(env, regs->uregs[16], CPSR_USER | CPSR_EXEC,
               CPSRWriteByInstr);
    for (i = 0; i < 16; i++) {
        env->regs[i] = regs->uregs[i];
    }
}

static inline void target_cpu_loop(CPUARMState *env)
{
    int trapnr, si_signo, si_code;
    CPUState *cs = env_cpu(env);

    for (;;) {
        cpu_exec_start(cs);
        trapnr = cpu_exec(cs);
        cpu_exec_end(cs);
        process_queued_cpu_work(cs);
        switch (trapnr) {
        case EXCP_UDEF:
        case EXCP_NOCP:
        case EXCP_INVSTATE:
            /*
             * See arm/arm/undefined.c undefinedinstruction();
             *
             * A number of details aren't emulated (they likely don't matter):
             * o Misaligned PC generates ILL_ILLADR (these can't come from qemu)
             * o Thumb-2 instructions generate ILLADR
             * o Both modes implement coprocessor instructions, which we don't
             *   do here. FreeBSD just implements them for the VFP coprocessor
             *   and special kernel breakpoints, trace points, dtrace, etc.
             */
            force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC, env->regs[15]);
            break;
        case EXCP_SWI:
            {
                int ret;
                abi_ulong params = get_sp_from_cpustate(env);
                int32_t syscall_nr = env->regs[7];
                int32_t arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8;

                /* See arm/arm/syscall.c cpu_fetch_syscall_args() */
                if (syscall_nr == TARGET_FREEBSD_NR_syscall) {
                    syscall_nr = env->regs[0];
                    arg1 = env->regs[1];
                    arg2 = env->regs[2];
                    arg3 = env->regs[3];
                    get_user_s32(arg4, params);
                    params += sizeof(int32_t);
                    get_user_s32(arg5, params);
                    params += sizeof(int32_t);
                    get_user_s32(arg6, params);
                    params += sizeof(int32_t);
                    get_user_s32(arg7, params);
                    arg8 = 0;
                } else if (syscall_nr == TARGET_FREEBSD_NR___syscall) {
                    syscall_nr = env->regs[0];
                    arg1 = env->regs[2];
                    arg2 = env->regs[3];
                    get_user_s32(arg3, params);
                    params += sizeof(int32_t);
                    get_user_s32(arg4, params);
                    params += sizeof(int32_t);
                    get_user_s32(arg5, params);
                    params += sizeof(int32_t);
                    get_user_s32(arg6, params);
                    arg7 = 0;
                    arg8 = 0;
                } else {
                    arg1 = env->regs[0];
                    arg2 = env->regs[1];
                    arg3 = env->regs[2];
                    arg4 = env->regs[3];
                    get_user_s32(arg5, params);
                    params += sizeof(int32_t);
                    get_user_s32(arg6, params);
                    params += sizeof(int32_t);
                    get_user_s32(arg7, params);
                    params += sizeof(int32_t);
                    get_user_s32(arg8, params);
                }
                ret = do_freebsd_syscall(env, syscall_nr, arg1, arg2, arg3,
                                         arg4, arg5, arg6, arg7, arg8);
                /*
                 * Compare to arm/arm/vm_machdep.c
                 * cpu_set_syscall_retval()
                 */
                if (-TARGET_EJUSTRETURN == ret) {
                    /*
                     * Returning from a successful sigreturn syscall.
                     * Avoid clobbering register state.
                     */
                    break;
                }
                if (-TARGET_ERESTART == ret) {
                    env->regs[15] -= env->thumb ? 2 : 4;
                    break;
                }
                if ((unsigned int)ret >= (unsigned int)(-515)) {
                    ret = -ret;
                    cpsr_write(env, CPSR_C, CPSR_C, CPSRWriteByInstr);
                    env->regs[0] = ret;
                } else {
                    cpsr_write(env, 0, CPSR_C, CPSRWriteByInstr);
                    env->regs[0] = ret; /* XXX need to handle lseek()? */
                    /* env->regs[1] = 0; */
                }
            }
            break;
        case EXCP_INTERRUPT:
            /* just indicate that signals should be handled asap */
            break;
        case EXCP_PREFETCH_ABORT:
        case EXCP_DATA_ABORT:
            /*
             * See arm/arm/trap-v6.c prefetch_abort_handler() and
             * data_abort_handler()
             *
             * However, FreeBSD maps these to a generic value and then uses that
             * to maybe fault in pages in vm/vm_fault.c:vm_fault_trap(). I
             * believe that the indirection maps the same as Linux, but haven't
             * chased down every single possible indirection.
             */

            /* For user-only we don't set TTBCR_EAE, so look at the FSR. */
            switch (env->exception.fsr & 0x1f) {
            case 0x1: /* Alignment */
                si_signo = TARGET_SIGBUS;
                si_code = TARGET_BUS_ADRALN;
                break;
            case 0x3: /* Access flag fault, level 1 */
            case 0x6: /* Access flag fault, level 2 */
            case 0x9: /* Domain fault, level 1 */
            case 0xb: /* Domain fault, level 2 */
            case 0xd: /* Permission fault, level 1 */
            case 0xf: /* Permission fault, level 2 */
                si_signo = TARGET_SIGSEGV;
                si_code = TARGET_SEGV_ACCERR;
                break;
            case 0x5: /* Translation fault, level 1 */
            case 0x7: /* Translation fault, level 2 */
                si_signo = TARGET_SIGSEGV;
                si_code = TARGET_SEGV_MAPERR;
                break;
            default:
                g_assert_not_reached();
            }
            force_sig_fault(si_signo, si_code, env->exception.vaddress);
            break;
        case EXCP_DEBUG:
        case EXCP_BKPT:
            force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->regs[15]);
            break;
        case EXCP_YIELD:
            /* nothing to do here for user-mode, just resume guest code */
            break;
        case EXCP_ATOMIC:
            cpu_exec_step_atomic(cs);
            break;
        default:
            fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
                    trapnr);
            cpu_dump_state(cs, stderr, 0);
            abort();
        } /* switch() */
        process_pending_signals(env);
    } /* for (;;) */
}

static inline void target_cpu_clone_regs(CPUARMState *env, target_ulong newsp)
{
    if (newsp) {
        env->regs[13] = newsp;
    }
    env->regs[0] = 0;
}

static inline void target_cpu_reset(CPUArchState *env)
{
}

#endif /* TARGET_ARCH_CPU_H */
Commit	Line	Data
ca5d32a3 WL	1	/*
	2	* arm cpu init and loop
	3	*
	4	* Copyright (c) 2013 Stacey D. Son
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
9c092804 MA	20	#ifndef TARGET_ARCH_CPU_H
9c092804 MA	21	#define TARGET_ARCH_CPU_H
ca5d32a3 WL	22
ca5d32a3 WL	23	#include "target_arch.h"
2bd010c4	24	#include "signal-common.h"
ca5d32a3 WL	25
	26	#define TARGET_DEFAULT_CPU_MODEL "any"
	27
	28	static inline void target_cpu_init(CPUARMState *env,
	29	struct target_pt_regs *regs)
	30	{
	31	int i;
	32
	33	cpsr_write(env, regs->uregs[16], CPSR_USER \| CPSR_EXEC,
	34	CPSRWriteByInstr);
	35	for (i = 0; i < 16; i++) {
	36	env->regs[i] = regs->uregs[i];
	37	}
	38	}
	39
06efe3bf WL	40	static inline void target_cpu_loop(CPUARMState *env)
06efe3bf WL	41	{
67ccbe79	42	int trapnr, si_signo, si_code;
06efe3bf WL	43	CPUState *cs = env_cpu(env);
	44
	45	for (;;) {
	46	cpu_exec_start(cs);
	47	trapnr = cpu_exec(cs);
	48	cpu_exec_end(cs);
	49	process_queued_cpu_work(cs);
	50	switch (trapnr) {
70985aec	51	case EXCP_UDEF:
5e02ded1 WL	52	case EXCP_NOCP:
	53	case EXCP_INVSTATE:
	54	/*
	55	* See arm/arm/undefined.c undefinedinstruction();
	56	*
	57	* A number of details aren't emulated (they likely don't matter):
	58	* o Misaligned PC generates ILL_ILLADR (these can't come from qemu)
	59	* o Thumb-2 instructions generate ILLADR
	60	* o Both modes implement coprocessor instructions, which we don't
	61	* do here. FreeBSD just implements them for the VFP coprocessor
	62	* and special kernel breakpoints, trace points, dtrace, etc.
	63	*/
	64	force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC, env->regs[15]);
70985aec	65	break;
8d450c9a	66	case EXCP_SWI:
8d450c9a	67	{
e555e709 WL	68	int ret;
	69	abi_ulong params = get_sp_from_cpustate(env);
	70	int32_t syscall_nr = env->regs[7];
	71	int32_t arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8;
8d450c9a	72
e555e709 WL	73	/* See arm/arm/syscall.c cpu_fetch_syscall_args() */
	74	if (syscall_nr == TARGET_FREEBSD_NR_syscall) {
	75	syscall_nr = env->regs[0];
	76	arg1 = env->regs[1];
	77	arg2 = env->regs[2];
	78	arg3 = env->regs[3];
	79	get_user_s32(arg4, params);
	80	params += sizeof(int32_t);
	81	get_user_s32(arg5, params);
	82	params += sizeof(int32_t);
	83	get_user_s32(arg6, params);
	84	params += sizeof(int32_t);
	85	get_user_s32(arg7, params);
	86	arg8 = 0;
	87	} else if (syscall_nr == TARGET_FREEBSD_NR___syscall) {
	88	syscall_nr = env->regs[0];
	89	arg1 = env->regs[2];
	90	arg2 = env->regs[3];
	91	get_user_s32(arg3, params);
	92	params += sizeof(int32_t);
	93	get_user_s32(arg4, params);
	94	params += sizeof(int32_t);
	95	get_user_s32(arg5, params);
	96	params += sizeof(int32_t);
	97	get_user_s32(arg6, params);
	98	arg7 = 0;
	99	arg8 = 0;
	100	} else {
	101	arg1 = env->regs[0];
	102	arg2 = env->regs[1];
	103	arg3 = env->regs[2];
	104	arg4 = env->regs[3];
	105	get_user_s32(arg5, params);
	106	params += sizeof(int32_t);
	107	get_user_s32(arg6, params);
	108	params += sizeof(int32_t);
	109	get_user_s32(arg7, params);
	110	params += sizeof(int32_t);
	111	get_user_s32(arg8, params);
	112	}
	113	ret = do_freebsd_syscall(env, syscall_nr, arg1, arg2, arg3,
	114	arg4, arg5, arg6, arg7, arg8);
	115	/*
	116	* Compare to arm/arm/vm_machdep.c
	117	* cpu_set_syscall_retval()
	118	*/
	119	if (-TARGET_EJUSTRETURN == ret) {
8d450c9a	120	/*
e555e709 WL	121	* Returning from a successful sigreturn syscall.
e555e709 WL	122	* Avoid clobbering register state.
8d450c9a	123	*/
e555e709 WL	124	break;
	125	}
	126	if (-TARGET_ERESTART == ret) {
	127	env->regs[15] -= env->thumb ? 2 : 4;
	128	break;
	129	}
	130	if ((unsigned int)ret >= (unsigned int)(-515)) {
	131	ret = -ret;
	132	cpsr_write(env, CPSR_C, CPSR_C, CPSRWriteByInstr);
	133	env->regs[0] = ret;
8d450c9a	134	} else {
e555e709 WL	135	cpsr_write(env, 0, CPSR_C, CPSRWriteByInstr);
	136	env->regs[0] = ret; /* XXX need to handle lseek()? */
	137	/* env->regs[1] = 0; */
8d450c9a WL	138	}
	139	}
	140	break;
70985aec WL	141	case EXCP_INTERRUPT:
	142	/* just indicate that signals should be handled asap */
	143	break;
ef1412bd	144	case EXCP_PREFETCH_ABORT:
ef1412bd	145	case EXCP_DATA_ABORT:
67ccbe79 WL	146	/*
	147	* See arm/arm/trap-v6.c prefetch_abort_handler() and
	148	* data_abort_handler()
	149	*
	150	* However, FreeBSD maps these to a generic value and then uses that
	151	* to maybe fault in pages in vm/vm_fault.c:vm_fault_trap(). I
	152	* believe that the indirection maps the same as Linux, but haven't
	153	* chased down every single possible indirection.
	154	*/
	155
	156	/* For user-only we don't set TTBCR_EAE, so look at the FSR. */
	157	switch (env->exception.fsr & 0x1f) {
	158	case 0x1: /* Alignment */
	159	si_signo = TARGET_SIGBUS;
	160	si_code = TARGET_BUS_ADRALN;
	161	break;
	162	case 0x3: /* Access flag fault, level 1 */
	163	case 0x6: /* Access flag fault, level 2 */
	164	case 0x9: /* Domain fault, level 1 */
	165	case 0xb: /* Domain fault, level 2 */
	166	case 0xd: /* Permission fault, level 1 */
	167	case 0xf: /* Permission fault, level 2 */
	168	si_signo = TARGET_SIGSEGV;
	169	si_code = TARGET_SEGV_ACCERR;
	170	break;
	171	case 0x5: /* Translation fault, level 1 */
	172	case 0x7: /* Translation fault, level 2 */
	173	si_signo = TARGET_SIGSEGV;
	174	si_code = TARGET_SEGV_MAPERR;
	175	break;
	176	default:
	177	g_assert_not_reached();
	178	}
	179	force_sig_fault(si_signo, si_code, env->exception.vaddress);
ef1412bd	180	break;
70985aec	181	case EXCP_DEBUG:
a3ed97ce WL	182	case EXCP_BKPT:
a3ed97ce WL	183	force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->regs[15]);
70985aec	184	break;
70985aec WL	185	case EXCP_YIELD:
	186	/* nothing to do here for user-mode, just resume guest code */
	187	break;
c0d2691c WL	188	case EXCP_ATOMIC:
	189	cpu_exec_step_atomic(cs);
	190	break;
06efe3bf WL	191	default:
	192	fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
	193	trapnr);
	194	cpu_dump_state(cs, stderr, 0);
	195	abort();
	196	} /* switch() */
	197	process_pending_signals(env);
	198	} /* for (;;) */
	199	}
	200
e17d4c9a WL	201	static inline void target_cpu_clone_regs(CPUARMState *env, target_ulong newsp)
	202	{
	203	if (newsp) {
	204	env->regs[13] = newsp;
	205	}
	206	env->regs[0] = 0;
	207	}
	208
bab6ccc5	209	static inline void target_cpu_reset(CPUArchState *env)
ca5d32a3 WL	210	{
	211	}
	212
9c092804	213	#endif /* TARGET_ARCH_CPU_H */