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1 | /* |
2 | * arm thread support | |
3 | * | |
4 | * Copyright (c) 2013 Stacey D. Son | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | #ifndef _TARGET_ARCH_THREAD_H_ | |
20 | #define _TARGET_ARCH_THREAD_H_ | |
21 | ||
22 | /* Compare to arm/arm/vm_machdep.c cpu_set_upcall_kse() */ | |
23 | static inline void target_thread_set_upcall(CPUARMState *env, abi_ulong entry, | |
24 | abi_ulong arg, abi_ulong stack_base, abi_ulong stack_size) | |
25 | { | |
26 | abi_ulong sp; | |
27 | ||
28 | /* | |
29 | * Make sure the stack is properly aligned. | |
30 | * arm/include/param.h (STACKLIGN() macro) | |
31 | */ | |
32 | sp = (u_int)(stack_base + stack_size) & ~0x7; | |
33 | ||
34 | /* sp = stack base */ | |
35 | env->regs[13] = sp; | |
36 | /* pc = start function entry */ | |
37 | env->regs[15] = entry & 0xfffffffe; | |
38 | /* r0 = arg */ | |
39 | env->regs[0] = arg; | |
40 | env->spsr = ARM_CPU_MODE_USR; | |
41 | /* | |
42 | * Thumb mode is encoded by the low bit in the entry point (since ARM can't | |
43 | * execute at odd addresses). When it's set, set the Thumb bit (T) in the | |
44 | * CPSR. | |
45 | */ | |
46 | cpsr_write(env, (entry & 1) * CPSR_T, CPSR_T, CPSRWriteByInstr); | |
47 | } | |
48 | ||
49 | static inline void target_thread_init(struct target_pt_regs *regs, | |
50 | struct image_info *infop) | |
51 | { | |
52 | abi_long stack = infop->start_stack; | |
53 | memset(regs, 0, sizeof(*regs)); | |
54 | regs->ARM_cpsr = ARM_CPU_MODE_USR; | |
55 | /* | |
56 | * Thumb mode is encoded by the low bit in the entry point (since ARM can't | |
57 | * execute at odd addresses). When it's set, set the Thumb bit (T) in the | |
58 | * CPSR. | |
59 | */ | |
60 | if (infop->entry & 1) { | |
61 | regs->ARM_cpsr |= CPSR_T; | |
62 | } | |
63 | regs->ARM_pc = infop->entry & 0xfffffffe; | |
64 | regs->ARM_sp = stack; | |
65 | if (bsd_type == target_freebsd) { | |
66 | regs->ARM_lr = infop->entry & 0xfffffffe; | |
67 | } | |
68 | /* | |
69 | * FreeBSD kernel passes the ps_strings pointer in r0. This is used by some | |
70 | * programs to set status messages that we see in ps. bsd-user doesn't | |
71 | * support that functionality, so it's ignored. When set to 0, FreeBSD's csu | |
72 | * code ignores it. For the static case, r1 and r2 are effectively ignored | |
73 | * by the csu __startup() routine. For the dynamic case, rtld saves r0 but | |
74 | * generates r1 and r2 and passes them into the csu _startup. | |
75 | * | |
76 | * r0 ps_strings 0 passed since ps arg setting not supported | |
77 | * r1 obj_main ignored by _start(), so 0 passed | |
78 | * r2 cleanup generated by rtld or ignored by _start(), so 0 passed | |
79 | */ | |
80 | } | |
81 | ||
82 | #endif /* !_TARGET_ARCH_THREAD_H_ */ |