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902b3d5c | 1 | #ifndef QEMU_CACHE_UTILS_H |
2 | #define QEMU_CACHE_UTILS_H | |
3 | ||
e58ffeb3 | 4 | #if defined(_ARCH_PPC) |
e04b2899 SW |
5 | |
6 | #include <stdint.h> /* uintptr_t */ | |
7 | ||
902b3d5c | 8 | struct qemu_cache_conf { |
9 | unsigned long dcache_bsize; | |
10 | unsigned long icache_bsize; | |
11 | }; | |
12 | ||
13 | extern struct qemu_cache_conf qemu_cache_conf; | |
14 | ||
64b85a8f | 15 | void qemu_cache_utils_init(char **envp); |
902b3d5c | 16 | |
17 | /* mildly adjusted code from tcg-dyngen.c */ | |
021ecd8b | 18 | static inline void flush_icache_range(uintptr_t start, uintptr_t stop) |
902b3d5c | 19 | { |
20 | unsigned long p, start1, stop1; | |
21 | unsigned long dsize = qemu_cache_conf.dcache_bsize; | |
22 | unsigned long isize = qemu_cache_conf.icache_bsize; | |
23 | ||
24 | start1 = start & ~(dsize - 1); | |
25 | stop1 = (stop + dsize - 1) & ~(dsize - 1); | |
26 | for (p = start1; p < stop1; p += dsize) { | |
27 | asm volatile ("dcbst 0,%0" : : "r"(p) : "memory"); | |
28 | } | |
29 | asm volatile ("sync" : : : "memory"); | |
30 | ||
31 | start &= start & ~(isize - 1); | |
32 | stop1 = (stop + isize - 1) & ~(isize - 1); | |
33 | for (p = start1; p < stop1; p += isize) { | |
34 | asm volatile ("icbi 0,%0" : : "r"(p) : "memory"); | |
35 | } | |
36 | asm volatile ("sync" : : : "memory"); | |
37 | asm volatile ("isync" : : : "memory"); | |
38 | } | |
39 | ||
40 | #else | |
41 | #define qemu_cache_utils_init(envp) do { (void) (envp); } while (0) | |
42 | #endif | |
43 | ||
44 | #endif /* QEMU_CACHE_UTILS_H */ |