[rustc.git] / compiler / rustc_target / src / asm / powerpc.rs

use super::{InlineAsmArch, InlineAsmType, ModifierInfo};
use rustc_span::Symbol;
use std::fmt;

def_reg_class! {
    PowerPC PowerPCInlineAsmRegClass {
        reg,
        reg_nonzero,
        freg,
        cr,
        xer,
    }
}

impl PowerPCInlineAsmRegClass {
    pub fn valid_modifiers(self, _arch: super::InlineAsmArch) -> &'static [char] {
        &[]
    }

    pub fn suggest_class(self, _arch: InlineAsmArch, _ty: InlineAsmType) -> Option<Self> {
        None
    }

    pub fn suggest_modifier(
        self,
        _arch: InlineAsmArch,
        _ty: InlineAsmType,
    ) -> Option<ModifierInfo> {
        None
    }

    pub fn default_modifier(self, _arch: InlineAsmArch) -> Option<ModifierInfo> {
        None
    }

    pub fn supported_types(
        self,
        arch: InlineAsmArch,
    ) -> &'static [(InlineAsmType, Option<Symbol>)] {
        match self {
            Self::reg | Self::reg_nonzero => {
                if arch == InlineAsmArch::PowerPC {
                    types! { _: I8, I16, I32; }
                } else {
                    types! { _: I8, I16, I32, I64; }
                }
            }
            Self::freg => types! { _: F32, F64; },
            Self::cr | Self::xer => &[],
        }
    }
}

def_regs! {
    PowerPC PowerPCInlineAsmReg PowerPCInlineAsmRegClass {
        r0: reg = ["r0", "0"],
        r3: reg, reg_nonzero = ["r3", "3"],
        r4: reg, reg_nonzero = ["r4", "4"],
        r5: reg, reg_nonzero = ["r5", "5"],
        r6: reg, reg_nonzero = ["r6", "6"],
        r7: reg, reg_nonzero = ["r7", "7"],
        r8: reg, reg_nonzero = ["r8", "8"],
        r9: reg, reg_nonzero = ["r9", "9"],
        r10: reg, reg_nonzero = ["r10", "10"],
        r11: reg, reg_nonzero = ["r11", "11"],
        r12: reg, reg_nonzero = ["r12", "12"],
        r14: reg, reg_nonzero = ["r14", "14"],
        r15: reg, reg_nonzero = ["r15", "15"],
        r16: reg, reg_nonzero = ["r16", "16"],
        r17: reg, reg_nonzero = ["r17", "17"],
        r18: reg, reg_nonzero = ["r18", "18"],
        r19: reg, reg_nonzero = ["r19", "19"],
        r20: reg, reg_nonzero = ["r20", "20"],
        r21: reg, reg_nonzero = ["r21", "21"],
        r22: reg, reg_nonzero = ["r22", "22"],
        r23: reg, reg_nonzero = ["r23", "23"],
        r24: reg, reg_nonzero = ["r24", "24"],
        r25: reg, reg_nonzero = ["r25", "25"],
        r26: reg, reg_nonzero = ["r26", "26"],
        r27: reg, reg_nonzero = ["r27", "27"],
        r28: reg, reg_nonzero = ["r28", "28"],
        f0: freg = ["f0", "fr0"],
        f1: freg = ["f1", "fr1"],
        f2: freg = ["f2", "fr2"],
        f3: freg = ["f3", "fr3"],
        f4: freg = ["f4", "fr4"],
        f5: freg = ["f5", "fr5"],
        f6: freg = ["f6", "fr6"],
        f7: freg = ["f7", "fr7"],
        f8: freg = ["f8", "fr8"],
        f9: freg = ["f9", "fr9"],
        f10: freg = ["f10", "fr10"],
        f11: freg = ["f11", "fr11"],
        f12: freg = ["f12", "fr12"],
        f13: freg = ["f13", "fr13"],
        f14: freg = ["f14", "fr14"],
        f15: freg = ["f15", "fr15"],
        f16: freg = ["f16", "fr16"],
        f17: freg = ["f17", "fr17"],
        f18: freg = ["f18", "fr18"],
        f19: freg = ["f19", "fr19"],
        f20: freg = ["f20", "fr20"],
        f21: freg = ["f21", "fr21"],
        f22: freg = ["f22", "fr22"],
        f23: freg = ["f23", "fr23"],
        f24: freg = ["f24", "fr24"],
        f25: freg = ["f25", "fr25"],
        f26: freg = ["f26", "fr26"],
        f27: freg = ["f27", "fr27"],
        f28: freg = ["f28", "fr28"],
        f29: freg = ["f29", "fr29"],
        f30: freg = ["f30", "fr30"],
        f31: freg = ["f31", "fr31"],
        cr: cr = ["cr"],
        cr0: cr = ["cr0"],
        cr1: cr = ["cr1"],
        cr2: cr = ["cr2"],
        cr3: cr = ["cr3"],
        cr4: cr = ["cr4"],
        cr5: cr = ["cr5"],
        cr6: cr = ["cr6"],
        cr7: cr = ["cr7"],
        xer: xer = ["xer"],
        #error = ["r1", "1", "sp"] =>
            "the stack pointer cannot be used as an operand for inline asm",
        #error = ["r2", "2"] =>
            "r2 is a system reserved register and cannot be used as an operand for inline asm",
        #error = ["r13", "13"] =>
            "r13 is a system reserved register and cannot be used as an operand for inline asm",
        #error = ["r29", "29"] =>
            "r29 is used internally by LLVM and cannot be used as an operand for inline asm",
        #error = ["r30", "30"] =>
            "r30 is used internally by LLVM and cannot be used as an operand for inline asm",
        #error = ["r31", "31", "fp"] =>
            "the frame pointer cannot be used as an operand for inline asm",
        #error = ["lr"] =>
            "the link register cannot be used as an operand for inline asm",
        #error = ["ctr"] =>
            "the counter register cannot be used as an operand for inline asm",
        #error = ["vrsave"] =>
            "the vrsave register cannot be used as an operand for inline asm",
    }
}

impl PowerPCInlineAsmReg {
    pub fn emit(
        self,
        out: &mut dyn fmt::Write,
        _arch: InlineAsmArch,
        _modifier: Option<char>,
    ) -> fmt::Result {
        macro_rules! do_emit {
            (
                $($(($reg:ident, $value:literal)),*;)*
            ) => {
                out.write_str(match self {
                    $($(Self::$reg => $value,)*)*
                })
            };
        }
        // Strip off the leading prefix.
        do_emit! {
            (r0, "0"), (r3, "3"), (r4, "4"), (r5, "5"), (r6, "6"), (r7, "7");
            (r8, "8"), (r9, "9"), (r10, "10"), (r11, "11"), (r12, "12"), (r14, "14"), (r15, "15");
            (r16, "16"), (r17, "17"), (r18, "18"), (r19, "19"), (r20, "20"), (r21, "21"), (r22, "22"), (r23, "23");
            (r24, "24"), (r25, "25"), (r26, "26"), (r27, "27"), (r28, "28");
            (f0, "0"), (f1, "1"), (f2, "2"), (f3, "3"), (f4, "4"), (f5, "5"), (f6, "6"), (f7, "7");
            (f8, "8"), (f9, "9"), (f10, "10"), (f11, "11"), (f12, "12"), (f13, "13"), (f14, "14"), (f15, "15");
            (f16, "16"), (f17, "17"), (f18, "18"), (f19, "19"), (f20, "20"), (f21, "21"), (f22, "22"), (f23, "23");
            (f24, "24"), (f25, "25"), (f26, "26"), (f27, "27"), (f28, "28"), (f29, "29"), (f30, "30"), (f31, "31");
            (cr, "cr");
            (cr0, "0"), (cr1, "1"), (cr2, "2"), (cr3, "3"), (cr4, "4"), (cr5, "5"), (cr6, "6"), (cr7, "7");
            (xer, "xer");
        }
    }

    pub fn overlapping_regs(self, mut cb: impl FnMut(PowerPCInlineAsmReg)) {
        macro_rules! reg_conflicts {
            (
                $(
                    $full:ident : $($field:ident)*
                ),*;
            ) => {
                match self {
                    $(
                        Self::$full => {
                            cb(Self::$full);
                            $(cb(Self::$field);)*
                        }
                        $(Self::$field)|* => {
                            cb(Self::$full);
                            cb(self);
                        }
                    )*
                    r => cb(r),
                }
            };
        }
        reg_conflicts! {
            cr : cr0 cr1 cr2 cr3 cr4 cr5 cr6 cr7;
        }
    }
}
Commit	Line	Data
e8be2606	1	use super::{InlineAsmArch, InlineAsmType, ModifierInfo};
5099ac24	2	use rustc_span::Symbol;
17df50a5 XL	3	use std::fmt;
	4
	5	def_reg_class! {
	6	PowerPC PowerPCInlineAsmRegClass {
	7	reg,
	8	reg_nonzero,
	9	freg,
94222f64 XL	10	cr,
94222f64 XL	11	xer,
17df50a5 XL	12	}
	13	}
	14
	15	impl PowerPCInlineAsmRegClass {
	16	pub fn valid_modifiers(self, _arch: super::InlineAsmArch) -> &'static [char] {
	17	&[]
	18	}
	19
	20	pub fn suggest_class(self, _arch: InlineAsmArch, _ty: InlineAsmType) -> Option<Self> {
	21	None
	22	}
	23
	24	pub fn suggest_modifier(
	25	self,
	26	_arch: InlineAsmArch,
	27	_ty: InlineAsmType,
e8be2606	28	) -> Option<ModifierInfo> {
17df50a5 XL	29	None
	30	}
	31
e8be2606	32	pub fn default_modifier(self, _arch: InlineAsmArch) -> Option<ModifierInfo> {
17df50a5 XL	33	None
	34	}
	35
	36	pub fn supported_types(
	37	self,
	38	arch: InlineAsmArch,
5099ac24	39	) -> &'static [(InlineAsmType, Option<Symbol>)] {
17df50a5 XL	40	match self {
	41	Self::reg \| Self::reg_nonzero => {
	42	if arch == InlineAsmArch::PowerPC {
	43	types! { _: I8, I16, I32; }
	44	} else {
	45	types! { _: I8, I16, I32, I64; }
	46	}
	47	}
	48	Self::freg => types! { _: F32, F64; },
94222f64	49	Self::cr \| Self::xer => &[],
17df50a5 XL	50	}
	51	}
	52	}
	53
	54	def_regs! {
	55	PowerPC PowerPCInlineAsmReg PowerPCInlineAsmRegClass {
	56	r0: reg = ["r0", "0"],
	57	r3: reg, reg_nonzero = ["r3", "3"],
	58	r4: reg, reg_nonzero = ["r4", "4"],
	59	r5: reg, reg_nonzero = ["r5", "5"],
	60	r6: reg, reg_nonzero = ["r6", "6"],
	61	r7: reg, reg_nonzero = ["r7", "7"],
	62	r8: reg, reg_nonzero = ["r8", "8"],
	63	r9: reg, reg_nonzero = ["r9", "9"],
	64	r10: reg, reg_nonzero = ["r10", "10"],
	65	r11: reg, reg_nonzero = ["r11", "11"],
	66	r12: reg, reg_nonzero = ["r12", "12"],
	67	r14: reg, reg_nonzero = ["r14", "14"],
	68	r15: reg, reg_nonzero = ["r15", "15"],
	69	r16: reg, reg_nonzero = ["r16", "16"],
	70	r17: reg, reg_nonzero = ["r17", "17"],
	71	r18: reg, reg_nonzero = ["r18", "18"],
	72	r19: reg, reg_nonzero = ["r19", "19"],
	73	r20: reg, reg_nonzero = ["r20", "20"],
	74	r21: reg, reg_nonzero = ["r21", "21"],
	75	r22: reg, reg_nonzero = ["r22", "22"],
	76	r23: reg, reg_nonzero = ["r23", "23"],
	77	r24: reg, reg_nonzero = ["r24", "24"],
	78	r25: reg, reg_nonzero = ["r25", "25"],
	79	r26: reg, reg_nonzero = ["r26", "26"],
	80	r27: reg, reg_nonzero = ["r27", "27"],
	81	r28: reg, reg_nonzero = ["r28", "28"],
	82	f0: freg = ["f0", "fr0"],
	83	f1: freg = ["f1", "fr1"],
	84	f2: freg = ["f2", "fr2"],
	85	f3: freg = ["f3", "fr3"],
	86	f4: freg = ["f4", "fr4"],
	87	f5: freg = ["f5", "fr5"],
	88	f6: freg = ["f6", "fr6"],
	89	f7: freg = ["f7", "fr7"],
	90	f8: freg = ["f8", "fr8"],
	91	f9: freg = ["f9", "fr9"],
	92	f10: freg = ["f10", "fr10"],
	93	f11: freg = ["f11", "fr11"],
	94	f12: freg = ["f12", "fr12"],
	95	f13: freg = ["f13", "fr13"],
	96	f14: freg = ["f14", "fr14"],
	97	f15: freg = ["f15", "fr15"],
	98	f16: freg = ["f16", "fr16"],
	99	f17: freg = ["f17", "fr17"],
	100	f18: freg = ["f18", "fr18"],
	101	f19: freg = ["f19", "fr19"],
	102	f20: freg = ["f20", "fr20"],
	103	f21: freg = ["f21", "fr21"],
	104	f22: freg = ["f22", "fr22"],
	105	f23: freg = ["f23", "fr23"],
	106	f24: freg = ["f24", "fr24"],
	107	f25: freg = ["f25", "fr25"],
	108	f26: freg = ["f26", "fr26"],
	109	f27: freg = ["f27", "fr27"],
	110	f28: freg = ["f28", "fr28"],
	111	f29: freg = ["f29", "fr29"],
	112	f30: freg = ["f30", "fr30"],
	113	f31: freg = ["f31", "fr31"],
94222f64 XL	114	cr: cr = ["cr"],
	115	cr0: cr = ["cr0"],
	116	cr1: cr = ["cr1"],
	117	cr2: cr = ["cr2"],
	118	cr3: cr = ["cr3"],
	119	cr4: cr = ["cr4"],
	120	cr5: cr = ["cr5"],
	121	cr6: cr = ["cr6"],
	122	cr7: cr = ["cr7"],
	123	xer: xer = ["xer"],
17df50a5 XL	124	#error = ["r1", "1", "sp"] =>
	125	"the stack pointer cannot be used as an operand for inline asm",
	126	#error = ["r2", "2"] =>
	127	"r2 is a system reserved register and cannot be used as an operand for inline asm",
	128	#error = ["r13", "13"] =>
	129	"r13 is a system reserved register and cannot be used as an operand for inline asm",
	130	#error = ["r29", "29"] =>
	131	"r29 is used internally by LLVM and cannot be used as an operand for inline asm",
	132	#error = ["r30", "30"] =>
	133	"r30 is used internally by LLVM and cannot be used as an operand for inline asm",
	134	#error = ["r31", "31", "fp"] =>
	135	"the frame pointer cannot be used as an operand for inline asm",
	136	#error = ["lr"] =>
	137	"the link register cannot be used as an operand for inline asm",
	138	#error = ["ctr"] =>
	139	"the counter register cannot be used as an operand for inline asm",
	140	#error = ["vrsave"] =>
	141	"the vrsave register cannot be used as an operand for inline asm",
	142	}
	143	}
	144
	145	impl PowerPCInlineAsmReg {
	146	pub fn emit(
	147	self,
	148	out: &mut dyn fmt::Write,
	149	_arch: InlineAsmArch,
	150	_modifier: Option<char>,
	151	) -> fmt::Result {
94222f64 XL	152	macro_rules! do_emit {
	153	(
	154	$($(($reg:ident, $value:literal)),;)
	155	) => {
	156	out.write_str(match self {
	157	$($(Self::$reg => $value,))
	158	})
	159	};
	160	}
17df50a5	161	// Strip off the leading prefix.
94222f64 XL	162	do_emit! {
	163	(r0, "0"), (r3, "3"), (r4, "4"), (r5, "5"), (r6, "6"), (r7, "7");
	164	(r8, "8"), (r9, "9"), (r10, "10"), (r11, "11"), (r12, "12"), (r14, "14"), (r15, "15");
	165	(r16, "16"), (r17, "17"), (r18, "18"), (r19, "19"), (r20, "20"), (r21, "21"), (r22, "22"), (r23, "23");
	166	(r24, "24"), (r25, "25"), (r26, "26"), (r27, "27"), (r28, "28");
	167	(f0, "0"), (f1, "1"), (f2, "2"), (f3, "3"), (f4, "4"), (f5, "5"), (f6, "6"), (f7, "7");
	168	(f8, "8"), (f9, "9"), (f10, "10"), (f11, "11"), (f12, "12"), (f13, "13"), (f14, "14"), (f15, "15");
	169	(f16, "16"), (f17, "17"), (f18, "18"), (f19, "19"), (f20, "20"), (f21, "21"), (f22, "22"), (f23, "23");
	170	(f24, "24"), (f25, "25"), (f26, "26"), (f27, "27"), (f28, "28"), (f29, "29"), (f30, "30"), (f31, "31");
	171	(cr, "cr");
	172	(cr0, "0"), (cr1, "1"), (cr2, "2"), (cr3, "3"), (cr4, "4"), (cr5, "5"), (cr6, "6"), (cr7, "7");
	173	(xer, "xer");
17df50a5 XL	174	}
	175	}
	176
94222f64 XL	177	pub fn overlapping_regs(self, mut cb: impl FnMut(PowerPCInlineAsmReg)) {
	178	macro_rules! reg_conflicts {
	179	(
	180	$(
	181	$full:ident : $($field:ident)*
	182	),*;
	183	) => {
	184	match self {
	185	$(
	186	Self::$full => {
	187	cb(Self::$full);
	188	$(cb(Self::$field);)*
	189	}
	190	$(Self::$field)\|* => {
	191	cb(Self::$full);
	192	cb(self);
	193	}
	194	)*
	195	r => cb(r),
	196	}
	197	};
	198	}
	199	reg_conflicts! {
	200	cr : cr0 cr1 cr2 cr3 cr4 cr5 cr6 cr7;
	201	}
	202	}
17df50a5	203	}