]>
Commit | Line | Data |
---|---|---|
f9f354fc | 1 | use super::{InlineAsmArch, InlineAsmType}; |
f035d41b | 2 | use crate::spec::Target; |
f9f354fc XL |
3 | use rustc_macros::HashStable_Generic; |
4 | use std::fmt; | |
5 | ||
6 | def_reg_class! { | |
7 | RiscV RiscVInlineAsmRegClass { | |
8 | reg, | |
9 | freg, | |
136023e0 | 10 | vreg, |
f9f354fc XL |
11 | } |
12 | } | |
13 | ||
14 | impl RiscVInlineAsmRegClass { | |
15 | pub fn valid_modifiers(self, _arch: super::InlineAsmArch) -> &'static [char] { | |
16 | &[] | |
17 | } | |
18 | ||
19 | pub fn suggest_class(self, _arch: InlineAsmArch, _ty: InlineAsmType) -> Option<Self> { | |
20 | None | |
21 | } | |
22 | ||
23 | pub fn suggest_modifier( | |
24 | self, | |
25 | _arch: InlineAsmArch, | |
26 | _ty: InlineAsmType, | |
27 | ) -> Option<(char, &'static str)> { | |
28 | None | |
29 | } | |
30 | ||
31 | pub fn default_modifier(self, _arch: InlineAsmArch) -> Option<(char, &'static str)> { | |
32 | None | |
33 | } | |
34 | ||
35 | pub fn supported_types( | |
36 | self, | |
37 | arch: InlineAsmArch, | |
38 | ) -> &'static [(InlineAsmType, Option<&'static str>)] { | |
39 | match self { | |
40 | Self::reg => { | |
41 | if arch == InlineAsmArch::RiscV64 { | |
42 | types! { _: I8, I16, I32, I64, F32, F64; } | |
43 | } else { | |
44 | types! { _: I8, I16, I32, F32; } | |
45 | } | |
46 | } | |
47 | Self::freg => types! { "f": F32; "d": F64; }, | |
136023e0 | 48 | Self::vreg => &[], |
f9f354fc XL |
49 | } |
50 | } | |
51 | } | |
52 | ||
53 | fn not_e( | |
54 | _arch: InlineAsmArch, | |
55 | mut has_feature: impl FnMut(&str) -> bool, | |
f035d41b | 56 | _target: &Target, |
f9f354fc XL |
57 | ) -> Result<(), &'static str> { |
58 | if has_feature("e") { | |
59 | Err("register can't be used with the `e` target feature") | |
60 | } else { | |
61 | Ok(()) | |
62 | } | |
63 | } | |
64 | ||
65 | def_regs! { | |
66 | RiscV RiscVInlineAsmReg RiscVInlineAsmRegClass { | |
67 | x1: reg = ["x1", "ra"], | |
68 | x5: reg = ["x5", "t0"], | |
69 | x6: reg = ["x6", "t1"], | |
70 | x7: reg = ["x7", "t2"], | |
f9f354fc XL |
71 | x10: reg = ["x10", "a0"], |
72 | x11: reg = ["x11", "a1"], | |
73 | x12: reg = ["x12", "a2"], | |
74 | x13: reg = ["x13", "a3"], | |
75 | x14: reg = ["x14", "a4"], | |
76 | x15: reg = ["x15", "a5"], | |
77 | x16: reg = ["x16", "a6"] % not_e, | |
78 | x17: reg = ["x17", "a7"] % not_e, | |
79 | x18: reg = ["x18", "s2"] % not_e, | |
80 | x19: reg = ["x19", "s3"] % not_e, | |
81 | x20: reg = ["x20", "s4"] % not_e, | |
82 | x21: reg = ["x21", "s5"] % not_e, | |
83 | x22: reg = ["x22", "s6"] % not_e, | |
84 | x23: reg = ["x23", "s7"] % not_e, | |
85 | x24: reg = ["x24", "s8"] % not_e, | |
86 | x25: reg = ["x25", "s9"] % not_e, | |
87 | x26: reg = ["x26", "s10"] % not_e, | |
88 | x27: reg = ["x27", "s11"] % not_e, | |
89 | x28: reg = ["x28", "t3"] % not_e, | |
90 | x29: reg = ["x29", "t4"] % not_e, | |
91 | x30: reg = ["x30", "t5"] % not_e, | |
92 | x31: reg = ["x31", "t6"] % not_e, | |
93 | f0: freg = ["f0", "ft0"], | |
94 | f1: freg = ["f1", "ft1"], | |
95 | f2: freg = ["f2", "ft2"], | |
96 | f3: freg = ["f3", "ft3"], | |
97 | f4: freg = ["f4", "ft4"], | |
98 | f5: freg = ["f5", "ft5"], | |
99 | f6: freg = ["f6", "ft6"], | |
100 | f7: freg = ["f7", "ft7"], | |
101 | f8: freg = ["f8", "fs0"], | |
102 | f9: freg = ["f9", "fs1"], | |
103 | f10: freg = ["f10", "fa0"], | |
104 | f11: freg = ["f11", "fa1"], | |
105 | f12: freg = ["f12", "fa2"], | |
106 | f13: freg = ["f13", "fa3"], | |
107 | f14: freg = ["f14", "fa4"], | |
108 | f15: freg = ["f15", "fa5"], | |
109 | f16: freg = ["f16", "fa6"], | |
110 | f17: freg = ["f17", "fa7"], | |
111 | f18: freg = ["f18", "fs2"], | |
112 | f19: freg = ["f19", "fs3"], | |
113 | f20: freg = ["f20", "fs4"], | |
114 | f21: freg = ["f21", "fs5"], | |
115 | f22: freg = ["f22", "fs6"], | |
116 | f23: freg = ["f23", "fs7"], | |
117 | f24: freg = ["f24", "fs8"], | |
118 | f25: freg = ["f25", "fs9"], | |
119 | f26: freg = ["f26", "fs10"], | |
120 | f27: freg = ["f27", "fs11"], | |
121 | f28: freg = ["f28", "ft8"], | |
122 | f29: freg = ["f29", "ft9"], | |
123 | f30: freg = ["f30", "ft10"], | |
124 | f31: freg = ["f31", "ft11"], | |
136023e0 XL |
125 | v0: vreg = ["v0"], |
126 | v1: vreg = ["v1"], | |
127 | v2: vreg = ["v2"], | |
128 | v3: vreg = ["v3"], | |
129 | v4: vreg = ["v4"], | |
130 | v5: vreg = ["v5"], | |
131 | v6: vreg = ["v6"], | |
132 | v7: vreg = ["v7"], | |
133 | v8: vreg = ["v8"], | |
134 | v9: vreg = ["v9"], | |
135 | v10: vreg = ["v10"], | |
136 | v11: vreg = ["v11"], | |
137 | v12: vreg = ["v12"], | |
138 | v13: vreg = ["v13"], | |
139 | v14: vreg = ["v14"], | |
140 | v15: vreg = ["v15"], | |
141 | v16: vreg = ["v16"], | |
142 | v17: vreg = ["v17"], | |
143 | v18: vreg = ["v18"], | |
144 | v19: vreg = ["v19"], | |
145 | v20: vreg = ["v20"], | |
146 | v21: vreg = ["v21"], | |
147 | v22: vreg = ["v22"], | |
148 | v23: vreg = ["v23"], | |
149 | v24: vreg = ["v24"], | |
150 | v25: vreg = ["v25"], | |
151 | v26: vreg = ["v26"], | |
152 | v27: vreg = ["v27"], | |
153 | v28: vreg = ["v28"], | |
154 | v29: vreg = ["v29"], | |
155 | v30: vreg = ["v30"], | |
156 | v31: vreg = ["v31"], | |
17df50a5 XL |
157 | #error = ["x9", "s1"] => |
158 | "s1 is used internally by LLVM and cannot be used as an operand for inline asm", | |
f9f354fc XL |
159 | #error = ["x8", "s0", "fp"] => |
160 | "the frame pointer cannot be used as an operand for inline asm", | |
161 | #error = ["x2", "sp"] => | |
162 | "the stack pointer cannot be used as an operand for inline asm", | |
163 | #error = ["x3", "gp"] => | |
164 | "the global pointer cannot be used as an operand for inline asm", | |
165 | #error = ["x4", "tp"] => | |
166 | "the thread pointer cannot be used as an operand for inline asm" , | |
167 | #error = ["x0", "zero"] => | |
168 | "the zero register cannot be used as an operand for inline asm", | |
169 | } | |
170 | } | |
171 | ||
172 | impl RiscVInlineAsmReg { | |
173 | pub fn emit( | |
174 | self, | |
175 | out: &mut dyn fmt::Write, | |
176 | _arch: InlineAsmArch, | |
177 | _modifier: Option<char>, | |
178 | ) -> fmt::Result { | |
179 | out.write_str(self.name()) | |
180 | } | |
181 | } |