]> git.proxmox.com Git - mirror_qemu.git/blame - cpu-exec.c
apic_common: improve readability of apic_reset_common
[mirror_qemu.git] / cpu-exec.c
CommitLineData
7d13299d 1/*
e965fc38 2 * emulator main execution loop
5fafdf24 3 *
66321a11 4 * Copyright (c) 2003-2005 Fabrice Bellard
7d13299d 5 *
3ef693a0
FB
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
7d13299d 10 *
3ef693a0
FB
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
7d13299d 15 *
3ef693a0 16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
7d13299d 18 */
e4533c7a 19#include "config.h"
cea5f9a2 20#include "cpu.h"
6db8b538 21#include "trace.h"
76cad711 22#include "disas/disas.h"
7cb69cae 23#include "tcg.h"
1de7afc9 24#include "qemu/atomic.h"
9c17d615 25#include "sysemu/qtest.h"
c2aa5f81 26#include "qemu/timer.h"
9d82b5a7
PB
27#include "exec/address-spaces.h"
28#include "exec/memory-internal.h"
79e2b9ae 29#include "qemu/rcu.h"
c2aa5f81
ST
30
31/* -icount align implementation. */
32
33typedef struct SyncClocks {
34 int64_t diff_clk;
35 int64_t last_cpu_icount;
7f7bc144 36 int64_t realtime_clock;
c2aa5f81
ST
37} SyncClocks;
38
39#if !defined(CONFIG_USER_ONLY)
40/* Allow the guest to have a max 3ms advance.
41 * The difference between the 2 clocks could therefore
42 * oscillate around 0.
43 */
44#define VM_CLOCK_ADVANCE 3000000
7f7bc144
ST
45#define THRESHOLD_REDUCE 1.5
46#define MAX_DELAY_PRINT_RATE 2000000000LL
47#define MAX_NB_PRINTS 100
c2aa5f81
ST
48
49static void align_clocks(SyncClocks *sc, const CPUState *cpu)
50{
51 int64_t cpu_icount;
52
53 if (!icount_align_option) {
54 return;
55 }
56
57 cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
58 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
59 sc->last_cpu_icount = cpu_icount;
60
61 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
62#ifndef _WIN32
63 struct timespec sleep_delay, rem_delay;
64 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
65 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
66 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
a498d0ef 67 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
c2aa5f81
ST
68 } else {
69 sc->diff_clk = 0;
70 }
71#else
72 Sleep(sc->diff_clk / SCALE_MS);
73 sc->diff_clk = 0;
74#endif
75 }
76}
77
7f7bc144
ST
78static void print_delay(const SyncClocks *sc)
79{
80 static float threshold_delay;
81 static int64_t last_realtime_clock;
82 static int nb_prints;
83
84 if (icount_align_option &&
85 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
86 nb_prints < MAX_NB_PRINTS) {
87 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
88 (-sc->diff_clk / (float)1000000000LL <
89 (threshold_delay - THRESHOLD_REDUCE))) {
90 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
91 printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
92 threshold_delay - 1,
93 threshold_delay);
94 nb_prints++;
95 last_realtime_clock = sc->realtime_clock;
96 }
97 }
98}
99
c2aa5f81
ST
100static void init_delay_params(SyncClocks *sc,
101 const CPUState *cpu)
102{
103 if (!icount_align_option) {
104 return;
105 }
2e91cc62
PB
106 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
107 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
c2aa5f81 108 sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
27498bef
ST
109 if (sc->diff_clk < max_delay) {
110 max_delay = sc->diff_clk;
111 }
112 if (sc->diff_clk > max_advance) {
113 max_advance = sc->diff_clk;
114 }
7f7bc144
ST
115
116 /* Print every 2s max if the guest is late. We limit the number
117 of printed messages to NB_PRINT_MAX(currently 100) */
118 print_delay(sc);
c2aa5f81
ST
119}
120#else
121static void align_clocks(SyncClocks *sc, const CPUState *cpu)
122{
123}
124
125static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
126{
127}
128#endif /* CONFIG USER ONLY */
7d13299d 129
5638d180 130void cpu_loop_exit(CPUState *cpu)
e4533c7a 131{
d77953b9 132 cpu->current_tb = NULL;
6f03bef0 133 siglongjmp(cpu->jmp_env, 1);
e4533c7a 134}
bfed01fc 135
fbf9eeb3
FB
136/* exit the current TB from a signal handler. The host registers are
137 restored in a state compatible with the CPU emulator
138 */
9eff14f3 139#if defined(CONFIG_SOFTMMU)
0ea8cb88 140void cpu_resume_from_signal(CPUState *cpu, void *puc)
9eff14f3 141{
9eff14f3
BS
142 /* XXX: restore cpu registers saved in host registers */
143
27103424 144 cpu->exception_index = -1;
6f03bef0 145 siglongjmp(cpu->jmp_env, 1);
9eff14f3 146}
76e5c76f
PB
147
148void cpu_reload_memory_map(CPUState *cpu)
149{
79e2b9ae
PB
150 AddressSpaceDispatch *d;
151
152 if (qemu_in_vcpu_thread()) {
153 /* Do not let the guest prolong the critical section as much as it
154 * as it desires.
155 *
156 * Currently, this is prevented by the I/O thread's periodinc kicking
157 * of the VCPU thread (iothread_requesting_mutex, qemu_cpu_kick_thread)
158 * but this will go away once TCG's execution moves out of the global
159 * mutex.
160 *
161 * This pair matches cpu_exec's rcu_read_lock()/rcu_read_unlock(), which
162 * only protects cpu->as->dispatch. Since we reload it below, we can
163 * split the critical section.
164 */
165 rcu_read_unlock();
166 rcu_read_lock();
167 }
168
9d82b5a7 169 /* The CPU and TLB are protected by the iothread lock. */
79e2b9ae 170 d = atomic_rcu_read(&cpu->as->dispatch);
9d82b5a7 171 cpu->memory_dispatch = d;
76e5c76f
PB
172 tlb_flush(cpu, 1);
173}
9eff14f3 174#endif
fbf9eeb3 175
77211379
PM
176/* Execute a TB, and fix up the CPU state afterwards if necessary */
177static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr)
178{
179 CPUArchState *env = cpu->env_ptr;
03afa5f8
RH
180 uintptr_t next_tb;
181
182#if defined(DEBUG_DISAS)
183 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
184#if defined(TARGET_I386)
185 log_cpu_state(cpu, CPU_DUMP_CCOP);
186#elif defined(TARGET_M68K)
187 /* ??? Should not modify env state for dumping. */
188 cpu_m68k_flush_flags(env, env->cc_op);
189 env->cc_op = CC_OP_FLAGS;
190 env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4);
191 log_cpu_state(cpu, 0);
192#else
193 log_cpu_state(cpu, 0);
194#endif
195 }
196#endif /* DEBUG_DISAS */
197
626cf8f4 198 cpu->can_do_io = 0;
03afa5f8 199 next_tb = tcg_qemu_tb_exec(env, tb_ptr);
626cf8f4 200 cpu->can_do_io = 1;
6db8b538
AB
201 trace_exec_tb_exit((void *) (next_tb & ~TB_EXIT_MASK),
202 next_tb & TB_EXIT_MASK);
203
77211379
PM
204 if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) {
205 /* We didn't start executing this TB (eg because the instruction
206 * counter hit zero); we must restore the guest PC to the address
207 * of the start of the TB.
208 */
bdf7ae5b 209 CPUClass *cc = CPU_GET_CLASS(cpu);
77211379 210 TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
bdf7ae5b
AF
211 if (cc->synchronize_from_tb) {
212 cc->synchronize_from_tb(cpu, tb);
213 } else {
214 assert(cc->set_pc);
215 cc->set_pc(cpu, tb->pc);
216 }
77211379 217 }
378df4b2
PM
218 if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) {
219 /* We were asked to stop executing TBs (probably a pending
220 * interrupt. We've now stopped, so clear the flag.
221 */
222 cpu->tcg_exit_req = 0;
223 }
77211379
PM
224 return next_tb;
225}
226
2e70f6ef
PB
227/* Execute the code without caching the generated code. An interpreter
228 could be used if available. */
9349b4f9 229static void cpu_exec_nocache(CPUArchState *env, int max_cycles,
cea5f9a2 230 TranslationBlock *orig_tb)
2e70f6ef 231{
d77953b9 232 CPUState *cpu = ENV_GET_CPU(env);
2e70f6ef 233 TranslationBlock *tb;
b4ac20b4
PD
234 target_ulong pc = orig_tb->pc;
235 target_ulong cs_base = orig_tb->cs_base;
236 uint64_t flags = orig_tb->flags;
2e70f6ef
PB
237
238 /* Should never happen.
239 We only end up here when an existing TB is too long. */
240 if (max_cycles > CF_COUNT_MASK)
241 max_cycles = CF_COUNT_MASK;
242
b4ac20b4
PD
243 /* tb_gen_code can flush our orig_tb, invalidate it now */
244 tb_phys_invalidate(orig_tb, -1);
245 tb = tb_gen_code(cpu, pc, cs_base, flags,
d8a499f1 246 max_cycles | CF_NOCACHE);
d77953b9 247 cpu->current_tb = tb;
2e70f6ef 248 /* execute the generated code */
6db8b538 249 trace_exec_tb_nocache(tb, tb->pc);
77211379 250 cpu_tb_exec(cpu, tb->tc_ptr);
d77953b9 251 cpu->current_tb = NULL;
2e70f6ef
PB
252 tb_phys_invalidate(tb, -1);
253 tb_free(tb);
254}
255
9349b4f9 256static TranslationBlock *tb_find_slow(CPUArchState *env,
cea5f9a2 257 target_ulong pc,
8a40a180 258 target_ulong cs_base,
c068688b 259 uint64_t flags)
8a40a180 260{
8cd70437 261 CPUState *cpu = ENV_GET_CPU(env);
8a40a180 262 TranslationBlock *tb, **ptb1;
8a40a180 263 unsigned int h;
337fc758 264 tb_page_addr_t phys_pc, phys_page1;
41c1b1c9 265 target_ulong virt_page2;
3b46e624 266
5e5f07e0 267 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
3b46e624 268
8a40a180 269 /* find translated block using physical mappings */
41c1b1c9 270 phys_pc = get_page_addr_code(env, pc);
8a40a180 271 phys_page1 = phys_pc & TARGET_PAGE_MASK;
8a40a180 272 h = tb_phys_hash_func(phys_pc);
5e5f07e0 273 ptb1 = &tcg_ctx.tb_ctx.tb_phys_hash[h];
8a40a180
FB
274 for(;;) {
275 tb = *ptb1;
276 if (!tb)
277 goto not_found;
5fafdf24 278 if (tb->pc == pc &&
8a40a180 279 tb->page_addr[0] == phys_page1 &&
5fafdf24 280 tb->cs_base == cs_base &&
8a40a180
FB
281 tb->flags == flags) {
282 /* check next page if needed */
283 if (tb->page_addr[1] != -1) {
337fc758
BS
284 tb_page_addr_t phys_page2;
285
5fafdf24 286 virt_page2 = (pc & TARGET_PAGE_MASK) +
8a40a180 287 TARGET_PAGE_SIZE;
41c1b1c9 288 phys_page2 = get_page_addr_code(env, virt_page2);
8a40a180
FB
289 if (tb->page_addr[1] == phys_page2)
290 goto found;
291 } else {
292 goto found;
293 }
294 }
295 ptb1 = &tb->phys_hash_next;
296 }
297 not_found:
2e70f6ef 298 /* if no translated code available, then translate it now */
648f034c 299 tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
3b46e624 300
8a40a180 301 found:
2c90fe2b
KB
302 /* Move the last found TB to the head of the list */
303 if (likely(*ptb1)) {
304 *ptb1 = tb->phys_hash_next;
5e5f07e0
EV
305 tb->phys_hash_next = tcg_ctx.tb_ctx.tb_phys_hash[h];
306 tcg_ctx.tb_ctx.tb_phys_hash[h] = tb;
2c90fe2b 307 }
8a40a180 308 /* we add the TB in the virtual pc hash table */
8cd70437 309 cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb;
8a40a180
FB
310 return tb;
311}
312
9349b4f9 313static inline TranslationBlock *tb_find_fast(CPUArchState *env)
8a40a180 314{
8cd70437 315 CPUState *cpu = ENV_GET_CPU(env);
8a40a180
FB
316 TranslationBlock *tb;
317 target_ulong cs_base, pc;
6b917547 318 int flags;
8a40a180
FB
319
320 /* we record a subset of the CPU state. It will
321 always be the same before a given translated block
322 is executed. */
6b917547 323 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
8cd70437 324 tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)];
551bd27f
TS
325 if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
326 tb->flags != flags)) {
cea5f9a2 327 tb = tb_find_slow(env, pc, cs_base, flags);
8a40a180
FB
328 }
329 return tb;
330}
331
9349b4f9 332static void cpu_handle_debug_exception(CPUArchState *env)
1009d2ed 333{
ff4700b0 334 CPUState *cpu = ENV_GET_CPU(env);
86025ee4 335 CPUClass *cc = CPU_GET_CLASS(cpu);
1009d2ed
JK
336 CPUWatchpoint *wp;
337
ff4700b0
AF
338 if (!cpu->watchpoint_hit) {
339 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
1009d2ed
JK
340 wp->flags &= ~BP_WATCHPOINT_HIT;
341 }
342 }
86025ee4
PM
343
344 cc->debug_excp_handler(cpu);
1009d2ed
JK
345}
346
7d13299d
FB
347/* main execution loop */
348
1a28cac3
MT
349volatile sig_atomic_t exit_request;
350
9349b4f9 351int cpu_exec(CPUArchState *env)
7d13299d 352{
c356a1bc 353 CPUState *cpu = ENV_GET_CPU(env);
97a8ea5a 354 CPUClass *cc = CPU_GET_CLASS(cpu);
693fa551
AF
355#ifdef TARGET_I386
356 X86CPU *x86_cpu = X86_CPU(cpu);
97a8ea5a 357#endif
8a40a180 358 int ret, interrupt_request;
8a40a180 359 TranslationBlock *tb;
c27004ec 360 uint8_t *tc_ptr;
3e9bd63a 361 uintptr_t next_tb;
c2aa5f81
ST
362 SyncClocks sc;
363
bae2c270
PM
364 /* This must be volatile so it is not trashed by longjmp() */
365 volatile bool have_tb_lock = false;
8c6939c0 366
259186a7 367 if (cpu->halted) {
3993c6bd 368 if (!cpu_has_work(cpu)) {
eda48c34
PB
369 return EXCP_HALTED;
370 }
371
259186a7 372 cpu->halted = 0;
eda48c34 373 }
5a1e3cfc 374
4917cf44 375 current_cpu = cpu;
e4533c7a 376
4917cf44 377 /* As long as current_cpu is null, up to the assignment just above,
ec9bd89f
OH
378 * requests by other threads to exit the execution loop are expected to
379 * be issued using the exit_request global. We must make sure that our
4917cf44 380 * evaluation of the global value is performed past the current_cpu
ec9bd89f
OH
381 * value transition point, which requires a memory barrier as well as
382 * an instruction scheduling constraint on modern architectures. */
383 smp_mb();
384
79e2b9ae
PB
385 rcu_read_lock();
386
c629a4bc 387 if (unlikely(exit_request)) {
fcd7d003 388 cpu->exit_request = 1;
1a28cac3
MT
389 }
390
cffe7b32 391 cc->cpu_exec_enter(cpu);
9d27abd9 392
c2aa5f81
ST
393 /* Calculate difference between guest clock and host clock.
394 * This delay includes the delay of the last cycle, so
395 * what we have to do is sleep until it is 0. As for the
396 * advance/delay we gain here, we try to fix it next time.
397 */
398 init_delay_params(&sc, cpu);
399
7d13299d 400 /* prepare setjmp context for exception handling */
3fb2ded1 401 for(;;) {
6f03bef0 402 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
3fb2ded1 403 /* if an exception is pending, we execute it here */
27103424
AF
404 if (cpu->exception_index >= 0) {
405 if (cpu->exception_index >= EXCP_INTERRUPT) {
3fb2ded1 406 /* exit request from the cpu execution loop */
27103424 407 ret = cpu->exception_index;
1009d2ed
JK
408 if (ret == EXCP_DEBUG) {
409 cpu_handle_debug_exception(env);
410 }
e511b4d7 411 cpu->exception_index = -1;
3fb2ded1 412 break;
72d239ed
AJ
413 } else {
414#if defined(CONFIG_USER_ONLY)
3fb2ded1 415 /* if user mode only, we simulate a fake exception
9f083493 416 which will be handled outside the cpu execution
3fb2ded1 417 loop */
83479e77 418#if defined(TARGET_I386)
97a8ea5a 419 cc->do_interrupt(cpu);
83479e77 420#endif
27103424 421 ret = cpu->exception_index;
e511b4d7 422 cpu->exception_index = -1;
3fb2ded1 423 break;
72d239ed 424#else
97a8ea5a 425 cc->do_interrupt(cpu);
27103424 426 cpu->exception_index = -1;
83479e77 427#endif
3fb2ded1 428 }
5fafdf24 429 }
9df217a3 430
b5fc09ae 431 next_tb = 0; /* force lookup of first TB */
3fb2ded1 432 for(;;) {
259186a7 433 interrupt_request = cpu->interrupt_request;
e1638bd8 434 if (unlikely(interrupt_request)) {
ed2803da 435 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
e1638bd8 436 /* Mask out external interrupts for this step. */
3125f763 437 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
e1638bd8 438 }
6658ffb8 439 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
259186a7 440 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
27103424 441 cpu->exception_index = EXCP_DEBUG;
5638d180 442 cpu_loop_exit(cpu);
6658ffb8 443 }
a90b7318 444 if (interrupt_request & CPU_INTERRUPT_HALT) {
259186a7
AF
445 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
446 cpu->halted = 1;
27103424 447 cpu->exception_index = EXCP_HLT;
5638d180 448 cpu_loop_exit(cpu);
a90b7318 449 }
4a92a558
PB
450#if defined(TARGET_I386)
451 if (interrupt_request & CPU_INTERRUPT_INIT) {
452 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
453 do_cpu_init(x86_cpu);
454 cpu->exception_index = EXCP_HALTED;
455 cpu_loop_exit(cpu);
456 }
457#else
458 if (interrupt_request & CPU_INTERRUPT_RESET) {
459 cpu_reset(cpu);
460 }
68a79315 461#endif
9585db68
RH
462 /* The target hook has 3 exit conditions:
463 False when the interrupt isn't processed,
464 True when it is, and we should restart on a new TB,
465 and via longjmp via cpu_loop_exit. */
466 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
467 next_tb = 0;
468 }
469 /* Don't use the cached interrupt_request value,
470 do_interrupt may have updated the EXITTB flag. */
259186a7
AF
471 if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) {
472 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
bf3e8bf1
FB
473 /* ensure that no TB jump will be modified as
474 the program flow was changed */
b5fc09ae 475 next_tb = 0;
bf3e8bf1 476 }
be214e6c 477 }
fcd7d003
AF
478 if (unlikely(cpu->exit_request)) {
479 cpu->exit_request = 0;
27103424 480 cpu->exception_index = EXCP_INTERRUPT;
5638d180 481 cpu_loop_exit(cpu);
3fb2ded1 482 }
5e5f07e0 483 spin_lock(&tcg_ctx.tb_ctx.tb_lock);
bae2c270 484 have_tb_lock = true;
cea5f9a2 485 tb = tb_find_fast(env);
d5975363
PB
486 /* Note: we do it here to avoid a gcc bug on Mac OS X when
487 doing it in tb_find_slow */
5e5f07e0 488 if (tcg_ctx.tb_ctx.tb_invalidated_flag) {
d5975363
PB
489 /* as some TB could have been invalidated because
490 of memory exceptions while generating the code, we
491 must recompute the hash index here */
492 next_tb = 0;
5e5f07e0 493 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
d5975363 494 }
c30d1aea
PM
495 if (qemu_loglevel_mask(CPU_LOG_EXEC)) {
496 qemu_log("Trace %p [" TARGET_FMT_lx "] %s\n",
497 tb->tc_ptr, tb->pc, lookup_symbol(tb->pc));
498 }
8a40a180
FB
499 /* see if we can patch the calling TB. When the TB
500 spans two pages, we cannot safely do a direct
501 jump. */
040f2fb2 502 if (next_tb != 0 && tb->page_addr[1] == -1) {
0980011b
PM
503 tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK),
504 next_tb & TB_EXIT_MASK, tb);
3fb2ded1 505 }
bae2c270 506 have_tb_lock = false;
5e5f07e0 507 spin_unlock(&tcg_ctx.tb_ctx.tb_lock);
55e8b85e 508
509 /* cpu_interrupt might be called while translating the
510 TB, but before it is linked into a potentially
511 infinite loop and becomes env->current_tb. Avoid
512 starting execution if there is a pending interrupt. */
d77953b9 513 cpu->current_tb = tb;
b0052d15 514 barrier();
fcd7d003 515 if (likely(!cpu->exit_request)) {
6db8b538 516 trace_exec_tb(tb, tb->pc);
2e70f6ef 517 tc_ptr = tb->tc_ptr;
e965fc38 518 /* execute the generated code */
77211379 519 next_tb = cpu_tb_exec(cpu, tc_ptr);
378df4b2
PM
520 switch (next_tb & TB_EXIT_MASK) {
521 case TB_EXIT_REQUESTED:
522 /* Something asked us to stop executing
523 * chained TBs; just continue round the main
524 * loop. Whatever requested the exit will also
525 * have set something else (eg exit_request or
526 * interrupt_request) which we will handle
527 * next time around the loop.
528 */
378df4b2
PM
529 next_tb = 0;
530 break;
531 case TB_EXIT_ICOUNT_EXPIRED:
532 {
bf20dc07 533 /* Instruction counter expired. */
52851b7e 534 int insns_left = cpu->icount_decr.u32;
efee7340 535 if (cpu->icount_extra && insns_left >= 0) {
2e70f6ef 536 /* Refill decrementer and continue execution. */
efee7340 537 cpu->icount_extra += insns_left;
52851b7e 538 insns_left = MIN(0xffff, cpu->icount_extra);
efee7340 539 cpu->icount_extra -= insns_left;
28ecfd7a 540 cpu->icount_decr.u16.low = insns_left;
2e70f6ef
PB
541 } else {
542 if (insns_left > 0) {
543 /* Execute remaining instructions. */
52851b7e 544 tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
cea5f9a2 545 cpu_exec_nocache(env, insns_left, tb);
c2aa5f81 546 align_clocks(&sc, cpu);
2e70f6ef 547 }
27103424 548 cpu->exception_index = EXCP_INTERRUPT;
2e70f6ef 549 next_tb = 0;
5638d180 550 cpu_loop_exit(cpu);
2e70f6ef 551 }
378df4b2
PM
552 break;
553 }
554 default:
555 break;
2e70f6ef
PB
556 }
557 }
d77953b9 558 cpu->current_tb = NULL;
c2aa5f81
ST
559 /* Try to align the host and virtual clocks
560 if the guest is in advance */
561 align_clocks(&sc, cpu);
4cbf74b6
FB
562 /* reset soft MMU for next block (it can currently
563 only be set by a memory fault) */
50a518e3 564 } /* for(;;) */
0d101938
JK
565 } else {
566 /* Reload env after longjmp - the compiler may have smashed all
567 * local variables as longjmp is marked 'noreturn'. */
4917cf44
AF
568 cpu = current_cpu;
569 env = cpu->env_ptr;
6c78f29a 570 cc = CPU_GET_CLASS(cpu);
626cf8f4 571 cpu->can_do_io = 1;
693fa551
AF
572#ifdef TARGET_I386
573 x86_cpu = X86_CPU(cpu);
6c78f29a 574#endif
bae2c270
PM
575 if (have_tb_lock) {
576 spin_unlock(&tcg_ctx.tb_ctx.tb_lock);
577 have_tb_lock = false;
578 }
7d13299d 579 }
3fb2ded1
FB
580 } /* for(;;) */
581
cffe7b32 582 cc->cpu_exec_exit(cpu);
79e2b9ae 583 rcu_read_unlock();
1057eaa7 584
4917cf44
AF
585 /* fail safe : never use current_cpu outside cpu_exec() */
586 current_cpu = NULL;
7d13299d
FB
587 return ret;
588}