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valgrind/i386: avoid false positives on KVM_SET_CLOCK ioctl
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7d13299d 1/*
e965fc38 2 * emulator main execution loop
5fafdf24 3 *
66321a11 4 * Copyright (c) 2003-2005 Fabrice Bellard
7d13299d 5 *
3ef693a0
FB
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
7d13299d 10 *
3ef693a0
FB
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
7d13299d 15 *
3ef693a0 16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
7d13299d 18 */
e4533c7a 19#include "config.h"
cea5f9a2 20#include "cpu.h"
6db8b538 21#include "trace.h"
76cad711 22#include "disas/disas.h"
7cb69cae 23#include "tcg.h"
1de7afc9 24#include "qemu/atomic.h"
9c17d615 25#include "sysemu/qtest.h"
c2aa5f81
ST
26#include "qemu/timer.h"
27
28/* -icount align implementation. */
29
30typedef struct SyncClocks {
31 int64_t diff_clk;
32 int64_t last_cpu_icount;
7f7bc144 33 int64_t realtime_clock;
c2aa5f81
ST
34} SyncClocks;
35
36#if !defined(CONFIG_USER_ONLY)
37/* Allow the guest to have a max 3ms advance.
38 * The difference between the 2 clocks could therefore
39 * oscillate around 0.
40 */
41#define VM_CLOCK_ADVANCE 3000000
7f7bc144
ST
42#define THRESHOLD_REDUCE 1.5
43#define MAX_DELAY_PRINT_RATE 2000000000LL
44#define MAX_NB_PRINTS 100
c2aa5f81
ST
45
46static void align_clocks(SyncClocks *sc, const CPUState *cpu)
47{
48 int64_t cpu_icount;
49
50 if (!icount_align_option) {
51 return;
52 }
53
54 cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
55 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
56 sc->last_cpu_icount = cpu_icount;
57
58 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
59#ifndef _WIN32
60 struct timespec sleep_delay, rem_delay;
61 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
62 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
63 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
64 sc->diff_clk -= (sleep_delay.tv_sec - rem_delay.tv_sec) * 1000000000LL;
65 sc->diff_clk -= sleep_delay.tv_nsec - rem_delay.tv_nsec;
66 } else {
67 sc->diff_clk = 0;
68 }
69#else
70 Sleep(sc->diff_clk / SCALE_MS);
71 sc->diff_clk = 0;
72#endif
73 }
74}
75
7f7bc144
ST
76static void print_delay(const SyncClocks *sc)
77{
78 static float threshold_delay;
79 static int64_t last_realtime_clock;
80 static int nb_prints;
81
82 if (icount_align_option &&
83 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
84 nb_prints < MAX_NB_PRINTS) {
85 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
86 (-sc->diff_clk / (float)1000000000LL <
87 (threshold_delay - THRESHOLD_REDUCE))) {
88 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
89 printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
90 threshold_delay - 1,
91 threshold_delay);
92 nb_prints++;
93 last_realtime_clock = sc->realtime_clock;
94 }
95 }
96}
97
c2aa5f81
ST
98static void init_delay_params(SyncClocks *sc,
99 const CPUState *cpu)
100{
101 if (!icount_align_option) {
102 return;
103 }
7f7bc144 104 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
c2aa5f81 105 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) -
7f7bc144 106 sc->realtime_clock +
c2aa5f81
ST
107 cpu_get_clock_offset();
108 sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
27498bef
ST
109 if (sc->diff_clk < max_delay) {
110 max_delay = sc->diff_clk;
111 }
112 if (sc->diff_clk > max_advance) {
113 max_advance = sc->diff_clk;
114 }
7f7bc144
ST
115
116 /* Print every 2s max if the guest is late. We limit the number
117 of printed messages to NB_PRINT_MAX(currently 100) */
118 print_delay(sc);
c2aa5f81
ST
119}
120#else
121static void align_clocks(SyncClocks *sc, const CPUState *cpu)
122{
123}
124
125static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
126{
127}
128#endif /* CONFIG USER ONLY */
7d13299d 129
5638d180 130void cpu_loop_exit(CPUState *cpu)
e4533c7a 131{
d77953b9 132 cpu->current_tb = NULL;
6f03bef0 133 siglongjmp(cpu->jmp_env, 1);
e4533c7a 134}
bfed01fc 135
fbf9eeb3
FB
136/* exit the current TB from a signal handler. The host registers are
137 restored in a state compatible with the CPU emulator
138 */
9eff14f3 139#if defined(CONFIG_SOFTMMU)
0ea8cb88 140void cpu_resume_from_signal(CPUState *cpu, void *puc)
9eff14f3 141{
9eff14f3
BS
142 /* XXX: restore cpu registers saved in host registers */
143
27103424 144 cpu->exception_index = -1;
6f03bef0 145 siglongjmp(cpu->jmp_env, 1);
9eff14f3 146}
9eff14f3 147#endif
fbf9eeb3 148
77211379
PM
149/* Execute a TB, and fix up the CPU state afterwards if necessary */
150static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr)
151{
152 CPUArchState *env = cpu->env_ptr;
03afa5f8
RH
153 uintptr_t next_tb;
154
155#if defined(DEBUG_DISAS)
156 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
157#if defined(TARGET_I386)
158 log_cpu_state(cpu, CPU_DUMP_CCOP);
159#elif defined(TARGET_M68K)
160 /* ??? Should not modify env state for dumping. */
161 cpu_m68k_flush_flags(env, env->cc_op);
162 env->cc_op = CC_OP_FLAGS;
163 env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4);
164 log_cpu_state(cpu, 0);
165#else
166 log_cpu_state(cpu, 0);
167#endif
168 }
169#endif /* DEBUG_DISAS */
170
171 next_tb = tcg_qemu_tb_exec(env, tb_ptr);
6db8b538
AB
172 trace_exec_tb_exit((void *) (next_tb & ~TB_EXIT_MASK),
173 next_tb & TB_EXIT_MASK);
174
77211379
PM
175 if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) {
176 /* We didn't start executing this TB (eg because the instruction
177 * counter hit zero); we must restore the guest PC to the address
178 * of the start of the TB.
179 */
bdf7ae5b 180 CPUClass *cc = CPU_GET_CLASS(cpu);
77211379 181 TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
bdf7ae5b
AF
182 if (cc->synchronize_from_tb) {
183 cc->synchronize_from_tb(cpu, tb);
184 } else {
185 assert(cc->set_pc);
186 cc->set_pc(cpu, tb->pc);
187 }
77211379 188 }
378df4b2
PM
189 if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) {
190 /* We were asked to stop executing TBs (probably a pending
191 * interrupt. We've now stopped, so clear the flag.
192 */
193 cpu->tcg_exit_req = 0;
194 }
77211379
PM
195 return next_tb;
196}
197
2e70f6ef
PB
198/* Execute the code without caching the generated code. An interpreter
199 could be used if available. */
9349b4f9 200static void cpu_exec_nocache(CPUArchState *env, int max_cycles,
cea5f9a2 201 TranslationBlock *orig_tb)
2e70f6ef 202{
d77953b9 203 CPUState *cpu = ENV_GET_CPU(env);
2e70f6ef
PB
204 TranslationBlock *tb;
205
206 /* Should never happen.
207 We only end up here when an existing TB is too long. */
208 if (max_cycles > CF_COUNT_MASK)
209 max_cycles = CF_COUNT_MASK;
210
648f034c 211 tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags,
2e70f6ef 212 max_cycles);
d77953b9 213 cpu->current_tb = tb;
2e70f6ef 214 /* execute the generated code */
6db8b538 215 trace_exec_tb_nocache(tb, tb->pc);
77211379 216 cpu_tb_exec(cpu, tb->tc_ptr);
d77953b9 217 cpu->current_tb = NULL;
2e70f6ef
PB
218 tb_phys_invalidate(tb, -1);
219 tb_free(tb);
220}
221
9349b4f9 222static TranslationBlock *tb_find_slow(CPUArchState *env,
cea5f9a2 223 target_ulong pc,
8a40a180 224 target_ulong cs_base,
c068688b 225 uint64_t flags)
8a40a180 226{
8cd70437 227 CPUState *cpu = ENV_GET_CPU(env);
8a40a180 228 TranslationBlock *tb, **ptb1;
8a40a180 229 unsigned int h;
337fc758 230 tb_page_addr_t phys_pc, phys_page1;
41c1b1c9 231 target_ulong virt_page2;
3b46e624 232
5e5f07e0 233 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
3b46e624 234
8a40a180 235 /* find translated block using physical mappings */
41c1b1c9 236 phys_pc = get_page_addr_code(env, pc);
8a40a180 237 phys_page1 = phys_pc & TARGET_PAGE_MASK;
8a40a180 238 h = tb_phys_hash_func(phys_pc);
5e5f07e0 239 ptb1 = &tcg_ctx.tb_ctx.tb_phys_hash[h];
8a40a180
FB
240 for(;;) {
241 tb = *ptb1;
242 if (!tb)
243 goto not_found;
5fafdf24 244 if (tb->pc == pc &&
8a40a180 245 tb->page_addr[0] == phys_page1 &&
5fafdf24 246 tb->cs_base == cs_base &&
8a40a180
FB
247 tb->flags == flags) {
248 /* check next page if needed */
249 if (tb->page_addr[1] != -1) {
337fc758
BS
250 tb_page_addr_t phys_page2;
251
5fafdf24 252 virt_page2 = (pc & TARGET_PAGE_MASK) +
8a40a180 253 TARGET_PAGE_SIZE;
41c1b1c9 254 phys_page2 = get_page_addr_code(env, virt_page2);
8a40a180
FB
255 if (tb->page_addr[1] == phys_page2)
256 goto found;
257 } else {
258 goto found;
259 }
260 }
261 ptb1 = &tb->phys_hash_next;
262 }
263 not_found:
2e70f6ef 264 /* if no translated code available, then translate it now */
648f034c 265 tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
3b46e624 266
8a40a180 267 found:
2c90fe2b
KB
268 /* Move the last found TB to the head of the list */
269 if (likely(*ptb1)) {
270 *ptb1 = tb->phys_hash_next;
5e5f07e0
EV
271 tb->phys_hash_next = tcg_ctx.tb_ctx.tb_phys_hash[h];
272 tcg_ctx.tb_ctx.tb_phys_hash[h] = tb;
2c90fe2b 273 }
8a40a180 274 /* we add the TB in the virtual pc hash table */
8cd70437 275 cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb;
8a40a180
FB
276 return tb;
277}
278
9349b4f9 279static inline TranslationBlock *tb_find_fast(CPUArchState *env)
8a40a180 280{
8cd70437 281 CPUState *cpu = ENV_GET_CPU(env);
8a40a180
FB
282 TranslationBlock *tb;
283 target_ulong cs_base, pc;
6b917547 284 int flags;
8a40a180
FB
285
286 /* we record a subset of the CPU state. It will
287 always be the same before a given translated block
288 is executed. */
6b917547 289 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
8cd70437 290 tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)];
551bd27f
TS
291 if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
292 tb->flags != flags)) {
cea5f9a2 293 tb = tb_find_slow(env, pc, cs_base, flags);
8a40a180
FB
294 }
295 return tb;
296}
297
9349b4f9 298static void cpu_handle_debug_exception(CPUArchState *env)
1009d2ed 299{
ff4700b0 300 CPUState *cpu = ENV_GET_CPU(env);
86025ee4 301 CPUClass *cc = CPU_GET_CLASS(cpu);
1009d2ed
JK
302 CPUWatchpoint *wp;
303
ff4700b0
AF
304 if (!cpu->watchpoint_hit) {
305 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
1009d2ed
JK
306 wp->flags &= ~BP_WATCHPOINT_HIT;
307 }
308 }
86025ee4
PM
309
310 cc->debug_excp_handler(cpu);
1009d2ed
JK
311}
312
7d13299d
FB
313/* main execution loop */
314
1a28cac3
MT
315volatile sig_atomic_t exit_request;
316
9349b4f9 317int cpu_exec(CPUArchState *env)
7d13299d 318{
c356a1bc 319 CPUState *cpu = ENV_GET_CPU(env);
97a8ea5a 320 CPUClass *cc = CPU_GET_CLASS(cpu);
693fa551
AF
321#ifdef TARGET_I386
322 X86CPU *x86_cpu = X86_CPU(cpu);
97a8ea5a 323#endif
8a40a180 324 int ret, interrupt_request;
8a40a180 325 TranslationBlock *tb;
c27004ec 326 uint8_t *tc_ptr;
3e9bd63a 327 uintptr_t next_tb;
c2aa5f81
ST
328 SyncClocks sc;
329
bae2c270
PM
330 /* This must be volatile so it is not trashed by longjmp() */
331 volatile bool have_tb_lock = false;
8c6939c0 332
259186a7 333 if (cpu->halted) {
3993c6bd 334 if (!cpu_has_work(cpu)) {
eda48c34
PB
335 return EXCP_HALTED;
336 }
337
259186a7 338 cpu->halted = 0;
eda48c34 339 }
5a1e3cfc 340
4917cf44 341 current_cpu = cpu;
e4533c7a 342
4917cf44 343 /* As long as current_cpu is null, up to the assignment just above,
ec9bd89f
OH
344 * requests by other threads to exit the execution loop are expected to
345 * be issued using the exit_request global. We must make sure that our
4917cf44 346 * evaluation of the global value is performed past the current_cpu
ec9bd89f
OH
347 * value transition point, which requires a memory barrier as well as
348 * an instruction scheduling constraint on modern architectures. */
349 smp_mb();
350
c629a4bc 351 if (unlikely(exit_request)) {
fcd7d003 352 cpu->exit_request = 1;
1a28cac3
MT
353 }
354
cffe7b32 355 cc->cpu_exec_enter(cpu);
27103424 356 cpu->exception_index = -1;
9d27abd9 357
c2aa5f81
ST
358 /* Calculate difference between guest clock and host clock.
359 * This delay includes the delay of the last cycle, so
360 * what we have to do is sleep until it is 0. As for the
361 * advance/delay we gain here, we try to fix it next time.
362 */
363 init_delay_params(&sc, cpu);
364
7d13299d 365 /* prepare setjmp context for exception handling */
3fb2ded1 366 for(;;) {
6f03bef0 367 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
3fb2ded1 368 /* if an exception is pending, we execute it here */
27103424
AF
369 if (cpu->exception_index >= 0) {
370 if (cpu->exception_index >= EXCP_INTERRUPT) {
3fb2ded1 371 /* exit request from the cpu execution loop */
27103424 372 ret = cpu->exception_index;
1009d2ed
JK
373 if (ret == EXCP_DEBUG) {
374 cpu_handle_debug_exception(env);
375 }
3fb2ded1 376 break;
72d239ed
AJ
377 } else {
378#if defined(CONFIG_USER_ONLY)
3fb2ded1 379 /* if user mode only, we simulate a fake exception
9f083493 380 which will be handled outside the cpu execution
3fb2ded1 381 loop */
83479e77 382#if defined(TARGET_I386)
97a8ea5a 383 cc->do_interrupt(cpu);
83479e77 384#endif
27103424 385 ret = cpu->exception_index;
3fb2ded1 386 break;
72d239ed 387#else
97a8ea5a 388 cc->do_interrupt(cpu);
27103424 389 cpu->exception_index = -1;
83479e77 390#endif
3fb2ded1 391 }
5fafdf24 392 }
9df217a3 393
b5fc09ae 394 next_tb = 0; /* force lookup of first TB */
3fb2ded1 395 for(;;) {
259186a7 396 interrupt_request = cpu->interrupt_request;
e1638bd8 397 if (unlikely(interrupt_request)) {
ed2803da 398 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
e1638bd8 399 /* Mask out external interrupts for this step. */
3125f763 400 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
e1638bd8 401 }
6658ffb8 402 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
259186a7 403 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
27103424 404 cpu->exception_index = EXCP_DEBUG;
5638d180 405 cpu_loop_exit(cpu);
6658ffb8 406 }
a90b7318 407 if (interrupt_request & CPU_INTERRUPT_HALT) {
259186a7
AF
408 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
409 cpu->halted = 1;
27103424 410 cpu->exception_index = EXCP_HLT;
5638d180 411 cpu_loop_exit(cpu);
a90b7318 412 }
4a92a558
PB
413#if defined(TARGET_I386)
414 if (interrupt_request & CPU_INTERRUPT_INIT) {
415 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
416 do_cpu_init(x86_cpu);
417 cpu->exception_index = EXCP_HALTED;
418 cpu_loop_exit(cpu);
419 }
420#else
421 if (interrupt_request & CPU_INTERRUPT_RESET) {
422 cpu_reset(cpu);
423 }
68a79315 424#endif
9585db68
RH
425 /* The target hook has 3 exit conditions:
426 False when the interrupt isn't processed,
427 True when it is, and we should restart on a new TB,
428 and via longjmp via cpu_loop_exit. */
429 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
430 next_tb = 0;
431 }
432 /* Don't use the cached interrupt_request value,
433 do_interrupt may have updated the EXITTB flag. */
259186a7
AF
434 if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) {
435 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
bf3e8bf1
FB
436 /* ensure that no TB jump will be modified as
437 the program flow was changed */
b5fc09ae 438 next_tb = 0;
bf3e8bf1 439 }
be214e6c 440 }
fcd7d003
AF
441 if (unlikely(cpu->exit_request)) {
442 cpu->exit_request = 0;
27103424 443 cpu->exception_index = EXCP_INTERRUPT;
5638d180 444 cpu_loop_exit(cpu);
3fb2ded1 445 }
5e5f07e0 446 spin_lock(&tcg_ctx.tb_ctx.tb_lock);
bae2c270 447 have_tb_lock = true;
cea5f9a2 448 tb = tb_find_fast(env);
d5975363
PB
449 /* Note: we do it here to avoid a gcc bug on Mac OS X when
450 doing it in tb_find_slow */
5e5f07e0 451 if (tcg_ctx.tb_ctx.tb_invalidated_flag) {
d5975363
PB
452 /* as some TB could have been invalidated because
453 of memory exceptions while generating the code, we
454 must recompute the hash index here */
455 next_tb = 0;
5e5f07e0 456 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
d5975363 457 }
c30d1aea
PM
458 if (qemu_loglevel_mask(CPU_LOG_EXEC)) {
459 qemu_log("Trace %p [" TARGET_FMT_lx "] %s\n",
460 tb->tc_ptr, tb->pc, lookup_symbol(tb->pc));
461 }
8a40a180
FB
462 /* see if we can patch the calling TB. When the TB
463 spans two pages, we cannot safely do a direct
464 jump. */
040f2fb2 465 if (next_tb != 0 && tb->page_addr[1] == -1) {
0980011b
PM
466 tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK),
467 next_tb & TB_EXIT_MASK, tb);
3fb2ded1 468 }
bae2c270 469 have_tb_lock = false;
5e5f07e0 470 spin_unlock(&tcg_ctx.tb_ctx.tb_lock);
55e8b85e 471
472 /* cpu_interrupt might be called while translating the
473 TB, but before it is linked into a potentially
474 infinite loop and becomes env->current_tb. Avoid
475 starting execution if there is a pending interrupt. */
d77953b9 476 cpu->current_tb = tb;
b0052d15 477 barrier();
fcd7d003 478 if (likely(!cpu->exit_request)) {
6db8b538 479 trace_exec_tb(tb, tb->pc);
2e70f6ef 480 tc_ptr = tb->tc_ptr;
e965fc38 481 /* execute the generated code */
77211379 482 next_tb = cpu_tb_exec(cpu, tc_ptr);
378df4b2
PM
483 switch (next_tb & TB_EXIT_MASK) {
484 case TB_EXIT_REQUESTED:
485 /* Something asked us to stop executing
486 * chained TBs; just continue round the main
487 * loop. Whatever requested the exit will also
488 * have set something else (eg exit_request or
489 * interrupt_request) which we will handle
490 * next time around the loop.
491 */
492 tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
493 next_tb = 0;
494 break;
495 case TB_EXIT_ICOUNT_EXPIRED:
496 {
bf20dc07 497 /* Instruction counter expired. */
2e70f6ef 498 int insns_left;
0980011b 499 tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
28ecfd7a 500 insns_left = cpu->icount_decr.u32;
efee7340 501 if (cpu->icount_extra && insns_left >= 0) {
2e70f6ef 502 /* Refill decrementer and continue execution. */
efee7340
AF
503 cpu->icount_extra += insns_left;
504 if (cpu->icount_extra > 0xffff) {
2e70f6ef
PB
505 insns_left = 0xffff;
506 } else {
efee7340 507 insns_left = cpu->icount_extra;
2e70f6ef 508 }
efee7340 509 cpu->icount_extra -= insns_left;
28ecfd7a 510 cpu->icount_decr.u16.low = insns_left;
2e70f6ef
PB
511 } else {
512 if (insns_left > 0) {
513 /* Execute remaining instructions. */
cea5f9a2 514 cpu_exec_nocache(env, insns_left, tb);
c2aa5f81 515 align_clocks(&sc, cpu);
2e70f6ef 516 }
27103424 517 cpu->exception_index = EXCP_INTERRUPT;
2e70f6ef 518 next_tb = 0;
5638d180 519 cpu_loop_exit(cpu);
2e70f6ef 520 }
378df4b2
PM
521 break;
522 }
523 default:
524 break;
2e70f6ef
PB
525 }
526 }
d77953b9 527 cpu->current_tb = NULL;
c2aa5f81
ST
528 /* Try to align the host and virtual clocks
529 if the guest is in advance */
530 align_clocks(&sc, cpu);
4cbf74b6
FB
531 /* reset soft MMU for next block (it can currently
532 only be set by a memory fault) */
50a518e3 533 } /* for(;;) */
0d101938
JK
534 } else {
535 /* Reload env after longjmp - the compiler may have smashed all
536 * local variables as longjmp is marked 'noreturn'. */
4917cf44
AF
537 cpu = current_cpu;
538 env = cpu->env_ptr;
6c78f29a 539 cc = CPU_GET_CLASS(cpu);
693fa551
AF
540#ifdef TARGET_I386
541 x86_cpu = X86_CPU(cpu);
6c78f29a 542#endif
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PM
543 if (have_tb_lock) {
544 spin_unlock(&tcg_ctx.tb_ctx.tb_lock);
545 have_tb_lock = false;
546 }
7d13299d 547 }
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FB
548 } /* for(;;) */
549
cffe7b32 550 cc->cpu_exec_exit(cpu);
1057eaa7 551
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AF
552 /* fail safe : never use current_cpu outside cpu_exec() */
553 current_cpu = NULL;
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FB
554 return ret;
555}