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7d13299d 1/*
e965fc38 2 * emulator main execution loop
5fafdf24 3 *
66321a11 4 * Copyright (c) 2003-2005 Fabrice Bellard
7d13299d 5 *
3ef693a0
FB
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
7d13299d 10 *
3ef693a0
FB
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
7d13299d 15 *
3ef693a0 16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
7d13299d 18 */
7b31bbc2 19#include "qemu/osdep.h"
cea5f9a2 20#include "cpu.h"
6db8b538 21#include "trace.h"
76cad711 22#include "disas/disas.h"
63c91552 23#include "exec/exec-all.h"
7cb69cae 24#include "tcg.h"
1de7afc9 25#include "qemu/atomic.h"
9c17d615 26#include "sysemu/qtest.h"
c2aa5f81 27#include "qemu/timer.h"
9d82b5a7 28#include "exec/address-spaces.h"
79e2b9ae 29#include "qemu/rcu.h"
e1b89321 30#include "exec/tb-hash.h"
508127e2 31#include "exec/log.h"
6220e900
PD
32#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
33#include "hw/i386/apic.h"
34#endif
6f060969 35#include "sysemu/replay.h"
c2aa5f81
ST
36
37/* -icount align implementation. */
38
39typedef struct SyncClocks {
40 int64_t diff_clk;
41 int64_t last_cpu_icount;
7f7bc144 42 int64_t realtime_clock;
c2aa5f81
ST
43} SyncClocks;
44
45#if !defined(CONFIG_USER_ONLY)
46/* Allow the guest to have a max 3ms advance.
47 * The difference between the 2 clocks could therefore
48 * oscillate around 0.
49 */
50#define VM_CLOCK_ADVANCE 3000000
7f7bc144
ST
51#define THRESHOLD_REDUCE 1.5
52#define MAX_DELAY_PRINT_RATE 2000000000LL
53#define MAX_NB_PRINTS 100
c2aa5f81
ST
54
55static void align_clocks(SyncClocks *sc, const CPUState *cpu)
56{
57 int64_t cpu_icount;
58
59 if (!icount_align_option) {
60 return;
61 }
62
63 cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
64 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
65 sc->last_cpu_icount = cpu_icount;
66
67 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
68#ifndef _WIN32
69 struct timespec sleep_delay, rem_delay;
70 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
71 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
72 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
a498d0ef 73 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
c2aa5f81
ST
74 } else {
75 sc->diff_clk = 0;
76 }
77#else
78 Sleep(sc->diff_clk / SCALE_MS);
79 sc->diff_clk = 0;
80#endif
81 }
82}
83
7f7bc144
ST
84static void print_delay(const SyncClocks *sc)
85{
86 static float threshold_delay;
87 static int64_t last_realtime_clock;
88 static int nb_prints;
89
90 if (icount_align_option &&
91 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
92 nb_prints < MAX_NB_PRINTS) {
93 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
94 (-sc->diff_clk / (float)1000000000LL <
95 (threshold_delay - THRESHOLD_REDUCE))) {
96 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
97 printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
98 threshold_delay - 1,
99 threshold_delay);
100 nb_prints++;
101 last_realtime_clock = sc->realtime_clock;
102 }
103 }
104}
105
c2aa5f81
ST
106static void init_delay_params(SyncClocks *sc,
107 const CPUState *cpu)
108{
109 if (!icount_align_option) {
110 return;
111 }
2e91cc62
PB
112 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
113 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
c2aa5f81 114 sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
27498bef
ST
115 if (sc->diff_clk < max_delay) {
116 max_delay = sc->diff_clk;
117 }
118 if (sc->diff_clk > max_advance) {
119 max_advance = sc->diff_clk;
120 }
7f7bc144
ST
121
122 /* Print every 2s max if the guest is late. We limit the number
123 of printed messages to NB_PRINT_MAX(currently 100) */
124 print_delay(sc);
c2aa5f81
ST
125}
126#else
127static void align_clocks(SyncClocks *sc, const CPUState *cpu)
128{
129}
130
131static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
132{
133}
134#endif /* CONFIG USER ONLY */
7d13299d 135
77211379 136/* Execute a TB, and fix up the CPU state afterwards if necessary */
1a830635 137static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb)
77211379
PM
138{
139 CPUArchState *env = cpu->env_ptr;
819af24b
SF
140 uintptr_t ret;
141 TranslationBlock *last_tb;
142 int tb_exit;
1a830635
PM
143 uint8_t *tb_ptr = itb->tc_ptr;
144
d977e1c2
AB
145 qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,
146 "Trace %p [" TARGET_FMT_lx "] %s\n",
147 itb->tc_ptr, itb->pc, lookup_symbol(itb->pc));
03afa5f8
RH
148
149#if defined(DEBUG_DISAS)
be2208e2
RH
150 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)
151 && qemu_log_in_addr_range(itb->pc)) {
03afa5f8
RH
152#if defined(TARGET_I386)
153 log_cpu_state(cpu, CPU_DUMP_CCOP);
03afa5f8
RH
154#else
155 log_cpu_state(cpu, 0);
156#endif
157 }
158#endif /* DEBUG_DISAS */
159
414b15c9 160 cpu->can_do_io = !use_icount;
819af24b 161 ret = tcg_qemu_tb_exec(env, tb_ptr);
626cf8f4 162 cpu->can_do_io = 1;
819af24b
SF
163 last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
164 tb_exit = ret & TB_EXIT_MASK;
165 trace_exec_tb_exit(last_tb, tb_exit);
6db8b538 166
819af24b 167 if (tb_exit > TB_EXIT_IDX1) {
77211379
PM
168 /* We didn't start executing this TB (eg because the instruction
169 * counter hit zero); we must restore the guest PC to the address
170 * of the start of the TB.
171 */
bdf7ae5b 172 CPUClass *cc = CPU_GET_CLASS(cpu);
819af24b 173 qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc,
d977e1c2
AB
174 "Stopped execution of TB chain before %p ["
175 TARGET_FMT_lx "] %s\n",
819af24b
SF
176 last_tb->tc_ptr, last_tb->pc,
177 lookup_symbol(last_tb->pc));
bdf7ae5b 178 if (cc->synchronize_from_tb) {
819af24b 179 cc->synchronize_from_tb(cpu, last_tb);
bdf7ae5b
AF
180 } else {
181 assert(cc->set_pc);
819af24b 182 cc->set_pc(cpu, last_tb->pc);
bdf7ae5b 183 }
77211379 184 }
819af24b 185 if (tb_exit == TB_EXIT_REQUESTED) {
378df4b2
PM
186 /* We were asked to stop executing TBs (probably a pending
187 * interrupt. We've now stopped, so clear the flag.
188 */
027d9a7d 189 atomic_set(&cpu->tcg_exit_req, 0);
378df4b2 190 }
819af24b 191 return ret;
77211379
PM
192}
193
7687bf52 194#ifndef CONFIG_USER_ONLY
2e70f6ef
PB
195/* Execute the code without caching the generated code. An interpreter
196 could be used if available. */
ea3e9847 197static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
56c0269a 198 TranslationBlock *orig_tb, bool ignore_icount)
2e70f6ef 199{
2e70f6ef
PB
200 TranslationBlock *tb;
201
202 /* Should never happen.
203 We only end up here when an existing TB is too long. */
204 if (max_cycles > CF_COUNT_MASK)
205 max_cycles = CF_COUNT_MASK;
206
02d57ea1 207 tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags,
56c0269a
PD
208 max_cycles | CF_NOCACHE
209 | (ignore_icount ? CF_IGNORE_ICOUNT : 0));
3359baad 210 tb->orig_tb = orig_tb;
2e70f6ef 211 /* execute the generated code */
6db8b538 212 trace_exec_tb_nocache(tb, tb->pc);
1a830635 213 cpu_tb_exec(cpu, tb);
2e70f6ef
PB
214 tb_phys_invalidate(tb, -1);
215 tb_free(tb);
216}
7687bf52 217#endif
2e70f6ef 218
fdbc2b57
RH
219static void cpu_exec_step(CPUState *cpu)
220{
221 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
222 TranslationBlock *tb;
223 target_ulong cs_base, pc;
224 uint32_t flags;
225
226 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
227 tb = tb_gen_code(cpu, pc, cs_base, flags,
228 1 | CF_NOCACHE | CF_IGNORE_ICOUNT);
229 tb->orig_tb = NULL;
230 /* execute the generated code */
231 trace_exec_tb_nocache(tb, pc);
232 cpu_tb_exec(cpu, tb);
233 tb_phys_invalidate(tb, -1);
234 tb_free(tb);
235}
236
237void cpu_exec_step_atomic(CPUState *cpu)
238{
239 start_exclusive();
240
241 /* Since we got here, we know that parallel_cpus must be true. */
242 parallel_cpus = false;
243 cpu_exec_step(cpu);
244 parallel_cpus = true;
245
246 end_exclusive();
247}
248
909eaac9
EC
249struct tb_desc {
250 target_ulong pc;
251 target_ulong cs_base;
252 CPUArchState *env;
253 tb_page_addr_t phys_page1;
254 uint32_t flags;
255};
256
257static bool tb_cmp(const void *p, const void *d)
258{
259 const TranslationBlock *tb = p;
260 const struct tb_desc *desc = d;
261
262 if (tb->pc == desc->pc &&
263 tb->page_addr[0] == desc->phys_page1 &&
264 tb->cs_base == desc->cs_base &&
6d21e420
PB
265 tb->flags == desc->flags &&
266 !atomic_read(&tb->invalid)) {
909eaac9
EC
267 /* check next page if needed */
268 if (tb->page_addr[1] == -1) {
269 return true;
270 } else {
271 tb_page_addr_t phys_page2;
272 target_ulong virt_page2;
273
274 virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
275 phys_page2 = get_page_addr_code(desc->env, virt_page2);
276 if (tb->page_addr[1] == phys_page2) {
277 return true;
278 }
279 }
280 }
281 return false;
282}
283
b34de45f 284static TranslationBlock *tb_htable_lookup(CPUState *cpu,
9fd1a948
PB
285 target_ulong pc,
286 target_ulong cs_base,
89fee74a 287 uint32_t flags)
8a40a180 288{
909eaac9
EC
289 tb_page_addr_t phys_pc;
290 struct tb_desc desc;
42bd3228 291 uint32_t h;
3b46e624 292
909eaac9
EC
293 desc.env = (CPUArchState *)cpu->env_ptr;
294 desc.cs_base = cs_base;
295 desc.flags = flags;
296 desc.pc = pc;
297 phys_pc = get_page_addr_code(desc.env, pc);
298 desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
42bd3228 299 h = tb_hash_func(phys_pc, pc, flags);
909eaac9 300 return qht_lookup(&tcg_ctx.tb_ctx.htable, tb_cmp, &desc, h);
9fd1a948
PB
301}
302
bd2710d5
SF
303static inline TranslationBlock *tb_find(CPUState *cpu,
304 TranslationBlock *last_tb,
305 int tb_exit)
8a40a180 306{
ea3e9847 307 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
8a40a180
FB
308 TranslationBlock *tb;
309 target_ulong cs_base, pc;
89fee74a 310 uint32_t flags;
74d356dd 311 bool have_tb_lock = false;
8a40a180
FB
312
313 /* we record a subset of the CPU state. It will
314 always be the same before a given translated block
315 is executed. */
6b917547 316 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
89a16b1e 317 tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]);
551bd27f
TS
318 if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
319 tb->flags != flags)) {
b34de45f 320 tb = tb_htable_lookup(cpu, pc, cs_base, flags);
bd2710d5
SF
321 if (!tb) {
322
323 /* mmap_lock is needed by tb_gen_code, and mmap_lock must be
324 * taken outside tb_lock. As system emulation is currently
325 * single threaded the locks are NOPs.
326 */
327 mmap_lock();
328 tb_lock();
329 have_tb_lock = true;
330
331 /* There's a chance that our desired tb has been translated while
332 * taking the locks so we check again inside the lock.
333 */
b34de45f 334 tb = tb_htable_lookup(cpu, pc, cs_base, flags);
bd2710d5
SF
335 if (!tb) {
336 /* if no translated code available, then translate it now */
337 tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
338 }
339
340 mmap_unlock();
341 }
342
343 /* We add the TB in the virtual pc hash table for the fast lookup */
344 atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb);
8a40a180 345 }
c88c67e5
SF
346#ifndef CONFIG_USER_ONLY
347 /* We don't take care of direct jumps when address mapping changes in
348 * system emulation. So it's not safe to make a direct jump to a TB
349 * spanning two pages because the mapping for the second page can change.
350 */
351 if (tb->page_addr[1] != -1) {
4b7e6950 352 last_tb = NULL;
c88c67e5
SF
353 }
354#endif
a0522c7a 355 /* See if we can patch the calling TB. */
4b7e6950 356 if (last_tb && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) {
74d356dd
SF
357 if (!have_tb_lock) {
358 tb_lock();
359 have_tb_lock = true;
360 }
3359baad 361 if (!tb->invalid) {
118b0730
SF
362 tb_add_jump(last_tb, tb_exit, tb);
363 }
74d356dd
SF
364 }
365 if (have_tb_lock) {
518615c6 366 tb_unlock();
a0522c7a 367 }
8a40a180
FB
368 return tb;
369}
370
8b2d34e9
SF
371static inline bool cpu_handle_halt(CPUState *cpu)
372{
373 if (cpu->halted) {
374#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
375 if ((cpu->interrupt_request & CPU_INTERRUPT_POLL)
376 && replay_interrupt()) {
377 X86CPU *x86_cpu = X86_CPU(cpu);
378 apic_poll_irq(x86_cpu->apic_state);
379 cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
380 }
381#endif
382 if (!cpu_has_work(cpu)) {
383 current_cpu = NULL;
384 return true;
385 }
386
387 cpu->halted = 0;
388 }
389
390 return false;
391}
392
ea284766 393static inline void cpu_handle_debug_exception(CPUState *cpu)
1009d2ed 394{
86025ee4 395 CPUClass *cc = CPU_GET_CLASS(cpu);
1009d2ed
JK
396 CPUWatchpoint *wp;
397
ff4700b0
AF
398 if (!cpu->watchpoint_hit) {
399 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
1009d2ed
JK
400 wp->flags &= ~BP_WATCHPOINT_HIT;
401 }
402 }
86025ee4
PM
403
404 cc->debug_excp_handler(cpu);
1009d2ed
JK
405}
406
ea284766
SF
407static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
408{
409 if (cpu->exception_index >= 0) {
410 if (cpu->exception_index >= EXCP_INTERRUPT) {
411 /* exit request from the cpu execution loop */
412 *ret = cpu->exception_index;
413 if (*ret == EXCP_DEBUG) {
414 cpu_handle_debug_exception(cpu);
415 }
416 cpu->exception_index = -1;
417 return true;
418 } else {
419#if defined(CONFIG_USER_ONLY)
420 /* if user mode only, we simulate a fake exception
421 which will be handled outside the cpu execution
422 loop */
423#if defined(TARGET_I386)
424 CPUClass *cc = CPU_GET_CLASS(cpu);
425 cc->do_interrupt(cpu);
426#endif
427 *ret = cpu->exception_index;
428 cpu->exception_index = -1;
429 return true;
430#else
431 if (replay_exception()) {
432 CPUClass *cc = CPU_GET_CLASS(cpu);
433 cc->do_interrupt(cpu);
434 cpu->exception_index = -1;
435 } else if (!replay_has_interrupt()) {
436 /* give a chance to iothread in replay mode */
437 *ret = EXCP_INTERRUPT;
438 return true;
439 }
440#endif
441 }
442#ifndef CONFIG_USER_ONLY
443 } else if (replay_has_exception()
444 && cpu->icount_decr.u16.low + cpu->icount_extra == 0) {
445 /* try to cause an exception pending in the log */
bd2710d5 446 cpu_exec_nocache(cpu, 1, tb_find(cpu, NULL, 0), true);
ea284766
SF
447 *ret = -1;
448 return true;
449#endif
450 }
451
452 return false;
453}
454
c385e6e4
SF
455static inline void cpu_handle_interrupt(CPUState *cpu,
456 TranslationBlock **last_tb)
457{
458 CPUClass *cc = CPU_GET_CLASS(cpu);
459 int interrupt_request = cpu->interrupt_request;
460
461 if (unlikely(interrupt_request)) {
462 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
463 /* Mask out external interrupts for this step. */
464 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
465 }
466 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
467 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
468 cpu->exception_index = EXCP_DEBUG;
469 cpu_loop_exit(cpu);
470 }
471 if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) {
472 /* Do nothing */
473 } else if (interrupt_request & CPU_INTERRUPT_HALT) {
474 replay_interrupt();
475 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
476 cpu->halted = 1;
477 cpu->exception_index = EXCP_HLT;
478 cpu_loop_exit(cpu);
479 }
480#if defined(TARGET_I386)
481 else if (interrupt_request & CPU_INTERRUPT_INIT) {
482 X86CPU *x86_cpu = X86_CPU(cpu);
483 CPUArchState *env = &x86_cpu->env;
484 replay_interrupt();
485 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
486 do_cpu_init(x86_cpu);
487 cpu->exception_index = EXCP_HALTED;
488 cpu_loop_exit(cpu);
489 }
490#else
491 else if (interrupt_request & CPU_INTERRUPT_RESET) {
492 replay_interrupt();
493 cpu_reset(cpu);
494 cpu_loop_exit(cpu);
495 }
496#endif
497 /* The target hook has 3 exit conditions:
498 False when the interrupt isn't processed,
499 True when it is, and we should restart on a new TB,
500 and via longjmp via cpu_loop_exit. */
501 else {
502 replay_interrupt();
503 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
504 *last_tb = NULL;
505 }
8b1fe3f4
SF
506 /* The target hook may have updated the 'cpu->interrupt_request';
507 * reload the 'interrupt_request' value */
508 interrupt_request = cpu->interrupt_request;
c385e6e4 509 }
8b1fe3f4 510 if (interrupt_request & CPU_INTERRUPT_EXITTB) {
c385e6e4
SF
511 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
512 /* ensure that no TB jump will be modified as
513 the program flow was changed */
514 *last_tb = NULL;
515 }
516 }
027d9a7d
AB
517 if (unlikely(atomic_read(&cpu->exit_request) || replay_has_interrupt())) {
518 atomic_set(&cpu->exit_request, 0);
c385e6e4
SF
519 cpu->exception_index = EXCP_INTERRUPT;
520 cpu_loop_exit(cpu);
521 }
522}
523
928de9ee
SF
524static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb,
525 TranslationBlock **last_tb, int *tb_exit,
526 SyncClocks *sc)
527{
528 uintptr_t ret;
529
027d9a7d 530 if (unlikely(atomic_read(&cpu->exit_request))) {
928de9ee
SF
531 return;
532 }
533
534 trace_exec_tb(tb, tb->pc);
535 ret = cpu_tb_exec(cpu, tb);
536 *last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
537 *tb_exit = ret & TB_EXIT_MASK;
538 switch (*tb_exit) {
539 case TB_EXIT_REQUESTED:
540 /* Something asked us to stop executing
541 * chained TBs; just continue round the main
542 * loop. Whatever requested the exit will also
543 * have set something else (eg exit_request or
544 * interrupt_request) which we will handle
545 * next time around the loop. But we need to
546 * ensure the tcg_exit_req read in generated code
547 * comes before the next read of cpu->exit_request
548 * or cpu->interrupt_request.
549 */
550 smp_rmb();
551 *last_tb = NULL;
552 break;
553 case TB_EXIT_ICOUNT_EXPIRED:
554 {
555 /* Instruction counter expired. */
556#ifdef CONFIG_USER_ONLY
557 abort();
558#else
559 int insns_left = cpu->icount_decr.u32;
560 if (cpu->icount_extra && insns_left >= 0) {
561 /* Refill decrementer and continue execution. */
562 cpu->icount_extra += insns_left;
563 insns_left = MIN(0xffff, cpu->icount_extra);
564 cpu->icount_extra -= insns_left;
565 cpu->icount_decr.u16.low = insns_left;
566 } else {
567 if (insns_left > 0) {
568 /* Execute remaining instructions. */
569 cpu_exec_nocache(cpu, insns_left, *last_tb, false);
570 align_clocks(sc, cpu);
571 }
572 cpu->exception_index = EXCP_INTERRUPT;
573 *last_tb = NULL;
574 cpu_loop_exit(cpu);
575 }
576 break;
577#endif
578 }
579 default:
580 break;
581 }
582}
583
7d13299d
FB
584/* main execution loop */
585
ea3e9847 586int cpu_exec(CPUState *cpu)
7d13299d 587{
97a8ea5a 588 CPUClass *cc = CPU_GET_CLASS(cpu);
c385e6e4 589 int ret;
c2aa5f81
ST
590 SyncClocks sc;
591
6f060969
PD
592 /* replay_interrupt may need current_cpu */
593 current_cpu = cpu;
594
8b2d34e9
SF
595 if (cpu_handle_halt(cpu)) {
596 return EXCP_HALTED;
eda48c34 597 }
5a1e3cfc 598
9373e632 599 atomic_mb_set(&tcg_current_cpu, cpu);
79e2b9ae
PB
600 rcu_read_lock();
601
aed807c8 602 if (unlikely(atomic_mb_read(&exit_request))) {
fcd7d003 603 cpu->exit_request = 1;
1a28cac3
MT
604 }
605
cffe7b32 606 cc->cpu_exec_enter(cpu);
9d27abd9 607
c2aa5f81
ST
608 /* Calculate difference between guest clock and host clock.
609 * This delay includes the delay of the last cycle, so
610 * what we have to do is sleep until it is 0. As for the
611 * advance/delay we gain here, we try to fix it next time.
612 */
613 init_delay_params(&sc, cpu);
614
3fb2ded1 615 for(;;) {
ea284766 616 /* prepare setjmp context for exception handling */
6f03bef0 617 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
ca7d8e1c
SF
618 TranslationBlock *tb, *last_tb = NULL;
619 int tb_exit = 0;
620
3fb2ded1 621 /* if an exception is pending, we execute it here */
ea284766 622 if (cpu_handle_exception(cpu, &ret)) {
6f060969 623 break;
5fafdf24 624 }
9df217a3 625
3fb2ded1 626 for(;;) {
c385e6e4 627 cpu_handle_interrupt(cpu, &last_tb);
bd2710d5 628 tb = tb_find(cpu, last_tb, tb_exit);
928de9ee 629 cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit, &sc);
c2aa5f81
ST
630 /* Try to align the host and virtual clocks
631 if the guest is in advance */
632 align_clocks(&sc, cpu);
50a518e3 633 } /* for(;;) */
0d101938 634 } else {
0448f5f8
SW
635#if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6)
636 /* Some compilers wrongly smash all local variables after
637 * siglongjmp. There were bug reports for gcc 4.5.0 and clang.
638 * Reload essential local variables here for those compilers.
639 * Newer versions of gcc would complain about this code (-Wclobbered). */
4917cf44 640 cpu = current_cpu;
6c78f29a 641 cc = CPU_GET_CLASS(cpu);
0448f5f8
SW
642#else /* buggy compiler */
643 /* Assert that the compiler does not smash local variables. */
644 g_assert(cpu == current_cpu);
645 g_assert(cc == CPU_GET_CLASS(cpu));
0448f5f8
SW
646#endif /* buggy compiler */
647 cpu->can_do_io = 1;
677ef623 648 tb_lock_reset();
7d13299d 649 }
3fb2ded1
FB
650 } /* for(;;) */
651
cffe7b32 652 cc->cpu_exec_exit(cpu);
79e2b9ae 653 rcu_read_unlock();
1057eaa7 654
4917cf44
AF
655 /* fail safe : never use current_cpu outside cpu_exec() */
656 current_cpu = NULL;
9373e632
PB
657
658 /* Does not need atomic_mb_set because a spurious wakeup is okay. */
659 atomic_set(&tcg_current_cpu, NULL);
7d13299d
FB
660 return ret;
661}