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7d13299d 1/*
e965fc38 2 * emulator main execution loop
5fafdf24 3 *
66321a11 4 * Copyright (c) 2003-2005 Fabrice Bellard
7d13299d 5 *
3ef693a0
FB
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
7d13299d 10 *
3ef693a0
FB
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
7d13299d 15 *
3ef693a0 16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
7d13299d 18 */
e4533c7a 19#include "config.h"
cea5f9a2 20#include "cpu.h"
6db8b538 21#include "trace.h"
76cad711 22#include "disas/disas.h"
7cb69cae 23#include "tcg.h"
1de7afc9 24#include "qemu/atomic.h"
9c17d615 25#include "sysemu/qtest.h"
c2aa5f81 26#include "qemu/timer.h"
9d82b5a7 27#include "exec/address-spaces.h"
79e2b9ae 28#include "qemu/rcu.h"
e1b89321 29#include "exec/tb-hash.h"
c2aa5f81
ST
30
31/* -icount align implementation. */
32
33typedef struct SyncClocks {
34 int64_t diff_clk;
35 int64_t last_cpu_icount;
7f7bc144 36 int64_t realtime_clock;
c2aa5f81
ST
37} SyncClocks;
38
39#if !defined(CONFIG_USER_ONLY)
40/* Allow the guest to have a max 3ms advance.
41 * The difference between the 2 clocks could therefore
42 * oscillate around 0.
43 */
44#define VM_CLOCK_ADVANCE 3000000
7f7bc144
ST
45#define THRESHOLD_REDUCE 1.5
46#define MAX_DELAY_PRINT_RATE 2000000000LL
47#define MAX_NB_PRINTS 100
c2aa5f81
ST
48
49static void align_clocks(SyncClocks *sc, const CPUState *cpu)
50{
51 int64_t cpu_icount;
52
53 if (!icount_align_option) {
54 return;
55 }
56
57 cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
58 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
59 sc->last_cpu_icount = cpu_icount;
60
61 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
62#ifndef _WIN32
63 struct timespec sleep_delay, rem_delay;
64 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
65 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
66 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
a498d0ef 67 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
c2aa5f81
ST
68 } else {
69 sc->diff_clk = 0;
70 }
71#else
72 Sleep(sc->diff_clk / SCALE_MS);
73 sc->diff_clk = 0;
74#endif
75 }
76}
77
7f7bc144
ST
78static void print_delay(const SyncClocks *sc)
79{
80 static float threshold_delay;
81 static int64_t last_realtime_clock;
82 static int nb_prints;
83
84 if (icount_align_option &&
85 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
86 nb_prints < MAX_NB_PRINTS) {
87 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
88 (-sc->diff_clk / (float)1000000000LL <
89 (threshold_delay - THRESHOLD_REDUCE))) {
90 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
91 printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
92 threshold_delay - 1,
93 threshold_delay);
94 nb_prints++;
95 last_realtime_clock = sc->realtime_clock;
96 }
97 }
98}
99
c2aa5f81
ST
100static void init_delay_params(SyncClocks *sc,
101 const CPUState *cpu)
102{
103 if (!icount_align_option) {
104 return;
105 }
2e91cc62
PB
106 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
107 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
c2aa5f81 108 sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
27498bef
ST
109 if (sc->diff_clk < max_delay) {
110 max_delay = sc->diff_clk;
111 }
112 if (sc->diff_clk > max_advance) {
113 max_advance = sc->diff_clk;
114 }
7f7bc144
ST
115
116 /* Print every 2s max if the guest is late. We limit the number
117 of printed messages to NB_PRINT_MAX(currently 100) */
118 print_delay(sc);
c2aa5f81
ST
119}
120#else
121static void align_clocks(SyncClocks *sc, const CPUState *cpu)
122{
123}
124
125static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
126{
127}
128#endif /* CONFIG USER ONLY */
7d13299d 129
77211379
PM
130/* Execute a TB, and fix up the CPU state afterwards if necessary */
131static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr)
132{
133 CPUArchState *env = cpu->env_ptr;
03afa5f8
RH
134 uintptr_t next_tb;
135
136#if defined(DEBUG_DISAS)
137 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
138#if defined(TARGET_I386)
139 log_cpu_state(cpu, CPU_DUMP_CCOP);
140#elif defined(TARGET_M68K)
141 /* ??? Should not modify env state for dumping. */
142 cpu_m68k_flush_flags(env, env->cc_op);
143 env->cc_op = CC_OP_FLAGS;
144 env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4);
145 log_cpu_state(cpu, 0);
146#else
147 log_cpu_state(cpu, 0);
148#endif
149 }
150#endif /* DEBUG_DISAS */
151
414b15c9 152 cpu->can_do_io = !use_icount;
03afa5f8 153 next_tb = tcg_qemu_tb_exec(env, tb_ptr);
626cf8f4 154 cpu->can_do_io = 1;
6db8b538
AB
155 trace_exec_tb_exit((void *) (next_tb & ~TB_EXIT_MASK),
156 next_tb & TB_EXIT_MASK);
157
77211379
PM
158 if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) {
159 /* We didn't start executing this TB (eg because the instruction
160 * counter hit zero); we must restore the guest PC to the address
161 * of the start of the TB.
162 */
bdf7ae5b 163 CPUClass *cc = CPU_GET_CLASS(cpu);
77211379 164 TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
bdf7ae5b
AF
165 if (cc->synchronize_from_tb) {
166 cc->synchronize_from_tb(cpu, tb);
167 } else {
168 assert(cc->set_pc);
169 cc->set_pc(cpu, tb->pc);
170 }
77211379 171 }
378df4b2
PM
172 if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) {
173 /* We were asked to stop executing TBs (probably a pending
174 * interrupt. We've now stopped, so clear the flag.
175 */
176 cpu->tcg_exit_req = 0;
177 }
77211379
PM
178 return next_tb;
179}
180
2e70f6ef
PB
181/* Execute the code without caching the generated code. An interpreter
182 could be used if available. */
ea3e9847 183static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
cea5f9a2 184 TranslationBlock *orig_tb)
2e70f6ef 185{
2e70f6ef
PB
186 TranslationBlock *tb;
187
188 /* Should never happen.
189 We only end up here when an existing TB is too long. */
190 if (max_cycles > CF_COUNT_MASK)
191 max_cycles = CF_COUNT_MASK;
192
02d57ea1 193 tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags,
d8a499f1 194 max_cycles | CF_NOCACHE);
02d57ea1 195 tb->orig_tb = tcg_ctx.tb_ctx.tb_invalidated_flag ? NULL : orig_tb;
d77953b9 196 cpu->current_tb = tb;
2e70f6ef 197 /* execute the generated code */
6db8b538 198 trace_exec_tb_nocache(tb, tb->pc);
77211379 199 cpu_tb_exec(cpu, tb->tc_ptr);
d77953b9 200 cpu->current_tb = NULL;
2e70f6ef
PB
201 tb_phys_invalidate(tb, -1);
202 tb_free(tb);
203}
204
9fd1a948
PB
205static TranslationBlock *tb_find_physical(CPUState *cpu,
206 target_ulong pc,
207 target_ulong cs_base,
208 uint64_t flags)
8a40a180 209{
ea3e9847 210 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
8a40a180 211 TranslationBlock *tb, **ptb1;
8a40a180 212 unsigned int h;
337fc758 213 tb_page_addr_t phys_pc, phys_page1;
41c1b1c9 214 target_ulong virt_page2;
3b46e624 215
5e5f07e0 216 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
3b46e624 217
8a40a180 218 /* find translated block using physical mappings */
41c1b1c9 219 phys_pc = get_page_addr_code(env, pc);
8a40a180 220 phys_page1 = phys_pc & TARGET_PAGE_MASK;
8a40a180 221 h = tb_phys_hash_func(phys_pc);
5e5f07e0 222 ptb1 = &tcg_ctx.tb_ctx.tb_phys_hash[h];
8a40a180
FB
223 for(;;) {
224 tb = *ptb1;
9fd1a948
PB
225 if (!tb) {
226 return NULL;
227 }
5fafdf24 228 if (tb->pc == pc &&
8a40a180 229 tb->page_addr[0] == phys_page1 &&
5fafdf24 230 tb->cs_base == cs_base &&
8a40a180
FB
231 tb->flags == flags) {
232 /* check next page if needed */
233 if (tb->page_addr[1] != -1) {
337fc758
BS
234 tb_page_addr_t phys_page2;
235
5fafdf24 236 virt_page2 = (pc & TARGET_PAGE_MASK) +
8a40a180 237 TARGET_PAGE_SIZE;
41c1b1c9 238 phys_page2 = get_page_addr_code(env, virt_page2);
9fd1a948
PB
239 if (tb->page_addr[1] == phys_page2) {
240 break;
241 }
8a40a180 242 } else {
9fd1a948 243 break;
8a40a180
FB
244 }
245 }
246 ptb1 = &tb->phys_hash_next;
247 }
3b46e624 248
9fd1a948
PB
249 /* Move the TB to the head of the list */
250 *ptb1 = tb->phys_hash_next;
251 tb->phys_hash_next = tcg_ctx.tb_ctx.tb_phys_hash[h];
252 tcg_ctx.tb_ctx.tb_phys_hash[h] = tb;
253 return tb;
254}
255
256static TranslationBlock *tb_find_slow(CPUState *cpu,
257 target_ulong pc,
258 target_ulong cs_base,
259 uint64_t flags)
260{
261 TranslationBlock *tb;
262
263 tb = tb_find_physical(cpu, pc, cs_base, flags);
264 if (tb) {
265 goto found;
266 }
267
268#ifdef CONFIG_USER_ONLY
269 /* mmap_lock is needed by tb_gen_code, and mmap_lock must be
270 * taken outside tb_lock. Since we're momentarily dropping
271 * tb_lock, there's a chance that our desired tb has been
272 * translated.
273 */
274 tb_unlock();
275 mmap_lock();
276 tb_lock();
277 tb = tb_find_physical(cpu, pc, cs_base, flags);
278 if (tb) {
279 mmap_unlock();
280 goto found;
2c90fe2b 281 }
9fd1a948
PB
282#endif
283
284 /* if no translated code available, then translate it now */
285 tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
286
287#ifdef CONFIG_USER_ONLY
288 mmap_unlock();
289#endif
290
291found:
8a40a180 292 /* we add the TB in the virtual pc hash table */
8cd70437 293 cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb;
8a40a180
FB
294 return tb;
295}
296
ea3e9847 297static inline TranslationBlock *tb_find_fast(CPUState *cpu)
8a40a180 298{
ea3e9847 299 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
8a40a180
FB
300 TranslationBlock *tb;
301 target_ulong cs_base, pc;
6b917547 302 int flags;
8a40a180
FB
303
304 /* we record a subset of the CPU state. It will
305 always be the same before a given translated block
306 is executed. */
6b917547 307 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
8cd70437 308 tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)];
551bd27f
TS
309 if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
310 tb->flags != flags)) {
ea3e9847 311 tb = tb_find_slow(cpu, pc, cs_base, flags);
8a40a180
FB
312 }
313 return tb;
314}
315
ea3e9847 316static void cpu_handle_debug_exception(CPUState *cpu)
1009d2ed 317{
86025ee4 318 CPUClass *cc = CPU_GET_CLASS(cpu);
1009d2ed
JK
319 CPUWatchpoint *wp;
320
ff4700b0
AF
321 if (!cpu->watchpoint_hit) {
322 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
1009d2ed
JK
323 wp->flags &= ~BP_WATCHPOINT_HIT;
324 }
325 }
86025ee4
PM
326
327 cc->debug_excp_handler(cpu);
1009d2ed
JK
328}
329
7d13299d
FB
330/* main execution loop */
331
ea3e9847 332int cpu_exec(CPUState *cpu)
7d13299d 333{
97a8ea5a 334 CPUClass *cc = CPU_GET_CLASS(cpu);
693fa551
AF
335#ifdef TARGET_I386
336 X86CPU *x86_cpu = X86_CPU(cpu);
ea3e9847 337 CPUArchState *env = &x86_cpu->env;
97a8ea5a 338#endif
8a40a180 339 int ret, interrupt_request;
8a40a180 340 TranslationBlock *tb;
c27004ec 341 uint8_t *tc_ptr;
3e9bd63a 342 uintptr_t next_tb;
c2aa5f81
ST
343 SyncClocks sc;
344
259186a7 345 if (cpu->halted) {
3993c6bd 346 if (!cpu_has_work(cpu)) {
eda48c34
PB
347 return EXCP_HALTED;
348 }
349
259186a7 350 cpu->halted = 0;
eda48c34 351 }
5a1e3cfc 352
4917cf44 353 current_cpu = cpu;
9373e632 354 atomic_mb_set(&tcg_current_cpu, cpu);
79e2b9ae
PB
355 rcu_read_lock();
356
aed807c8 357 if (unlikely(atomic_mb_read(&exit_request))) {
fcd7d003 358 cpu->exit_request = 1;
1a28cac3
MT
359 }
360
cffe7b32 361 cc->cpu_exec_enter(cpu);
9d27abd9 362
c2aa5f81
ST
363 /* Calculate difference between guest clock and host clock.
364 * This delay includes the delay of the last cycle, so
365 * what we have to do is sleep until it is 0. As for the
366 * advance/delay we gain here, we try to fix it next time.
367 */
368 init_delay_params(&sc, cpu);
369
7d13299d 370 /* prepare setjmp context for exception handling */
3fb2ded1 371 for(;;) {
6f03bef0 372 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
3fb2ded1 373 /* if an exception is pending, we execute it here */
27103424
AF
374 if (cpu->exception_index >= 0) {
375 if (cpu->exception_index >= EXCP_INTERRUPT) {
3fb2ded1 376 /* exit request from the cpu execution loop */
27103424 377 ret = cpu->exception_index;
1009d2ed 378 if (ret == EXCP_DEBUG) {
ea3e9847 379 cpu_handle_debug_exception(cpu);
1009d2ed 380 }
e511b4d7 381 cpu->exception_index = -1;
3fb2ded1 382 break;
72d239ed
AJ
383 } else {
384#if defined(CONFIG_USER_ONLY)
3fb2ded1 385 /* if user mode only, we simulate a fake exception
9f083493 386 which will be handled outside the cpu execution
3fb2ded1 387 loop */
83479e77 388#if defined(TARGET_I386)
97a8ea5a 389 cc->do_interrupt(cpu);
83479e77 390#endif
27103424 391 ret = cpu->exception_index;
e511b4d7 392 cpu->exception_index = -1;
3fb2ded1 393 break;
72d239ed 394#else
97a8ea5a 395 cc->do_interrupt(cpu);
27103424 396 cpu->exception_index = -1;
83479e77 397#endif
3fb2ded1 398 }
5fafdf24 399 }
9df217a3 400
b5fc09ae 401 next_tb = 0; /* force lookup of first TB */
3fb2ded1 402 for(;;) {
259186a7 403 interrupt_request = cpu->interrupt_request;
e1638bd8 404 if (unlikely(interrupt_request)) {
ed2803da 405 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
e1638bd8 406 /* Mask out external interrupts for this step. */
3125f763 407 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
e1638bd8 408 }
6658ffb8 409 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
259186a7 410 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
27103424 411 cpu->exception_index = EXCP_DEBUG;
5638d180 412 cpu_loop_exit(cpu);
6658ffb8 413 }
a90b7318 414 if (interrupt_request & CPU_INTERRUPT_HALT) {
259186a7
AF
415 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
416 cpu->halted = 1;
27103424 417 cpu->exception_index = EXCP_HLT;
5638d180 418 cpu_loop_exit(cpu);
a90b7318 419 }
4a92a558
PB
420#if defined(TARGET_I386)
421 if (interrupt_request & CPU_INTERRUPT_INIT) {
422 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
423 do_cpu_init(x86_cpu);
424 cpu->exception_index = EXCP_HALTED;
425 cpu_loop_exit(cpu);
426 }
427#else
428 if (interrupt_request & CPU_INTERRUPT_RESET) {
429 cpu_reset(cpu);
430 }
68a79315 431#endif
9585db68
RH
432 /* The target hook has 3 exit conditions:
433 False when the interrupt isn't processed,
434 True when it is, and we should restart on a new TB,
435 and via longjmp via cpu_loop_exit. */
436 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
437 next_tb = 0;
438 }
439 /* Don't use the cached interrupt_request value,
440 do_interrupt may have updated the EXITTB flag. */
259186a7
AF
441 if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) {
442 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
bf3e8bf1
FB
443 /* ensure that no TB jump will be modified as
444 the program flow was changed */
b5fc09ae 445 next_tb = 0;
bf3e8bf1 446 }
be214e6c 447 }
fcd7d003
AF
448 if (unlikely(cpu->exit_request)) {
449 cpu->exit_request = 0;
27103424 450 cpu->exception_index = EXCP_INTERRUPT;
5638d180 451 cpu_loop_exit(cpu);
3fb2ded1 452 }
677ef623 453 tb_lock();
ea3e9847 454 tb = tb_find_fast(cpu);
d5975363
PB
455 /* Note: we do it here to avoid a gcc bug on Mac OS X when
456 doing it in tb_find_slow */
5e5f07e0 457 if (tcg_ctx.tb_ctx.tb_invalidated_flag) {
d5975363
PB
458 /* as some TB could have been invalidated because
459 of memory exceptions while generating the code, we
460 must recompute the hash index here */
461 next_tb = 0;
5e5f07e0 462 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
d5975363 463 }
c30d1aea
PM
464 if (qemu_loglevel_mask(CPU_LOG_EXEC)) {
465 qemu_log("Trace %p [" TARGET_FMT_lx "] %s\n",
466 tb->tc_ptr, tb->pc, lookup_symbol(tb->pc));
467 }
8a40a180
FB
468 /* see if we can patch the calling TB. When the TB
469 spans two pages, we cannot safely do a direct
470 jump. */
040f2fb2 471 if (next_tb != 0 && tb->page_addr[1] == -1) {
0980011b
PM
472 tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK),
473 next_tb & TB_EXIT_MASK, tb);
3fb2ded1 474 }
677ef623 475 tb_unlock();
fcd7d003 476 if (likely(!cpu->exit_request)) {
6db8b538 477 trace_exec_tb(tb, tb->pc);
2e70f6ef 478 tc_ptr = tb->tc_ptr;
e965fc38 479 /* execute the generated code */
b0a46fa7 480 cpu->current_tb = tb;
77211379 481 next_tb = cpu_tb_exec(cpu, tc_ptr);
b0a46fa7 482 cpu->current_tb = NULL;
378df4b2
PM
483 switch (next_tb & TB_EXIT_MASK) {
484 case TB_EXIT_REQUESTED:
485 /* Something asked us to stop executing
486 * chained TBs; just continue round the main
487 * loop. Whatever requested the exit will also
488 * have set something else (eg exit_request or
489 * interrupt_request) which we will handle
ab096a75
PB
490 * next time around the loop. But we need to
491 * ensure the tcg_exit_req read in generated code
492 * comes before the next read of cpu->exit_request
493 * or cpu->interrupt_request.
378df4b2 494 */
ab096a75 495 smp_rmb();
378df4b2
PM
496 next_tb = 0;
497 break;
498 case TB_EXIT_ICOUNT_EXPIRED:
499 {
bf20dc07 500 /* Instruction counter expired. */
52851b7e 501 int insns_left = cpu->icount_decr.u32;
efee7340 502 if (cpu->icount_extra && insns_left >= 0) {
2e70f6ef 503 /* Refill decrementer and continue execution. */
efee7340 504 cpu->icount_extra += insns_left;
52851b7e 505 insns_left = MIN(0xffff, cpu->icount_extra);
efee7340 506 cpu->icount_extra -= insns_left;
28ecfd7a 507 cpu->icount_decr.u16.low = insns_left;
2e70f6ef
PB
508 } else {
509 if (insns_left > 0) {
510 /* Execute remaining instructions. */
52851b7e 511 tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
ea3e9847 512 cpu_exec_nocache(cpu, insns_left, tb);
c2aa5f81 513 align_clocks(&sc, cpu);
2e70f6ef 514 }
27103424 515 cpu->exception_index = EXCP_INTERRUPT;
2e70f6ef 516 next_tb = 0;
5638d180 517 cpu_loop_exit(cpu);
2e70f6ef 518 }
378df4b2
PM
519 break;
520 }
521 default:
522 break;
2e70f6ef
PB
523 }
524 }
c2aa5f81
ST
525 /* Try to align the host and virtual clocks
526 if the guest is in advance */
527 align_clocks(&sc, cpu);
4cbf74b6
FB
528 /* reset soft MMU for next block (it can currently
529 only be set by a memory fault) */
50a518e3 530 } /* for(;;) */
0d101938
JK
531 } else {
532 /* Reload env after longjmp - the compiler may have smashed all
533 * local variables as longjmp is marked 'noreturn'. */
4917cf44 534 cpu = current_cpu;
6c78f29a 535 cc = CPU_GET_CLASS(cpu);
626cf8f4 536 cpu->can_do_io = 1;
693fa551
AF
537#ifdef TARGET_I386
538 x86_cpu = X86_CPU(cpu);
ea3e9847 539 env = &x86_cpu->env;
6c78f29a 540#endif
677ef623 541 tb_lock_reset();
7d13299d 542 }
3fb2ded1
FB
543 } /* for(;;) */
544
cffe7b32 545 cc->cpu_exec_exit(cpu);
79e2b9ae 546 rcu_read_unlock();
1057eaa7 547
4917cf44
AF
548 /* fail safe : never use current_cpu outside cpu_exec() */
549 current_cpu = NULL;
9373e632
PB
550
551 /* Does not need atomic_mb_set because a spurious wakeup is okay. */
552 atomic_set(&tcg_current_cpu, NULL);
7d13299d
FB
553 return ret;
554}