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7d13299d 1/*
e965fc38 2 * emulator main execution loop
5fafdf24 3 *
66321a11 4 * Copyright (c) 2003-2005 Fabrice Bellard
7d13299d 5 *
3ef693a0
FB
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
7d13299d 10 *
3ef693a0
FB
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
7d13299d 15 *
3ef693a0 16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
7d13299d 18 */
7b31bbc2 19#include "qemu/osdep.h"
cea5f9a2 20#include "cpu.h"
6db8b538 21#include "trace.h"
76cad711 22#include "disas/disas.h"
7cb69cae 23#include "tcg.h"
1de7afc9 24#include "qemu/atomic.h"
9c17d615 25#include "sysemu/qtest.h"
c2aa5f81 26#include "qemu/timer.h"
9d82b5a7 27#include "exec/address-spaces.h"
79e2b9ae 28#include "qemu/rcu.h"
e1b89321 29#include "exec/tb-hash.h"
508127e2 30#include "exec/log.h"
6220e900
PD
31#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
32#include "hw/i386/apic.h"
33#endif
6f060969 34#include "sysemu/replay.h"
c2aa5f81
ST
35
36/* -icount align implementation. */
37
38typedef struct SyncClocks {
39 int64_t diff_clk;
40 int64_t last_cpu_icount;
7f7bc144 41 int64_t realtime_clock;
c2aa5f81
ST
42} SyncClocks;
43
44#if !defined(CONFIG_USER_ONLY)
45/* Allow the guest to have a max 3ms advance.
46 * The difference between the 2 clocks could therefore
47 * oscillate around 0.
48 */
49#define VM_CLOCK_ADVANCE 3000000
7f7bc144
ST
50#define THRESHOLD_REDUCE 1.5
51#define MAX_DELAY_PRINT_RATE 2000000000LL
52#define MAX_NB_PRINTS 100
c2aa5f81
ST
53
54static void align_clocks(SyncClocks *sc, const CPUState *cpu)
55{
56 int64_t cpu_icount;
57
58 if (!icount_align_option) {
59 return;
60 }
61
62 cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
63 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
64 sc->last_cpu_icount = cpu_icount;
65
66 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
67#ifndef _WIN32
68 struct timespec sleep_delay, rem_delay;
69 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
70 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
71 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
a498d0ef 72 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
c2aa5f81
ST
73 } else {
74 sc->diff_clk = 0;
75 }
76#else
77 Sleep(sc->diff_clk / SCALE_MS);
78 sc->diff_clk = 0;
79#endif
80 }
81}
82
7f7bc144
ST
83static void print_delay(const SyncClocks *sc)
84{
85 static float threshold_delay;
86 static int64_t last_realtime_clock;
87 static int nb_prints;
88
89 if (icount_align_option &&
90 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
91 nb_prints < MAX_NB_PRINTS) {
92 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
93 (-sc->diff_clk / (float)1000000000LL <
94 (threshold_delay - THRESHOLD_REDUCE))) {
95 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
96 printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
97 threshold_delay - 1,
98 threshold_delay);
99 nb_prints++;
100 last_realtime_clock = sc->realtime_clock;
101 }
102 }
103}
104
c2aa5f81
ST
105static void init_delay_params(SyncClocks *sc,
106 const CPUState *cpu)
107{
108 if (!icount_align_option) {
109 return;
110 }
2e91cc62
PB
111 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
112 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
c2aa5f81 113 sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
27498bef
ST
114 if (sc->diff_clk < max_delay) {
115 max_delay = sc->diff_clk;
116 }
117 if (sc->diff_clk > max_advance) {
118 max_advance = sc->diff_clk;
119 }
7f7bc144
ST
120
121 /* Print every 2s max if the guest is late. We limit the number
122 of printed messages to NB_PRINT_MAX(currently 100) */
123 print_delay(sc);
c2aa5f81
ST
124}
125#else
126static void align_clocks(SyncClocks *sc, const CPUState *cpu)
127{
128}
129
130static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
131{
132}
133#endif /* CONFIG USER ONLY */
7d13299d 134
77211379 135/* Execute a TB, and fix up the CPU state afterwards if necessary */
1a830635 136static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb)
77211379
PM
137{
138 CPUArchState *env = cpu->env_ptr;
03afa5f8 139 uintptr_t next_tb;
1a830635
PM
140 uint8_t *tb_ptr = itb->tc_ptr;
141
d977e1c2
AB
142 qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,
143 "Trace %p [" TARGET_FMT_lx "] %s\n",
144 itb->tc_ptr, itb->pc, lookup_symbol(itb->pc));
03afa5f8
RH
145
146#if defined(DEBUG_DISAS)
147 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
148#if defined(TARGET_I386)
149 log_cpu_state(cpu, CPU_DUMP_CCOP);
150#elif defined(TARGET_M68K)
151 /* ??? Should not modify env state for dumping. */
152 cpu_m68k_flush_flags(env, env->cc_op);
153 env->cc_op = CC_OP_FLAGS;
154 env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4);
155 log_cpu_state(cpu, 0);
156#else
157 log_cpu_state(cpu, 0);
158#endif
159 }
160#endif /* DEBUG_DISAS */
161
414b15c9 162 cpu->can_do_io = !use_icount;
03afa5f8 163 next_tb = tcg_qemu_tb_exec(env, tb_ptr);
626cf8f4 164 cpu->can_do_io = 1;
6db8b538
AB
165 trace_exec_tb_exit((void *) (next_tb & ~TB_EXIT_MASK),
166 next_tb & TB_EXIT_MASK);
167
77211379
PM
168 if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) {
169 /* We didn't start executing this TB (eg because the instruction
170 * counter hit zero); we must restore the guest PC to the address
171 * of the start of the TB.
172 */
bdf7ae5b 173 CPUClass *cc = CPU_GET_CLASS(cpu);
77211379 174 TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
d977e1c2
AB
175 qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,
176 "Stopped execution of TB chain before %p ["
177 TARGET_FMT_lx "] %s\n",
178 itb->tc_ptr, itb->pc, lookup_symbol(itb->pc));
bdf7ae5b
AF
179 if (cc->synchronize_from_tb) {
180 cc->synchronize_from_tb(cpu, tb);
181 } else {
182 assert(cc->set_pc);
183 cc->set_pc(cpu, tb->pc);
184 }
77211379 185 }
378df4b2
PM
186 if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) {
187 /* We were asked to stop executing TBs (probably a pending
188 * interrupt. We've now stopped, so clear the flag.
189 */
190 cpu->tcg_exit_req = 0;
191 }
77211379
PM
192 return next_tb;
193}
194
2e70f6ef
PB
195/* Execute the code without caching the generated code. An interpreter
196 could be used if available. */
ea3e9847 197static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
56c0269a 198 TranslationBlock *orig_tb, bool ignore_icount)
2e70f6ef 199{
2e70f6ef
PB
200 TranslationBlock *tb;
201
202 /* Should never happen.
203 We only end up here when an existing TB is too long. */
204 if (max_cycles > CF_COUNT_MASK)
205 max_cycles = CF_COUNT_MASK;
206
02d57ea1 207 tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags,
56c0269a
PD
208 max_cycles | CF_NOCACHE
209 | (ignore_icount ? CF_IGNORE_ICOUNT : 0));
02d57ea1 210 tb->orig_tb = tcg_ctx.tb_ctx.tb_invalidated_flag ? NULL : orig_tb;
d77953b9 211 cpu->current_tb = tb;
2e70f6ef 212 /* execute the generated code */
6db8b538 213 trace_exec_tb_nocache(tb, tb->pc);
1a830635 214 cpu_tb_exec(cpu, tb);
d77953b9 215 cpu->current_tb = NULL;
2e70f6ef
PB
216 tb_phys_invalidate(tb, -1);
217 tb_free(tb);
218}
219
9fd1a948
PB
220static TranslationBlock *tb_find_physical(CPUState *cpu,
221 target_ulong pc,
222 target_ulong cs_base,
223 uint64_t flags)
8a40a180 224{
ea3e9847 225 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
8a40a180 226 TranslationBlock *tb, **ptb1;
8a40a180 227 unsigned int h;
337fc758 228 tb_page_addr_t phys_pc, phys_page1;
41c1b1c9 229 target_ulong virt_page2;
3b46e624 230
5e5f07e0 231 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
3b46e624 232
8a40a180 233 /* find translated block using physical mappings */
41c1b1c9 234 phys_pc = get_page_addr_code(env, pc);
8a40a180 235 phys_page1 = phys_pc & TARGET_PAGE_MASK;
8a40a180 236 h = tb_phys_hash_func(phys_pc);
5e5f07e0 237 ptb1 = &tcg_ctx.tb_ctx.tb_phys_hash[h];
8a40a180
FB
238 for(;;) {
239 tb = *ptb1;
9fd1a948
PB
240 if (!tb) {
241 return NULL;
242 }
5fafdf24 243 if (tb->pc == pc &&
8a40a180 244 tb->page_addr[0] == phys_page1 &&
5fafdf24 245 tb->cs_base == cs_base &&
8a40a180
FB
246 tb->flags == flags) {
247 /* check next page if needed */
248 if (tb->page_addr[1] != -1) {
337fc758
BS
249 tb_page_addr_t phys_page2;
250
5fafdf24 251 virt_page2 = (pc & TARGET_PAGE_MASK) +
8a40a180 252 TARGET_PAGE_SIZE;
41c1b1c9 253 phys_page2 = get_page_addr_code(env, virt_page2);
9fd1a948
PB
254 if (tb->page_addr[1] == phys_page2) {
255 break;
256 }
8a40a180 257 } else {
9fd1a948 258 break;
8a40a180
FB
259 }
260 }
261 ptb1 = &tb->phys_hash_next;
262 }
3b46e624 263
9fd1a948
PB
264 /* Move the TB to the head of the list */
265 *ptb1 = tb->phys_hash_next;
266 tb->phys_hash_next = tcg_ctx.tb_ctx.tb_phys_hash[h];
267 tcg_ctx.tb_ctx.tb_phys_hash[h] = tb;
268 return tb;
269}
270
271static TranslationBlock *tb_find_slow(CPUState *cpu,
272 target_ulong pc,
273 target_ulong cs_base,
274 uint64_t flags)
275{
276 TranslationBlock *tb;
277
278 tb = tb_find_physical(cpu, pc, cs_base, flags);
279 if (tb) {
280 goto found;
281 }
282
283#ifdef CONFIG_USER_ONLY
284 /* mmap_lock is needed by tb_gen_code, and mmap_lock must be
285 * taken outside tb_lock. Since we're momentarily dropping
286 * tb_lock, there's a chance that our desired tb has been
287 * translated.
288 */
289 tb_unlock();
290 mmap_lock();
291 tb_lock();
292 tb = tb_find_physical(cpu, pc, cs_base, flags);
293 if (tb) {
294 mmap_unlock();
295 goto found;
2c90fe2b 296 }
9fd1a948
PB
297#endif
298
299 /* if no translated code available, then translate it now */
300 tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
301
302#ifdef CONFIG_USER_ONLY
303 mmap_unlock();
304#endif
305
306found:
8a40a180 307 /* we add the TB in the virtual pc hash table */
8cd70437 308 cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb;
8a40a180
FB
309 return tb;
310}
311
ea3e9847 312static inline TranslationBlock *tb_find_fast(CPUState *cpu)
8a40a180 313{
ea3e9847 314 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
8a40a180
FB
315 TranslationBlock *tb;
316 target_ulong cs_base, pc;
6b917547 317 int flags;
8a40a180
FB
318
319 /* we record a subset of the CPU state. It will
320 always be the same before a given translated block
321 is executed. */
6b917547 322 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
8cd70437 323 tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)];
551bd27f
TS
324 if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
325 tb->flags != flags)) {
ea3e9847 326 tb = tb_find_slow(cpu, pc, cs_base, flags);
8a40a180
FB
327 }
328 return tb;
329}
330
ea3e9847 331static void cpu_handle_debug_exception(CPUState *cpu)
1009d2ed 332{
86025ee4 333 CPUClass *cc = CPU_GET_CLASS(cpu);
1009d2ed
JK
334 CPUWatchpoint *wp;
335
ff4700b0
AF
336 if (!cpu->watchpoint_hit) {
337 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
1009d2ed
JK
338 wp->flags &= ~BP_WATCHPOINT_HIT;
339 }
340 }
86025ee4
PM
341
342 cc->debug_excp_handler(cpu);
1009d2ed
JK
343}
344
7d13299d
FB
345/* main execution loop */
346
ea3e9847 347int cpu_exec(CPUState *cpu)
7d13299d 348{
97a8ea5a 349 CPUClass *cc = CPU_GET_CLASS(cpu);
693fa551
AF
350#ifdef TARGET_I386
351 X86CPU *x86_cpu = X86_CPU(cpu);
ea3e9847 352 CPUArchState *env = &x86_cpu->env;
97a8ea5a 353#endif
8a40a180 354 int ret, interrupt_request;
8a40a180 355 TranslationBlock *tb;
3e9bd63a 356 uintptr_t next_tb;
c2aa5f81
ST
357 SyncClocks sc;
358
6f060969
PD
359 /* replay_interrupt may need current_cpu */
360 current_cpu = cpu;
361
259186a7 362 if (cpu->halted) {
6220e900 363#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
6f060969
PD
364 if ((cpu->interrupt_request & CPU_INTERRUPT_POLL)
365 && replay_interrupt()) {
6220e900
PD
366 apic_poll_irq(x86_cpu->apic_state);
367 cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
368 }
369#endif
3993c6bd 370 if (!cpu_has_work(cpu)) {
6f060969 371 current_cpu = NULL;
eda48c34
PB
372 return EXCP_HALTED;
373 }
374
259186a7 375 cpu->halted = 0;
eda48c34 376 }
5a1e3cfc 377
9373e632 378 atomic_mb_set(&tcg_current_cpu, cpu);
79e2b9ae
PB
379 rcu_read_lock();
380
aed807c8 381 if (unlikely(atomic_mb_read(&exit_request))) {
fcd7d003 382 cpu->exit_request = 1;
1a28cac3
MT
383 }
384
cffe7b32 385 cc->cpu_exec_enter(cpu);
9d27abd9 386
c2aa5f81
ST
387 /* Calculate difference between guest clock and host clock.
388 * This delay includes the delay of the last cycle, so
389 * what we have to do is sleep until it is 0. As for the
390 * advance/delay we gain here, we try to fix it next time.
391 */
392 init_delay_params(&sc, cpu);
393
7d13299d 394 /* prepare setjmp context for exception handling */
3fb2ded1 395 for(;;) {
6f03bef0 396 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
3fb2ded1 397 /* if an exception is pending, we execute it here */
27103424
AF
398 if (cpu->exception_index >= 0) {
399 if (cpu->exception_index >= EXCP_INTERRUPT) {
3fb2ded1 400 /* exit request from the cpu execution loop */
27103424 401 ret = cpu->exception_index;
1009d2ed 402 if (ret == EXCP_DEBUG) {
ea3e9847 403 cpu_handle_debug_exception(cpu);
1009d2ed 404 }
e511b4d7 405 cpu->exception_index = -1;
3fb2ded1 406 break;
72d239ed
AJ
407 } else {
408#if defined(CONFIG_USER_ONLY)
3fb2ded1 409 /* if user mode only, we simulate a fake exception
9f083493 410 which will be handled outside the cpu execution
3fb2ded1 411 loop */
83479e77 412#if defined(TARGET_I386)
97a8ea5a 413 cc->do_interrupt(cpu);
83479e77 414#endif
27103424 415 ret = cpu->exception_index;
e511b4d7 416 cpu->exception_index = -1;
3fb2ded1 417 break;
72d239ed 418#else
6f060969
PD
419 if (replay_exception()) {
420 cc->do_interrupt(cpu);
421 cpu->exception_index = -1;
422 } else if (!replay_has_interrupt()) {
423 /* give a chance to iothread in replay mode */
424 ret = EXCP_INTERRUPT;
425 break;
426 }
83479e77 427#endif
3fb2ded1 428 }
6f060969
PD
429 } else if (replay_has_exception()
430 && cpu->icount_decr.u16.low + cpu->icount_extra == 0) {
431 /* try to cause an exception pending in the log */
432 cpu_exec_nocache(cpu, 1, tb_find_fast(cpu), true);
433 ret = -1;
434 break;
5fafdf24 435 }
9df217a3 436
b5fc09ae 437 next_tb = 0; /* force lookup of first TB */
3fb2ded1 438 for(;;) {
259186a7 439 interrupt_request = cpu->interrupt_request;
e1638bd8 440 if (unlikely(interrupt_request)) {
ed2803da 441 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
e1638bd8 442 /* Mask out external interrupts for this step. */
3125f763 443 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
e1638bd8 444 }
6658ffb8 445 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
259186a7 446 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
27103424 447 cpu->exception_index = EXCP_DEBUG;
5638d180 448 cpu_loop_exit(cpu);
6658ffb8 449 }
6f060969
PD
450 if (replay_mode == REPLAY_MODE_PLAY
451 && !replay_has_interrupt()) {
452 /* Do nothing */
453 } else if (interrupt_request & CPU_INTERRUPT_HALT) {
454 replay_interrupt();
259186a7
AF
455 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
456 cpu->halted = 1;
27103424 457 cpu->exception_index = EXCP_HLT;
5638d180 458 cpu_loop_exit(cpu);
a90b7318 459 }
4a92a558 460#if defined(TARGET_I386)
6f060969
PD
461 else if (interrupt_request & CPU_INTERRUPT_INIT) {
462 replay_interrupt();
4a92a558
PB
463 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
464 do_cpu_init(x86_cpu);
465 cpu->exception_index = EXCP_HALTED;
466 cpu_loop_exit(cpu);
467 }
468#else
6f060969
PD
469 else if (interrupt_request & CPU_INTERRUPT_RESET) {
470 replay_interrupt();
4a92a558 471 cpu_reset(cpu);
6f060969 472 cpu_loop_exit(cpu);
4a92a558 473 }
68a79315 474#endif
9585db68
RH
475 /* The target hook has 3 exit conditions:
476 False when the interrupt isn't processed,
477 True when it is, and we should restart on a new TB,
478 and via longjmp via cpu_loop_exit. */
6f060969
PD
479 else {
480 replay_interrupt();
481 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
482 next_tb = 0;
483 }
9585db68
RH
484 }
485 /* Don't use the cached interrupt_request value,
486 do_interrupt may have updated the EXITTB flag. */
259186a7
AF
487 if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) {
488 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
bf3e8bf1
FB
489 /* ensure that no TB jump will be modified as
490 the program flow was changed */
b5fc09ae 491 next_tb = 0;
bf3e8bf1 492 }
be214e6c 493 }
6f060969
PD
494 if (unlikely(cpu->exit_request
495 || replay_has_interrupt())) {
fcd7d003 496 cpu->exit_request = 0;
27103424 497 cpu->exception_index = EXCP_INTERRUPT;
5638d180 498 cpu_loop_exit(cpu);
3fb2ded1 499 }
677ef623 500 tb_lock();
ea3e9847 501 tb = tb_find_fast(cpu);
d5975363
PB
502 /* Note: we do it here to avoid a gcc bug on Mac OS X when
503 doing it in tb_find_slow */
5e5f07e0 504 if (tcg_ctx.tb_ctx.tb_invalidated_flag) {
d5975363
PB
505 /* as some TB could have been invalidated because
506 of memory exceptions while generating the code, we
507 must recompute the hash index here */
508 next_tb = 0;
5e5f07e0 509 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
d5975363 510 }
8a40a180
FB
511 /* see if we can patch the calling TB. When the TB
512 spans two pages, we cannot safely do a direct
513 jump. */
89a82cd4
RH
514 if (next_tb != 0 && tb->page_addr[1] == -1
515 && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) {
0980011b
PM
516 tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK),
517 next_tb & TB_EXIT_MASK, tb);
3fb2ded1 518 }
677ef623 519 tb_unlock();
fcd7d003 520 if (likely(!cpu->exit_request)) {
6db8b538 521 trace_exec_tb(tb, tb->pc);
e965fc38 522 /* execute the generated code */
b0a46fa7 523 cpu->current_tb = tb;
1a830635 524 next_tb = cpu_tb_exec(cpu, tb);
b0a46fa7 525 cpu->current_tb = NULL;
378df4b2
PM
526 switch (next_tb & TB_EXIT_MASK) {
527 case TB_EXIT_REQUESTED:
528 /* Something asked us to stop executing
529 * chained TBs; just continue round the main
530 * loop. Whatever requested the exit will also
531 * have set something else (eg exit_request or
532 * interrupt_request) which we will handle
ab096a75
PB
533 * next time around the loop. But we need to
534 * ensure the tcg_exit_req read in generated code
535 * comes before the next read of cpu->exit_request
536 * or cpu->interrupt_request.
378df4b2 537 */
ab096a75 538 smp_rmb();
378df4b2
PM
539 next_tb = 0;
540 break;
541 case TB_EXIT_ICOUNT_EXPIRED:
542 {
bf20dc07 543 /* Instruction counter expired. */
52851b7e 544 int insns_left = cpu->icount_decr.u32;
efee7340 545 if (cpu->icount_extra && insns_left >= 0) {
2e70f6ef 546 /* Refill decrementer and continue execution. */
efee7340 547 cpu->icount_extra += insns_left;
52851b7e 548 insns_left = MIN(0xffff, cpu->icount_extra);
efee7340 549 cpu->icount_extra -= insns_left;
28ecfd7a 550 cpu->icount_decr.u16.low = insns_left;
2e70f6ef
PB
551 } else {
552 if (insns_left > 0) {
553 /* Execute remaining instructions. */
52851b7e 554 tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
56c0269a 555 cpu_exec_nocache(cpu, insns_left, tb, false);
c2aa5f81 556 align_clocks(&sc, cpu);
2e70f6ef 557 }
27103424 558 cpu->exception_index = EXCP_INTERRUPT;
2e70f6ef 559 next_tb = 0;
5638d180 560 cpu_loop_exit(cpu);
2e70f6ef 561 }
378df4b2
PM
562 break;
563 }
564 default:
565 break;
2e70f6ef
PB
566 }
567 }
c2aa5f81
ST
568 /* Try to align the host and virtual clocks
569 if the guest is in advance */
570 align_clocks(&sc, cpu);
4cbf74b6
FB
571 /* reset soft MMU for next block (it can currently
572 only be set by a memory fault) */
50a518e3 573 } /* for(;;) */
0d101938 574 } else {
0448f5f8
SW
575#if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6)
576 /* Some compilers wrongly smash all local variables after
577 * siglongjmp. There were bug reports for gcc 4.5.0 and clang.
578 * Reload essential local variables here for those compilers.
579 * Newer versions of gcc would complain about this code (-Wclobbered). */
4917cf44 580 cpu = current_cpu;
6c78f29a 581 cc = CPU_GET_CLASS(cpu);
693fa551
AF
582#ifdef TARGET_I386
583 x86_cpu = X86_CPU(cpu);
ea3e9847 584 env = &x86_cpu->env;
6c78f29a 585#endif
0448f5f8
SW
586#else /* buggy compiler */
587 /* Assert that the compiler does not smash local variables. */
588 g_assert(cpu == current_cpu);
589 g_assert(cc == CPU_GET_CLASS(cpu));
590#ifdef TARGET_I386
591 g_assert(x86_cpu == X86_CPU(cpu));
592 g_assert(env == &x86_cpu->env);
593#endif
594#endif /* buggy compiler */
595 cpu->can_do_io = 1;
677ef623 596 tb_lock_reset();
7d13299d 597 }
3fb2ded1
FB
598 } /* for(;;) */
599
cffe7b32 600 cc->cpu_exec_exit(cpu);
79e2b9ae 601 rcu_read_unlock();
1057eaa7 602
4917cf44
AF
603 /* fail safe : never use current_cpu outside cpu_exec() */
604 current_cpu = NULL;
9373e632
PB
605
606 /* Does not need atomic_mb_set because a spurious wakeup is okay. */
607 atomic_set(&tcg_current_cpu, NULL);
7d13299d
FB
608 return ret;
609}