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exec: introduce cpu_reload_memory_map
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7d13299d 1/*
e965fc38 2 * emulator main execution loop
5fafdf24 3 *
66321a11 4 * Copyright (c) 2003-2005 Fabrice Bellard
7d13299d 5 *
3ef693a0
FB
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
7d13299d 10 *
3ef693a0
FB
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
7d13299d 15 *
3ef693a0 16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
7d13299d 18 */
e4533c7a 19#include "config.h"
cea5f9a2 20#include "cpu.h"
6db8b538 21#include "trace.h"
76cad711 22#include "disas/disas.h"
7cb69cae 23#include "tcg.h"
1de7afc9 24#include "qemu/atomic.h"
9c17d615 25#include "sysemu/qtest.h"
c2aa5f81
ST
26#include "qemu/timer.h"
27
28/* -icount align implementation. */
29
30typedef struct SyncClocks {
31 int64_t diff_clk;
32 int64_t last_cpu_icount;
7f7bc144 33 int64_t realtime_clock;
c2aa5f81
ST
34} SyncClocks;
35
36#if !defined(CONFIG_USER_ONLY)
37/* Allow the guest to have a max 3ms advance.
38 * The difference between the 2 clocks could therefore
39 * oscillate around 0.
40 */
41#define VM_CLOCK_ADVANCE 3000000
7f7bc144
ST
42#define THRESHOLD_REDUCE 1.5
43#define MAX_DELAY_PRINT_RATE 2000000000LL
44#define MAX_NB_PRINTS 100
c2aa5f81
ST
45
46static void align_clocks(SyncClocks *sc, const CPUState *cpu)
47{
48 int64_t cpu_icount;
49
50 if (!icount_align_option) {
51 return;
52 }
53
54 cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
55 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
56 sc->last_cpu_icount = cpu_icount;
57
58 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
59#ifndef _WIN32
60 struct timespec sleep_delay, rem_delay;
61 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
62 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
63 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
a498d0ef 64 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
c2aa5f81
ST
65 } else {
66 sc->diff_clk = 0;
67 }
68#else
69 Sleep(sc->diff_clk / SCALE_MS);
70 sc->diff_clk = 0;
71#endif
72 }
73}
74
7f7bc144
ST
75static void print_delay(const SyncClocks *sc)
76{
77 static float threshold_delay;
78 static int64_t last_realtime_clock;
79 static int nb_prints;
80
81 if (icount_align_option &&
82 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
83 nb_prints < MAX_NB_PRINTS) {
84 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
85 (-sc->diff_clk / (float)1000000000LL <
86 (threshold_delay - THRESHOLD_REDUCE))) {
87 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
88 printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
89 threshold_delay - 1,
90 threshold_delay);
91 nb_prints++;
92 last_realtime_clock = sc->realtime_clock;
93 }
94 }
95}
96
c2aa5f81
ST
97static void init_delay_params(SyncClocks *sc,
98 const CPUState *cpu)
99{
100 if (!icount_align_option) {
101 return;
102 }
2e91cc62
PB
103 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
104 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
c2aa5f81 105 sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
27498bef
ST
106 if (sc->diff_clk < max_delay) {
107 max_delay = sc->diff_clk;
108 }
109 if (sc->diff_clk > max_advance) {
110 max_advance = sc->diff_clk;
111 }
7f7bc144
ST
112
113 /* Print every 2s max if the guest is late. We limit the number
114 of printed messages to NB_PRINT_MAX(currently 100) */
115 print_delay(sc);
c2aa5f81
ST
116}
117#else
118static void align_clocks(SyncClocks *sc, const CPUState *cpu)
119{
120}
121
122static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
123{
124}
125#endif /* CONFIG USER ONLY */
7d13299d 126
5638d180 127void cpu_loop_exit(CPUState *cpu)
e4533c7a 128{
d77953b9 129 cpu->current_tb = NULL;
6f03bef0 130 siglongjmp(cpu->jmp_env, 1);
e4533c7a 131}
bfed01fc 132
fbf9eeb3
FB
133/* exit the current TB from a signal handler. The host registers are
134 restored in a state compatible with the CPU emulator
135 */
9eff14f3 136#if defined(CONFIG_SOFTMMU)
0ea8cb88 137void cpu_resume_from_signal(CPUState *cpu, void *puc)
9eff14f3 138{
9eff14f3
BS
139 /* XXX: restore cpu registers saved in host registers */
140
27103424 141 cpu->exception_index = -1;
6f03bef0 142 siglongjmp(cpu->jmp_env, 1);
9eff14f3 143}
76e5c76f
PB
144
145void cpu_reload_memory_map(CPUState *cpu)
146{
147 /* The TLB is protected by the iothread lock. */
148 tlb_flush(cpu, 1);
149}
9eff14f3 150#endif
fbf9eeb3 151
77211379
PM
152/* Execute a TB, and fix up the CPU state afterwards if necessary */
153static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr)
154{
155 CPUArchState *env = cpu->env_ptr;
03afa5f8
RH
156 uintptr_t next_tb;
157
158#if defined(DEBUG_DISAS)
159 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
160#if defined(TARGET_I386)
161 log_cpu_state(cpu, CPU_DUMP_CCOP);
162#elif defined(TARGET_M68K)
163 /* ??? Should not modify env state for dumping. */
164 cpu_m68k_flush_flags(env, env->cc_op);
165 env->cc_op = CC_OP_FLAGS;
166 env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4);
167 log_cpu_state(cpu, 0);
168#else
169 log_cpu_state(cpu, 0);
170#endif
171 }
172#endif /* DEBUG_DISAS */
173
626cf8f4 174 cpu->can_do_io = 0;
03afa5f8 175 next_tb = tcg_qemu_tb_exec(env, tb_ptr);
626cf8f4 176 cpu->can_do_io = 1;
6db8b538
AB
177 trace_exec_tb_exit((void *) (next_tb & ~TB_EXIT_MASK),
178 next_tb & TB_EXIT_MASK);
179
77211379
PM
180 if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) {
181 /* We didn't start executing this TB (eg because the instruction
182 * counter hit zero); we must restore the guest PC to the address
183 * of the start of the TB.
184 */
bdf7ae5b 185 CPUClass *cc = CPU_GET_CLASS(cpu);
77211379 186 TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
bdf7ae5b
AF
187 if (cc->synchronize_from_tb) {
188 cc->synchronize_from_tb(cpu, tb);
189 } else {
190 assert(cc->set_pc);
191 cc->set_pc(cpu, tb->pc);
192 }
77211379 193 }
378df4b2
PM
194 if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) {
195 /* We were asked to stop executing TBs (probably a pending
196 * interrupt. We've now stopped, so clear the flag.
197 */
198 cpu->tcg_exit_req = 0;
199 }
77211379
PM
200 return next_tb;
201}
202
2e70f6ef
PB
203/* Execute the code without caching the generated code. An interpreter
204 could be used if available. */
9349b4f9 205static void cpu_exec_nocache(CPUArchState *env, int max_cycles,
cea5f9a2 206 TranslationBlock *orig_tb)
2e70f6ef 207{
d77953b9 208 CPUState *cpu = ENV_GET_CPU(env);
2e70f6ef 209 TranslationBlock *tb;
b4ac20b4
PD
210 target_ulong pc = orig_tb->pc;
211 target_ulong cs_base = orig_tb->cs_base;
212 uint64_t flags = orig_tb->flags;
2e70f6ef
PB
213
214 /* Should never happen.
215 We only end up here when an existing TB is too long. */
216 if (max_cycles > CF_COUNT_MASK)
217 max_cycles = CF_COUNT_MASK;
218
b4ac20b4
PD
219 /* tb_gen_code can flush our orig_tb, invalidate it now */
220 tb_phys_invalidate(orig_tb, -1);
221 tb = tb_gen_code(cpu, pc, cs_base, flags,
d8a499f1 222 max_cycles | CF_NOCACHE);
d77953b9 223 cpu->current_tb = tb;
2e70f6ef 224 /* execute the generated code */
6db8b538 225 trace_exec_tb_nocache(tb, tb->pc);
77211379 226 cpu_tb_exec(cpu, tb->tc_ptr);
d77953b9 227 cpu->current_tb = NULL;
2e70f6ef
PB
228 tb_phys_invalidate(tb, -1);
229 tb_free(tb);
230}
231
9349b4f9 232static TranslationBlock *tb_find_slow(CPUArchState *env,
cea5f9a2 233 target_ulong pc,
8a40a180 234 target_ulong cs_base,
c068688b 235 uint64_t flags)
8a40a180 236{
8cd70437 237 CPUState *cpu = ENV_GET_CPU(env);
8a40a180 238 TranslationBlock *tb, **ptb1;
8a40a180 239 unsigned int h;
337fc758 240 tb_page_addr_t phys_pc, phys_page1;
41c1b1c9 241 target_ulong virt_page2;
3b46e624 242
5e5f07e0 243 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
3b46e624 244
8a40a180 245 /* find translated block using physical mappings */
41c1b1c9 246 phys_pc = get_page_addr_code(env, pc);
8a40a180 247 phys_page1 = phys_pc & TARGET_PAGE_MASK;
8a40a180 248 h = tb_phys_hash_func(phys_pc);
5e5f07e0 249 ptb1 = &tcg_ctx.tb_ctx.tb_phys_hash[h];
8a40a180
FB
250 for(;;) {
251 tb = *ptb1;
252 if (!tb)
253 goto not_found;
5fafdf24 254 if (tb->pc == pc &&
8a40a180 255 tb->page_addr[0] == phys_page1 &&
5fafdf24 256 tb->cs_base == cs_base &&
8a40a180
FB
257 tb->flags == flags) {
258 /* check next page if needed */
259 if (tb->page_addr[1] != -1) {
337fc758
BS
260 tb_page_addr_t phys_page2;
261
5fafdf24 262 virt_page2 = (pc & TARGET_PAGE_MASK) +
8a40a180 263 TARGET_PAGE_SIZE;
41c1b1c9 264 phys_page2 = get_page_addr_code(env, virt_page2);
8a40a180
FB
265 if (tb->page_addr[1] == phys_page2)
266 goto found;
267 } else {
268 goto found;
269 }
270 }
271 ptb1 = &tb->phys_hash_next;
272 }
273 not_found:
2e70f6ef 274 /* if no translated code available, then translate it now */
648f034c 275 tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
3b46e624 276
8a40a180 277 found:
2c90fe2b
KB
278 /* Move the last found TB to the head of the list */
279 if (likely(*ptb1)) {
280 *ptb1 = tb->phys_hash_next;
5e5f07e0
EV
281 tb->phys_hash_next = tcg_ctx.tb_ctx.tb_phys_hash[h];
282 tcg_ctx.tb_ctx.tb_phys_hash[h] = tb;
2c90fe2b 283 }
8a40a180 284 /* we add the TB in the virtual pc hash table */
8cd70437 285 cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb;
8a40a180
FB
286 return tb;
287}
288
9349b4f9 289static inline TranslationBlock *tb_find_fast(CPUArchState *env)
8a40a180 290{
8cd70437 291 CPUState *cpu = ENV_GET_CPU(env);
8a40a180
FB
292 TranslationBlock *tb;
293 target_ulong cs_base, pc;
6b917547 294 int flags;
8a40a180
FB
295
296 /* we record a subset of the CPU state. It will
297 always be the same before a given translated block
298 is executed. */
6b917547 299 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
8cd70437 300 tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)];
551bd27f
TS
301 if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
302 tb->flags != flags)) {
cea5f9a2 303 tb = tb_find_slow(env, pc, cs_base, flags);
8a40a180
FB
304 }
305 return tb;
306}
307
9349b4f9 308static void cpu_handle_debug_exception(CPUArchState *env)
1009d2ed 309{
ff4700b0 310 CPUState *cpu = ENV_GET_CPU(env);
86025ee4 311 CPUClass *cc = CPU_GET_CLASS(cpu);
1009d2ed
JK
312 CPUWatchpoint *wp;
313
ff4700b0
AF
314 if (!cpu->watchpoint_hit) {
315 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
1009d2ed
JK
316 wp->flags &= ~BP_WATCHPOINT_HIT;
317 }
318 }
86025ee4
PM
319
320 cc->debug_excp_handler(cpu);
1009d2ed
JK
321}
322
7d13299d
FB
323/* main execution loop */
324
1a28cac3
MT
325volatile sig_atomic_t exit_request;
326
9349b4f9 327int cpu_exec(CPUArchState *env)
7d13299d 328{
c356a1bc 329 CPUState *cpu = ENV_GET_CPU(env);
97a8ea5a 330 CPUClass *cc = CPU_GET_CLASS(cpu);
693fa551
AF
331#ifdef TARGET_I386
332 X86CPU *x86_cpu = X86_CPU(cpu);
97a8ea5a 333#endif
8a40a180 334 int ret, interrupt_request;
8a40a180 335 TranslationBlock *tb;
c27004ec 336 uint8_t *tc_ptr;
3e9bd63a 337 uintptr_t next_tb;
c2aa5f81
ST
338 SyncClocks sc;
339
bae2c270
PM
340 /* This must be volatile so it is not trashed by longjmp() */
341 volatile bool have_tb_lock = false;
8c6939c0 342
259186a7 343 if (cpu->halted) {
3993c6bd 344 if (!cpu_has_work(cpu)) {
eda48c34
PB
345 return EXCP_HALTED;
346 }
347
259186a7 348 cpu->halted = 0;
eda48c34 349 }
5a1e3cfc 350
4917cf44 351 current_cpu = cpu;
e4533c7a 352
4917cf44 353 /* As long as current_cpu is null, up to the assignment just above,
ec9bd89f
OH
354 * requests by other threads to exit the execution loop are expected to
355 * be issued using the exit_request global. We must make sure that our
4917cf44 356 * evaluation of the global value is performed past the current_cpu
ec9bd89f
OH
357 * value transition point, which requires a memory barrier as well as
358 * an instruction scheduling constraint on modern architectures. */
359 smp_mb();
360
c629a4bc 361 if (unlikely(exit_request)) {
fcd7d003 362 cpu->exit_request = 1;
1a28cac3
MT
363 }
364
cffe7b32 365 cc->cpu_exec_enter(cpu);
9d27abd9 366
c2aa5f81
ST
367 /* Calculate difference between guest clock and host clock.
368 * This delay includes the delay of the last cycle, so
369 * what we have to do is sleep until it is 0. As for the
370 * advance/delay we gain here, we try to fix it next time.
371 */
372 init_delay_params(&sc, cpu);
373
7d13299d 374 /* prepare setjmp context for exception handling */
3fb2ded1 375 for(;;) {
6f03bef0 376 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
3fb2ded1 377 /* if an exception is pending, we execute it here */
27103424
AF
378 if (cpu->exception_index >= 0) {
379 if (cpu->exception_index >= EXCP_INTERRUPT) {
3fb2ded1 380 /* exit request from the cpu execution loop */
27103424 381 ret = cpu->exception_index;
1009d2ed
JK
382 if (ret == EXCP_DEBUG) {
383 cpu_handle_debug_exception(env);
384 }
e511b4d7 385 cpu->exception_index = -1;
3fb2ded1 386 break;
72d239ed
AJ
387 } else {
388#if defined(CONFIG_USER_ONLY)
3fb2ded1 389 /* if user mode only, we simulate a fake exception
9f083493 390 which will be handled outside the cpu execution
3fb2ded1 391 loop */
83479e77 392#if defined(TARGET_I386)
97a8ea5a 393 cc->do_interrupt(cpu);
83479e77 394#endif
27103424 395 ret = cpu->exception_index;
e511b4d7 396 cpu->exception_index = -1;
3fb2ded1 397 break;
72d239ed 398#else
97a8ea5a 399 cc->do_interrupt(cpu);
27103424 400 cpu->exception_index = -1;
83479e77 401#endif
3fb2ded1 402 }
5fafdf24 403 }
9df217a3 404
b5fc09ae 405 next_tb = 0; /* force lookup of first TB */
3fb2ded1 406 for(;;) {
259186a7 407 interrupt_request = cpu->interrupt_request;
e1638bd8 408 if (unlikely(interrupt_request)) {
ed2803da 409 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
e1638bd8 410 /* Mask out external interrupts for this step. */
3125f763 411 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
e1638bd8 412 }
6658ffb8 413 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
259186a7 414 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
27103424 415 cpu->exception_index = EXCP_DEBUG;
5638d180 416 cpu_loop_exit(cpu);
6658ffb8 417 }
a90b7318 418 if (interrupt_request & CPU_INTERRUPT_HALT) {
259186a7
AF
419 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
420 cpu->halted = 1;
27103424 421 cpu->exception_index = EXCP_HLT;
5638d180 422 cpu_loop_exit(cpu);
a90b7318 423 }
4a92a558
PB
424#if defined(TARGET_I386)
425 if (interrupt_request & CPU_INTERRUPT_INIT) {
426 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
427 do_cpu_init(x86_cpu);
428 cpu->exception_index = EXCP_HALTED;
429 cpu_loop_exit(cpu);
430 }
431#else
432 if (interrupt_request & CPU_INTERRUPT_RESET) {
433 cpu_reset(cpu);
434 }
68a79315 435#endif
9585db68
RH
436 /* The target hook has 3 exit conditions:
437 False when the interrupt isn't processed,
438 True when it is, and we should restart on a new TB,
439 and via longjmp via cpu_loop_exit. */
440 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
441 next_tb = 0;
442 }
443 /* Don't use the cached interrupt_request value,
444 do_interrupt may have updated the EXITTB flag. */
259186a7
AF
445 if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) {
446 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
bf3e8bf1
FB
447 /* ensure that no TB jump will be modified as
448 the program flow was changed */
b5fc09ae 449 next_tb = 0;
bf3e8bf1 450 }
be214e6c 451 }
fcd7d003
AF
452 if (unlikely(cpu->exit_request)) {
453 cpu->exit_request = 0;
27103424 454 cpu->exception_index = EXCP_INTERRUPT;
5638d180 455 cpu_loop_exit(cpu);
3fb2ded1 456 }
5e5f07e0 457 spin_lock(&tcg_ctx.tb_ctx.tb_lock);
bae2c270 458 have_tb_lock = true;
cea5f9a2 459 tb = tb_find_fast(env);
d5975363
PB
460 /* Note: we do it here to avoid a gcc bug on Mac OS X when
461 doing it in tb_find_slow */
5e5f07e0 462 if (tcg_ctx.tb_ctx.tb_invalidated_flag) {
d5975363
PB
463 /* as some TB could have been invalidated because
464 of memory exceptions while generating the code, we
465 must recompute the hash index here */
466 next_tb = 0;
5e5f07e0 467 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
d5975363 468 }
c30d1aea
PM
469 if (qemu_loglevel_mask(CPU_LOG_EXEC)) {
470 qemu_log("Trace %p [" TARGET_FMT_lx "] %s\n",
471 tb->tc_ptr, tb->pc, lookup_symbol(tb->pc));
472 }
8a40a180
FB
473 /* see if we can patch the calling TB. When the TB
474 spans two pages, we cannot safely do a direct
475 jump. */
040f2fb2 476 if (next_tb != 0 && tb->page_addr[1] == -1) {
0980011b
PM
477 tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK),
478 next_tb & TB_EXIT_MASK, tb);
3fb2ded1 479 }
bae2c270 480 have_tb_lock = false;
5e5f07e0 481 spin_unlock(&tcg_ctx.tb_ctx.tb_lock);
55e8b85e 482
483 /* cpu_interrupt might be called while translating the
484 TB, but before it is linked into a potentially
485 infinite loop and becomes env->current_tb. Avoid
486 starting execution if there is a pending interrupt. */
d77953b9 487 cpu->current_tb = tb;
b0052d15 488 barrier();
fcd7d003 489 if (likely(!cpu->exit_request)) {
6db8b538 490 trace_exec_tb(tb, tb->pc);
2e70f6ef 491 tc_ptr = tb->tc_ptr;
e965fc38 492 /* execute the generated code */
77211379 493 next_tb = cpu_tb_exec(cpu, tc_ptr);
378df4b2
PM
494 switch (next_tb & TB_EXIT_MASK) {
495 case TB_EXIT_REQUESTED:
496 /* Something asked us to stop executing
497 * chained TBs; just continue round the main
498 * loop. Whatever requested the exit will also
499 * have set something else (eg exit_request or
500 * interrupt_request) which we will handle
501 * next time around the loop.
502 */
503 tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
504 next_tb = 0;
505 break;
506 case TB_EXIT_ICOUNT_EXPIRED:
507 {
bf20dc07 508 /* Instruction counter expired. */
2e70f6ef 509 int insns_left;
0980011b 510 tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
28ecfd7a 511 insns_left = cpu->icount_decr.u32;
efee7340 512 if (cpu->icount_extra && insns_left >= 0) {
2e70f6ef 513 /* Refill decrementer and continue execution. */
efee7340
AF
514 cpu->icount_extra += insns_left;
515 if (cpu->icount_extra > 0xffff) {
2e70f6ef
PB
516 insns_left = 0xffff;
517 } else {
efee7340 518 insns_left = cpu->icount_extra;
2e70f6ef 519 }
efee7340 520 cpu->icount_extra -= insns_left;
28ecfd7a 521 cpu->icount_decr.u16.low = insns_left;
2e70f6ef
PB
522 } else {
523 if (insns_left > 0) {
524 /* Execute remaining instructions. */
cea5f9a2 525 cpu_exec_nocache(env, insns_left, tb);
c2aa5f81 526 align_clocks(&sc, cpu);
2e70f6ef 527 }
27103424 528 cpu->exception_index = EXCP_INTERRUPT;
2e70f6ef 529 next_tb = 0;
5638d180 530 cpu_loop_exit(cpu);
2e70f6ef 531 }
378df4b2
PM
532 break;
533 }
534 default:
535 break;
2e70f6ef
PB
536 }
537 }
d77953b9 538 cpu->current_tb = NULL;
c2aa5f81
ST
539 /* Try to align the host and virtual clocks
540 if the guest is in advance */
541 align_clocks(&sc, cpu);
4cbf74b6
FB
542 /* reset soft MMU for next block (it can currently
543 only be set by a memory fault) */
50a518e3 544 } /* for(;;) */
0d101938
JK
545 } else {
546 /* Reload env after longjmp - the compiler may have smashed all
547 * local variables as longjmp is marked 'noreturn'. */
4917cf44
AF
548 cpu = current_cpu;
549 env = cpu->env_ptr;
6c78f29a 550 cc = CPU_GET_CLASS(cpu);
626cf8f4 551 cpu->can_do_io = 1;
693fa551
AF
552#ifdef TARGET_I386
553 x86_cpu = X86_CPU(cpu);
6c78f29a 554#endif
bae2c270
PM
555 if (have_tb_lock) {
556 spin_unlock(&tcg_ctx.tb_ctx.tb_lock);
557 have_tb_lock = false;
558 }
7d13299d 559 }
3fb2ded1
FB
560 } /* for(;;) */
561
cffe7b32 562 cc->cpu_exec_exit(cpu);
1057eaa7 563
4917cf44
AF
564 /* fail safe : never use current_cpu outside cpu_exec() */
565 current_cpu = NULL;
7d13299d
FB
566 return ret;
567}