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cpu: Directly use get_memory_mapping() fallback handlers in place
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1/*
2 * Target-specific parts of the CPU object
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "qemu/osdep.h"
21#include "qemu-common.h"
22#include "qapi/error.h"
23
24#include "exec/target_page.h"
25#include "hw/qdev-core.h"
26#include "hw/qdev-properties.h"
27#include "qemu/error-report.h"
28#include "migration/vmstate.h"
29#ifdef CONFIG_USER_ONLY
30#include "qemu.h"
31#else
32#include "exec/address-spaces.h"
33#endif
34#include "sysemu/tcg.h"
35#include "sysemu/kvm.h"
36#include "sysemu/replay.h"
3b9bd3f4 37#include "exec/translate-all.h"
d9f24bf5 38#include "exec/log.h"
30565f10 39#include "hw/core/accel-cpu.h"
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40
41uintptr_t qemu_host_page_size;
42intptr_t qemu_host_page_mask;
43
44#ifndef CONFIG_USER_ONLY
45static int cpu_common_post_load(void *opaque, int version_id)
46{
47 CPUState *cpu = opaque;
48
49 /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
50 version_id is increased. */
51 cpu->interrupt_request &= ~0x01;
52 tlb_flush(cpu);
53
54 /* loadvm has just updated the content of RAM, bypassing the
55 * usual mechanisms that ensure we flush TBs for writes to
56 * memory we've translated code from. So we must flush all TBs,
57 * which will now be stale.
58 */
59 tb_flush(cpu);
60
61 return 0;
62}
63
64static int cpu_common_pre_load(void *opaque)
65{
66 CPUState *cpu = opaque;
67
68 cpu->exception_index = -1;
69
70 return 0;
71}
72
73static bool cpu_common_exception_index_needed(void *opaque)
74{
75 CPUState *cpu = opaque;
76
77 return tcg_enabled() && cpu->exception_index != -1;
78}
79
80static const VMStateDescription vmstate_cpu_common_exception_index = {
81 .name = "cpu_common/exception_index",
82 .version_id = 1,
83 .minimum_version_id = 1,
84 .needed = cpu_common_exception_index_needed,
85 .fields = (VMStateField[]) {
86 VMSTATE_INT32(exception_index, CPUState),
87 VMSTATE_END_OF_LIST()
88 }
89};
90
91static bool cpu_common_crash_occurred_needed(void *opaque)
92{
93 CPUState *cpu = opaque;
94
95 return cpu->crash_occurred;
96}
97
98static const VMStateDescription vmstate_cpu_common_crash_occurred = {
99 .name = "cpu_common/crash_occurred",
100 .version_id = 1,
101 .minimum_version_id = 1,
102 .needed = cpu_common_crash_occurred_needed,
103 .fields = (VMStateField[]) {
104 VMSTATE_BOOL(crash_occurred, CPUState),
105 VMSTATE_END_OF_LIST()
106 }
107};
108
109const VMStateDescription vmstate_cpu_common = {
110 .name = "cpu_common",
111 .version_id = 1,
112 .minimum_version_id = 1,
113 .pre_load = cpu_common_pre_load,
114 .post_load = cpu_common_post_load,
115 .fields = (VMStateField[]) {
116 VMSTATE_UINT32(halted, CPUState),
117 VMSTATE_UINT32(interrupt_request, CPUState),
118 VMSTATE_END_OF_LIST()
119 },
120 .subsections = (const VMStateDescription*[]) {
121 &vmstate_cpu_common_exception_index,
122 &vmstate_cpu_common_crash_occurred,
123 NULL
124 }
125};
126#endif
127
7df5e3d6 128void cpu_exec_realizefn(CPUState *cpu, Error **errp)
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129{
130 CPUClass *cc = CPU_GET_CLASS(cpu);
131
7df5e3d6 132 cpu_list_add(cpu);
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133 if (!accel_cpu_realizefn(cpu, errp)) {
134 return;
135 }
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136#ifdef CONFIG_TCG
137 /* NB: errp parameter is unused currently */
138 if (tcg_enabled()) {
139 tcg_exec_realizefn(cpu, errp);
140 }
141#endif /* CONFIG_TCG */
142
143#ifdef CONFIG_USER_ONLY
144 assert(cc->vmsd == NULL);
145#else
146 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
147 vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
148 }
149 if (cc->vmsd != NULL) {
150 vmstate_register(NULL, cpu->cpu_index, cc->vmsd, cpu);
151 }
152#endif /* CONFIG_USER_ONLY */
153}
154
155void cpu_exec_unrealizefn(CPUState *cpu)
156{
157 CPUClass *cc = CPU_GET_CLASS(cpu);
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158
159#ifdef CONFIG_USER_ONLY
160 assert(cc->vmsd == NULL);
161#else
162 if (cc->vmsd != NULL) {
163 vmstate_unregister(NULL, cc->vmsd, cpu);
164 }
165 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
166 vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
167 }
d9f24bf5 168#endif
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169#ifdef CONFIG_TCG
170 /* NB: errp parameter is unused currently */
171 if (tcg_enabled()) {
172 tcg_exec_unrealizefn(cpu);
173 }
174#endif /* CONFIG_TCG */
175
176 cpu_list_remove(cpu);
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177}
178
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179void cpu_exec_initfn(CPUState *cpu)
180{
181 cpu->as = NULL;
182 cpu->num_ases = 0;
183
184#ifndef CONFIG_USER_ONLY
185 cpu->thread_id = qemu_get_thread_id();
186 cpu->memory = get_system_memory();
187 object_ref(OBJECT(cpu->memory));
188#endif
189}
190
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191const char *parse_cpu_option(const char *cpu_option)
192{
193 ObjectClass *oc;
194 CPUClass *cc;
195 gchar **model_pieces;
196 const char *cpu_type;
197
198 model_pieces = g_strsplit(cpu_option, ",", 2);
199 if (!model_pieces[0]) {
200 error_report("-cpu option cannot be empty");
201 exit(1);
202 }
203
204 oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);
205 if (oc == NULL) {
206 error_report("unable to find CPU model '%s'", model_pieces[0]);
207 g_strfreev(model_pieces);
208 exit(EXIT_FAILURE);
209 }
210
211 cpu_type = object_class_get_name(oc);
212 cc = CPU_CLASS(oc);
213 cc->parse_features(cpu_type, model_pieces[1], &error_fatal);
214 g_strfreev(model_pieces);
215 return cpu_type;
216}
217
218#if defined(CONFIG_USER_ONLY)
219void tb_invalidate_phys_addr(target_ulong addr)
220{
221 mmap_lock();
222 tb_invalidate_phys_page_range(addr, addr + 1);
223 mmap_unlock();
224}
225
226static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
227{
228 tb_invalidate_phys_addr(pc);
229}
230#else
231void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
232{
233 ram_addr_t ram_addr;
234 MemoryRegion *mr;
235 hwaddr l = 1;
236
237 if (!tcg_enabled()) {
238 return;
239 }
240
241 RCU_READ_LOCK_GUARD();
242 mr = address_space_translate(as, addr, &addr, &l, false, attrs);
243 if (!(memory_region_is_ram(mr)
244 || memory_region_is_romd(mr))) {
245 return;
246 }
247 ram_addr = memory_region_get_ram_addr(mr) + addr;
248 tb_invalidate_phys_page_range(ram_addr, ram_addr + 1);
249}
250
251static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
252{
253 /*
254 * There may not be a virtual to physical translation for the pc
255 * right now, but there may exist cached TB for this pc.
256 * Flush the whole TB cache to force re-translation of such TBs.
257 * This is heavyweight, but we're debugging anyway.
258 */
259 tb_flush(cpu);
260}
261#endif
262
263/* Add a breakpoint. */
264int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
265 CPUBreakpoint **breakpoint)
266{
267 CPUBreakpoint *bp;
268
269 bp = g_malloc(sizeof(*bp));
270
271 bp->pc = pc;
272 bp->flags = flags;
273
274 /* keep all GDB-injected breakpoints in front */
275 if (flags & BP_GDB) {
276 QTAILQ_INSERT_HEAD(&cpu->breakpoints, bp, entry);
277 } else {
278 QTAILQ_INSERT_TAIL(&cpu->breakpoints, bp, entry);
279 }
280
281 breakpoint_invalidate(cpu, pc);
282
283 if (breakpoint) {
284 *breakpoint = bp;
285 }
286 return 0;
287}
288
289/* Remove a specific breakpoint. */
290int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags)
291{
292 CPUBreakpoint *bp;
293
294 QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
295 if (bp->pc == pc && bp->flags == flags) {
296 cpu_breakpoint_remove_by_ref(cpu, bp);
297 return 0;
298 }
299 }
300 return -ENOENT;
301}
302
303/* Remove a specific breakpoint by reference. */
304void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint)
305{
306 QTAILQ_REMOVE(&cpu->breakpoints, breakpoint, entry);
307
308 breakpoint_invalidate(cpu, breakpoint->pc);
309
310 g_free(breakpoint);
311}
312
313/* Remove all matching breakpoints. */
314void cpu_breakpoint_remove_all(CPUState *cpu, int mask)
315{
316 CPUBreakpoint *bp, *next;
317
318 QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) {
319 if (bp->flags & mask) {
320 cpu_breakpoint_remove_by_ref(cpu, bp);
321 }
322 }
323}
324
325/* enable or disable single step mode. EXCP_DEBUG is returned by the
326 CPU loop after each instruction */
327void cpu_single_step(CPUState *cpu, int enabled)
328{
329 if (cpu->singlestep_enabled != enabled) {
330 cpu->singlestep_enabled = enabled;
331 if (kvm_enabled()) {
332 kvm_update_guest_debug(cpu, 0);
333 } else {
334 /* must flush all the translated code to avoid inconsistencies */
335 /* XXX: only flush what is necessary */
336 tb_flush(cpu);
337 }
338 }
339}
340
341void cpu_abort(CPUState *cpu, const char *fmt, ...)
342{
343 va_list ap;
344 va_list ap2;
345
346 va_start(ap, fmt);
347 va_copy(ap2, ap);
348 fprintf(stderr, "qemu: fatal: ");
349 vfprintf(stderr, fmt, ap);
350 fprintf(stderr, "\n");
351 cpu_dump_state(cpu, stderr, CPU_DUMP_FPU | CPU_DUMP_CCOP);
352 if (qemu_log_separate()) {
353 FILE *logfile = qemu_log_lock();
354 qemu_log("qemu: fatal: ");
355 qemu_log_vprintf(fmt, ap2);
356 qemu_log("\n");
357 log_cpu_state(cpu, CPU_DUMP_FPU | CPU_DUMP_CCOP);
358 qemu_log_flush();
359 qemu_log_unlock(logfile);
360 qemu_log_close();
361 }
362 va_end(ap2);
363 va_end(ap);
364 replay_finish();
365#if defined(CONFIG_USER_ONLY)
366 {
367 struct sigaction act;
368 sigfillset(&act.sa_mask);
369 act.sa_handler = SIG_DFL;
370 act.sa_flags = 0;
371 sigaction(SIGABRT, &act, NULL);
372 }
373#endif
374 abort();
375}
376
377/* physical memory access (slow version, mainly for debug) */
378#if defined(CONFIG_USER_ONLY)
379int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
380 void *ptr, target_ulong len, bool is_write)
381{
382 int flags;
383 target_ulong l, page;
384 void * p;
385 uint8_t *buf = ptr;
386
387 while (len > 0) {
388 page = addr & TARGET_PAGE_MASK;
389 l = (page + TARGET_PAGE_SIZE) - addr;
390 if (l > len)
391 l = len;
392 flags = page_get_flags(page);
393 if (!(flags & PAGE_VALID))
394 return -1;
395 if (is_write) {
396 if (!(flags & PAGE_WRITE))
397 return -1;
398 /* XXX: this code should not depend on lock_user */
399 if (!(p = lock_user(VERIFY_WRITE, addr, l, 0)))
400 return -1;
401 memcpy(p, buf, l);
402 unlock_user(p, addr, l);
403 } else {
404 if (!(flags & PAGE_READ))
405 return -1;
406 /* XXX: this code should not depend on lock_user */
407 if (!(p = lock_user(VERIFY_READ, addr, l, 1)))
408 return -1;
409 memcpy(buf, p, l);
410 unlock_user(p, addr, 0);
411 }
412 len -= l;
413 buf += l;
414 addr += l;
415 }
416 return 0;
417}
418#endif
419
420bool target_words_bigendian(void)
421{
422#if defined(TARGET_WORDS_BIGENDIAN)
423 return true;
424#else
425 return false;
426#endif
427}
428
429void page_size_init(void)
430{
431 /* NOTE: we can always suppose that qemu_host_page_size >=
432 TARGET_PAGE_SIZE */
433 if (qemu_host_page_size == 0) {
434 qemu_host_page_size = qemu_real_host_page_size;
435 }
436 if (qemu_host_page_size < TARGET_PAGE_SIZE) {
437 qemu_host_page_size = TARGET_PAGE_SIZE;
438 }
439 qemu_host_page_mask = -(intptr_t)qemu_host_page_size;
440}