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Commit | Line | Data |
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296af7c9 BS |
1 | /* |
2 | * QEMU System Emulator | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | /* Needed early for CONFIG_BSD etc. */ | |
26 | #include "config-host.h" | |
27 | ||
83c9089e | 28 | #include "monitor/monitor.h" |
9c17d615 | 29 | #include "sysemu/sysemu.h" |
022c62cb | 30 | #include "exec/gdbstub.h" |
9c17d615 PB |
31 | #include "sysemu/dma.h" |
32 | #include "sysemu/kvm.h" | |
de0b36b6 | 33 | #include "qmp-commands.h" |
296af7c9 | 34 | |
1de7afc9 | 35 | #include "qemu/thread.h" |
9c17d615 PB |
36 | #include "sysemu/cpus.h" |
37 | #include "sysemu/qtest.h" | |
1de7afc9 PB |
38 | #include "qemu/main-loop.h" |
39 | #include "qemu/bitmap.h" | |
cb365646 | 40 | #include "qemu/seqlock.h" |
0ff0fc19 JK |
41 | |
42 | #ifndef _WIN32 | |
1de7afc9 | 43 | #include "qemu/compatfd.h" |
0ff0fc19 | 44 | #endif |
296af7c9 | 45 | |
6d9cb73c JK |
46 | #ifdef CONFIG_LINUX |
47 | ||
48 | #include <sys/prctl.h> | |
49 | ||
c0532a76 MT |
50 | #ifndef PR_MCE_KILL |
51 | #define PR_MCE_KILL 33 | |
52 | #endif | |
53 | ||
6d9cb73c JK |
54 | #ifndef PR_MCE_KILL_SET |
55 | #define PR_MCE_KILL_SET 1 | |
56 | #endif | |
57 | ||
58 | #ifndef PR_MCE_KILL_EARLY | |
59 | #define PR_MCE_KILL_EARLY 1 | |
60 | #endif | |
61 | ||
62 | #endif /* CONFIG_LINUX */ | |
63 | ||
182735ef | 64 | static CPUState *next_cpu; |
296af7c9 | 65 | |
321bc0b2 TC |
66 | bool cpu_is_stopped(CPUState *cpu) |
67 | { | |
68 | return cpu->stopped || !runstate_is_running(); | |
69 | } | |
70 | ||
a98ae1d8 | 71 | static bool cpu_thread_is_idle(CPUState *cpu) |
ac873f1e | 72 | { |
c64ca814 | 73 | if (cpu->stop || cpu->queued_work_first) { |
ac873f1e PM |
74 | return false; |
75 | } | |
321bc0b2 | 76 | if (cpu_is_stopped(cpu)) { |
ac873f1e PM |
77 | return true; |
78 | } | |
259186a7 | 79 | if (!cpu->halted || qemu_cpu_has_work(cpu) || |
215e79c0 | 80 | kvm_halt_in_kernel()) { |
ac873f1e PM |
81 | return false; |
82 | } | |
83 | return true; | |
84 | } | |
85 | ||
86 | static bool all_cpu_threads_idle(void) | |
87 | { | |
182735ef | 88 | CPUState *cpu; |
ac873f1e | 89 | |
bdc44640 | 90 | CPU_FOREACH(cpu) { |
182735ef | 91 | if (!cpu_thread_is_idle(cpu)) { |
ac873f1e PM |
92 | return false; |
93 | } | |
94 | } | |
95 | return true; | |
96 | } | |
97 | ||
946fb27c PB |
98 | /***********************************************************/ |
99 | /* guest cycle counter */ | |
100 | ||
a3270e19 PB |
101 | /* Protected by TimersState seqlock */ |
102 | ||
103 | /* Compensate for varying guest execution speed. */ | |
104 | static int64_t qemu_icount_bias; | |
105 | static int64_t vm_clock_warp_start; | |
946fb27c PB |
106 | /* Conversion factor from emulated instructions to virtual clock ticks. */ |
107 | static int icount_time_shift; | |
108 | /* Arbitrarily pick 1MIPS as the minimum allowable speed. */ | |
109 | #define MAX_ICOUNT_SHIFT 10 | |
a3270e19 PB |
110 | |
111 | /* Only written by TCG thread */ | |
112 | static int64_t qemu_icount; | |
113 | ||
946fb27c PB |
114 | static QEMUTimer *icount_rt_timer; |
115 | static QEMUTimer *icount_vm_timer; | |
116 | static QEMUTimer *icount_warp_timer; | |
946fb27c PB |
117 | |
118 | typedef struct TimersState { | |
cb365646 | 119 | /* Protected by BQL. */ |
946fb27c PB |
120 | int64_t cpu_ticks_prev; |
121 | int64_t cpu_ticks_offset; | |
cb365646 LPF |
122 | |
123 | /* cpu_clock_offset can be read out of BQL, so protect it with | |
124 | * this lock. | |
125 | */ | |
126 | QemuSeqLock vm_clock_seqlock; | |
946fb27c PB |
127 | int64_t cpu_clock_offset; |
128 | int32_t cpu_ticks_enabled; | |
129 | int64_t dummy; | |
130 | } TimersState; | |
131 | ||
d9cd4007 | 132 | static TimersState timers_state; |
946fb27c PB |
133 | |
134 | /* Return the virtual CPU time, based on the instruction counter. */ | |
17a15f1b | 135 | static int64_t cpu_get_icount_locked(void) |
946fb27c PB |
136 | { |
137 | int64_t icount; | |
4917cf44 | 138 | CPUState *cpu = current_cpu; |
946fb27c PB |
139 | |
140 | icount = qemu_icount; | |
4917cf44 AF |
141 | if (cpu) { |
142 | CPUArchState *env = cpu->env_ptr; | |
946fb27c PB |
143 | if (!can_do_io(env)) { |
144 | fprintf(stderr, "Bad clock read\n"); | |
145 | } | |
146 | icount -= (env->icount_decr.u16.low + env->icount_extra); | |
147 | } | |
148 | return qemu_icount_bias + (icount << icount_time_shift); | |
149 | } | |
150 | ||
17a15f1b PB |
151 | int64_t cpu_get_icount(void) |
152 | { | |
153 | int64_t icount; | |
154 | unsigned start; | |
155 | ||
156 | do { | |
157 | start = seqlock_read_begin(&timers_state.vm_clock_seqlock); | |
158 | icount = cpu_get_icount_locked(); | |
159 | } while (seqlock_read_retry(&timers_state.vm_clock_seqlock, start)); | |
160 | ||
161 | return icount; | |
162 | } | |
163 | ||
946fb27c | 164 | /* return the host CPU cycle counter and handle stop/restart */ |
cb365646 | 165 | /* Caller must hold the BQL */ |
946fb27c PB |
166 | int64_t cpu_get_ticks(void) |
167 | { | |
168 | if (use_icount) { | |
169 | return cpu_get_icount(); | |
170 | } | |
171 | if (!timers_state.cpu_ticks_enabled) { | |
172 | return timers_state.cpu_ticks_offset; | |
173 | } else { | |
174 | int64_t ticks; | |
175 | ticks = cpu_get_real_ticks(); | |
176 | if (timers_state.cpu_ticks_prev > ticks) { | |
177 | /* Note: non increasing ticks may happen if the host uses | |
178 | software suspend */ | |
179 | timers_state.cpu_ticks_offset += timers_state.cpu_ticks_prev - ticks; | |
180 | } | |
181 | timers_state.cpu_ticks_prev = ticks; | |
182 | return ticks + timers_state.cpu_ticks_offset; | |
183 | } | |
184 | } | |
185 | ||
cb365646 | 186 | static int64_t cpu_get_clock_locked(void) |
946fb27c PB |
187 | { |
188 | int64_t ti; | |
cb365646 | 189 | |
946fb27c | 190 | if (!timers_state.cpu_ticks_enabled) { |
cb365646 | 191 | ti = timers_state.cpu_clock_offset; |
946fb27c PB |
192 | } else { |
193 | ti = get_clock(); | |
cb365646 | 194 | ti += timers_state.cpu_clock_offset; |
946fb27c | 195 | } |
cb365646 LPF |
196 | |
197 | return ti; | |
198 | } | |
199 | ||
200 | /* return the host CPU monotonic timer and handle stop/restart */ | |
201 | int64_t cpu_get_clock(void) | |
202 | { | |
203 | int64_t ti; | |
204 | unsigned start; | |
205 | ||
206 | do { | |
207 | start = seqlock_read_begin(&timers_state.vm_clock_seqlock); | |
208 | ti = cpu_get_clock_locked(); | |
209 | } while (seqlock_read_retry(&timers_state.vm_clock_seqlock, start)); | |
210 | ||
211 | return ti; | |
946fb27c PB |
212 | } |
213 | ||
cb365646 LPF |
214 | /* enable cpu_get_ticks() |
215 | * Caller must hold BQL which server as mutex for vm_clock_seqlock. | |
216 | */ | |
946fb27c PB |
217 | void cpu_enable_ticks(void) |
218 | { | |
cb365646 LPF |
219 | /* Here, the really thing protected by seqlock is cpu_clock_offset. */ |
220 | seqlock_write_lock(&timers_state.vm_clock_seqlock); | |
946fb27c PB |
221 | if (!timers_state.cpu_ticks_enabled) { |
222 | timers_state.cpu_ticks_offset -= cpu_get_real_ticks(); | |
223 | timers_state.cpu_clock_offset -= get_clock(); | |
224 | timers_state.cpu_ticks_enabled = 1; | |
225 | } | |
cb365646 | 226 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); |
946fb27c PB |
227 | } |
228 | ||
229 | /* disable cpu_get_ticks() : the clock is stopped. You must not call | |
cb365646 LPF |
230 | * cpu_get_ticks() after that. |
231 | * Caller must hold BQL which server as mutex for vm_clock_seqlock. | |
232 | */ | |
946fb27c PB |
233 | void cpu_disable_ticks(void) |
234 | { | |
cb365646 LPF |
235 | /* Here, the really thing protected by seqlock is cpu_clock_offset. */ |
236 | seqlock_write_lock(&timers_state.vm_clock_seqlock); | |
946fb27c PB |
237 | if (timers_state.cpu_ticks_enabled) { |
238 | timers_state.cpu_ticks_offset = cpu_get_ticks(); | |
cb365646 | 239 | timers_state.cpu_clock_offset = cpu_get_clock_locked(); |
946fb27c PB |
240 | timers_state.cpu_ticks_enabled = 0; |
241 | } | |
cb365646 | 242 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); |
946fb27c PB |
243 | } |
244 | ||
245 | /* Correlation between real and virtual time is always going to be | |
246 | fairly approximate, so ignore small variation. | |
247 | When the guest is idle real and virtual time will be aligned in | |
248 | the IO wait loop. */ | |
249 | #define ICOUNT_WOBBLE (get_ticks_per_sec() / 10) | |
250 | ||
251 | static void icount_adjust(void) | |
252 | { | |
253 | int64_t cur_time; | |
254 | int64_t cur_icount; | |
255 | int64_t delta; | |
a3270e19 PB |
256 | |
257 | /* Protected by TimersState mutex. */ | |
946fb27c | 258 | static int64_t last_delta; |
468cc7cf | 259 | |
946fb27c PB |
260 | /* If the VM is not running, then do nothing. */ |
261 | if (!runstate_is_running()) { | |
262 | return; | |
263 | } | |
468cc7cf | 264 | |
17a15f1b PB |
265 | seqlock_write_lock(&timers_state.vm_clock_seqlock); |
266 | cur_time = cpu_get_clock_locked(); | |
267 | cur_icount = cpu_get_icount_locked(); | |
468cc7cf | 268 | |
946fb27c PB |
269 | delta = cur_icount - cur_time; |
270 | /* FIXME: This is a very crude algorithm, somewhat prone to oscillation. */ | |
271 | if (delta > 0 | |
272 | && last_delta + ICOUNT_WOBBLE < delta * 2 | |
273 | && icount_time_shift > 0) { | |
274 | /* The guest is getting too far ahead. Slow time down. */ | |
275 | icount_time_shift--; | |
276 | } | |
277 | if (delta < 0 | |
278 | && last_delta - ICOUNT_WOBBLE > delta * 2 | |
279 | && icount_time_shift < MAX_ICOUNT_SHIFT) { | |
280 | /* The guest is getting too far behind. Speed time up. */ | |
281 | icount_time_shift++; | |
282 | } | |
283 | last_delta = delta; | |
284 | qemu_icount_bias = cur_icount - (qemu_icount << icount_time_shift); | |
17a15f1b | 285 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); |
946fb27c PB |
286 | } |
287 | ||
288 | static void icount_adjust_rt(void *opaque) | |
289 | { | |
40daca54 AB |
290 | timer_mod(icount_rt_timer, |
291 | qemu_clock_get_ms(QEMU_CLOCK_REALTIME) + 1000); | |
946fb27c PB |
292 | icount_adjust(); |
293 | } | |
294 | ||
295 | static void icount_adjust_vm(void *opaque) | |
296 | { | |
40daca54 AB |
297 | timer_mod(icount_vm_timer, |
298 | qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + | |
299 | get_ticks_per_sec() / 10); | |
946fb27c PB |
300 | icount_adjust(); |
301 | } | |
302 | ||
303 | static int64_t qemu_icount_round(int64_t count) | |
304 | { | |
305 | return (count + (1 << icount_time_shift) - 1) >> icount_time_shift; | |
306 | } | |
307 | ||
308 | static void icount_warp_rt(void *opaque) | |
309 | { | |
17a15f1b PB |
310 | /* The icount_warp_timer is rescheduled soon after vm_clock_warp_start |
311 | * changes from -1 to another value, so the race here is okay. | |
312 | */ | |
313 | if (atomic_read(&vm_clock_warp_start) == -1) { | |
946fb27c PB |
314 | return; |
315 | } | |
316 | ||
17a15f1b | 317 | seqlock_write_lock(&timers_state.vm_clock_seqlock); |
946fb27c | 318 | if (runstate_is_running()) { |
40daca54 | 319 | int64_t clock = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); |
8ed961d9 PB |
320 | int64_t warp_delta; |
321 | ||
322 | warp_delta = clock - vm_clock_warp_start; | |
323 | if (use_icount == 2) { | |
946fb27c | 324 | /* |
40daca54 | 325 | * In adaptive mode, do not let QEMU_CLOCK_VIRTUAL run too |
946fb27c PB |
326 | * far ahead of real time. |
327 | */ | |
17a15f1b PB |
328 | int64_t cur_time = cpu_get_clock_locked(); |
329 | int64_t cur_icount = cpu_get_icount_locked(); | |
946fb27c | 330 | int64_t delta = cur_time - cur_icount; |
8ed961d9 | 331 | warp_delta = MIN(warp_delta, delta); |
946fb27c | 332 | } |
8ed961d9 | 333 | qemu_icount_bias += warp_delta; |
946fb27c PB |
334 | } |
335 | vm_clock_warp_start = -1; | |
17a15f1b | 336 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); |
8ed961d9 PB |
337 | |
338 | if (qemu_clock_expired(QEMU_CLOCK_VIRTUAL)) { | |
339 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); | |
340 | } | |
946fb27c PB |
341 | } |
342 | ||
8156be56 PB |
343 | void qtest_clock_warp(int64_t dest) |
344 | { | |
40daca54 | 345 | int64_t clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); |
8156be56 PB |
346 | assert(qtest_enabled()); |
347 | while (clock < dest) { | |
40daca54 | 348 | int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
8156be56 | 349 | int64_t warp = MIN(dest - clock, deadline); |
17a15f1b | 350 | seqlock_write_lock(&timers_state.vm_clock_seqlock); |
8156be56 | 351 | qemu_icount_bias += warp; |
17a15f1b PB |
352 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); |
353 | ||
40daca54 AB |
354 | qemu_clock_run_timers(QEMU_CLOCK_VIRTUAL); |
355 | clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); | |
8156be56 | 356 | } |
40daca54 | 357 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); |
8156be56 PB |
358 | } |
359 | ||
40daca54 | 360 | void qemu_clock_warp(QEMUClockType type) |
946fb27c | 361 | { |
ce78d18c | 362 | int64_t clock; |
946fb27c PB |
363 | int64_t deadline; |
364 | ||
365 | /* | |
366 | * There are too many global variables to make the "warp" behavior | |
367 | * applicable to other clocks. But a clock argument removes the | |
368 | * need for if statements all over the place. | |
369 | */ | |
40daca54 | 370 | if (type != QEMU_CLOCK_VIRTUAL || !use_icount) { |
946fb27c PB |
371 | return; |
372 | } | |
373 | ||
374 | /* | |
40daca54 AB |
375 | * If the CPUs have been sleeping, advance QEMU_CLOCK_VIRTUAL timer now. |
376 | * This ensures that the deadline for the timer is computed correctly below. | |
946fb27c PB |
377 | * This also makes sure that the insn counter is synchronized before the |
378 | * CPU starts running, in case the CPU is woken by an event other than | |
40daca54 | 379 | * the earliest QEMU_CLOCK_VIRTUAL timer. |
946fb27c PB |
380 | */ |
381 | icount_warp_rt(NULL); | |
ce78d18c PB |
382 | timer_del(icount_warp_timer); |
383 | if (!all_cpu_threads_idle()) { | |
946fb27c PB |
384 | return; |
385 | } | |
386 | ||
8156be56 PB |
387 | if (qtest_enabled()) { |
388 | /* When testing, qtest commands advance icount. */ | |
389 | return; | |
390 | } | |
391 | ||
ac70aafc | 392 | /* We want to use the earliest deadline from ALL vm_clocks */ |
ce78d18c | 393 | clock = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); |
40daca54 | 394 | deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
ce78d18c PB |
395 | if (deadline < 0) { |
396 | return; | |
ac70aafc AB |
397 | } |
398 | ||
946fb27c PB |
399 | if (deadline > 0) { |
400 | /* | |
40daca54 | 401 | * Ensure QEMU_CLOCK_VIRTUAL proceeds even when the virtual CPU goes to |
946fb27c PB |
402 | * sleep. Otherwise, the CPU might be waiting for a future timer |
403 | * interrupt to wake it up, but the interrupt never comes because | |
404 | * the vCPU isn't running any insns and thus doesn't advance the | |
40daca54 | 405 | * QEMU_CLOCK_VIRTUAL. |
946fb27c PB |
406 | * |
407 | * An extreme solution for this problem would be to never let VCPUs | |
40daca54 AB |
408 | * sleep in icount mode if there is a pending QEMU_CLOCK_VIRTUAL |
409 | * timer; rather time could just advance to the next QEMU_CLOCK_VIRTUAL | |
410 | * event. Instead, we do stop VCPUs and only advance QEMU_CLOCK_VIRTUAL | |
411 | * after some e"real" time, (related to the time left until the next | |
412 | * event) has passed. The QEMU_CLOCK_REALTIME timer will do this. | |
413 | * This avoids that the warps are visible externally; for example, | |
414 | * you will not be sending network packets continuously instead of | |
415 | * every 100ms. | |
946fb27c | 416 | */ |
17a15f1b | 417 | seqlock_write_lock(&timers_state.vm_clock_seqlock); |
ce78d18c PB |
418 | if (vm_clock_warp_start == -1 || vm_clock_warp_start > clock) { |
419 | vm_clock_warp_start = clock; | |
420 | } | |
17a15f1b | 421 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); |
ce78d18c | 422 | timer_mod_anticipate(icount_warp_timer, clock + deadline); |
ac70aafc | 423 | } else if (deadline == 0) { |
40daca54 | 424 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); |
946fb27c PB |
425 | } |
426 | } | |
427 | ||
428 | static const VMStateDescription vmstate_timers = { | |
429 | .name = "timer", | |
430 | .version_id = 2, | |
431 | .minimum_version_id = 1, | |
432 | .minimum_version_id_old = 1, | |
433 | .fields = (VMStateField[]) { | |
434 | VMSTATE_INT64(cpu_ticks_offset, TimersState), | |
435 | VMSTATE_INT64(dummy, TimersState), | |
436 | VMSTATE_INT64_V(cpu_clock_offset, TimersState, 2), | |
437 | VMSTATE_END_OF_LIST() | |
438 | } | |
439 | }; | |
440 | ||
441 | void configure_icount(const char *option) | |
442 | { | |
cb365646 | 443 | seqlock_init(&timers_state.vm_clock_seqlock, NULL); |
946fb27c PB |
444 | vmstate_register(NULL, 0, &vmstate_timers, &timers_state); |
445 | if (!option) { | |
446 | return; | |
447 | } | |
448 | ||
40daca54 AB |
449 | icount_warp_timer = timer_new_ns(QEMU_CLOCK_REALTIME, |
450 | icount_warp_rt, NULL); | |
946fb27c PB |
451 | if (strcmp(option, "auto") != 0) { |
452 | icount_time_shift = strtol(option, NULL, 0); | |
453 | use_icount = 1; | |
454 | return; | |
455 | } | |
456 | ||
457 | use_icount = 2; | |
458 | ||
459 | /* 125MIPS seems a reasonable initial guess at the guest speed. | |
460 | It will be corrected fairly quickly anyway. */ | |
461 | icount_time_shift = 3; | |
462 | ||
463 | /* Have both realtime and virtual time triggers for speed adjustment. | |
464 | The realtime trigger catches emulated time passing too slowly, | |
465 | the virtual time trigger catches emulated time passing too fast. | |
466 | Realtime triggers occur even when idle, so use them less frequently | |
467 | than VM triggers. */ | |
40daca54 AB |
468 | icount_rt_timer = timer_new_ms(QEMU_CLOCK_REALTIME, |
469 | icount_adjust_rt, NULL); | |
470 | timer_mod(icount_rt_timer, | |
471 | qemu_clock_get_ms(QEMU_CLOCK_REALTIME) + 1000); | |
472 | icount_vm_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, | |
473 | icount_adjust_vm, NULL); | |
474 | timer_mod(icount_vm_timer, | |
475 | qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + | |
476 | get_ticks_per_sec() / 10); | |
946fb27c PB |
477 | } |
478 | ||
296af7c9 BS |
479 | /***********************************************************/ |
480 | void hw_error(const char *fmt, ...) | |
481 | { | |
482 | va_list ap; | |
55e5c285 | 483 | CPUState *cpu; |
296af7c9 BS |
484 | |
485 | va_start(ap, fmt); | |
486 | fprintf(stderr, "qemu: hardware error: "); | |
487 | vfprintf(stderr, fmt, ap); | |
488 | fprintf(stderr, "\n"); | |
bdc44640 | 489 | CPU_FOREACH(cpu) { |
55e5c285 | 490 | fprintf(stderr, "CPU #%d:\n", cpu->cpu_index); |
878096ee | 491 | cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU); |
296af7c9 BS |
492 | } |
493 | va_end(ap); | |
494 | abort(); | |
495 | } | |
496 | ||
497 | void cpu_synchronize_all_states(void) | |
498 | { | |
182735ef | 499 | CPUState *cpu; |
296af7c9 | 500 | |
bdc44640 | 501 | CPU_FOREACH(cpu) { |
182735ef | 502 | cpu_synchronize_state(cpu); |
296af7c9 BS |
503 | } |
504 | } | |
505 | ||
506 | void cpu_synchronize_all_post_reset(void) | |
507 | { | |
182735ef | 508 | CPUState *cpu; |
296af7c9 | 509 | |
bdc44640 | 510 | CPU_FOREACH(cpu) { |
182735ef | 511 | cpu_synchronize_post_reset(cpu); |
296af7c9 BS |
512 | } |
513 | } | |
514 | ||
515 | void cpu_synchronize_all_post_init(void) | |
516 | { | |
182735ef | 517 | CPUState *cpu; |
296af7c9 | 518 | |
bdc44640 | 519 | CPU_FOREACH(cpu) { |
182735ef | 520 | cpu_synchronize_post_init(cpu); |
296af7c9 BS |
521 | } |
522 | } | |
523 | ||
56983463 | 524 | static int do_vm_stop(RunState state) |
296af7c9 | 525 | { |
56983463 KW |
526 | int ret = 0; |
527 | ||
1354869c | 528 | if (runstate_is_running()) { |
296af7c9 | 529 | cpu_disable_ticks(); |
296af7c9 | 530 | pause_all_vcpus(); |
f5bbfba1 | 531 | runstate_set(state); |
1dfb4dd9 | 532 | vm_state_notify(0, state); |
296af7c9 BS |
533 | monitor_protocol_event(QEVENT_STOP, NULL); |
534 | } | |
56983463 | 535 | |
594a45ce KW |
536 | bdrv_drain_all(); |
537 | ret = bdrv_flush_all(); | |
538 | ||
56983463 | 539 | return ret; |
296af7c9 BS |
540 | } |
541 | ||
a1fcaa73 | 542 | static bool cpu_can_run(CPUState *cpu) |
296af7c9 | 543 | { |
4fdeee7c | 544 | if (cpu->stop) { |
a1fcaa73 | 545 | return false; |
0ab07c62 | 546 | } |
321bc0b2 | 547 | if (cpu_is_stopped(cpu)) { |
a1fcaa73 | 548 | return false; |
0ab07c62 | 549 | } |
a1fcaa73 | 550 | return true; |
296af7c9 BS |
551 | } |
552 | ||
91325046 | 553 | static void cpu_handle_guest_debug(CPUState *cpu) |
83f338f7 | 554 | { |
64f6b346 | 555 | gdb_set_stop_cpu(cpu); |
8cf71710 | 556 | qemu_system_debug_request(); |
f324e766 | 557 | cpu->stopped = true; |
3c638d06 JK |
558 | } |
559 | ||
714bd040 PB |
560 | static void cpu_signal(int sig) |
561 | { | |
4917cf44 AF |
562 | if (current_cpu) { |
563 | cpu_exit(current_cpu); | |
714bd040 PB |
564 | } |
565 | exit_request = 1; | |
566 | } | |
714bd040 | 567 | |
6d9cb73c JK |
568 | #ifdef CONFIG_LINUX |
569 | static void sigbus_reraise(void) | |
570 | { | |
571 | sigset_t set; | |
572 | struct sigaction action; | |
573 | ||
574 | memset(&action, 0, sizeof(action)); | |
575 | action.sa_handler = SIG_DFL; | |
576 | if (!sigaction(SIGBUS, &action, NULL)) { | |
577 | raise(SIGBUS); | |
578 | sigemptyset(&set); | |
579 | sigaddset(&set, SIGBUS); | |
580 | sigprocmask(SIG_UNBLOCK, &set, NULL); | |
581 | } | |
582 | perror("Failed to re-raise SIGBUS!\n"); | |
583 | abort(); | |
584 | } | |
585 | ||
586 | static void sigbus_handler(int n, struct qemu_signalfd_siginfo *siginfo, | |
587 | void *ctx) | |
588 | { | |
589 | if (kvm_on_sigbus(siginfo->ssi_code, | |
590 | (void *)(intptr_t)siginfo->ssi_addr)) { | |
591 | sigbus_reraise(); | |
592 | } | |
593 | } | |
594 | ||
595 | static void qemu_init_sigbus(void) | |
596 | { | |
597 | struct sigaction action; | |
598 | ||
599 | memset(&action, 0, sizeof(action)); | |
600 | action.sa_flags = SA_SIGINFO; | |
601 | action.sa_sigaction = (void (*)(int, siginfo_t*, void*))sigbus_handler; | |
602 | sigaction(SIGBUS, &action, NULL); | |
603 | ||
604 | prctl(PR_MCE_KILL, PR_MCE_KILL_SET, PR_MCE_KILL_EARLY, 0, 0); | |
605 | } | |
606 | ||
290adf38 | 607 | static void qemu_kvm_eat_signals(CPUState *cpu) |
1ab3c6c0 JK |
608 | { |
609 | struct timespec ts = { 0, 0 }; | |
610 | siginfo_t siginfo; | |
611 | sigset_t waitset; | |
612 | sigset_t chkset; | |
613 | int r; | |
614 | ||
615 | sigemptyset(&waitset); | |
616 | sigaddset(&waitset, SIG_IPI); | |
617 | sigaddset(&waitset, SIGBUS); | |
618 | ||
619 | do { | |
620 | r = sigtimedwait(&waitset, &siginfo, &ts); | |
621 | if (r == -1 && !(errno == EAGAIN || errno == EINTR)) { | |
622 | perror("sigtimedwait"); | |
623 | exit(1); | |
624 | } | |
625 | ||
626 | switch (r) { | |
627 | case SIGBUS: | |
290adf38 | 628 | if (kvm_on_sigbus_vcpu(cpu, siginfo.si_code, siginfo.si_addr)) { |
1ab3c6c0 JK |
629 | sigbus_reraise(); |
630 | } | |
631 | break; | |
632 | default: | |
633 | break; | |
634 | } | |
635 | ||
636 | r = sigpending(&chkset); | |
637 | if (r == -1) { | |
638 | perror("sigpending"); | |
639 | exit(1); | |
640 | } | |
641 | } while (sigismember(&chkset, SIG_IPI) || sigismember(&chkset, SIGBUS)); | |
1ab3c6c0 JK |
642 | } |
643 | ||
6d9cb73c JK |
644 | #else /* !CONFIG_LINUX */ |
645 | ||
646 | static void qemu_init_sigbus(void) | |
647 | { | |
648 | } | |
1ab3c6c0 | 649 | |
290adf38 | 650 | static void qemu_kvm_eat_signals(CPUState *cpu) |
1ab3c6c0 JK |
651 | { |
652 | } | |
6d9cb73c JK |
653 | #endif /* !CONFIG_LINUX */ |
654 | ||
296af7c9 | 655 | #ifndef _WIN32 |
55f8d6ac JK |
656 | static void dummy_signal(int sig) |
657 | { | |
658 | } | |
55f8d6ac | 659 | |
13618e05 | 660 | static void qemu_kvm_init_cpu_signals(CPUState *cpu) |
714bd040 PB |
661 | { |
662 | int r; | |
663 | sigset_t set; | |
664 | struct sigaction sigact; | |
665 | ||
666 | memset(&sigact, 0, sizeof(sigact)); | |
667 | sigact.sa_handler = dummy_signal; | |
668 | sigaction(SIG_IPI, &sigact, NULL); | |
669 | ||
714bd040 PB |
670 | pthread_sigmask(SIG_BLOCK, NULL, &set); |
671 | sigdelset(&set, SIG_IPI); | |
714bd040 | 672 | sigdelset(&set, SIGBUS); |
491d6e80 | 673 | r = kvm_set_signal_mask(cpu, &set); |
714bd040 PB |
674 | if (r) { |
675 | fprintf(stderr, "kvm_set_signal_mask: %s\n", strerror(-r)); | |
676 | exit(1); | |
677 | } | |
678 | } | |
679 | ||
680 | static void qemu_tcg_init_cpu_signals(void) | |
681 | { | |
714bd040 PB |
682 | sigset_t set; |
683 | struct sigaction sigact; | |
684 | ||
685 | memset(&sigact, 0, sizeof(sigact)); | |
686 | sigact.sa_handler = cpu_signal; | |
687 | sigaction(SIG_IPI, &sigact, NULL); | |
688 | ||
689 | sigemptyset(&set); | |
690 | sigaddset(&set, SIG_IPI); | |
691 | pthread_sigmask(SIG_UNBLOCK, &set, NULL); | |
714bd040 PB |
692 | } |
693 | ||
55f8d6ac | 694 | #else /* _WIN32 */ |
13618e05 | 695 | static void qemu_kvm_init_cpu_signals(CPUState *cpu) |
ff48eb5f | 696 | { |
714bd040 PB |
697 | abort(); |
698 | } | |
ff48eb5f | 699 | |
714bd040 PB |
700 | static void qemu_tcg_init_cpu_signals(void) |
701 | { | |
ff48eb5f | 702 | } |
714bd040 | 703 | #endif /* _WIN32 */ |
ff48eb5f | 704 | |
b2532d88 | 705 | static QemuMutex qemu_global_mutex; |
46daff13 PB |
706 | static QemuCond qemu_io_proceeded_cond; |
707 | static bool iothread_requesting_mutex; | |
296af7c9 BS |
708 | |
709 | static QemuThread io_thread; | |
710 | ||
711 | static QemuThread *tcg_cpu_thread; | |
712 | static QemuCond *tcg_halt_cond; | |
713 | ||
296af7c9 BS |
714 | /* cpu creation */ |
715 | static QemuCond qemu_cpu_cond; | |
716 | /* system init */ | |
296af7c9 | 717 | static QemuCond qemu_pause_cond; |
e82bcec2 | 718 | static QemuCond qemu_work_cond; |
296af7c9 | 719 | |
d3b12f5d | 720 | void qemu_init_cpu_loop(void) |
296af7c9 | 721 | { |
6d9cb73c | 722 | qemu_init_sigbus(); |
ed94592b | 723 | qemu_cond_init(&qemu_cpu_cond); |
ed94592b AL |
724 | qemu_cond_init(&qemu_pause_cond); |
725 | qemu_cond_init(&qemu_work_cond); | |
46daff13 | 726 | qemu_cond_init(&qemu_io_proceeded_cond); |
296af7c9 | 727 | qemu_mutex_init(&qemu_global_mutex); |
296af7c9 | 728 | |
b7680cb6 | 729 | qemu_thread_get_self(&io_thread); |
296af7c9 BS |
730 | } |
731 | ||
f100f0b3 | 732 | void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data) |
e82bcec2 MT |
733 | { |
734 | struct qemu_work_item wi; | |
735 | ||
60e82579 | 736 | if (qemu_cpu_is_self(cpu)) { |
e82bcec2 MT |
737 | func(data); |
738 | return; | |
739 | } | |
740 | ||
741 | wi.func = func; | |
742 | wi.data = data; | |
3c02270d | 743 | wi.free = false; |
c64ca814 AF |
744 | if (cpu->queued_work_first == NULL) { |
745 | cpu->queued_work_first = &wi; | |
0ab07c62 | 746 | } else { |
c64ca814 | 747 | cpu->queued_work_last->next = &wi; |
0ab07c62 | 748 | } |
c64ca814 | 749 | cpu->queued_work_last = &wi; |
e82bcec2 MT |
750 | wi.next = NULL; |
751 | wi.done = false; | |
752 | ||
c08d7424 | 753 | qemu_cpu_kick(cpu); |
e82bcec2 | 754 | while (!wi.done) { |
4917cf44 | 755 | CPUState *self_cpu = current_cpu; |
e82bcec2 MT |
756 | |
757 | qemu_cond_wait(&qemu_work_cond, &qemu_global_mutex); | |
4917cf44 | 758 | current_cpu = self_cpu; |
e82bcec2 MT |
759 | } |
760 | } | |
761 | ||
3c02270d CV |
762 | void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data) |
763 | { | |
764 | struct qemu_work_item *wi; | |
765 | ||
766 | if (qemu_cpu_is_self(cpu)) { | |
767 | func(data); | |
768 | return; | |
769 | } | |
770 | ||
771 | wi = g_malloc0(sizeof(struct qemu_work_item)); | |
772 | wi->func = func; | |
773 | wi->data = data; | |
774 | wi->free = true; | |
775 | if (cpu->queued_work_first == NULL) { | |
776 | cpu->queued_work_first = wi; | |
777 | } else { | |
778 | cpu->queued_work_last->next = wi; | |
779 | } | |
780 | cpu->queued_work_last = wi; | |
781 | wi->next = NULL; | |
782 | wi->done = false; | |
783 | ||
784 | qemu_cpu_kick(cpu); | |
785 | } | |
786 | ||
6d45b109 | 787 | static void flush_queued_work(CPUState *cpu) |
e82bcec2 MT |
788 | { |
789 | struct qemu_work_item *wi; | |
790 | ||
c64ca814 | 791 | if (cpu->queued_work_first == NULL) { |
e82bcec2 | 792 | return; |
0ab07c62 | 793 | } |
e82bcec2 | 794 | |
c64ca814 AF |
795 | while ((wi = cpu->queued_work_first)) { |
796 | cpu->queued_work_first = wi->next; | |
e82bcec2 MT |
797 | wi->func(wi->data); |
798 | wi->done = true; | |
3c02270d CV |
799 | if (wi->free) { |
800 | g_free(wi); | |
801 | } | |
e82bcec2 | 802 | } |
c64ca814 | 803 | cpu->queued_work_last = NULL; |
e82bcec2 MT |
804 | qemu_cond_broadcast(&qemu_work_cond); |
805 | } | |
806 | ||
509a0d78 | 807 | static void qemu_wait_io_event_common(CPUState *cpu) |
296af7c9 | 808 | { |
4fdeee7c AF |
809 | if (cpu->stop) { |
810 | cpu->stop = false; | |
f324e766 | 811 | cpu->stopped = true; |
296af7c9 BS |
812 | qemu_cond_signal(&qemu_pause_cond); |
813 | } | |
6d45b109 | 814 | flush_queued_work(cpu); |
216fc9a4 | 815 | cpu->thread_kicked = false; |
296af7c9 BS |
816 | } |
817 | ||
6cabe1f3 | 818 | static void qemu_tcg_wait_io_event(void) |
296af7c9 | 819 | { |
182735ef | 820 | CPUState *cpu; |
6cabe1f3 | 821 | |
16400322 | 822 | while (all_cpu_threads_idle()) { |
ab33fcda PB |
823 | /* Start accounting real time to the virtual clock if the CPUs |
824 | are idle. */ | |
40daca54 | 825 | qemu_clock_warp(QEMU_CLOCK_VIRTUAL); |
9705fbb5 | 826 | qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex); |
16400322 | 827 | } |
296af7c9 | 828 | |
46daff13 PB |
829 | while (iothread_requesting_mutex) { |
830 | qemu_cond_wait(&qemu_io_proceeded_cond, &qemu_global_mutex); | |
831 | } | |
6cabe1f3 | 832 | |
bdc44640 | 833 | CPU_FOREACH(cpu) { |
182735ef | 834 | qemu_wait_io_event_common(cpu); |
6cabe1f3 | 835 | } |
296af7c9 BS |
836 | } |
837 | ||
fd529e8f | 838 | static void qemu_kvm_wait_io_event(CPUState *cpu) |
296af7c9 | 839 | { |
a98ae1d8 | 840 | while (cpu_thread_is_idle(cpu)) { |
f5c121b8 | 841 | qemu_cond_wait(cpu->halt_cond, &qemu_global_mutex); |
16400322 | 842 | } |
296af7c9 | 843 | |
290adf38 | 844 | qemu_kvm_eat_signals(cpu); |
509a0d78 | 845 | qemu_wait_io_event_common(cpu); |
296af7c9 BS |
846 | } |
847 | ||
7e97cd88 | 848 | static void *qemu_kvm_cpu_thread_fn(void *arg) |
296af7c9 | 849 | { |
48a106bd | 850 | CPUState *cpu = arg; |
84b4915d | 851 | int r; |
296af7c9 | 852 | |
6164e6d6 | 853 | qemu_mutex_lock(&qemu_global_mutex); |
814e612e | 854 | qemu_thread_get_self(cpu->thread); |
9f09e18a | 855 | cpu->thread_id = qemu_get_thread_id(); |
4917cf44 | 856 | current_cpu = cpu; |
296af7c9 | 857 | |
504134d2 | 858 | r = kvm_init_vcpu(cpu); |
84b4915d JK |
859 | if (r < 0) { |
860 | fprintf(stderr, "kvm_init_vcpu failed: %s\n", strerror(-r)); | |
861 | exit(1); | |
862 | } | |
296af7c9 | 863 | |
13618e05 | 864 | qemu_kvm_init_cpu_signals(cpu); |
296af7c9 BS |
865 | |
866 | /* signal CPU creation */ | |
61a46217 | 867 | cpu->created = true; |
296af7c9 BS |
868 | qemu_cond_signal(&qemu_cpu_cond); |
869 | ||
296af7c9 | 870 | while (1) { |
a1fcaa73 | 871 | if (cpu_can_run(cpu)) { |
1458c363 | 872 | r = kvm_cpu_exec(cpu); |
83f338f7 | 873 | if (r == EXCP_DEBUG) { |
91325046 | 874 | cpu_handle_guest_debug(cpu); |
83f338f7 | 875 | } |
0ab07c62 | 876 | } |
fd529e8f | 877 | qemu_kvm_wait_io_event(cpu); |
296af7c9 BS |
878 | } |
879 | ||
880 | return NULL; | |
881 | } | |
882 | ||
c7f0f3b1 AL |
883 | static void *qemu_dummy_cpu_thread_fn(void *arg) |
884 | { | |
885 | #ifdef _WIN32 | |
886 | fprintf(stderr, "qtest is not supported under Windows\n"); | |
887 | exit(1); | |
888 | #else | |
10a9021d | 889 | CPUState *cpu = arg; |
c7f0f3b1 AL |
890 | sigset_t waitset; |
891 | int r; | |
892 | ||
893 | qemu_mutex_lock_iothread(); | |
814e612e | 894 | qemu_thread_get_self(cpu->thread); |
9f09e18a | 895 | cpu->thread_id = qemu_get_thread_id(); |
c7f0f3b1 AL |
896 | |
897 | sigemptyset(&waitset); | |
898 | sigaddset(&waitset, SIG_IPI); | |
899 | ||
900 | /* signal CPU creation */ | |
61a46217 | 901 | cpu->created = true; |
c7f0f3b1 AL |
902 | qemu_cond_signal(&qemu_cpu_cond); |
903 | ||
4917cf44 | 904 | current_cpu = cpu; |
c7f0f3b1 | 905 | while (1) { |
4917cf44 | 906 | current_cpu = NULL; |
c7f0f3b1 AL |
907 | qemu_mutex_unlock_iothread(); |
908 | do { | |
909 | int sig; | |
910 | r = sigwait(&waitset, &sig); | |
911 | } while (r == -1 && (errno == EAGAIN || errno == EINTR)); | |
912 | if (r == -1) { | |
913 | perror("sigwait"); | |
914 | exit(1); | |
915 | } | |
916 | qemu_mutex_lock_iothread(); | |
4917cf44 | 917 | current_cpu = cpu; |
509a0d78 | 918 | qemu_wait_io_event_common(cpu); |
c7f0f3b1 AL |
919 | } |
920 | ||
921 | return NULL; | |
922 | #endif | |
923 | } | |
924 | ||
bdb7ca67 JK |
925 | static void tcg_exec_all(void); |
926 | ||
7e97cd88 | 927 | static void *qemu_tcg_cpu_thread_fn(void *arg) |
296af7c9 | 928 | { |
c3586ba7 | 929 | CPUState *cpu = arg; |
296af7c9 | 930 | |
55f8d6ac | 931 | qemu_tcg_init_cpu_signals(); |
814e612e | 932 | qemu_thread_get_self(cpu->thread); |
296af7c9 | 933 | |
296af7c9 | 934 | qemu_mutex_lock(&qemu_global_mutex); |
38fcbd3f AF |
935 | CPU_FOREACH(cpu) { |
936 | cpu->thread_id = qemu_get_thread_id(); | |
937 | cpu->created = true; | |
938 | } | |
296af7c9 BS |
939 | qemu_cond_signal(&qemu_cpu_cond); |
940 | ||
fa7d1867 | 941 | /* wait for initial kick-off after machine start */ |
bdc44640 | 942 | while (QTAILQ_FIRST(&cpus)->stopped) { |
fa7d1867 | 943 | qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex); |
8e564b4e JK |
944 | |
945 | /* process any pending work */ | |
bdc44640 | 946 | CPU_FOREACH(cpu) { |
182735ef | 947 | qemu_wait_io_event_common(cpu); |
8e564b4e | 948 | } |
0ab07c62 | 949 | } |
296af7c9 BS |
950 | |
951 | while (1) { | |
bdb7ca67 | 952 | tcg_exec_all(); |
ac70aafc AB |
953 | |
954 | if (use_icount) { | |
40daca54 | 955 | int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
ac70aafc AB |
956 | |
957 | if (deadline == 0) { | |
40daca54 | 958 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); |
ac70aafc | 959 | } |
3b2319a3 | 960 | } |
6cabe1f3 | 961 | qemu_tcg_wait_io_event(); |
296af7c9 BS |
962 | } |
963 | ||
964 | return NULL; | |
965 | } | |
966 | ||
2ff09a40 | 967 | static void qemu_cpu_kick_thread(CPUState *cpu) |
cc015e9a PB |
968 | { |
969 | #ifndef _WIN32 | |
970 | int err; | |
971 | ||
814e612e | 972 | err = pthread_kill(cpu->thread->thread, SIG_IPI); |
cc015e9a PB |
973 | if (err) { |
974 | fprintf(stderr, "qemu:%s: %s", __func__, strerror(err)); | |
975 | exit(1); | |
976 | } | |
977 | #else /* _WIN32 */ | |
60e82579 | 978 | if (!qemu_cpu_is_self(cpu)) { |
ed9164a3 OH |
979 | CONTEXT tcgContext; |
980 | ||
981 | if (SuspendThread(cpu->hThread) == (DWORD)-1) { | |
7f1721df | 982 | fprintf(stderr, "qemu:%s: GetLastError:%lu\n", __func__, |
ed9164a3 OH |
983 | GetLastError()); |
984 | exit(1); | |
985 | } | |
986 | ||
987 | /* On multi-core systems, we are not sure that the thread is actually | |
988 | * suspended until we can get the context. | |
989 | */ | |
990 | tcgContext.ContextFlags = CONTEXT_CONTROL; | |
991 | while (GetThreadContext(cpu->hThread, &tcgContext) != 0) { | |
992 | continue; | |
993 | } | |
994 | ||
cc015e9a | 995 | cpu_signal(0); |
ed9164a3 OH |
996 | |
997 | if (ResumeThread(cpu->hThread) == (DWORD)-1) { | |
7f1721df | 998 | fprintf(stderr, "qemu:%s: GetLastError:%lu\n", __func__, |
ed9164a3 OH |
999 | GetLastError()); |
1000 | exit(1); | |
1001 | } | |
cc015e9a PB |
1002 | } |
1003 | #endif | |
1004 | } | |
1005 | ||
c08d7424 | 1006 | void qemu_cpu_kick(CPUState *cpu) |
296af7c9 | 1007 | { |
f5c121b8 | 1008 | qemu_cond_broadcast(cpu->halt_cond); |
216fc9a4 | 1009 | if (!tcg_enabled() && !cpu->thread_kicked) { |
2ff09a40 | 1010 | qemu_cpu_kick_thread(cpu); |
216fc9a4 | 1011 | cpu->thread_kicked = true; |
aa2c364b | 1012 | } |
296af7c9 BS |
1013 | } |
1014 | ||
46d62fac | 1015 | void qemu_cpu_kick_self(void) |
296af7c9 | 1016 | { |
b55c22c6 | 1017 | #ifndef _WIN32 |
4917cf44 | 1018 | assert(current_cpu); |
296af7c9 | 1019 | |
4917cf44 AF |
1020 | if (!current_cpu->thread_kicked) { |
1021 | qemu_cpu_kick_thread(current_cpu); | |
1022 | current_cpu->thread_kicked = true; | |
296af7c9 | 1023 | } |
b55c22c6 PB |
1024 | #else |
1025 | abort(); | |
1026 | #endif | |
296af7c9 BS |
1027 | } |
1028 | ||
60e82579 | 1029 | bool qemu_cpu_is_self(CPUState *cpu) |
296af7c9 | 1030 | { |
814e612e | 1031 | return qemu_thread_is_self(cpu->thread); |
296af7c9 BS |
1032 | } |
1033 | ||
aa723c23 JQ |
1034 | static bool qemu_in_vcpu_thread(void) |
1035 | { | |
4917cf44 | 1036 | return current_cpu && qemu_cpu_is_self(current_cpu); |
aa723c23 JQ |
1037 | } |
1038 | ||
296af7c9 BS |
1039 | void qemu_mutex_lock_iothread(void) |
1040 | { | |
c7f0f3b1 | 1041 | if (!tcg_enabled()) { |
296af7c9 | 1042 | qemu_mutex_lock(&qemu_global_mutex); |
1a28cac3 | 1043 | } else { |
46daff13 | 1044 | iothread_requesting_mutex = true; |
1a28cac3 | 1045 | if (qemu_mutex_trylock(&qemu_global_mutex)) { |
182735ef | 1046 | qemu_cpu_kick_thread(first_cpu); |
1a28cac3 MT |
1047 | qemu_mutex_lock(&qemu_global_mutex); |
1048 | } | |
46daff13 PB |
1049 | iothread_requesting_mutex = false; |
1050 | qemu_cond_broadcast(&qemu_io_proceeded_cond); | |
1a28cac3 | 1051 | } |
296af7c9 BS |
1052 | } |
1053 | ||
1054 | void qemu_mutex_unlock_iothread(void) | |
1055 | { | |
1056 | qemu_mutex_unlock(&qemu_global_mutex); | |
1057 | } | |
1058 | ||
1059 | static int all_vcpus_paused(void) | |
1060 | { | |
bdc44640 | 1061 | CPUState *cpu; |
296af7c9 | 1062 | |
bdc44640 | 1063 | CPU_FOREACH(cpu) { |
182735ef | 1064 | if (!cpu->stopped) { |
296af7c9 | 1065 | return 0; |
0ab07c62 | 1066 | } |
296af7c9 BS |
1067 | } |
1068 | ||
1069 | return 1; | |
1070 | } | |
1071 | ||
1072 | void pause_all_vcpus(void) | |
1073 | { | |
bdc44640 | 1074 | CPUState *cpu; |
296af7c9 | 1075 | |
40daca54 | 1076 | qemu_clock_enable(QEMU_CLOCK_VIRTUAL, false); |
bdc44640 | 1077 | CPU_FOREACH(cpu) { |
182735ef AF |
1078 | cpu->stop = true; |
1079 | qemu_cpu_kick(cpu); | |
296af7c9 BS |
1080 | } |
1081 | ||
aa723c23 | 1082 | if (qemu_in_vcpu_thread()) { |
d798e974 JK |
1083 | cpu_stop_current(); |
1084 | if (!kvm_enabled()) { | |
bdc44640 | 1085 | CPU_FOREACH(cpu) { |
182735ef AF |
1086 | cpu->stop = false; |
1087 | cpu->stopped = true; | |
d798e974 JK |
1088 | } |
1089 | return; | |
1090 | } | |
1091 | } | |
1092 | ||
296af7c9 | 1093 | while (!all_vcpus_paused()) { |
be7d6c57 | 1094 | qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex); |
bdc44640 | 1095 | CPU_FOREACH(cpu) { |
182735ef | 1096 | qemu_cpu_kick(cpu); |
296af7c9 BS |
1097 | } |
1098 | } | |
1099 | } | |
1100 | ||
2993683b IM |
1101 | void cpu_resume(CPUState *cpu) |
1102 | { | |
1103 | cpu->stop = false; | |
1104 | cpu->stopped = false; | |
1105 | qemu_cpu_kick(cpu); | |
1106 | } | |
1107 | ||
296af7c9 BS |
1108 | void resume_all_vcpus(void) |
1109 | { | |
bdc44640 | 1110 | CPUState *cpu; |
296af7c9 | 1111 | |
40daca54 | 1112 | qemu_clock_enable(QEMU_CLOCK_VIRTUAL, true); |
bdc44640 | 1113 | CPU_FOREACH(cpu) { |
182735ef | 1114 | cpu_resume(cpu); |
296af7c9 BS |
1115 | } |
1116 | } | |
1117 | ||
e5ab30a2 | 1118 | static void qemu_tcg_init_vcpu(CPUState *cpu) |
296af7c9 | 1119 | { |
296af7c9 BS |
1120 | /* share a single thread for all cpus with TCG */ |
1121 | if (!tcg_cpu_thread) { | |
814e612e | 1122 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1123 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1124 | qemu_cond_init(cpu->halt_cond); | |
1125 | tcg_halt_cond = cpu->halt_cond; | |
c3586ba7 | 1126 | qemu_thread_create(cpu->thread, qemu_tcg_cpu_thread_fn, cpu, |
1ecf47bf PB |
1127 | QEMU_THREAD_JOINABLE); |
1128 | #ifdef _WIN32 | |
814e612e | 1129 | cpu->hThread = qemu_thread_get_handle(cpu->thread); |
1ecf47bf | 1130 | #endif |
61a46217 | 1131 | while (!cpu->created) { |
18a85728 | 1132 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 1133 | } |
814e612e | 1134 | tcg_cpu_thread = cpu->thread; |
296af7c9 | 1135 | } else { |
814e612e | 1136 | cpu->thread = tcg_cpu_thread; |
f5c121b8 | 1137 | cpu->halt_cond = tcg_halt_cond; |
296af7c9 BS |
1138 | } |
1139 | } | |
1140 | ||
48a106bd | 1141 | static void qemu_kvm_start_vcpu(CPUState *cpu) |
296af7c9 | 1142 | { |
814e612e | 1143 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1144 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1145 | qemu_cond_init(cpu->halt_cond); | |
48a106bd | 1146 | qemu_thread_create(cpu->thread, qemu_kvm_cpu_thread_fn, cpu, |
1ecf47bf | 1147 | QEMU_THREAD_JOINABLE); |
61a46217 | 1148 | while (!cpu->created) { |
18a85728 | 1149 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 1150 | } |
296af7c9 BS |
1151 | } |
1152 | ||
10a9021d | 1153 | static void qemu_dummy_start_vcpu(CPUState *cpu) |
c7f0f3b1 | 1154 | { |
814e612e | 1155 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1156 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1157 | qemu_cond_init(cpu->halt_cond); | |
10a9021d | 1158 | qemu_thread_create(cpu->thread, qemu_dummy_cpu_thread_fn, cpu, |
c7f0f3b1 | 1159 | QEMU_THREAD_JOINABLE); |
61a46217 | 1160 | while (!cpu->created) { |
c7f0f3b1 AL |
1161 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
1162 | } | |
1163 | } | |
1164 | ||
c643bed9 | 1165 | void qemu_init_vcpu(CPUState *cpu) |
296af7c9 | 1166 | { |
ce3960eb AF |
1167 | cpu->nr_cores = smp_cores; |
1168 | cpu->nr_threads = smp_threads; | |
f324e766 | 1169 | cpu->stopped = true; |
0ab07c62 | 1170 | if (kvm_enabled()) { |
48a106bd | 1171 | qemu_kvm_start_vcpu(cpu); |
c7f0f3b1 | 1172 | } else if (tcg_enabled()) { |
e5ab30a2 | 1173 | qemu_tcg_init_vcpu(cpu); |
c7f0f3b1 | 1174 | } else { |
10a9021d | 1175 | qemu_dummy_start_vcpu(cpu); |
0ab07c62 | 1176 | } |
296af7c9 BS |
1177 | } |
1178 | ||
b4a3d965 | 1179 | void cpu_stop_current(void) |
296af7c9 | 1180 | { |
4917cf44 AF |
1181 | if (current_cpu) { |
1182 | current_cpu->stop = false; | |
1183 | current_cpu->stopped = true; | |
1184 | cpu_exit(current_cpu); | |
67bb172f | 1185 | qemu_cond_signal(&qemu_pause_cond); |
b4a3d965 | 1186 | } |
296af7c9 BS |
1187 | } |
1188 | ||
56983463 | 1189 | int vm_stop(RunState state) |
296af7c9 | 1190 | { |
aa723c23 | 1191 | if (qemu_in_vcpu_thread()) { |
1dfb4dd9 | 1192 | qemu_system_vmstop_request(state); |
296af7c9 BS |
1193 | /* |
1194 | * FIXME: should not return to device code in case | |
1195 | * vm_stop() has been requested. | |
1196 | */ | |
b4a3d965 | 1197 | cpu_stop_current(); |
56983463 | 1198 | return 0; |
296af7c9 | 1199 | } |
56983463 KW |
1200 | |
1201 | return do_vm_stop(state); | |
296af7c9 BS |
1202 | } |
1203 | ||
8a9236f1 LC |
1204 | /* does a state transition even if the VM is already stopped, |
1205 | current state is forgotten forever */ | |
56983463 | 1206 | int vm_stop_force_state(RunState state) |
8a9236f1 LC |
1207 | { |
1208 | if (runstate_is_running()) { | |
56983463 | 1209 | return vm_stop(state); |
8a9236f1 LC |
1210 | } else { |
1211 | runstate_set(state); | |
594a45ce KW |
1212 | /* Make sure to return an error if the flush in a previous vm_stop() |
1213 | * failed. */ | |
1214 | return bdrv_flush_all(); | |
8a9236f1 LC |
1215 | } |
1216 | } | |
1217 | ||
9349b4f9 | 1218 | static int tcg_cpu_exec(CPUArchState *env) |
296af7c9 BS |
1219 | { |
1220 | int ret; | |
1221 | #ifdef CONFIG_PROFILER | |
1222 | int64_t ti; | |
1223 | #endif | |
1224 | ||
1225 | #ifdef CONFIG_PROFILER | |
1226 | ti = profile_getclock(); | |
1227 | #endif | |
1228 | if (use_icount) { | |
1229 | int64_t count; | |
ac70aafc | 1230 | int64_t deadline; |
296af7c9 BS |
1231 | int decr; |
1232 | qemu_icount -= (env->icount_decr.u16.low + env->icount_extra); | |
1233 | env->icount_decr.u16.low = 0; | |
1234 | env->icount_extra = 0; | |
40daca54 | 1235 | deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
ac70aafc AB |
1236 | |
1237 | /* Maintain prior (possibly buggy) behaviour where if no deadline | |
40daca54 | 1238 | * was set (as there is no QEMU_CLOCK_VIRTUAL timer) or it is more than |
ac70aafc AB |
1239 | * INT32_MAX nanoseconds ahead, we still use INT32_MAX |
1240 | * nanoseconds. | |
1241 | */ | |
1242 | if ((deadline < 0) || (deadline > INT32_MAX)) { | |
1243 | deadline = INT32_MAX; | |
1244 | } | |
1245 | ||
1246 | count = qemu_icount_round(deadline); | |
296af7c9 BS |
1247 | qemu_icount += count; |
1248 | decr = (count > 0xffff) ? 0xffff : count; | |
1249 | count -= decr; | |
1250 | env->icount_decr.u16.low = decr; | |
1251 | env->icount_extra = count; | |
1252 | } | |
1253 | ret = cpu_exec(env); | |
1254 | #ifdef CONFIG_PROFILER | |
1255 | qemu_time += profile_getclock() - ti; | |
1256 | #endif | |
1257 | if (use_icount) { | |
1258 | /* Fold pending instructions back into the | |
1259 | instruction counter, and clear the interrupt flag. */ | |
1260 | qemu_icount -= (env->icount_decr.u16.low | |
1261 | + env->icount_extra); | |
1262 | env->icount_decr.u32 = 0; | |
1263 | env->icount_extra = 0; | |
1264 | } | |
1265 | return ret; | |
1266 | } | |
1267 | ||
bdb7ca67 | 1268 | static void tcg_exec_all(void) |
296af7c9 | 1269 | { |
9a36085b JK |
1270 | int r; |
1271 | ||
40daca54 AB |
1272 | /* Account partial waits to QEMU_CLOCK_VIRTUAL. */ |
1273 | qemu_clock_warp(QEMU_CLOCK_VIRTUAL); | |
ab33fcda | 1274 | |
0ab07c62 | 1275 | if (next_cpu == NULL) { |
296af7c9 | 1276 | next_cpu = first_cpu; |
0ab07c62 | 1277 | } |
bdc44640 | 1278 | for (; next_cpu != NULL && !exit_request; next_cpu = CPU_NEXT(next_cpu)) { |
182735ef AF |
1279 | CPUState *cpu = next_cpu; |
1280 | CPUArchState *env = cpu->env_ptr; | |
296af7c9 | 1281 | |
40daca54 | 1282 | qemu_clock_enable(QEMU_CLOCK_VIRTUAL, |
ed2803da | 1283 | (cpu->singlestep_enabled & SSTEP_NOTIMER) == 0); |
296af7c9 | 1284 | |
a1fcaa73 | 1285 | if (cpu_can_run(cpu)) { |
bdb7ca67 | 1286 | r = tcg_cpu_exec(env); |
9a36085b | 1287 | if (r == EXCP_DEBUG) { |
91325046 | 1288 | cpu_handle_guest_debug(cpu); |
3c638d06 JK |
1289 | break; |
1290 | } | |
f324e766 | 1291 | } else if (cpu->stop || cpu->stopped) { |
296af7c9 BS |
1292 | break; |
1293 | } | |
1294 | } | |
c629a4bc | 1295 | exit_request = 0; |
296af7c9 BS |
1296 | } |
1297 | ||
1298 | void set_numa_modes(void) | |
1299 | { | |
1b1ed8dc | 1300 | CPUState *cpu; |
296af7c9 BS |
1301 | int i; |
1302 | ||
bdc44640 | 1303 | CPU_FOREACH(cpu) { |
296af7c9 | 1304 | for (i = 0; i < nb_numa_nodes; i++) { |
55e5c285 | 1305 | if (test_bit(cpu->cpu_index, node_cpumask[i])) { |
1b1ed8dc | 1306 | cpu->numa_node = i; |
296af7c9 BS |
1307 | } |
1308 | } | |
1309 | } | |
1310 | } | |
1311 | ||
9a78eead | 1312 | void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg) |
262353cb BS |
1313 | { |
1314 | /* XXX: implement xxx_cpu_list for targets that still miss it */ | |
e916cbf8 PM |
1315 | #if defined(cpu_list) |
1316 | cpu_list(f, cpu_fprintf); | |
262353cb BS |
1317 | #endif |
1318 | } | |
de0b36b6 LC |
1319 | |
1320 | CpuInfoList *qmp_query_cpus(Error **errp) | |
1321 | { | |
1322 | CpuInfoList *head = NULL, *cur_item = NULL; | |
182735ef | 1323 | CPUState *cpu; |
de0b36b6 | 1324 | |
bdc44640 | 1325 | CPU_FOREACH(cpu) { |
de0b36b6 | 1326 | CpuInfoList *info; |
182735ef AF |
1327 | #if defined(TARGET_I386) |
1328 | X86CPU *x86_cpu = X86_CPU(cpu); | |
1329 | CPUX86State *env = &x86_cpu->env; | |
1330 | #elif defined(TARGET_PPC) | |
1331 | PowerPCCPU *ppc_cpu = POWERPC_CPU(cpu); | |
1332 | CPUPPCState *env = &ppc_cpu->env; | |
1333 | #elif defined(TARGET_SPARC) | |
1334 | SPARCCPU *sparc_cpu = SPARC_CPU(cpu); | |
1335 | CPUSPARCState *env = &sparc_cpu->env; | |
1336 | #elif defined(TARGET_MIPS) | |
1337 | MIPSCPU *mips_cpu = MIPS_CPU(cpu); | |
1338 | CPUMIPSState *env = &mips_cpu->env; | |
1339 | #endif | |
de0b36b6 | 1340 | |
cb446eca | 1341 | cpu_synchronize_state(cpu); |
de0b36b6 LC |
1342 | |
1343 | info = g_malloc0(sizeof(*info)); | |
1344 | info->value = g_malloc0(sizeof(*info->value)); | |
55e5c285 | 1345 | info->value->CPU = cpu->cpu_index; |
182735ef | 1346 | info->value->current = (cpu == first_cpu); |
259186a7 | 1347 | info->value->halted = cpu->halted; |
9f09e18a | 1348 | info->value->thread_id = cpu->thread_id; |
de0b36b6 LC |
1349 | #if defined(TARGET_I386) |
1350 | info->value->has_pc = true; | |
1351 | info->value->pc = env->eip + env->segs[R_CS].base; | |
1352 | #elif defined(TARGET_PPC) | |
1353 | info->value->has_nip = true; | |
1354 | info->value->nip = env->nip; | |
1355 | #elif defined(TARGET_SPARC) | |
1356 | info->value->has_pc = true; | |
1357 | info->value->pc = env->pc; | |
1358 | info->value->has_npc = true; | |
1359 | info->value->npc = env->npc; | |
1360 | #elif defined(TARGET_MIPS) | |
1361 | info->value->has_PC = true; | |
1362 | info->value->PC = env->active_tc.PC; | |
1363 | #endif | |
1364 | ||
1365 | /* XXX: waiting for the qapi to support GSList */ | |
1366 | if (!cur_item) { | |
1367 | head = cur_item = info; | |
1368 | } else { | |
1369 | cur_item->next = info; | |
1370 | cur_item = info; | |
1371 | } | |
1372 | } | |
1373 | ||
1374 | return head; | |
1375 | } | |
0cfd6a9a LC |
1376 | |
1377 | void qmp_memsave(int64_t addr, int64_t size, const char *filename, | |
1378 | bool has_cpu, int64_t cpu_index, Error **errp) | |
1379 | { | |
1380 | FILE *f; | |
1381 | uint32_t l; | |
55e5c285 | 1382 | CPUState *cpu; |
0cfd6a9a LC |
1383 | uint8_t buf[1024]; |
1384 | ||
1385 | if (!has_cpu) { | |
1386 | cpu_index = 0; | |
1387 | } | |
1388 | ||
151d1322 AF |
1389 | cpu = qemu_get_cpu(cpu_index); |
1390 | if (cpu == NULL) { | |
0cfd6a9a LC |
1391 | error_set(errp, QERR_INVALID_PARAMETER_VALUE, "cpu-index", |
1392 | "a CPU number"); | |
1393 | return; | |
1394 | } | |
1395 | ||
1396 | f = fopen(filename, "wb"); | |
1397 | if (!f) { | |
618da851 | 1398 | error_setg_file_open(errp, errno, filename); |
0cfd6a9a LC |
1399 | return; |
1400 | } | |
1401 | ||
1402 | while (size != 0) { | |
1403 | l = sizeof(buf); | |
1404 | if (l > size) | |
1405 | l = size; | |
2f4d0f59 AK |
1406 | if (cpu_memory_rw_debug(cpu, addr, buf, l, 0) != 0) { |
1407 | error_setg(errp, "Invalid addr 0x%016" PRIx64 "specified", addr); | |
1408 | goto exit; | |
1409 | } | |
0cfd6a9a LC |
1410 | if (fwrite(buf, 1, l, f) != l) { |
1411 | error_set(errp, QERR_IO_ERROR); | |
1412 | goto exit; | |
1413 | } | |
1414 | addr += l; | |
1415 | size -= l; | |
1416 | } | |
1417 | ||
1418 | exit: | |
1419 | fclose(f); | |
1420 | } | |
6d3962bf LC |
1421 | |
1422 | void qmp_pmemsave(int64_t addr, int64_t size, const char *filename, | |
1423 | Error **errp) | |
1424 | { | |
1425 | FILE *f; | |
1426 | uint32_t l; | |
1427 | uint8_t buf[1024]; | |
1428 | ||
1429 | f = fopen(filename, "wb"); | |
1430 | if (!f) { | |
618da851 | 1431 | error_setg_file_open(errp, errno, filename); |
6d3962bf LC |
1432 | return; |
1433 | } | |
1434 | ||
1435 | while (size != 0) { | |
1436 | l = sizeof(buf); | |
1437 | if (l > size) | |
1438 | l = size; | |
1439 | cpu_physical_memory_rw(addr, buf, l, 0); | |
1440 | if (fwrite(buf, 1, l, f) != l) { | |
1441 | error_set(errp, QERR_IO_ERROR); | |
1442 | goto exit; | |
1443 | } | |
1444 | addr += l; | |
1445 | size -= l; | |
1446 | } | |
1447 | ||
1448 | exit: | |
1449 | fclose(f); | |
1450 | } | |
ab49ab5c LC |
1451 | |
1452 | void qmp_inject_nmi(Error **errp) | |
1453 | { | |
1454 | #if defined(TARGET_I386) | |
182735ef AF |
1455 | CPUState *cs; |
1456 | ||
bdc44640 | 1457 | CPU_FOREACH(cs) { |
182735ef AF |
1458 | X86CPU *cpu = X86_CPU(cs); |
1459 | CPUX86State *env = &cpu->env; | |
ab49ab5c | 1460 | |
02c09195 | 1461 | if (!env->apic_state) { |
182735ef | 1462 | cpu_interrupt(cs, CPU_INTERRUPT_NMI); |
02c09195 JK |
1463 | } else { |
1464 | apic_deliver_nmi(env->apic_state); | |
1465 | } | |
ab49ab5c | 1466 | } |
7f7f9752 ED |
1467 | #elif defined(TARGET_S390X) |
1468 | CPUState *cs; | |
1469 | S390CPU *cpu; | |
1470 | ||
bdc44640 | 1471 | CPU_FOREACH(cs) { |
7f7f9752 ED |
1472 | cpu = S390_CPU(cs); |
1473 | if (cpu->env.cpu_num == monitor_get_cpu_index()) { | |
1474 | if (s390_cpu_restart(S390_CPU(cs)) == -1) { | |
1475 | error_set(errp, QERR_UNSUPPORTED); | |
1476 | return; | |
1477 | } | |
1478 | break; | |
1479 | } | |
1480 | } | |
ab49ab5c LC |
1481 | #else |
1482 | error_set(errp, QERR_UNSUPPORTED); | |
1483 | #endif | |
1484 | } |