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cpus: Pass CPUState to flush_queued_work()
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CommitLineData
296af7c9
BS
1/*
2 * QEMU System Emulator
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25/* Needed early for CONFIG_BSD etc. */
26#include "config-host.h"
27
28#include "monitor.h"
29#include "sysemu.h"
30#include "gdbstub.h"
31#include "dma.h"
32#include "kvm.h"
de0b36b6 33#include "qmp-commands.h"
296af7c9 34
96284e89 35#include "qemu-thread.h"
296af7c9 36#include "cpus.h"
8156be56 37#include "qtest.h"
44a9b356 38#include "main-loop.h"
ee785fed 39#include "bitmap.h"
0ff0fc19
JK
40
41#ifndef _WIN32
a8486bc9 42#include "compatfd.h"
0ff0fc19 43#endif
296af7c9 44
6d9cb73c
JK
45#ifdef CONFIG_LINUX
46
47#include <sys/prctl.h>
48
c0532a76
MT
49#ifndef PR_MCE_KILL
50#define PR_MCE_KILL 33
51#endif
52
6d9cb73c
JK
53#ifndef PR_MCE_KILL_SET
54#define PR_MCE_KILL_SET 1
55#endif
56
57#ifndef PR_MCE_KILL_EARLY
58#define PR_MCE_KILL_EARLY 1
59#endif
60
61#endif /* CONFIG_LINUX */
62
9349b4f9 63static CPUArchState *next_cpu;
296af7c9 64
ac873f1e
PM
65static bool cpu_thread_is_idle(CPUArchState *env)
66{
4fdeee7c
AF
67 CPUState *cpu = ENV_GET_CPU(env);
68
c64ca814 69 if (cpu->stop || cpu->queued_work_first) {
ac873f1e
PM
70 return false;
71 }
f324e766 72 if (cpu->stopped || !runstate_is_running()) {
ac873f1e
PM
73 return true;
74 }
7ae26bd4
PM
75 if (!env->halted || qemu_cpu_has_work(env) ||
76 kvm_async_interrupts_enabled()) {
ac873f1e
PM
77 return false;
78 }
79 return true;
80}
81
82static bool all_cpu_threads_idle(void)
83{
84 CPUArchState *env;
85
86 for (env = first_cpu; env != NULL; env = env->next_cpu) {
87 if (!cpu_thread_is_idle(env)) {
88 return false;
89 }
90 }
91 return true;
92}
93
946fb27c
PB
94/***********************************************************/
95/* guest cycle counter */
96
97/* Conversion factor from emulated instructions to virtual clock ticks. */
98static int icount_time_shift;
99/* Arbitrarily pick 1MIPS as the minimum allowable speed. */
100#define MAX_ICOUNT_SHIFT 10
101/* Compensate for varying guest execution speed. */
102static int64_t qemu_icount_bias;
103static QEMUTimer *icount_rt_timer;
104static QEMUTimer *icount_vm_timer;
105static QEMUTimer *icount_warp_timer;
106static int64_t vm_clock_warp_start;
107static int64_t qemu_icount;
108
109typedef struct TimersState {
110 int64_t cpu_ticks_prev;
111 int64_t cpu_ticks_offset;
112 int64_t cpu_clock_offset;
113 int32_t cpu_ticks_enabled;
114 int64_t dummy;
115} TimersState;
116
117TimersState timers_state;
118
119/* Return the virtual CPU time, based on the instruction counter. */
120int64_t cpu_get_icount(void)
121{
122 int64_t icount;
9349b4f9 123 CPUArchState *env = cpu_single_env;
946fb27c
PB
124
125 icount = qemu_icount;
126 if (env) {
127 if (!can_do_io(env)) {
128 fprintf(stderr, "Bad clock read\n");
129 }
130 icount -= (env->icount_decr.u16.low + env->icount_extra);
131 }
132 return qemu_icount_bias + (icount << icount_time_shift);
133}
134
135/* return the host CPU cycle counter and handle stop/restart */
136int64_t cpu_get_ticks(void)
137{
138 if (use_icount) {
139 return cpu_get_icount();
140 }
141 if (!timers_state.cpu_ticks_enabled) {
142 return timers_state.cpu_ticks_offset;
143 } else {
144 int64_t ticks;
145 ticks = cpu_get_real_ticks();
146 if (timers_state.cpu_ticks_prev > ticks) {
147 /* Note: non increasing ticks may happen if the host uses
148 software suspend */
149 timers_state.cpu_ticks_offset += timers_state.cpu_ticks_prev - ticks;
150 }
151 timers_state.cpu_ticks_prev = ticks;
152 return ticks + timers_state.cpu_ticks_offset;
153 }
154}
155
156/* return the host CPU monotonic timer and handle stop/restart */
157int64_t cpu_get_clock(void)
158{
159 int64_t ti;
160 if (!timers_state.cpu_ticks_enabled) {
161 return timers_state.cpu_clock_offset;
162 } else {
163 ti = get_clock();
164 return ti + timers_state.cpu_clock_offset;
165 }
166}
167
168/* enable cpu_get_ticks() */
169void cpu_enable_ticks(void)
170{
171 if (!timers_state.cpu_ticks_enabled) {
172 timers_state.cpu_ticks_offset -= cpu_get_real_ticks();
173 timers_state.cpu_clock_offset -= get_clock();
174 timers_state.cpu_ticks_enabled = 1;
175 }
176}
177
178/* disable cpu_get_ticks() : the clock is stopped. You must not call
179 cpu_get_ticks() after that. */
180void cpu_disable_ticks(void)
181{
182 if (timers_state.cpu_ticks_enabled) {
183 timers_state.cpu_ticks_offset = cpu_get_ticks();
184 timers_state.cpu_clock_offset = cpu_get_clock();
185 timers_state.cpu_ticks_enabled = 0;
186 }
187}
188
189/* Correlation between real and virtual time is always going to be
190 fairly approximate, so ignore small variation.
191 When the guest is idle real and virtual time will be aligned in
192 the IO wait loop. */
193#define ICOUNT_WOBBLE (get_ticks_per_sec() / 10)
194
195static void icount_adjust(void)
196{
197 int64_t cur_time;
198 int64_t cur_icount;
199 int64_t delta;
200 static int64_t last_delta;
201 /* If the VM is not running, then do nothing. */
202 if (!runstate_is_running()) {
203 return;
204 }
205 cur_time = cpu_get_clock();
206 cur_icount = qemu_get_clock_ns(vm_clock);
207 delta = cur_icount - cur_time;
208 /* FIXME: This is a very crude algorithm, somewhat prone to oscillation. */
209 if (delta > 0
210 && last_delta + ICOUNT_WOBBLE < delta * 2
211 && icount_time_shift > 0) {
212 /* The guest is getting too far ahead. Slow time down. */
213 icount_time_shift--;
214 }
215 if (delta < 0
216 && last_delta - ICOUNT_WOBBLE > delta * 2
217 && icount_time_shift < MAX_ICOUNT_SHIFT) {
218 /* The guest is getting too far behind. Speed time up. */
219 icount_time_shift++;
220 }
221 last_delta = delta;
222 qemu_icount_bias = cur_icount - (qemu_icount << icount_time_shift);
223}
224
225static void icount_adjust_rt(void *opaque)
226{
227 qemu_mod_timer(icount_rt_timer,
228 qemu_get_clock_ms(rt_clock) + 1000);
229 icount_adjust();
230}
231
232static void icount_adjust_vm(void *opaque)
233{
234 qemu_mod_timer(icount_vm_timer,
235 qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10);
236 icount_adjust();
237}
238
239static int64_t qemu_icount_round(int64_t count)
240{
241 return (count + (1 << icount_time_shift) - 1) >> icount_time_shift;
242}
243
244static void icount_warp_rt(void *opaque)
245{
246 if (vm_clock_warp_start == -1) {
247 return;
248 }
249
250 if (runstate_is_running()) {
251 int64_t clock = qemu_get_clock_ns(rt_clock);
252 int64_t warp_delta = clock - vm_clock_warp_start;
253 if (use_icount == 1) {
254 qemu_icount_bias += warp_delta;
255 } else {
256 /*
257 * In adaptive mode, do not let the vm_clock run too
258 * far ahead of real time.
259 */
260 int64_t cur_time = cpu_get_clock();
261 int64_t cur_icount = qemu_get_clock_ns(vm_clock);
262 int64_t delta = cur_time - cur_icount;
263 qemu_icount_bias += MIN(warp_delta, delta);
264 }
265 if (qemu_clock_expired(vm_clock)) {
266 qemu_notify_event();
267 }
268 }
269 vm_clock_warp_start = -1;
270}
271
8156be56
PB
272void qtest_clock_warp(int64_t dest)
273{
274 int64_t clock = qemu_get_clock_ns(vm_clock);
275 assert(qtest_enabled());
276 while (clock < dest) {
277 int64_t deadline = qemu_clock_deadline(vm_clock);
278 int64_t warp = MIN(dest - clock, deadline);
279 qemu_icount_bias += warp;
280 qemu_run_timers(vm_clock);
281 clock = qemu_get_clock_ns(vm_clock);
282 }
283 qemu_notify_event();
284}
285
946fb27c
PB
286void qemu_clock_warp(QEMUClock *clock)
287{
288 int64_t deadline;
289
290 /*
291 * There are too many global variables to make the "warp" behavior
292 * applicable to other clocks. But a clock argument removes the
293 * need for if statements all over the place.
294 */
295 if (clock != vm_clock || !use_icount) {
296 return;
297 }
298
299 /*
300 * If the CPUs have been sleeping, advance the vm_clock timer now. This
301 * ensures that the deadline for the timer is computed correctly below.
302 * This also makes sure that the insn counter is synchronized before the
303 * CPU starts running, in case the CPU is woken by an event other than
304 * the earliest vm_clock timer.
305 */
306 icount_warp_rt(NULL);
307 if (!all_cpu_threads_idle() || !qemu_clock_has_timers(vm_clock)) {
308 qemu_del_timer(icount_warp_timer);
309 return;
310 }
311
8156be56
PB
312 if (qtest_enabled()) {
313 /* When testing, qtest commands advance icount. */
314 return;
315 }
316
946fb27c
PB
317 vm_clock_warp_start = qemu_get_clock_ns(rt_clock);
318 deadline = qemu_clock_deadline(vm_clock);
319 if (deadline > 0) {
320 /*
321 * Ensure the vm_clock proceeds even when the virtual CPU goes to
322 * sleep. Otherwise, the CPU might be waiting for a future timer
323 * interrupt to wake it up, but the interrupt never comes because
324 * the vCPU isn't running any insns and thus doesn't advance the
325 * vm_clock.
326 *
327 * An extreme solution for this problem would be to never let VCPUs
328 * sleep in icount mode if there is a pending vm_clock timer; rather
329 * time could just advance to the next vm_clock event. Instead, we
330 * do stop VCPUs and only advance vm_clock after some "real" time,
331 * (related to the time left until the next event) has passed. This
332 * rt_clock timer will do this. This avoids that the warps are too
333 * visible externally---for example, you will not be sending network
07f35073 334 * packets continuously instead of every 100ms.
946fb27c
PB
335 */
336 qemu_mod_timer(icount_warp_timer, vm_clock_warp_start + deadline);
337 } else {
338 qemu_notify_event();
339 }
340}
341
342static const VMStateDescription vmstate_timers = {
343 .name = "timer",
344 .version_id = 2,
345 .minimum_version_id = 1,
346 .minimum_version_id_old = 1,
347 .fields = (VMStateField[]) {
348 VMSTATE_INT64(cpu_ticks_offset, TimersState),
349 VMSTATE_INT64(dummy, TimersState),
350 VMSTATE_INT64_V(cpu_clock_offset, TimersState, 2),
351 VMSTATE_END_OF_LIST()
352 }
353};
354
355void configure_icount(const char *option)
356{
357 vmstate_register(NULL, 0, &vmstate_timers, &timers_state);
358 if (!option) {
359 return;
360 }
361
362 icount_warp_timer = qemu_new_timer_ns(rt_clock, icount_warp_rt, NULL);
363 if (strcmp(option, "auto") != 0) {
364 icount_time_shift = strtol(option, NULL, 0);
365 use_icount = 1;
366 return;
367 }
368
369 use_icount = 2;
370
371 /* 125MIPS seems a reasonable initial guess at the guest speed.
372 It will be corrected fairly quickly anyway. */
373 icount_time_shift = 3;
374
375 /* Have both realtime and virtual time triggers for speed adjustment.
376 The realtime trigger catches emulated time passing too slowly,
377 the virtual time trigger catches emulated time passing too fast.
378 Realtime triggers occur even when idle, so use them less frequently
379 than VM triggers. */
380 icount_rt_timer = qemu_new_timer_ms(rt_clock, icount_adjust_rt, NULL);
381 qemu_mod_timer(icount_rt_timer,
382 qemu_get_clock_ms(rt_clock) + 1000);
383 icount_vm_timer = qemu_new_timer_ns(vm_clock, icount_adjust_vm, NULL);
384 qemu_mod_timer(icount_vm_timer,
385 qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10);
386}
387
296af7c9
BS
388/***********************************************************/
389void hw_error(const char *fmt, ...)
390{
391 va_list ap;
9349b4f9 392 CPUArchState *env;
296af7c9
BS
393
394 va_start(ap, fmt);
395 fprintf(stderr, "qemu: hardware error: ");
396 vfprintf(stderr, fmt, ap);
397 fprintf(stderr, "\n");
398 for(env = first_cpu; env != NULL; env = env->next_cpu) {
399 fprintf(stderr, "CPU #%d:\n", env->cpu_index);
6fd2a026 400 cpu_dump_state(env, stderr, fprintf, CPU_DUMP_FPU);
296af7c9
BS
401 }
402 va_end(ap);
403 abort();
404}
405
406void cpu_synchronize_all_states(void)
407{
9349b4f9 408 CPUArchState *cpu;
296af7c9
BS
409
410 for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
411 cpu_synchronize_state(cpu);
412 }
413}
414
415void cpu_synchronize_all_post_reset(void)
416{
9349b4f9 417 CPUArchState *cpu;
296af7c9
BS
418
419 for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
420 cpu_synchronize_post_reset(cpu);
421 }
422}
423
424void cpu_synchronize_all_post_init(void)
425{
9349b4f9 426 CPUArchState *cpu;
296af7c9
BS
427
428 for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
429 cpu_synchronize_post_init(cpu);
430 }
431}
432
2fa45344 433bool cpu_is_stopped(CPUState *cpu)
3ae9501c 434{
f324e766 435 return !runstate_is_running() || cpu->stopped;
3ae9501c
MT
436}
437
1dfb4dd9 438static void do_vm_stop(RunState state)
296af7c9 439{
1354869c 440 if (runstate_is_running()) {
296af7c9 441 cpu_disable_ticks();
296af7c9 442 pause_all_vcpus();
f5bbfba1 443 runstate_set(state);
1dfb4dd9 444 vm_state_notify(0, state);
922453bc 445 bdrv_drain_all();
55df6f33 446 bdrv_flush_all();
296af7c9
BS
447 monitor_protocol_event(QEVENT_STOP, NULL);
448 }
449}
450
a1fcaa73 451static bool cpu_can_run(CPUState *cpu)
296af7c9 452{
4fdeee7c 453 if (cpu->stop) {
a1fcaa73 454 return false;
0ab07c62 455 }
f324e766 456 if (cpu->stopped || !runstate_is_running()) {
a1fcaa73 457 return false;
0ab07c62 458 }
a1fcaa73 459 return true;
296af7c9
BS
460}
461
9349b4f9 462static void cpu_handle_guest_debug(CPUArchState *env)
83f338f7 463{
f324e766
AF
464 CPUState *cpu = ENV_GET_CPU(env);
465
3c638d06 466 gdb_set_stop_cpu(env);
8cf71710 467 qemu_system_debug_request();
f324e766 468 cpu->stopped = true;
3c638d06
JK
469}
470
714bd040
PB
471static void cpu_signal(int sig)
472{
473 if (cpu_single_env) {
474 cpu_exit(cpu_single_env);
475 }
476 exit_request = 1;
477}
714bd040 478
6d9cb73c
JK
479#ifdef CONFIG_LINUX
480static void sigbus_reraise(void)
481{
482 sigset_t set;
483 struct sigaction action;
484
485 memset(&action, 0, sizeof(action));
486 action.sa_handler = SIG_DFL;
487 if (!sigaction(SIGBUS, &action, NULL)) {
488 raise(SIGBUS);
489 sigemptyset(&set);
490 sigaddset(&set, SIGBUS);
491 sigprocmask(SIG_UNBLOCK, &set, NULL);
492 }
493 perror("Failed to re-raise SIGBUS!\n");
494 abort();
495}
496
497static void sigbus_handler(int n, struct qemu_signalfd_siginfo *siginfo,
498 void *ctx)
499{
500 if (kvm_on_sigbus(siginfo->ssi_code,
501 (void *)(intptr_t)siginfo->ssi_addr)) {
502 sigbus_reraise();
503 }
504}
505
506static void qemu_init_sigbus(void)
507{
508 struct sigaction action;
509
510 memset(&action, 0, sizeof(action));
511 action.sa_flags = SA_SIGINFO;
512 action.sa_sigaction = (void (*)(int, siginfo_t*, void*))sigbus_handler;
513 sigaction(SIGBUS, &action, NULL);
514
515 prctl(PR_MCE_KILL, PR_MCE_KILL_SET, PR_MCE_KILL_EARLY, 0, 0);
516}
517
9349b4f9 518static void qemu_kvm_eat_signals(CPUArchState *env)
1ab3c6c0
JK
519{
520 struct timespec ts = { 0, 0 };
521 siginfo_t siginfo;
522 sigset_t waitset;
523 sigset_t chkset;
524 int r;
525
526 sigemptyset(&waitset);
527 sigaddset(&waitset, SIG_IPI);
528 sigaddset(&waitset, SIGBUS);
529
530 do {
531 r = sigtimedwait(&waitset, &siginfo, &ts);
532 if (r == -1 && !(errno == EAGAIN || errno == EINTR)) {
533 perror("sigtimedwait");
534 exit(1);
535 }
536
537 switch (r) {
538 case SIGBUS:
539 if (kvm_on_sigbus_vcpu(env, siginfo.si_code, siginfo.si_addr)) {
540 sigbus_reraise();
541 }
542 break;
543 default:
544 break;
545 }
546
547 r = sigpending(&chkset);
548 if (r == -1) {
549 perror("sigpending");
550 exit(1);
551 }
552 } while (sigismember(&chkset, SIG_IPI) || sigismember(&chkset, SIGBUS));
1ab3c6c0
JK
553}
554
6d9cb73c
JK
555#else /* !CONFIG_LINUX */
556
557static void qemu_init_sigbus(void)
558{
559}
1ab3c6c0 560
9349b4f9 561static void qemu_kvm_eat_signals(CPUArchState *env)
1ab3c6c0
JK
562{
563}
6d9cb73c
JK
564#endif /* !CONFIG_LINUX */
565
296af7c9 566#ifndef _WIN32
55f8d6ac
JK
567static void dummy_signal(int sig)
568{
569}
55f8d6ac 570
9349b4f9 571static void qemu_kvm_init_cpu_signals(CPUArchState *env)
714bd040
PB
572{
573 int r;
574 sigset_t set;
575 struct sigaction sigact;
576
577 memset(&sigact, 0, sizeof(sigact));
578 sigact.sa_handler = dummy_signal;
579 sigaction(SIG_IPI, &sigact, NULL);
580
714bd040
PB
581 pthread_sigmask(SIG_BLOCK, NULL, &set);
582 sigdelset(&set, SIG_IPI);
714bd040
PB
583 sigdelset(&set, SIGBUS);
584 r = kvm_set_signal_mask(env, &set);
585 if (r) {
586 fprintf(stderr, "kvm_set_signal_mask: %s\n", strerror(-r));
587 exit(1);
588 }
589}
590
591static void qemu_tcg_init_cpu_signals(void)
592{
714bd040
PB
593 sigset_t set;
594 struct sigaction sigact;
595
596 memset(&sigact, 0, sizeof(sigact));
597 sigact.sa_handler = cpu_signal;
598 sigaction(SIG_IPI, &sigact, NULL);
599
600 sigemptyset(&set);
601 sigaddset(&set, SIG_IPI);
602 pthread_sigmask(SIG_UNBLOCK, &set, NULL);
714bd040
PB
603}
604
55f8d6ac 605#else /* _WIN32 */
9349b4f9 606static void qemu_kvm_init_cpu_signals(CPUArchState *env)
ff48eb5f 607{
714bd040
PB
608 abort();
609}
ff48eb5f 610
714bd040
PB
611static void qemu_tcg_init_cpu_signals(void)
612{
ff48eb5f 613}
714bd040 614#endif /* _WIN32 */
ff48eb5f 615
b2532d88 616static QemuMutex qemu_global_mutex;
46daff13
PB
617static QemuCond qemu_io_proceeded_cond;
618static bool iothread_requesting_mutex;
296af7c9
BS
619
620static QemuThread io_thread;
621
622static QemuThread *tcg_cpu_thread;
623static QemuCond *tcg_halt_cond;
624
296af7c9
BS
625/* cpu creation */
626static QemuCond qemu_cpu_cond;
627/* system init */
296af7c9 628static QemuCond qemu_pause_cond;
e82bcec2 629static QemuCond qemu_work_cond;
296af7c9 630
d3b12f5d 631void qemu_init_cpu_loop(void)
296af7c9 632{
6d9cb73c 633 qemu_init_sigbus();
ed94592b 634 qemu_cond_init(&qemu_cpu_cond);
ed94592b
AL
635 qemu_cond_init(&qemu_pause_cond);
636 qemu_cond_init(&qemu_work_cond);
46daff13 637 qemu_cond_init(&qemu_io_proceeded_cond);
296af7c9 638 qemu_mutex_init(&qemu_global_mutex);
296af7c9 639
b7680cb6 640 qemu_thread_get_self(&io_thread);
296af7c9
BS
641}
642
9349b4f9 643void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data)
e82bcec2 644{
60e82579 645 CPUState *cpu = ENV_GET_CPU(env);
e82bcec2
MT
646 struct qemu_work_item wi;
647
60e82579 648 if (qemu_cpu_is_self(cpu)) {
e82bcec2
MT
649 func(data);
650 return;
651 }
652
653 wi.func = func;
654 wi.data = data;
c64ca814
AF
655 if (cpu->queued_work_first == NULL) {
656 cpu->queued_work_first = &wi;
0ab07c62 657 } else {
c64ca814 658 cpu->queued_work_last->next = &wi;
0ab07c62 659 }
c64ca814 660 cpu->queued_work_last = &wi;
e82bcec2
MT
661 wi.next = NULL;
662 wi.done = false;
663
c08d7424 664 qemu_cpu_kick(cpu);
e82bcec2 665 while (!wi.done) {
9349b4f9 666 CPUArchState *self_env = cpu_single_env;
e82bcec2
MT
667
668 qemu_cond_wait(&qemu_work_cond, &qemu_global_mutex);
669 cpu_single_env = self_env;
670 }
671}
672
6d45b109 673static void flush_queued_work(CPUState *cpu)
e82bcec2
MT
674{
675 struct qemu_work_item *wi;
676
c64ca814 677 if (cpu->queued_work_first == NULL) {
e82bcec2 678 return;
0ab07c62 679 }
e82bcec2 680
c64ca814
AF
681 while ((wi = cpu->queued_work_first)) {
682 cpu->queued_work_first = wi->next;
e82bcec2
MT
683 wi->func(wi->data);
684 wi->done = true;
685 }
c64ca814 686 cpu->queued_work_last = NULL;
e82bcec2
MT
687 qemu_cond_broadcast(&qemu_work_cond);
688}
689
9349b4f9 690static void qemu_wait_io_event_common(CPUArchState *env)
296af7c9 691{
216fc9a4
AF
692 CPUState *cpu = ENV_GET_CPU(env);
693
4fdeee7c
AF
694 if (cpu->stop) {
695 cpu->stop = false;
f324e766 696 cpu->stopped = true;
296af7c9
BS
697 qemu_cond_signal(&qemu_pause_cond);
698 }
6d45b109 699 flush_queued_work(cpu);
216fc9a4 700 cpu->thread_kicked = false;
296af7c9
BS
701}
702
6cabe1f3 703static void qemu_tcg_wait_io_event(void)
296af7c9 704{
9349b4f9 705 CPUArchState *env;
6cabe1f3 706
16400322 707 while (all_cpu_threads_idle()) {
ab33fcda
PB
708 /* Start accounting real time to the virtual clock if the CPUs
709 are idle. */
710 qemu_clock_warp(vm_clock);
9705fbb5 711 qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex);
16400322 712 }
296af7c9 713
46daff13
PB
714 while (iothread_requesting_mutex) {
715 qemu_cond_wait(&qemu_io_proceeded_cond, &qemu_global_mutex);
716 }
6cabe1f3
JK
717
718 for (env = first_cpu; env != NULL; env = env->next_cpu) {
719 qemu_wait_io_event_common(env);
720 }
296af7c9
BS
721}
722
9349b4f9 723static void qemu_kvm_wait_io_event(CPUArchState *env)
296af7c9 724{
f5c121b8
AF
725 CPUState *cpu = ENV_GET_CPU(env);
726
16400322 727 while (cpu_thread_is_idle(env)) {
f5c121b8 728 qemu_cond_wait(cpu->halt_cond, &qemu_global_mutex);
16400322 729 }
296af7c9 730
5db5bdac 731 qemu_kvm_eat_signals(env);
296af7c9
BS
732 qemu_wait_io_event_common(env);
733}
734
7e97cd88 735static void *qemu_kvm_cpu_thread_fn(void *arg)
296af7c9 736{
9349b4f9 737 CPUArchState *env = arg;
814e612e 738 CPUState *cpu = ENV_GET_CPU(env);
84b4915d 739 int r;
296af7c9 740
6164e6d6 741 qemu_mutex_lock(&qemu_global_mutex);
814e612e 742 qemu_thread_get_self(cpu->thread);
dc7a09cf 743 env->thread_id = qemu_get_thread_id();
e479c207 744 cpu_single_env = env;
296af7c9 745
84b4915d
JK
746 r = kvm_init_vcpu(env);
747 if (r < 0) {
748 fprintf(stderr, "kvm_init_vcpu failed: %s\n", strerror(-r));
749 exit(1);
750 }
296af7c9 751
55f8d6ac 752 qemu_kvm_init_cpu_signals(env);
296af7c9
BS
753
754 /* signal CPU creation */
61a46217 755 cpu->created = true;
296af7c9
BS
756 qemu_cond_signal(&qemu_cpu_cond);
757
296af7c9 758 while (1) {
a1fcaa73 759 if (cpu_can_run(cpu)) {
6792a57b 760 r = kvm_cpu_exec(env);
83f338f7 761 if (r == EXCP_DEBUG) {
1009d2ed 762 cpu_handle_guest_debug(env);
83f338f7 763 }
0ab07c62 764 }
296af7c9
BS
765 qemu_kvm_wait_io_event(env);
766 }
767
768 return NULL;
769}
770
c7f0f3b1
AL
771static void *qemu_dummy_cpu_thread_fn(void *arg)
772{
773#ifdef _WIN32
774 fprintf(stderr, "qtest is not supported under Windows\n");
775 exit(1);
776#else
777 CPUArchState *env = arg;
814e612e 778 CPUState *cpu = ENV_GET_CPU(env);
c7f0f3b1
AL
779 sigset_t waitset;
780 int r;
781
782 qemu_mutex_lock_iothread();
814e612e 783 qemu_thread_get_self(cpu->thread);
c7f0f3b1
AL
784 env->thread_id = qemu_get_thread_id();
785
786 sigemptyset(&waitset);
787 sigaddset(&waitset, SIG_IPI);
788
789 /* signal CPU creation */
61a46217 790 cpu->created = true;
c7f0f3b1
AL
791 qemu_cond_signal(&qemu_cpu_cond);
792
793 cpu_single_env = env;
794 while (1) {
795 cpu_single_env = NULL;
796 qemu_mutex_unlock_iothread();
797 do {
798 int sig;
799 r = sigwait(&waitset, &sig);
800 } while (r == -1 && (errno == EAGAIN || errno == EINTR));
801 if (r == -1) {
802 perror("sigwait");
803 exit(1);
804 }
805 qemu_mutex_lock_iothread();
806 cpu_single_env = env;
807 qemu_wait_io_event_common(env);
808 }
809
810 return NULL;
811#endif
812}
813
bdb7ca67
JK
814static void tcg_exec_all(void);
815
7e97cd88 816static void *qemu_tcg_cpu_thread_fn(void *arg)
296af7c9 817{
c3586ba7
AF
818 CPUState *cpu = arg;
819 CPUArchState *env;
296af7c9 820
55f8d6ac 821 qemu_tcg_init_cpu_signals();
814e612e 822 qemu_thread_get_self(cpu->thread);
296af7c9
BS
823
824 /* signal CPU creation */
825 qemu_mutex_lock(&qemu_global_mutex);
0ab07c62 826 for (env = first_cpu; env != NULL; env = env->next_cpu) {
61a46217 827 cpu = ENV_GET_CPU(env);
dc7a09cf 828 env->thread_id = qemu_get_thread_id();
61a46217 829 cpu->created = true;
0ab07c62 830 }
296af7c9
BS
831 qemu_cond_signal(&qemu_cpu_cond);
832
fa7d1867 833 /* wait for initial kick-off after machine start */
f324e766 834 while (ENV_GET_CPU(first_cpu)->stopped) {
fa7d1867 835 qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex);
8e564b4e
JK
836
837 /* process any pending work */
838 for (env = first_cpu; env != NULL; env = env->next_cpu) {
839 qemu_wait_io_event_common(env);
840 }
0ab07c62 841 }
296af7c9
BS
842
843 while (1) {
bdb7ca67 844 tcg_exec_all();
946fb27c 845 if (use_icount && qemu_clock_deadline(vm_clock) <= 0) {
3b2319a3
PB
846 qemu_notify_event();
847 }
6cabe1f3 848 qemu_tcg_wait_io_event();
296af7c9
BS
849 }
850
851 return NULL;
852}
853
2ff09a40 854static void qemu_cpu_kick_thread(CPUState *cpu)
cc015e9a
PB
855{
856#ifndef _WIN32
857 int err;
858
814e612e 859 err = pthread_kill(cpu->thread->thread, SIG_IPI);
cc015e9a
PB
860 if (err) {
861 fprintf(stderr, "qemu:%s: %s", __func__, strerror(err));
862 exit(1);
863 }
864#else /* _WIN32 */
60e82579 865 if (!qemu_cpu_is_self(cpu)) {
bcba2a72 866 SuspendThread(cpu->hThread);
cc015e9a 867 cpu_signal(0);
bcba2a72 868 ResumeThread(cpu->hThread);
cc015e9a
PB
869 }
870#endif
871}
872
c08d7424 873void qemu_cpu_kick(CPUState *cpu)
296af7c9 874{
f5c121b8 875 qemu_cond_broadcast(cpu->halt_cond);
216fc9a4 876 if (!tcg_enabled() && !cpu->thread_kicked) {
2ff09a40 877 qemu_cpu_kick_thread(cpu);
216fc9a4 878 cpu->thread_kicked = true;
aa2c364b 879 }
296af7c9
BS
880}
881
46d62fac 882void qemu_cpu_kick_self(void)
296af7c9 883{
b55c22c6 884#ifndef _WIN32
46d62fac 885 assert(cpu_single_env);
216fc9a4 886 CPUState *cpu_single_cpu = ENV_GET_CPU(cpu_single_env);
296af7c9 887
216fc9a4 888 if (!cpu_single_cpu->thread_kicked) {
2ff09a40 889 qemu_cpu_kick_thread(cpu_single_cpu);
216fc9a4 890 cpu_single_cpu->thread_kicked = true;
296af7c9 891 }
b55c22c6
PB
892#else
893 abort();
894#endif
296af7c9
BS
895}
896
60e82579 897bool qemu_cpu_is_self(CPUState *cpu)
296af7c9 898{
814e612e 899 return qemu_thread_is_self(cpu->thread);
296af7c9
BS
900}
901
aa723c23
JQ
902static bool qemu_in_vcpu_thread(void)
903{
60e82579 904 return cpu_single_env && qemu_cpu_is_self(ENV_GET_CPU(cpu_single_env));
aa723c23
JQ
905}
906
296af7c9
BS
907void qemu_mutex_lock_iothread(void)
908{
c7f0f3b1 909 if (!tcg_enabled()) {
296af7c9 910 qemu_mutex_lock(&qemu_global_mutex);
1a28cac3 911 } else {
46daff13 912 iothread_requesting_mutex = true;
1a28cac3 913 if (qemu_mutex_trylock(&qemu_global_mutex)) {
2ff09a40 914 qemu_cpu_kick_thread(ENV_GET_CPU(first_cpu));
1a28cac3
MT
915 qemu_mutex_lock(&qemu_global_mutex);
916 }
46daff13
PB
917 iothread_requesting_mutex = false;
918 qemu_cond_broadcast(&qemu_io_proceeded_cond);
1a28cac3 919 }
296af7c9
BS
920}
921
922void qemu_mutex_unlock_iothread(void)
923{
924 qemu_mutex_unlock(&qemu_global_mutex);
925}
926
927static int all_vcpus_paused(void)
928{
9349b4f9 929 CPUArchState *penv = first_cpu;
296af7c9
BS
930
931 while (penv) {
f324e766
AF
932 CPUState *pcpu = ENV_GET_CPU(penv);
933 if (!pcpu->stopped) {
296af7c9 934 return 0;
0ab07c62 935 }
5207a5e0 936 penv = penv->next_cpu;
296af7c9
BS
937 }
938
939 return 1;
940}
941
942void pause_all_vcpus(void)
943{
9349b4f9 944 CPUArchState *penv = first_cpu;
296af7c9 945
a5c57d64 946 qemu_clock_enable(vm_clock, false);
296af7c9 947 while (penv) {
4fdeee7c
AF
948 CPUState *pcpu = ENV_GET_CPU(penv);
949 pcpu->stop = true;
c08d7424 950 qemu_cpu_kick(pcpu);
5207a5e0 951 penv = penv->next_cpu;
296af7c9
BS
952 }
953
aa723c23 954 if (qemu_in_vcpu_thread()) {
d798e974
JK
955 cpu_stop_current();
956 if (!kvm_enabled()) {
957 while (penv) {
4fdeee7c
AF
958 CPUState *pcpu = ENV_GET_CPU(penv);
959 pcpu->stop = 0;
f324e766 960 pcpu->stopped = true;
d798e974
JK
961 penv = penv->next_cpu;
962 }
963 return;
964 }
965 }
966
296af7c9 967 while (!all_vcpus_paused()) {
be7d6c57 968 qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex);
296af7c9
BS
969 penv = first_cpu;
970 while (penv) {
c08d7424 971 qemu_cpu_kick(ENV_GET_CPU(penv));
5207a5e0 972 penv = penv->next_cpu;
296af7c9
BS
973 }
974 }
975}
976
977void resume_all_vcpus(void)
978{
9349b4f9 979 CPUArchState *penv = first_cpu;
296af7c9 980
47113ab6 981 qemu_clock_enable(vm_clock, true);
296af7c9 982 while (penv) {
4fdeee7c
AF
983 CPUState *pcpu = ENV_GET_CPU(penv);
984 pcpu->stop = false;
f324e766 985 pcpu->stopped = false;
c08d7424 986 qemu_cpu_kick(pcpu);
5207a5e0 987 penv = penv->next_cpu;
296af7c9
BS
988 }
989}
990
e5ab30a2 991static void qemu_tcg_init_vcpu(CPUState *cpu)
296af7c9 992{
296af7c9
BS
993 /* share a single thread for all cpus with TCG */
994 if (!tcg_cpu_thread) {
814e612e 995 cpu->thread = g_malloc0(sizeof(QemuThread));
f5c121b8
AF
996 cpu->halt_cond = g_malloc0(sizeof(QemuCond));
997 qemu_cond_init(cpu->halt_cond);
998 tcg_halt_cond = cpu->halt_cond;
c3586ba7 999 qemu_thread_create(cpu->thread, qemu_tcg_cpu_thread_fn, cpu,
1ecf47bf
PB
1000 QEMU_THREAD_JOINABLE);
1001#ifdef _WIN32
814e612e 1002 cpu->hThread = qemu_thread_get_handle(cpu->thread);
1ecf47bf 1003#endif
61a46217 1004 while (!cpu->created) {
18a85728 1005 qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
0ab07c62 1006 }
814e612e 1007 tcg_cpu_thread = cpu->thread;
296af7c9 1008 } else {
814e612e 1009 cpu->thread = tcg_cpu_thread;
f5c121b8 1010 cpu->halt_cond = tcg_halt_cond;
296af7c9
BS
1011 }
1012}
1013
9349b4f9 1014static void qemu_kvm_start_vcpu(CPUArchState *env)
296af7c9 1015{
814e612e
AF
1016 CPUState *cpu = ENV_GET_CPU(env);
1017
1018 cpu->thread = g_malloc0(sizeof(QemuThread));
f5c121b8
AF
1019 cpu->halt_cond = g_malloc0(sizeof(QemuCond));
1020 qemu_cond_init(cpu->halt_cond);
814e612e 1021 qemu_thread_create(cpu->thread, qemu_kvm_cpu_thread_fn, env,
1ecf47bf 1022 QEMU_THREAD_JOINABLE);
61a46217 1023 while (!cpu->created) {
18a85728 1024 qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
0ab07c62 1025 }
296af7c9
BS
1026}
1027
c7f0f3b1
AL
1028static void qemu_dummy_start_vcpu(CPUArchState *env)
1029{
814e612e
AF
1030 CPUState *cpu = ENV_GET_CPU(env);
1031
1032 cpu->thread = g_malloc0(sizeof(QemuThread));
f5c121b8
AF
1033 cpu->halt_cond = g_malloc0(sizeof(QemuCond));
1034 qemu_cond_init(cpu->halt_cond);
814e612e 1035 qemu_thread_create(cpu->thread, qemu_dummy_cpu_thread_fn, env,
c7f0f3b1 1036 QEMU_THREAD_JOINABLE);
61a46217 1037 while (!cpu->created) {
c7f0f3b1
AL
1038 qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
1039 }
1040}
1041
296af7c9
BS
1042void qemu_init_vcpu(void *_env)
1043{
9349b4f9 1044 CPUArchState *env = _env;
f324e766 1045 CPUState *cpu = ENV_GET_CPU(env);
296af7c9
BS
1046
1047 env->nr_cores = smp_cores;
1048 env->nr_threads = smp_threads;
f324e766 1049 cpu->stopped = true;
0ab07c62 1050 if (kvm_enabled()) {
7e97cd88 1051 qemu_kvm_start_vcpu(env);
c7f0f3b1 1052 } else if (tcg_enabled()) {
e5ab30a2 1053 qemu_tcg_init_vcpu(cpu);
c7f0f3b1
AL
1054 } else {
1055 qemu_dummy_start_vcpu(env);
0ab07c62 1056 }
296af7c9
BS
1057}
1058
b4a3d965 1059void cpu_stop_current(void)
296af7c9 1060{
b4a3d965 1061 if (cpu_single_env) {
4fdeee7c
AF
1062 CPUState *cpu_single_cpu = ENV_GET_CPU(cpu_single_env);
1063 cpu_single_cpu->stop = false;
f324e766 1064 cpu_single_cpu->stopped = true;
b4a3d965 1065 cpu_exit(cpu_single_env);
67bb172f 1066 qemu_cond_signal(&qemu_pause_cond);
b4a3d965 1067 }
296af7c9
BS
1068}
1069
1dfb4dd9 1070void vm_stop(RunState state)
296af7c9 1071{
aa723c23 1072 if (qemu_in_vcpu_thread()) {
1dfb4dd9 1073 qemu_system_vmstop_request(state);
296af7c9
BS
1074 /*
1075 * FIXME: should not return to device code in case
1076 * vm_stop() has been requested.
1077 */
b4a3d965 1078 cpu_stop_current();
296af7c9
BS
1079 return;
1080 }
1dfb4dd9 1081 do_vm_stop(state);
296af7c9
BS
1082}
1083
8a9236f1
LC
1084/* does a state transition even if the VM is already stopped,
1085 current state is forgotten forever */
1086void vm_stop_force_state(RunState state)
1087{
1088 if (runstate_is_running()) {
1089 vm_stop(state);
1090 } else {
1091 runstate_set(state);
1092 }
1093}
1094
9349b4f9 1095static int tcg_cpu_exec(CPUArchState *env)
296af7c9
BS
1096{
1097 int ret;
1098#ifdef CONFIG_PROFILER
1099 int64_t ti;
1100#endif
1101
1102#ifdef CONFIG_PROFILER
1103 ti = profile_getclock();
1104#endif
1105 if (use_icount) {
1106 int64_t count;
1107 int decr;
1108 qemu_icount -= (env->icount_decr.u16.low + env->icount_extra);
1109 env->icount_decr.u16.low = 0;
1110 env->icount_extra = 0;
946fb27c 1111 count = qemu_icount_round(qemu_clock_deadline(vm_clock));
296af7c9
BS
1112 qemu_icount += count;
1113 decr = (count > 0xffff) ? 0xffff : count;
1114 count -= decr;
1115 env->icount_decr.u16.low = decr;
1116 env->icount_extra = count;
1117 }
1118 ret = cpu_exec(env);
1119#ifdef CONFIG_PROFILER
1120 qemu_time += profile_getclock() - ti;
1121#endif
1122 if (use_icount) {
1123 /* Fold pending instructions back into the
1124 instruction counter, and clear the interrupt flag. */
1125 qemu_icount -= (env->icount_decr.u16.low
1126 + env->icount_extra);
1127 env->icount_decr.u32 = 0;
1128 env->icount_extra = 0;
1129 }
1130 return ret;
1131}
1132
bdb7ca67 1133static void tcg_exec_all(void)
296af7c9 1134{
9a36085b
JK
1135 int r;
1136
ab33fcda
PB
1137 /* Account partial waits to the vm_clock. */
1138 qemu_clock_warp(vm_clock);
1139
0ab07c62 1140 if (next_cpu == NULL) {
296af7c9 1141 next_cpu = first_cpu;
0ab07c62 1142 }
c629a4bc 1143 for (; next_cpu != NULL && !exit_request; next_cpu = next_cpu->next_cpu) {
9349b4f9 1144 CPUArchState *env = next_cpu;
4fdeee7c 1145 CPUState *cpu = ENV_GET_CPU(env);
296af7c9
BS
1146
1147 qemu_clock_enable(vm_clock,
345f4426 1148 (env->singlestep_enabled & SSTEP_NOTIMER) == 0);
296af7c9 1149
a1fcaa73 1150 if (cpu_can_run(cpu)) {
bdb7ca67 1151 r = tcg_cpu_exec(env);
9a36085b 1152 if (r == EXCP_DEBUG) {
1009d2ed 1153 cpu_handle_guest_debug(env);
3c638d06
JK
1154 break;
1155 }
f324e766 1156 } else if (cpu->stop || cpu->stopped) {
296af7c9
BS
1157 break;
1158 }
1159 }
c629a4bc 1160 exit_request = 0;
296af7c9
BS
1161}
1162
1163void set_numa_modes(void)
1164{
9349b4f9 1165 CPUArchState *env;
296af7c9
BS
1166 int i;
1167
1168 for (env = first_cpu; env != NULL; env = env->next_cpu) {
1169 for (i = 0; i < nb_numa_nodes; i++) {
ee785fed 1170 if (test_bit(env->cpu_index, node_cpumask[i])) {
296af7c9
BS
1171 env->numa_node = i;
1172 }
1173 }
1174 }
1175}
1176
1177void set_cpu_log(const char *optarg)
1178{
1179 int mask;
1180 const CPULogItem *item;
1181
1182 mask = cpu_str_to_log_mask(optarg);
1183 if (!mask) {
1184 printf("Log items (comma separated):\n");
1185 for (item = cpu_log_items; item->mask != 0; item++) {
1186 printf("%-10s %s\n", item->name, item->help);
1187 }
1188 exit(1);
1189 }
1190 cpu_set_log(mask);
1191}
29e922b6 1192
c235d738
MF
1193void set_cpu_log_filename(const char *optarg)
1194{
1195 cpu_set_log_filename(optarg);
1196}
1197
9a78eead 1198void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg)
262353cb
BS
1199{
1200 /* XXX: implement xxx_cpu_list for targets that still miss it */
e916cbf8
PM
1201#if defined(cpu_list)
1202 cpu_list(f, cpu_fprintf);
262353cb
BS
1203#endif
1204}
de0b36b6
LC
1205
1206CpuInfoList *qmp_query_cpus(Error **errp)
1207{
1208 CpuInfoList *head = NULL, *cur_item = NULL;
9349b4f9 1209 CPUArchState *env;
de0b36b6
LC
1210
1211 for(env = first_cpu; env != NULL; env = env->next_cpu) {
1212 CpuInfoList *info;
1213
1214 cpu_synchronize_state(env);
1215
1216 info = g_malloc0(sizeof(*info));
1217 info->value = g_malloc0(sizeof(*info->value));
1218 info->value->CPU = env->cpu_index;
1219 info->value->current = (env == first_cpu);
1220 info->value->halted = env->halted;
1221 info->value->thread_id = env->thread_id;
1222#if defined(TARGET_I386)
1223 info->value->has_pc = true;
1224 info->value->pc = env->eip + env->segs[R_CS].base;
1225#elif defined(TARGET_PPC)
1226 info->value->has_nip = true;
1227 info->value->nip = env->nip;
1228#elif defined(TARGET_SPARC)
1229 info->value->has_pc = true;
1230 info->value->pc = env->pc;
1231 info->value->has_npc = true;
1232 info->value->npc = env->npc;
1233#elif defined(TARGET_MIPS)
1234 info->value->has_PC = true;
1235 info->value->PC = env->active_tc.PC;
1236#endif
1237
1238 /* XXX: waiting for the qapi to support GSList */
1239 if (!cur_item) {
1240 head = cur_item = info;
1241 } else {
1242 cur_item->next = info;
1243 cur_item = info;
1244 }
1245 }
1246
1247 return head;
1248}
0cfd6a9a
LC
1249
1250void qmp_memsave(int64_t addr, int64_t size, const char *filename,
1251 bool has_cpu, int64_t cpu_index, Error **errp)
1252{
1253 FILE *f;
1254 uint32_t l;
9349b4f9 1255 CPUArchState *env;
0cfd6a9a
LC
1256 uint8_t buf[1024];
1257
1258 if (!has_cpu) {
1259 cpu_index = 0;
1260 }
1261
1262 for (env = first_cpu; env; env = env->next_cpu) {
1263 if (cpu_index == env->cpu_index) {
1264 break;
1265 }
1266 }
1267
1268 if (env == NULL) {
1269 error_set(errp, QERR_INVALID_PARAMETER_VALUE, "cpu-index",
1270 "a CPU number");
1271 return;
1272 }
1273
1274 f = fopen(filename, "wb");
1275 if (!f) {
1276 error_set(errp, QERR_OPEN_FILE_FAILED, filename);
1277 return;
1278 }
1279
1280 while (size != 0) {
1281 l = sizeof(buf);
1282 if (l > size)
1283 l = size;
1284 cpu_memory_rw_debug(env, addr, buf, l, 0);
1285 if (fwrite(buf, 1, l, f) != l) {
1286 error_set(errp, QERR_IO_ERROR);
1287 goto exit;
1288 }
1289 addr += l;
1290 size -= l;
1291 }
1292
1293exit:
1294 fclose(f);
1295}
6d3962bf
LC
1296
1297void qmp_pmemsave(int64_t addr, int64_t size, const char *filename,
1298 Error **errp)
1299{
1300 FILE *f;
1301 uint32_t l;
1302 uint8_t buf[1024];
1303
1304 f = fopen(filename, "wb");
1305 if (!f) {
1306 error_set(errp, QERR_OPEN_FILE_FAILED, filename);
1307 return;
1308 }
1309
1310 while (size != 0) {
1311 l = sizeof(buf);
1312 if (l > size)
1313 l = size;
1314 cpu_physical_memory_rw(addr, buf, l, 0);
1315 if (fwrite(buf, 1, l, f) != l) {
1316 error_set(errp, QERR_IO_ERROR);
1317 goto exit;
1318 }
1319 addr += l;
1320 size -= l;
1321 }
1322
1323exit:
1324 fclose(f);
1325}
ab49ab5c
LC
1326
1327void qmp_inject_nmi(Error **errp)
1328{
1329#if defined(TARGET_I386)
9349b4f9 1330 CPUArchState *env;
ab49ab5c
LC
1331
1332 for (env = first_cpu; env != NULL; env = env->next_cpu) {
02c09195
JK
1333 if (!env->apic_state) {
1334 cpu_interrupt(env, CPU_INTERRUPT_NMI);
1335 } else {
1336 apic_deliver_nmi(env->apic_state);
1337 }
ab49ab5c
LC
1338 }
1339#else
1340 error_set(errp, QERR_UNSUPPORTED);
1341#endif
1342}