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Commit | Line | Data |
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296af7c9 BS |
1 | /* |
2 | * QEMU System Emulator | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | /* Needed early for CONFIG_BSD etc. */ | |
26 | #include "config-host.h" | |
27 | ||
83c9089e | 28 | #include "monitor/monitor.h" |
9c17d615 | 29 | #include "sysemu/sysemu.h" |
022c62cb | 30 | #include "exec/gdbstub.h" |
9c17d615 PB |
31 | #include "sysemu/dma.h" |
32 | #include "sysemu/kvm.h" | |
de0b36b6 | 33 | #include "qmp-commands.h" |
296af7c9 | 34 | |
1de7afc9 | 35 | #include "qemu/thread.h" |
9c17d615 PB |
36 | #include "sysemu/cpus.h" |
37 | #include "sysemu/qtest.h" | |
1de7afc9 PB |
38 | #include "qemu/main-loop.h" |
39 | #include "qemu/bitmap.h" | |
cb365646 | 40 | #include "qemu/seqlock.h" |
0ff0fc19 JK |
41 | |
42 | #ifndef _WIN32 | |
1de7afc9 | 43 | #include "qemu/compatfd.h" |
0ff0fc19 | 44 | #endif |
296af7c9 | 45 | |
6d9cb73c JK |
46 | #ifdef CONFIG_LINUX |
47 | ||
48 | #include <sys/prctl.h> | |
49 | ||
c0532a76 MT |
50 | #ifndef PR_MCE_KILL |
51 | #define PR_MCE_KILL 33 | |
52 | #endif | |
53 | ||
6d9cb73c JK |
54 | #ifndef PR_MCE_KILL_SET |
55 | #define PR_MCE_KILL_SET 1 | |
56 | #endif | |
57 | ||
58 | #ifndef PR_MCE_KILL_EARLY | |
59 | #define PR_MCE_KILL_EARLY 1 | |
60 | #endif | |
61 | ||
62 | #endif /* CONFIG_LINUX */ | |
63 | ||
182735ef | 64 | static CPUState *next_cpu; |
296af7c9 | 65 | |
321bc0b2 TC |
66 | bool cpu_is_stopped(CPUState *cpu) |
67 | { | |
68 | return cpu->stopped || !runstate_is_running(); | |
69 | } | |
70 | ||
a98ae1d8 | 71 | static bool cpu_thread_is_idle(CPUState *cpu) |
ac873f1e | 72 | { |
c64ca814 | 73 | if (cpu->stop || cpu->queued_work_first) { |
ac873f1e PM |
74 | return false; |
75 | } | |
321bc0b2 | 76 | if (cpu_is_stopped(cpu)) { |
ac873f1e PM |
77 | return true; |
78 | } | |
259186a7 | 79 | if (!cpu->halted || qemu_cpu_has_work(cpu) || |
215e79c0 | 80 | kvm_halt_in_kernel()) { |
ac873f1e PM |
81 | return false; |
82 | } | |
83 | return true; | |
84 | } | |
85 | ||
86 | static bool all_cpu_threads_idle(void) | |
87 | { | |
182735ef | 88 | CPUState *cpu; |
ac873f1e | 89 | |
bdc44640 | 90 | CPU_FOREACH(cpu) { |
182735ef | 91 | if (!cpu_thread_is_idle(cpu)) { |
ac873f1e PM |
92 | return false; |
93 | } | |
94 | } | |
95 | return true; | |
96 | } | |
97 | ||
946fb27c PB |
98 | /***********************************************************/ |
99 | /* guest cycle counter */ | |
100 | ||
101 | /* Conversion factor from emulated instructions to virtual clock ticks. */ | |
102 | static int icount_time_shift; | |
103 | /* Arbitrarily pick 1MIPS as the minimum allowable speed. */ | |
104 | #define MAX_ICOUNT_SHIFT 10 | |
105 | /* Compensate for varying guest execution speed. */ | |
106 | static int64_t qemu_icount_bias; | |
107 | static QEMUTimer *icount_rt_timer; | |
108 | static QEMUTimer *icount_vm_timer; | |
109 | static QEMUTimer *icount_warp_timer; | |
110 | static int64_t vm_clock_warp_start; | |
111 | static int64_t qemu_icount; | |
112 | ||
113 | typedef struct TimersState { | |
cb365646 | 114 | /* Protected by BQL. */ |
946fb27c PB |
115 | int64_t cpu_ticks_prev; |
116 | int64_t cpu_ticks_offset; | |
cb365646 LPF |
117 | |
118 | /* cpu_clock_offset can be read out of BQL, so protect it with | |
119 | * this lock. | |
120 | */ | |
121 | QemuSeqLock vm_clock_seqlock; | |
946fb27c PB |
122 | int64_t cpu_clock_offset; |
123 | int32_t cpu_ticks_enabled; | |
124 | int64_t dummy; | |
125 | } TimersState; | |
126 | ||
d9cd4007 | 127 | static TimersState timers_state; |
946fb27c PB |
128 | |
129 | /* Return the virtual CPU time, based on the instruction counter. */ | |
130 | int64_t cpu_get_icount(void) | |
131 | { | |
132 | int64_t icount; | |
4917cf44 | 133 | CPUState *cpu = current_cpu; |
946fb27c PB |
134 | |
135 | icount = qemu_icount; | |
4917cf44 AF |
136 | if (cpu) { |
137 | CPUArchState *env = cpu->env_ptr; | |
946fb27c PB |
138 | if (!can_do_io(env)) { |
139 | fprintf(stderr, "Bad clock read\n"); | |
140 | } | |
141 | icount -= (env->icount_decr.u16.low + env->icount_extra); | |
142 | } | |
143 | return qemu_icount_bias + (icount << icount_time_shift); | |
144 | } | |
145 | ||
146 | /* return the host CPU cycle counter and handle stop/restart */ | |
cb365646 | 147 | /* Caller must hold the BQL */ |
946fb27c PB |
148 | int64_t cpu_get_ticks(void) |
149 | { | |
150 | if (use_icount) { | |
151 | return cpu_get_icount(); | |
152 | } | |
153 | if (!timers_state.cpu_ticks_enabled) { | |
154 | return timers_state.cpu_ticks_offset; | |
155 | } else { | |
156 | int64_t ticks; | |
157 | ticks = cpu_get_real_ticks(); | |
158 | if (timers_state.cpu_ticks_prev > ticks) { | |
159 | /* Note: non increasing ticks may happen if the host uses | |
160 | software suspend */ | |
161 | timers_state.cpu_ticks_offset += timers_state.cpu_ticks_prev - ticks; | |
162 | } | |
163 | timers_state.cpu_ticks_prev = ticks; | |
164 | return ticks + timers_state.cpu_ticks_offset; | |
165 | } | |
166 | } | |
167 | ||
cb365646 | 168 | static int64_t cpu_get_clock_locked(void) |
946fb27c PB |
169 | { |
170 | int64_t ti; | |
cb365646 | 171 | |
946fb27c | 172 | if (!timers_state.cpu_ticks_enabled) { |
cb365646 | 173 | ti = timers_state.cpu_clock_offset; |
946fb27c PB |
174 | } else { |
175 | ti = get_clock(); | |
cb365646 | 176 | ti += timers_state.cpu_clock_offset; |
946fb27c | 177 | } |
cb365646 LPF |
178 | |
179 | return ti; | |
180 | } | |
181 | ||
182 | /* return the host CPU monotonic timer and handle stop/restart */ | |
183 | int64_t cpu_get_clock(void) | |
184 | { | |
185 | int64_t ti; | |
186 | unsigned start; | |
187 | ||
188 | do { | |
189 | start = seqlock_read_begin(&timers_state.vm_clock_seqlock); | |
190 | ti = cpu_get_clock_locked(); | |
191 | } while (seqlock_read_retry(&timers_state.vm_clock_seqlock, start)); | |
192 | ||
193 | return ti; | |
946fb27c PB |
194 | } |
195 | ||
cb365646 LPF |
196 | /* enable cpu_get_ticks() |
197 | * Caller must hold BQL which server as mutex for vm_clock_seqlock. | |
198 | */ | |
946fb27c PB |
199 | void cpu_enable_ticks(void) |
200 | { | |
cb365646 LPF |
201 | /* Here, the really thing protected by seqlock is cpu_clock_offset. */ |
202 | seqlock_write_lock(&timers_state.vm_clock_seqlock); | |
946fb27c PB |
203 | if (!timers_state.cpu_ticks_enabled) { |
204 | timers_state.cpu_ticks_offset -= cpu_get_real_ticks(); | |
205 | timers_state.cpu_clock_offset -= get_clock(); | |
206 | timers_state.cpu_ticks_enabled = 1; | |
207 | } | |
cb365646 | 208 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); |
946fb27c PB |
209 | } |
210 | ||
211 | /* disable cpu_get_ticks() : the clock is stopped. You must not call | |
cb365646 LPF |
212 | * cpu_get_ticks() after that. |
213 | * Caller must hold BQL which server as mutex for vm_clock_seqlock. | |
214 | */ | |
946fb27c PB |
215 | void cpu_disable_ticks(void) |
216 | { | |
cb365646 LPF |
217 | /* Here, the really thing protected by seqlock is cpu_clock_offset. */ |
218 | seqlock_write_lock(&timers_state.vm_clock_seqlock); | |
946fb27c PB |
219 | if (timers_state.cpu_ticks_enabled) { |
220 | timers_state.cpu_ticks_offset = cpu_get_ticks(); | |
cb365646 | 221 | timers_state.cpu_clock_offset = cpu_get_clock_locked(); |
946fb27c PB |
222 | timers_state.cpu_ticks_enabled = 0; |
223 | } | |
cb365646 | 224 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); |
946fb27c PB |
225 | } |
226 | ||
227 | /* Correlation between real and virtual time is always going to be | |
228 | fairly approximate, so ignore small variation. | |
229 | When the guest is idle real and virtual time will be aligned in | |
230 | the IO wait loop. */ | |
231 | #define ICOUNT_WOBBLE (get_ticks_per_sec() / 10) | |
232 | ||
233 | static void icount_adjust(void) | |
234 | { | |
235 | int64_t cur_time; | |
236 | int64_t cur_icount; | |
237 | int64_t delta; | |
238 | static int64_t last_delta; | |
468cc7cf | 239 | |
946fb27c PB |
240 | /* If the VM is not running, then do nothing. */ |
241 | if (!runstate_is_running()) { | |
242 | return; | |
243 | } | |
468cc7cf | 244 | |
946fb27c | 245 | cur_time = cpu_get_clock(); |
468cc7cf PB |
246 | cur_icount = cpu_get_icount(); |
247 | ||
946fb27c PB |
248 | delta = cur_icount - cur_time; |
249 | /* FIXME: This is a very crude algorithm, somewhat prone to oscillation. */ | |
250 | if (delta > 0 | |
251 | && last_delta + ICOUNT_WOBBLE < delta * 2 | |
252 | && icount_time_shift > 0) { | |
253 | /* The guest is getting too far ahead. Slow time down. */ | |
254 | icount_time_shift--; | |
255 | } | |
256 | if (delta < 0 | |
257 | && last_delta - ICOUNT_WOBBLE > delta * 2 | |
258 | && icount_time_shift < MAX_ICOUNT_SHIFT) { | |
259 | /* The guest is getting too far behind. Speed time up. */ | |
260 | icount_time_shift++; | |
261 | } | |
262 | last_delta = delta; | |
263 | qemu_icount_bias = cur_icount - (qemu_icount << icount_time_shift); | |
264 | } | |
265 | ||
266 | static void icount_adjust_rt(void *opaque) | |
267 | { | |
40daca54 AB |
268 | timer_mod(icount_rt_timer, |
269 | qemu_clock_get_ms(QEMU_CLOCK_REALTIME) + 1000); | |
946fb27c PB |
270 | icount_adjust(); |
271 | } | |
272 | ||
273 | static void icount_adjust_vm(void *opaque) | |
274 | { | |
40daca54 AB |
275 | timer_mod(icount_vm_timer, |
276 | qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + | |
277 | get_ticks_per_sec() / 10); | |
946fb27c PB |
278 | icount_adjust(); |
279 | } | |
280 | ||
281 | static int64_t qemu_icount_round(int64_t count) | |
282 | { | |
283 | return (count + (1 << icount_time_shift) - 1) >> icount_time_shift; | |
284 | } | |
285 | ||
286 | static void icount_warp_rt(void *opaque) | |
287 | { | |
288 | if (vm_clock_warp_start == -1) { | |
289 | return; | |
290 | } | |
291 | ||
292 | if (runstate_is_running()) { | |
40daca54 | 293 | int64_t clock = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); |
8ed961d9 PB |
294 | int64_t warp_delta; |
295 | ||
296 | warp_delta = clock - vm_clock_warp_start; | |
297 | if (use_icount == 2) { | |
946fb27c | 298 | /* |
40daca54 | 299 | * In adaptive mode, do not let QEMU_CLOCK_VIRTUAL run too |
946fb27c PB |
300 | * far ahead of real time. |
301 | */ | |
302 | int64_t cur_time = cpu_get_clock(); | |
468cc7cf | 303 | int64_t cur_icount = cpu_get_icount(); |
946fb27c | 304 | int64_t delta = cur_time - cur_icount; |
8ed961d9 | 305 | warp_delta = MIN(warp_delta, delta); |
946fb27c | 306 | } |
8ed961d9 | 307 | qemu_icount_bias += warp_delta; |
946fb27c PB |
308 | } |
309 | vm_clock_warp_start = -1; | |
8ed961d9 PB |
310 | |
311 | if (qemu_clock_expired(QEMU_CLOCK_VIRTUAL)) { | |
312 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); | |
313 | } | |
946fb27c PB |
314 | } |
315 | ||
8156be56 PB |
316 | void qtest_clock_warp(int64_t dest) |
317 | { | |
40daca54 | 318 | int64_t clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); |
8156be56 PB |
319 | assert(qtest_enabled()); |
320 | while (clock < dest) { | |
40daca54 | 321 | int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
8156be56 PB |
322 | int64_t warp = MIN(dest - clock, deadline); |
323 | qemu_icount_bias += warp; | |
40daca54 AB |
324 | qemu_clock_run_timers(QEMU_CLOCK_VIRTUAL); |
325 | clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); | |
8156be56 | 326 | } |
40daca54 | 327 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); |
8156be56 PB |
328 | } |
329 | ||
40daca54 | 330 | void qemu_clock_warp(QEMUClockType type) |
946fb27c PB |
331 | { |
332 | int64_t deadline; | |
333 | ||
334 | /* | |
335 | * There are too many global variables to make the "warp" behavior | |
336 | * applicable to other clocks. But a clock argument removes the | |
337 | * need for if statements all over the place. | |
338 | */ | |
40daca54 | 339 | if (type != QEMU_CLOCK_VIRTUAL || !use_icount) { |
946fb27c PB |
340 | return; |
341 | } | |
342 | ||
343 | /* | |
40daca54 AB |
344 | * If the CPUs have been sleeping, advance QEMU_CLOCK_VIRTUAL timer now. |
345 | * This ensures that the deadline for the timer is computed correctly below. | |
946fb27c PB |
346 | * This also makes sure that the insn counter is synchronized before the |
347 | * CPU starts running, in case the CPU is woken by an event other than | |
40daca54 | 348 | * the earliest QEMU_CLOCK_VIRTUAL timer. |
946fb27c PB |
349 | */ |
350 | icount_warp_rt(NULL); | |
40daca54 AB |
351 | if (!all_cpu_threads_idle() || !qemu_clock_has_timers(QEMU_CLOCK_VIRTUAL)) { |
352 | timer_del(icount_warp_timer); | |
946fb27c PB |
353 | return; |
354 | } | |
355 | ||
8156be56 PB |
356 | if (qtest_enabled()) { |
357 | /* When testing, qtest commands advance icount. */ | |
358 | return; | |
359 | } | |
360 | ||
40daca54 | 361 | vm_clock_warp_start = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); |
ac70aafc | 362 | /* We want to use the earliest deadline from ALL vm_clocks */ |
40daca54 | 363 | deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
ac70aafc AB |
364 | |
365 | /* Maintain prior (possibly buggy) behaviour where if no deadline | |
40daca54 | 366 | * was set (as there is no QEMU_CLOCK_VIRTUAL timer) or it is more than |
ac70aafc AB |
367 | * INT32_MAX nanoseconds ahead, we still use INT32_MAX |
368 | * nanoseconds. | |
369 | */ | |
370 | if ((deadline < 0) || (deadline > INT32_MAX)) { | |
371 | deadline = INT32_MAX; | |
372 | } | |
373 | ||
946fb27c PB |
374 | if (deadline > 0) { |
375 | /* | |
40daca54 | 376 | * Ensure QEMU_CLOCK_VIRTUAL proceeds even when the virtual CPU goes to |
946fb27c PB |
377 | * sleep. Otherwise, the CPU might be waiting for a future timer |
378 | * interrupt to wake it up, but the interrupt never comes because | |
379 | * the vCPU isn't running any insns and thus doesn't advance the | |
40daca54 | 380 | * QEMU_CLOCK_VIRTUAL. |
946fb27c PB |
381 | * |
382 | * An extreme solution for this problem would be to never let VCPUs | |
40daca54 AB |
383 | * sleep in icount mode if there is a pending QEMU_CLOCK_VIRTUAL |
384 | * timer; rather time could just advance to the next QEMU_CLOCK_VIRTUAL | |
385 | * event. Instead, we do stop VCPUs and only advance QEMU_CLOCK_VIRTUAL | |
386 | * after some e"real" time, (related to the time left until the next | |
387 | * event) has passed. The QEMU_CLOCK_REALTIME timer will do this. | |
388 | * This avoids that the warps are visible externally; for example, | |
389 | * you will not be sending network packets continuously instead of | |
390 | * every 100ms. | |
946fb27c | 391 | */ |
40daca54 | 392 | timer_mod(icount_warp_timer, vm_clock_warp_start + deadline); |
ac70aafc | 393 | } else if (deadline == 0) { |
40daca54 | 394 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); |
946fb27c PB |
395 | } |
396 | } | |
397 | ||
398 | static const VMStateDescription vmstate_timers = { | |
399 | .name = "timer", | |
400 | .version_id = 2, | |
401 | .minimum_version_id = 1, | |
402 | .minimum_version_id_old = 1, | |
403 | .fields = (VMStateField[]) { | |
404 | VMSTATE_INT64(cpu_ticks_offset, TimersState), | |
405 | VMSTATE_INT64(dummy, TimersState), | |
406 | VMSTATE_INT64_V(cpu_clock_offset, TimersState, 2), | |
407 | VMSTATE_END_OF_LIST() | |
408 | } | |
409 | }; | |
410 | ||
411 | void configure_icount(const char *option) | |
412 | { | |
cb365646 | 413 | seqlock_init(&timers_state.vm_clock_seqlock, NULL); |
946fb27c PB |
414 | vmstate_register(NULL, 0, &vmstate_timers, &timers_state); |
415 | if (!option) { | |
416 | return; | |
417 | } | |
418 | ||
40daca54 AB |
419 | icount_warp_timer = timer_new_ns(QEMU_CLOCK_REALTIME, |
420 | icount_warp_rt, NULL); | |
946fb27c PB |
421 | if (strcmp(option, "auto") != 0) { |
422 | icount_time_shift = strtol(option, NULL, 0); | |
423 | use_icount = 1; | |
424 | return; | |
425 | } | |
426 | ||
427 | use_icount = 2; | |
428 | ||
429 | /* 125MIPS seems a reasonable initial guess at the guest speed. | |
430 | It will be corrected fairly quickly anyway. */ | |
431 | icount_time_shift = 3; | |
432 | ||
433 | /* Have both realtime and virtual time triggers for speed adjustment. | |
434 | The realtime trigger catches emulated time passing too slowly, | |
435 | the virtual time trigger catches emulated time passing too fast. | |
436 | Realtime triggers occur even when idle, so use them less frequently | |
437 | than VM triggers. */ | |
40daca54 AB |
438 | icount_rt_timer = timer_new_ms(QEMU_CLOCK_REALTIME, |
439 | icount_adjust_rt, NULL); | |
440 | timer_mod(icount_rt_timer, | |
441 | qemu_clock_get_ms(QEMU_CLOCK_REALTIME) + 1000); | |
442 | icount_vm_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, | |
443 | icount_adjust_vm, NULL); | |
444 | timer_mod(icount_vm_timer, | |
445 | qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + | |
446 | get_ticks_per_sec() / 10); | |
946fb27c PB |
447 | } |
448 | ||
296af7c9 BS |
449 | /***********************************************************/ |
450 | void hw_error(const char *fmt, ...) | |
451 | { | |
452 | va_list ap; | |
55e5c285 | 453 | CPUState *cpu; |
296af7c9 BS |
454 | |
455 | va_start(ap, fmt); | |
456 | fprintf(stderr, "qemu: hardware error: "); | |
457 | vfprintf(stderr, fmt, ap); | |
458 | fprintf(stderr, "\n"); | |
bdc44640 | 459 | CPU_FOREACH(cpu) { |
55e5c285 | 460 | fprintf(stderr, "CPU #%d:\n", cpu->cpu_index); |
878096ee | 461 | cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU); |
296af7c9 BS |
462 | } |
463 | va_end(ap); | |
464 | abort(); | |
465 | } | |
466 | ||
467 | void cpu_synchronize_all_states(void) | |
468 | { | |
182735ef | 469 | CPUState *cpu; |
296af7c9 | 470 | |
bdc44640 | 471 | CPU_FOREACH(cpu) { |
182735ef | 472 | cpu_synchronize_state(cpu); |
296af7c9 BS |
473 | } |
474 | } | |
475 | ||
476 | void cpu_synchronize_all_post_reset(void) | |
477 | { | |
182735ef | 478 | CPUState *cpu; |
296af7c9 | 479 | |
bdc44640 | 480 | CPU_FOREACH(cpu) { |
182735ef | 481 | cpu_synchronize_post_reset(cpu); |
296af7c9 BS |
482 | } |
483 | } | |
484 | ||
485 | void cpu_synchronize_all_post_init(void) | |
486 | { | |
182735ef | 487 | CPUState *cpu; |
296af7c9 | 488 | |
bdc44640 | 489 | CPU_FOREACH(cpu) { |
182735ef | 490 | cpu_synchronize_post_init(cpu); |
296af7c9 BS |
491 | } |
492 | } | |
493 | ||
56983463 | 494 | static int do_vm_stop(RunState state) |
296af7c9 | 495 | { |
56983463 KW |
496 | int ret = 0; |
497 | ||
1354869c | 498 | if (runstate_is_running()) { |
296af7c9 | 499 | cpu_disable_ticks(); |
296af7c9 | 500 | pause_all_vcpus(); |
f5bbfba1 | 501 | runstate_set(state); |
1dfb4dd9 | 502 | vm_state_notify(0, state); |
296af7c9 BS |
503 | monitor_protocol_event(QEVENT_STOP, NULL); |
504 | } | |
56983463 | 505 | |
594a45ce KW |
506 | bdrv_drain_all(); |
507 | ret = bdrv_flush_all(); | |
508 | ||
56983463 | 509 | return ret; |
296af7c9 BS |
510 | } |
511 | ||
a1fcaa73 | 512 | static bool cpu_can_run(CPUState *cpu) |
296af7c9 | 513 | { |
4fdeee7c | 514 | if (cpu->stop) { |
a1fcaa73 | 515 | return false; |
0ab07c62 | 516 | } |
321bc0b2 | 517 | if (cpu_is_stopped(cpu)) { |
a1fcaa73 | 518 | return false; |
0ab07c62 | 519 | } |
a1fcaa73 | 520 | return true; |
296af7c9 BS |
521 | } |
522 | ||
91325046 | 523 | static void cpu_handle_guest_debug(CPUState *cpu) |
83f338f7 | 524 | { |
64f6b346 | 525 | gdb_set_stop_cpu(cpu); |
8cf71710 | 526 | qemu_system_debug_request(); |
f324e766 | 527 | cpu->stopped = true; |
3c638d06 JK |
528 | } |
529 | ||
714bd040 PB |
530 | static void cpu_signal(int sig) |
531 | { | |
4917cf44 AF |
532 | if (current_cpu) { |
533 | cpu_exit(current_cpu); | |
714bd040 PB |
534 | } |
535 | exit_request = 1; | |
536 | } | |
714bd040 | 537 | |
6d9cb73c JK |
538 | #ifdef CONFIG_LINUX |
539 | static void sigbus_reraise(void) | |
540 | { | |
541 | sigset_t set; | |
542 | struct sigaction action; | |
543 | ||
544 | memset(&action, 0, sizeof(action)); | |
545 | action.sa_handler = SIG_DFL; | |
546 | if (!sigaction(SIGBUS, &action, NULL)) { | |
547 | raise(SIGBUS); | |
548 | sigemptyset(&set); | |
549 | sigaddset(&set, SIGBUS); | |
550 | sigprocmask(SIG_UNBLOCK, &set, NULL); | |
551 | } | |
552 | perror("Failed to re-raise SIGBUS!\n"); | |
553 | abort(); | |
554 | } | |
555 | ||
556 | static void sigbus_handler(int n, struct qemu_signalfd_siginfo *siginfo, | |
557 | void *ctx) | |
558 | { | |
559 | if (kvm_on_sigbus(siginfo->ssi_code, | |
560 | (void *)(intptr_t)siginfo->ssi_addr)) { | |
561 | sigbus_reraise(); | |
562 | } | |
563 | } | |
564 | ||
565 | static void qemu_init_sigbus(void) | |
566 | { | |
567 | struct sigaction action; | |
568 | ||
569 | memset(&action, 0, sizeof(action)); | |
570 | action.sa_flags = SA_SIGINFO; | |
571 | action.sa_sigaction = (void (*)(int, siginfo_t*, void*))sigbus_handler; | |
572 | sigaction(SIGBUS, &action, NULL); | |
573 | ||
574 | prctl(PR_MCE_KILL, PR_MCE_KILL_SET, PR_MCE_KILL_EARLY, 0, 0); | |
575 | } | |
576 | ||
290adf38 | 577 | static void qemu_kvm_eat_signals(CPUState *cpu) |
1ab3c6c0 JK |
578 | { |
579 | struct timespec ts = { 0, 0 }; | |
580 | siginfo_t siginfo; | |
581 | sigset_t waitset; | |
582 | sigset_t chkset; | |
583 | int r; | |
584 | ||
585 | sigemptyset(&waitset); | |
586 | sigaddset(&waitset, SIG_IPI); | |
587 | sigaddset(&waitset, SIGBUS); | |
588 | ||
589 | do { | |
590 | r = sigtimedwait(&waitset, &siginfo, &ts); | |
591 | if (r == -1 && !(errno == EAGAIN || errno == EINTR)) { | |
592 | perror("sigtimedwait"); | |
593 | exit(1); | |
594 | } | |
595 | ||
596 | switch (r) { | |
597 | case SIGBUS: | |
290adf38 | 598 | if (kvm_on_sigbus_vcpu(cpu, siginfo.si_code, siginfo.si_addr)) { |
1ab3c6c0 JK |
599 | sigbus_reraise(); |
600 | } | |
601 | break; | |
602 | default: | |
603 | break; | |
604 | } | |
605 | ||
606 | r = sigpending(&chkset); | |
607 | if (r == -1) { | |
608 | perror("sigpending"); | |
609 | exit(1); | |
610 | } | |
611 | } while (sigismember(&chkset, SIG_IPI) || sigismember(&chkset, SIGBUS)); | |
1ab3c6c0 JK |
612 | } |
613 | ||
6d9cb73c JK |
614 | #else /* !CONFIG_LINUX */ |
615 | ||
616 | static void qemu_init_sigbus(void) | |
617 | { | |
618 | } | |
1ab3c6c0 | 619 | |
290adf38 | 620 | static void qemu_kvm_eat_signals(CPUState *cpu) |
1ab3c6c0 JK |
621 | { |
622 | } | |
6d9cb73c JK |
623 | #endif /* !CONFIG_LINUX */ |
624 | ||
296af7c9 | 625 | #ifndef _WIN32 |
55f8d6ac JK |
626 | static void dummy_signal(int sig) |
627 | { | |
628 | } | |
55f8d6ac | 629 | |
13618e05 | 630 | static void qemu_kvm_init_cpu_signals(CPUState *cpu) |
714bd040 PB |
631 | { |
632 | int r; | |
633 | sigset_t set; | |
634 | struct sigaction sigact; | |
635 | ||
636 | memset(&sigact, 0, sizeof(sigact)); | |
637 | sigact.sa_handler = dummy_signal; | |
638 | sigaction(SIG_IPI, &sigact, NULL); | |
639 | ||
714bd040 PB |
640 | pthread_sigmask(SIG_BLOCK, NULL, &set); |
641 | sigdelset(&set, SIG_IPI); | |
714bd040 | 642 | sigdelset(&set, SIGBUS); |
491d6e80 | 643 | r = kvm_set_signal_mask(cpu, &set); |
714bd040 PB |
644 | if (r) { |
645 | fprintf(stderr, "kvm_set_signal_mask: %s\n", strerror(-r)); | |
646 | exit(1); | |
647 | } | |
648 | } | |
649 | ||
650 | static void qemu_tcg_init_cpu_signals(void) | |
651 | { | |
714bd040 PB |
652 | sigset_t set; |
653 | struct sigaction sigact; | |
654 | ||
655 | memset(&sigact, 0, sizeof(sigact)); | |
656 | sigact.sa_handler = cpu_signal; | |
657 | sigaction(SIG_IPI, &sigact, NULL); | |
658 | ||
659 | sigemptyset(&set); | |
660 | sigaddset(&set, SIG_IPI); | |
661 | pthread_sigmask(SIG_UNBLOCK, &set, NULL); | |
714bd040 PB |
662 | } |
663 | ||
55f8d6ac | 664 | #else /* _WIN32 */ |
13618e05 | 665 | static void qemu_kvm_init_cpu_signals(CPUState *cpu) |
ff48eb5f | 666 | { |
714bd040 PB |
667 | abort(); |
668 | } | |
ff48eb5f | 669 | |
714bd040 PB |
670 | static void qemu_tcg_init_cpu_signals(void) |
671 | { | |
ff48eb5f | 672 | } |
714bd040 | 673 | #endif /* _WIN32 */ |
ff48eb5f | 674 | |
b2532d88 | 675 | static QemuMutex qemu_global_mutex; |
46daff13 PB |
676 | static QemuCond qemu_io_proceeded_cond; |
677 | static bool iothread_requesting_mutex; | |
296af7c9 BS |
678 | |
679 | static QemuThread io_thread; | |
680 | ||
681 | static QemuThread *tcg_cpu_thread; | |
682 | static QemuCond *tcg_halt_cond; | |
683 | ||
296af7c9 BS |
684 | /* cpu creation */ |
685 | static QemuCond qemu_cpu_cond; | |
686 | /* system init */ | |
296af7c9 | 687 | static QemuCond qemu_pause_cond; |
e82bcec2 | 688 | static QemuCond qemu_work_cond; |
296af7c9 | 689 | |
d3b12f5d | 690 | void qemu_init_cpu_loop(void) |
296af7c9 | 691 | { |
6d9cb73c | 692 | qemu_init_sigbus(); |
ed94592b | 693 | qemu_cond_init(&qemu_cpu_cond); |
ed94592b AL |
694 | qemu_cond_init(&qemu_pause_cond); |
695 | qemu_cond_init(&qemu_work_cond); | |
46daff13 | 696 | qemu_cond_init(&qemu_io_proceeded_cond); |
296af7c9 | 697 | qemu_mutex_init(&qemu_global_mutex); |
296af7c9 | 698 | |
b7680cb6 | 699 | qemu_thread_get_self(&io_thread); |
296af7c9 BS |
700 | } |
701 | ||
f100f0b3 | 702 | void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data) |
e82bcec2 MT |
703 | { |
704 | struct qemu_work_item wi; | |
705 | ||
60e82579 | 706 | if (qemu_cpu_is_self(cpu)) { |
e82bcec2 MT |
707 | func(data); |
708 | return; | |
709 | } | |
710 | ||
711 | wi.func = func; | |
712 | wi.data = data; | |
3c02270d | 713 | wi.free = false; |
c64ca814 AF |
714 | if (cpu->queued_work_first == NULL) { |
715 | cpu->queued_work_first = &wi; | |
0ab07c62 | 716 | } else { |
c64ca814 | 717 | cpu->queued_work_last->next = &wi; |
0ab07c62 | 718 | } |
c64ca814 | 719 | cpu->queued_work_last = &wi; |
e82bcec2 MT |
720 | wi.next = NULL; |
721 | wi.done = false; | |
722 | ||
c08d7424 | 723 | qemu_cpu_kick(cpu); |
e82bcec2 | 724 | while (!wi.done) { |
4917cf44 | 725 | CPUState *self_cpu = current_cpu; |
e82bcec2 MT |
726 | |
727 | qemu_cond_wait(&qemu_work_cond, &qemu_global_mutex); | |
4917cf44 | 728 | current_cpu = self_cpu; |
e82bcec2 MT |
729 | } |
730 | } | |
731 | ||
3c02270d CV |
732 | void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data) |
733 | { | |
734 | struct qemu_work_item *wi; | |
735 | ||
736 | if (qemu_cpu_is_self(cpu)) { | |
737 | func(data); | |
738 | return; | |
739 | } | |
740 | ||
741 | wi = g_malloc0(sizeof(struct qemu_work_item)); | |
742 | wi->func = func; | |
743 | wi->data = data; | |
744 | wi->free = true; | |
745 | if (cpu->queued_work_first == NULL) { | |
746 | cpu->queued_work_first = wi; | |
747 | } else { | |
748 | cpu->queued_work_last->next = wi; | |
749 | } | |
750 | cpu->queued_work_last = wi; | |
751 | wi->next = NULL; | |
752 | wi->done = false; | |
753 | ||
754 | qemu_cpu_kick(cpu); | |
755 | } | |
756 | ||
6d45b109 | 757 | static void flush_queued_work(CPUState *cpu) |
e82bcec2 MT |
758 | { |
759 | struct qemu_work_item *wi; | |
760 | ||
c64ca814 | 761 | if (cpu->queued_work_first == NULL) { |
e82bcec2 | 762 | return; |
0ab07c62 | 763 | } |
e82bcec2 | 764 | |
c64ca814 AF |
765 | while ((wi = cpu->queued_work_first)) { |
766 | cpu->queued_work_first = wi->next; | |
e82bcec2 MT |
767 | wi->func(wi->data); |
768 | wi->done = true; | |
3c02270d CV |
769 | if (wi->free) { |
770 | g_free(wi); | |
771 | } | |
e82bcec2 | 772 | } |
c64ca814 | 773 | cpu->queued_work_last = NULL; |
e82bcec2 MT |
774 | qemu_cond_broadcast(&qemu_work_cond); |
775 | } | |
776 | ||
509a0d78 | 777 | static void qemu_wait_io_event_common(CPUState *cpu) |
296af7c9 | 778 | { |
4fdeee7c AF |
779 | if (cpu->stop) { |
780 | cpu->stop = false; | |
f324e766 | 781 | cpu->stopped = true; |
296af7c9 BS |
782 | qemu_cond_signal(&qemu_pause_cond); |
783 | } | |
6d45b109 | 784 | flush_queued_work(cpu); |
216fc9a4 | 785 | cpu->thread_kicked = false; |
296af7c9 BS |
786 | } |
787 | ||
6cabe1f3 | 788 | static void qemu_tcg_wait_io_event(void) |
296af7c9 | 789 | { |
182735ef | 790 | CPUState *cpu; |
6cabe1f3 | 791 | |
16400322 | 792 | while (all_cpu_threads_idle()) { |
ab33fcda PB |
793 | /* Start accounting real time to the virtual clock if the CPUs |
794 | are idle. */ | |
40daca54 | 795 | qemu_clock_warp(QEMU_CLOCK_VIRTUAL); |
9705fbb5 | 796 | qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex); |
16400322 | 797 | } |
296af7c9 | 798 | |
46daff13 PB |
799 | while (iothread_requesting_mutex) { |
800 | qemu_cond_wait(&qemu_io_proceeded_cond, &qemu_global_mutex); | |
801 | } | |
6cabe1f3 | 802 | |
bdc44640 | 803 | CPU_FOREACH(cpu) { |
182735ef | 804 | qemu_wait_io_event_common(cpu); |
6cabe1f3 | 805 | } |
296af7c9 BS |
806 | } |
807 | ||
fd529e8f | 808 | static void qemu_kvm_wait_io_event(CPUState *cpu) |
296af7c9 | 809 | { |
a98ae1d8 | 810 | while (cpu_thread_is_idle(cpu)) { |
f5c121b8 | 811 | qemu_cond_wait(cpu->halt_cond, &qemu_global_mutex); |
16400322 | 812 | } |
296af7c9 | 813 | |
290adf38 | 814 | qemu_kvm_eat_signals(cpu); |
509a0d78 | 815 | qemu_wait_io_event_common(cpu); |
296af7c9 BS |
816 | } |
817 | ||
7e97cd88 | 818 | static void *qemu_kvm_cpu_thread_fn(void *arg) |
296af7c9 | 819 | { |
48a106bd | 820 | CPUState *cpu = arg; |
84b4915d | 821 | int r; |
296af7c9 | 822 | |
6164e6d6 | 823 | qemu_mutex_lock(&qemu_global_mutex); |
814e612e | 824 | qemu_thread_get_self(cpu->thread); |
9f09e18a | 825 | cpu->thread_id = qemu_get_thread_id(); |
4917cf44 | 826 | current_cpu = cpu; |
296af7c9 | 827 | |
504134d2 | 828 | r = kvm_init_vcpu(cpu); |
84b4915d JK |
829 | if (r < 0) { |
830 | fprintf(stderr, "kvm_init_vcpu failed: %s\n", strerror(-r)); | |
831 | exit(1); | |
832 | } | |
296af7c9 | 833 | |
13618e05 | 834 | qemu_kvm_init_cpu_signals(cpu); |
296af7c9 BS |
835 | |
836 | /* signal CPU creation */ | |
61a46217 | 837 | cpu->created = true; |
296af7c9 BS |
838 | qemu_cond_signal(&qemu_cpu_cond); |
839 | ||
296af7c9 | 840 | while (1) { |
a1fcaa73 | 841 | if (cpu_can_run(cpu)) { |
1458c363 | 842 | r = kvm_cpu_exec(cpu); |
83f338f7 | 843 | if (r == EXCP_DEBUG) { |
91325046 | 844 | cpu_handle_guest_debug(cpu); |
83f338f7 | 845 | } |
0ab07c62 | 846 | } |
fd529e8f | 847 | qemu_kvm_wait_io_event(cpu); |
296af7c9 BS |
848 | } |
849 | ||
850 | return NULL; | |
851 | } | |
852 | ||
c7f0f3b1 AL |
853 | static void *qemu_dummy_cpu_thread_fn(void *arg) |
854 | { | |
855 | #ifdef _WIN32 | |
856 | fprintf(stderr, "qtest is not supported under Windows\n"); | |
857 | exit(1); | |
858 | #else | |
10a9021d | 859 | CPUState *cpu = arg; |
c7f0f3b1 AL |
860 | sigset_t waitset; |
861 | int r; | |
862 | ||
863 | qemu_mutex_lock_iothread(); | |
814e612e | 864 | qemu_thread_get_self(cpu->thread); |
9f09e18a | 865 | cpu->thread_id = qemu_get_thread_id(); |
c7f0f3b1 AL |
866 | |
867 | sigemptyset(&waitset); | |
868 | sigaddset(&waitset, SIG_IPI); | |
869 | ||
870 | /* signal CPU creation */ | |
61a46217 | 871 | cpu->created = true; |
c7f0f3b1 AL |
872 | qemu_cond_signal(&qemu_cpu_cond); |
873 | ||
4917cf44 | 874 | current_cpu = cpu; |
c7f0f3b1 | 875 | while (1) { |
4917cf44 | 876 | current_cpu = NULL; |
c7f0f3b1 AL |
877 | qemu_mutex_unlock_iothread(); |
878 | do { | |
879 | int sig; | |
880 | r = sigwait(&waitset, &sig); | |
881 | } while (r == -1 && (errno == EAGAIN || errno == EINTR)); | |
882 | if (r == -1) { | |
883 | perror("sigwait"); | |
884 | exit(1); | |
885 | } | |
886 | qemu_mutex_lock_iothread(); | |
4917cf44 | 887 | current_cpu = cpu; |
509a0d78 | 888 | qemu_wait_io_event_common(cpu); |
c7f0f3b1 AL |
889 | } |
890 | ||
891 | return NULL; | |
892 | #endif | |
893 | } | |
894 | ||
bdb7ca67 JK |
895 | static void tcg_exec_all(void); |
896 | ||
7e97cd88 | 897 | static void *qemu_tcg_cpu_thread_fn(void *arg) |
296af7c9 | 898 | { |
c3586ba7 | 899 | CPUState *cpu = arg; |
296af7c9 | 900 | |
55f8d6ac | 901 | qemu_tcg_init_cpu_signals(); |
814e612e | 902 | qemu_thread_get_self(cpu->thread); |
296af7c9 | 903 | |
296af7c9 | 904 | qemu_mutex_lock(&qemu_global_mutex); |
38fcbd3f AF |
905 | CPU_FOREACH(cpu) { |
906 | cpu->thread_id = qemu_get_thread_id(); | |
907 | cpu->created = true; | |
908 | } | |
296af7c9 BS |
909 | qemu_cond_signal(&qemu_cpu_cond); |
910 | ||
fa7d1867 | 911 | /* wait for initial kick-off after machine start */ |
bdc44640 | 912 | while (QTAILQ_FIRST(&cpus)->stopped) { |
fa7d1867 | 913 | qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex); |
8e564b4e JK |
914 | |
915 | /* process any pending work */ | |
bdc44640 | 916 | CPU_FOREACH(cpu) { |
182735ef | 917 | qemu_wait_io_event_common(cpu); |
8e564b4e | 918 | } |
0ab07c62 | 919 | } |
296af7c9 BS |
920 | |
921 | while (1) { | |
bdb7ca67 | 922 | tcg_exec_all(); |
ac70aafc AB |
923 | |
924 | if (use_icount) { | |
40daca54 | 925 | int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
ac70aafc AB |
926 | |
927 | if (deadline == 0) { | |
40daca54 | 928 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); |
ac70aafc | 929 | } |
3b2319a3 | 930 | } |
6cabe1f3 | 931 | qemu_tcg_wait_io_event(); |
296af7c9 BS |
932 | } |
933 | ||
934 | return NULL; | |
935 | } | |
936 | ||
2ff09a40 | 937 | static void qemu_cpu_kick_thread(CPUState *cpu) |
cc015e9a PB |
938 | { |
939 | #ifndef _WIN32 | |
940 | int err; | |
941 | ||
814e612e | 942 | err = pthread_kill(cpu->thread->thread, SIG_IPI); |
cc015e9a PB |
943 | if (err) { |
944 | fprintf(stderr, "qemu:%s: %s", __func__, strerror(err)); | |
945 | exit(1); | |
946 | } | |
947 | #else /* _WIN32 */ | |
60e82579 | 948 | if (!qemu_cpu_is_self(cpu)) { |
ed9164a3 OH |
949 | CONTEXT tcgContext; |
950 | ||
951 | if (SuspendThread(cpu->hThread) == (DWORD)-1) { | |
7f1721df | 952 | fprintf(stderr, "qemu:%s: GetLastError:%lu\n", __func__, |
ed9164a3 OH |
953 | GetLastError()); |
954 | exit(1); | |
955 | } | |
956 | ||
957 | /* On multi-core systems, we are not sure that the thread is actually | |
958 | * suspended until we can get the context. | |
959 | */ | |
960 | tcgContext.ContextFlags = CONTEXT_CONTROL; | |
961 | while (GetThreadContext(cpu->hThread, &tcgContext) != 0) { | |
962 | continue; | |
963 | } | |
964 | ||
cc015e9a | 965 | cpu_signal(0); |
ed9164a3 OH |
966 | |
967 | if (ResumeThread(cpu->hThread) == (DWORD)-1) { | |
7f1721df | 968 | fprintf(stderr, "qemu:%s: GetLastError:%lu\n", __func__, |
ed9164a3 OH |
969 | GetLastError()); |
970 | exit(1); | |
971 | } | |
cc015e9a PB |
972 | } |
973 | #endif | |
974 | } | |
975 | ||
c08d7424 | 976 | void qemu_cpu_kick(CPUState *cpu) |
296af7c9 | 977 | { |
f5c121b8 | 978 | qemu_cond_broadcast(cpu->halt_cond); |
216fc9a4 | 979 | if (!tcg_enabled() && !cpu->thread_kicked) { |
2ff09a40 | 980 | qemu_cpu_kick_thread(cpu); |
216fc9a4 | 981 | cpu->thread_kicked = true; |
aa2c364b | 982 | } |
296af7c9 BS |
983 | } |
984 | ||
46d62fac | 985 | void qemu_cpu_kick_self(void) |
296af7c9 | 986 | { |
b55c22c6 | 987 | #ifndef _WIN32 |
4917cf44 | 988 | assert(current_cpu); |
296af7c9 | 989 | |
4917cf44 AF |
990 | if (!current_cpu->thread_kicked) { |
991 | qemu_cpu_kick_thread(current_cpu); | |
992 | current_cpu->thread_kicked = true; | |
296af7c9 | 993 | } |
b55c22c6 PB |
994 | #else |
995 | abort(); | |
996 | #endif | |
296af7c9 BS |
997 | } |
998 | ||
60e82579 | 999 | bool qemu_cpu_is_self(CPUState *cpu) |
296af7c9 | 1000 | { |
814e612e | 1001 | return qemu_thread_is_self(cpu->thread); |
296af7c9 BS |
1002 | } |
1003 | ||
aa723c23 JQ |
1004 | static bool qemu_in_vcpu_thread(void) |
1005 | { | |
4917cf44 | 1006 | return current_cpu && qemu_cpu_is_self(current_cpu); |
aa723c23 JQ |
1007 | } |
1008 | ||
296af7c9 BS |
1009 | void qemu_mutex_lock_iothread(void) |
1010 | { | |
c7f0f3b1 | 1011 | if (!tcg_enabled()) { |
296af7c9 | 1012 | qemu_mutex_lock(&qemu_global_mutex); |
1a28cac3 | 1013 | } else { |
46daff13 | 1014 | iothread_requesting_mutex = true; |
1a28cac3 | 1015 | if (qemu_mutex_trylock(&qemu_global_mutex)) { |
182735ef | 1016 | qemu_cpu_kick_thread(first_cpu); |
1a28cac3 MT |
1017 | qemu_mutex_lock(&qemu_global_mutex); |
1018 | } | |
46daff13 PB |
1019 | iothread_requesting_mutex = false; |
1020 | qemu_cond_broadcast(&qemu_io_proceeded_cond); | |
1a28cac3 | 1021 | } |
296af7c9 BS |
1022 | } |
1023 | ||
1024 | void qemu_mutex_unlock_iothread(void) | |
1025 | { | |
1026 | qemu_mutex_unlock(&qemu_global_mutex); | |
1027 | } | |
1028 | ||
1029 | static int all_vcpus_paused(void) | |
1030 | { | |
bdc44640 | 1031 | CPUState *cpu; |
296af7c9 | 1032 | |
bdc44640 | 1033 | CPU_FOREACH(cpu) { |
182735ef | 1034 | if (!cpu->stopped) { |
296af7c9 | 1035 | return 0; |
0ab07c62 | 1036 | } |
296af7c9 BS |
1037 | } |
1038 | ||
1039 | return 1; | |
1040 | } | |
1041 | ||
1042 | void pause_all_vcpus(void) | |
1043 | { | |
bdc44640 | 1044 | CPUState *cpu; |
296af7c9 | 1045 | |
40daca54 | 1046 | qemu_clock_enable(QEMU_CLOCK_VIRTUAL, false); |
bdc44640 | 1047 | CPU_FOREACH(cpu) { |
182735ef AF |
1048 | cpu->stop = true; |
1049 | qemu_cpu_kick(cpu); | |
296af7c9 BS |
1050 | } |
1051 | ||
aa723c23 | 1052 | if (qemu_in_vcpu_thread()) { |
d798e974 JK |
1053 | cpu_stop_current(); |
1054 | if (!kvm_enabled()) { | |
bdc44640 | 1055 | CPU_FOREACH(cpu) { |
182735ef AF |
1056 | cpu->stop = false; |
1057 | cpu->stopped = true; | |
d798e974 JK |
1058 | } |
1059 | return; | |
1060 | } | |
1061 | } | |
1062 | ||
296af7c9 | 1063 | while (!all_vcpus_paused()) { |
be7d6c57 | 1064 | qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex); |
bdc44640 | 1065 | CPU_FOREACH(cpu) { |
182735ef | 1066 | qemu_cpu_kick(cpu); |
296af7c9 BS |
1067 | } |
1068 | } | |
1069 | } | |
1070 | ||
2993683b IM |
1071 | void cpu_resume(CPUState *cpu) |
1072 | { | |
1073 | cpu->stop = false; | |
1074 | cpu->stopped = false; | |
1075 | qemu_cpu_kick(cpu); | |
1076 | } | |
1077 | ||
296af7c9 BS |
1078 | void resume_all_vcpus(void) |
1079 | { | |
bdc44640 | 1080 | CPUState *cpu; |
296af7c9 | 1081 | |
40daca54 | 1082 | qemu_clock_enable(QEMU_CLOCK_VIRTUAL, true); |
bdc44640 | 1083 | CPU_FOREACH(cpu) { |
182735ef | 1084 | cpu_resume(cpu); |
296af7c9 BS |
1085 | } |
1086 | } | |
1087 | ||
e5ab30a2 | 1088 | static void qemu_tcg_init_vcpu(CPUState *cpu) |
296af7c9 | 1089 | { |
296af7c9 BS |
1090 | /* share a single thread for all cpus with TCG */ |
1091 | if (!tcg_cpu_thread) { | |
814e612e | 1092 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1093 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1094 | qemu_cond_init(cpu->halt_cond); | |
1095 | tcg_halt_cond = cpu->halt_cond; | |
c3586ba7 | 1096 | qemu_thread_create(cpu->thread, qemu_tcg_cpu_thread_fn, cpu, |
1ecf47bf PB |
1097 | QEMU_THREAD_JOINABLE); |
1098 | #ifdef _WIN32 | |
814e612e | 1099 | cpu->hThread = qemu_thread_get_handle(cpu->thread); |
1ecf47bf | 1100 | #endif |
61a46217 | 1101 | while (!cpu->created) { |
18a85728 | 1102 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 1103 | } |
814e612e | 1104 | tcg_cpu_thread = cpu->thread; |
296af7c9 | 1105 | } else { |
814e612e | 1106 | cpu->thread = tcg_cpu_thread; |
f5c121b8 | 1107 | cpu->halt_cond = tcg_halt_cond; |
296af7c9 BS |
1108 | } |
1109 | } | |
1110 | ||
48a106bd | 1111 | static void qemu_kvm_start_vcpu(CPUState *cpu) |
296af7c9 | 1112 | { |
814e612e | 1113 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1114 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1115 | qemu_cond_init(cpu->halt_cond); | |
48a106bd | 1116 | qemu_thread_create(cpu->thread, qemu_kvm_cpu_thread_fn, cpu, |
1ecf47bf | 1117 | QEMU_THREAD_JOINABLE); |
61a46217 | 1118 | while (!cpu->created) { |
18a85728 | 1119 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 1120 | } |
296af7c9 BS |
1121 | } |
1122 | ||
10a9021d | 1123 | static void qemu_dummy_start_vcpu(CPUState *cpu) |
c7f0f3b1 | 1124 | { |
814e612e | 1125 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1126 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1127 | qemu_cond_init(cpu->halt_cond); | |
10a9021d | 1128 | qemu_thread_create(cpu->thread, qemu_dummy_cpu_thread_fn, cpu, |
c7f0f3b1 | 1129 | QEMU_THREAD_JOINABLE); |
61a46217 | 1130 | while (!cpu->created) { |
c7f0f3b1 AL |
1131 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
1132 | } | |
1133 | } | |
1134 | ||
c643bed9 | 1135 | void qemu_init_vcpu(CPUState *cpu) |
296af7c9 | 1136 | { |
ce3960eb AF |
1137 | cpu->nr_cores = smp_cores; |
1138 | cpu->nr_threads = smp_threads; | |
f324e766 | 1139 | cpu->stopped = true; |
0ab07c62 | 1140 | if (kvm_enabled()) { |
48a106bd | 1141 | qemu_kvm_start_vcpu(cpu); |
c7f0f3b1 | 1142 | } else if (tcg_enabled()) { |
e5ab30a2 | 1143 | qemu_tcg_init_vcpu(cpu); |
c7f0f3b1 | 1144 | } else { |
10a9021d | 1145 | qemu_dummy_start_vcpu(cpu); |
0ab07c62 | 1146 | } |
296af7c9 BS |
1147 | } |
1148 | ||
b4a3d965 | 1149 | void cpu_stop_current(void) |
296af7c9 | 1150 | { |
4917cf44 AF |
1151 | if (current_cpu) { |
1152 | current_cpu->stop = false; | |
1153 | current_cpu->stopped = true; | |
1154 | cpu_exit(current_cpu); | |
67bb172f | 1155 | qemu_cond_signal(&qemu_pause_cond); |
b4a3d965 | 1156 | } |
296af7c9 BS |
1157 | } |
1158 | ||
56983463 | 1159 | int vm_stop(RunState state) |
296af7c9 | 1160 | { |
aa723c23 | 1161 | if (qemu_in_vcpu_thread()) { |
1dfb4dd9 | 1162 | qemu_system_vmstop_request(state); |
296af7c9 BS |
1163 | /* |
1164 | * FIXME: should not return to device code in case | |
1165 | * vm_stop() has been requested. | |
1166 | */ | |
b4a3d965 | 1167 | cpu_stop_current(); |
56983463 | 1168 | return 0; |
296af7c9 | 1169 | } |
56983463 KW |
1170 | |
1171 | return do_vm_stop(state); | |
296af7c9 BS |
1172 | } |
1173 | ||
8a9236f1 LC |
1174 | /* does a state transition even if the VM is already stopped, |
1175 | current state is forgotten forever */ | |
56983463 | 1176 | int vm_stop_force_state(RunState state) |
8a9236f1 LC |
1177 | { |
1178 | if (runstate_is_running()) { | |
56983463 | 1179 | return vm_stop(state); |
8a9236f1 LC |
1180 | } else { |
1181 | runstate_set(state); | |
594a45ce KW |
1182 | /* Make sure to return an error if the flush in a previous vm_stop() |
1183 | * failed. */ | |
1184 | return bdrv_flush_all(); | |
8a9236f1 LC |
1185 | } |
1186 | } | |
1187 | ||
9349b4f9 | 1188 | static int tcg_cpu_exec(CPUArchState *env) |
296af7c9 BS |
1189 | { |
1190 | int ret; | |
1191 | #ifdef CONFIG_PROFILER | |
1192 | int64_t ti; | |
1193 | #endif | |
1194 | ||
1195 | #ifdef CONFIG_PROFILER | |
1196 | ti = profile_getclock(); | |
1197 | #endif | |
1198 | if (use_icount) { | |
1199 | int64_t count; | |
ac70aafc | 1200 | int64_t deadline; |
296af7c9 BS |
1201 | int decr; |
1202 | qemu_icount -= (env->icount_decr.u16.low + env->icount_extra); | |
1203 | env->icount_decr.u16.low = 0; | |
1204 | env->icount_extra = 0; | |
40daca54 | 1205 | deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
ac70aafc AB |
1206 | |
1207 | /* Maintain prior (possibly buggy) behaviour where if no deadline | |
40daca54 | 1208 | * was set (as there is no QEMU_CLOCK_VIRTUAL timer) or it is more than |
ac70aafc AB |
1209 | * INT32_MAX nanoseconds ahead, we still use INT32_MAX |
1210 | * nanoseconds. | |
1211 | */ | |
1212 | if ((deadline < 0) || (deadline > INT32_MAX)) { | |
1213 | deadline = INT32_MAX; | |
1214 | } | |
1215 | ||
1216 | count = qemu_icount_round(deadline); | |
296af7c9 BS |
1217 | qemu_icount += count; |
1218 | decr = (count > 0xffff) ? 0xffff : count; | |
1219 | count -= decr; | |
1220 | env->icount_decr.u16.low = decr; | |
1221 | env->icount_extra = count; | |
1222 | } | |
1223 | ret = cpu_exec(env); | |
1224 | #ifdef CONFIG_PROFILER | |
1225 | qemu_time += profile_getclock() - ti; | |
1226 | #endif | |
1227 | if (use_icount) { | |
1228 | /* Fold pending instructions back into the | |
1229 | instruction counter, and clear the interrupt flag. */ | |
1230 | qemu_icount -= (env->icount_decr.u16.low | |
1231 | + env->icount_extra); | |
1232 | env->icount_decr.u32 = 0; | |
1233 | env->icount_extra = 0; | |
1234 | } | |
1235 | return ret; | |
1236 | } | |
1237 | ||
bdb7ca67 | 1238 | static void tcg_exec_all(void) |
296af7c9 | 1239 | { |
9a36085b JK |
1240 | int r; |
1241 | ||
40daca54 AB |
1242 | /* Account partial waits to QEMU_CLOCK_VIRTUAL. */ |
1243 | qemu_clock_warp(QEMU_CLOCK_VIRTUAL); | |
ab33fcda | 1244 | |
0ab07c62 | 1245 | if (next_cpu == NULL) { |
296af7c9 | 1246 | next_cpu = first_cpu; |
0ab07c62 | 1247 | } |
bdc44640 | 1248 | for (; next_cpu != NULL && !exit_request; next_cpu = CPU_NEXT(next_cpu)) { |
182735ef AF |
1249 | CPUState *cpu = next_cpu; |
1250 | CPUArchState *env = cpu->env_ptr; | |
296af7c9 | 1251 | |
40daca54 | 1252 | qemu_clock_enable(QEMU_CLOCK_VIRTUAL, |
ed2803da | 1253 | (cpu->singlestep_enabled & SSTEP_NOTIMER) == 0); |
296af7c9 | 1254 | |
a1fcaa73 | 1255 | if (cpu_can_run(cpu)) { |
bdb7ca67 | 1256 | r = tcg_cpu_exec(env); |
9a36085b | 1257 | if (r == EXCP_DEBUG) { |
91325046 | 1258 | cpu_handle_guest_debug(cpu); |
3c638d06 JK |
1259 | break; |
1260 | } | |
f324e766 | 1261 | } else if (cpu->stop || cpu->stopped) { |
296af7c9 BS |
1262 | break; |
1263 | } | |
1264 | } | |
c629a4bc | 1265 | exit_request = 0; |
296af7c9 BS |
1266 | } |
1267 | ||
1268 | void set_numa_modes(void) | |
1269 | { | |
1b1ed8dc | 1270 | CPUState *cpu; |
296af7c9 BS |
1271 | int i; |
1272 | ||
bdc44640 | 1273 | CPU_FOREACH(cpu) { |
296af7c9 | 1274 | for (i = 0; i < nb_numa_nodes; i++) { |
55e5c285 | 1275 | if (test_bit(cpu->cpu_index, node_cpumask[i])) { |
1b1ed8dc | 1276 | cpu->numa_node = i; |
296af7c9 BS |
1277 | } |
1278 | } | |
1279 | } | |
1280 | } | |
1281 | ||
9a78eead | 1282 | void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg) |
262353cb BS |
1283 | { |
1284 | /* XXX: implement xxx_cpu_list for targets that still miss it */ | |
e916cbf8 PM |
1285 | #if defined(cpu_list) |
1286 | cpu_list(f, cpu_fprintf); | |
262353cb BS |
1287 | #endif |
1288 | } | |
de0b36b6 LC |
1289 | |
1290 | CpuInfoList *qmp_query_cpus(Error **errp) | |
1291 | { | |
1292 | CpuInfoList *head = NULL, *cur_item = NULL; | |
182735ef | 1293 | CPUState *cpu; |
de0b36b6 | 1294 | |
bdc44640 | 1295 | CPU_FOREACH(cpu) { |
de0b36b6 | 1296 | CpuInfoList *info; |
182735ef AF |
1297 | #if defined(TARGET_I386) |
1298 | X86CPU *x86_cpu = X86_CPU(cpu); | |
1299 | CPUX86State *env = &x86_cpu->env; | |
1300 | #elif defined(TARGET_PPC) | |
1301 | PowerPCCPU *ppc_cpu = POWERPC_CPU(cpu); | |
1302 | CPUPPCState *env = &ppc_cpu->env; | |
1303 | #elif defined(TARGET_SPARC) | |
1304 | SPARCCPU *sparc_cpu = SPARC_CPU(cpu); | |
1305 | CPUSPARCState *env = &sparc_cpu->env; | |
1306 | #elif defined(TARGET_MIPS) | |
1307 | MIPSCPU *mips_cpu = MIPS_CPU(cpu); | |
1308 | CPUMIPSState *env = &mips_cpu->env; | |
1309 | #endif | |
de0b36b6 | 1310 | |
cb446eca | 1311 | cpu_synchronize_state(cpu); |
de0b36b6 LC |
1312 | |
1313 | info = g_malloc0(sizeof(*info)); | |
1314 | info->value = g_malloc0(sizeof(*info->value)); | |
55e5c285 | 1315 | info->value->CPU = cpu->cpu_index; |
182735ef | 1316 | info->value->current = (cpu == first_cpu); |
259186a7 | 1317 | info->value->halted = cpu->halted; |
9f09e18a | 1318 | info->value->thread_id = cpu->thread_id; |
de0b36b6 LC |
1319 | #if defined(TARGET_I386) |
1320 | info->value->has_pc = true; | |
1321 | info->value->pc = env->eip + env->segs[R_CS].base; | |
1322 | #elif defined(TARGET_PPC) | |
1323 | info->value->has_nip = true; | |
1324 | info->value->nip = env->nip; | |
1325 | #elif defined(TARGET_SPARC) | |
1326 | info->value->has_pc = true; | |
1327 | info->value->pc = env->pc; | |
1328 | info->value->has_npc = true; | |
1329 | info->value->npc = env->npc; | |
1330 | #elif defined(TARGET_MIPS) | |
1331 | info->value->has_PC = true; | |
1332 | info->value->PC = env->active_tc.PC; | |
1333 | #endif | |
1334 | ||
1335 | /* XXX: waiting for the qapi to support GSList */ | |
1336 | if (!cur_item) { | |
1337 | head = cur_item = info; | |
1338 | } else { | |
1339 | cur_item->next = info; | |
1340 | cur_item = info; | |
1341 | } | |
1342 | } | |
1343 | ||
1344 | return head; | |
1345 | } | |
0cfd6a9a LC |
1346 | |
1347 | void qmp_memsave(int64_t addr, int64_t size, const char *filename, | |
1348 | bool has_cpu, int64_t cpu_index, Error **errp) | |
1349 | { | |
1350 | FILE *f; | |
1351 | uint32_t l; | |
55e5c285 | 1352 | CPUState *cpu; |
0cfd6a9a LC |
1353 | uint8_t buf[1024]; |
1354 | ||
1355 | if (!has_cpu) { | |
1356 | cpu_index = 0; | |
1357 | } | |
1358 | ||
151d1322 AF |
1359 | cpu = qemu_get_cpu(cpu_index); |
1360 | if (cpu == NULL) { | |
0cfd6a9a LC |
1361 | error_set(errp, QERR_INVALID_PARAMETER_VALUE, "cpu-index", |
1362 | "a CPU number"); | |
1363 | return; | |
1364 | } | |
1365 | ||
1366 | f = fopen(filename, "wb"); | |
1367 | if (!f) { | |
618da851 | 1368 | error_setg_file_open(errp, errno, filename); |
0cfd6a9a LC |
1369 | return; |
1370 | } | |
1371 | ||
1372 | while (size != 0) { | |
1373 | l = sizeof(buf); | |
1374 | if (l > size) | |
1375 | l = size; | |
f17ec444 | 1376 | cpu_memory_rw_debug(cpu, addr, buf, l, 0); |
0cfd6a9a LC |
1377 | if (fwrite(buf, 1, l, f) != l) { |
1378 | error_set(errp, QERR_IO_ERROR); | |
1379 | goto exit; | |
1380 | } | |
1381 | addr += l; | |
1382 | size -= l; | |
1383 | } | |
1384 | ||
1385 | exit: | |
1386 | fclose(f); | |
1387 | } | |
6d3962bf LC |
1388 | |
1389 | void qmp_pmemsave(int64_t addr, int64_t size, const char *filename, | |
1390 | Error **errp) | |
1391 | { | |
1392 | FILE *f; | |
1393 | uint32_t l; | |
1394 | uint8_t buf[1024]; | |
1395 | ||
1396 | f = fopen(filename, "wb"); | |
1397 | if (!f) { | |
618da851 | 1398 | error_setg_file_open(errp, errno, filename); |
6d3962bf LC |
1399 | return; |
1400 | } | |
1401 | ||
1402 | while (size != 0) { | |
1403 | l = sizeof(buf); | |
1404 | if (l > size) | |
1405 | l = size; | |
1406 | cpu_physical_memory_rw(addr, buf, l, 0); | |
1407 | if (fwrite(buf, 1, l, f) != l) { | |
1408 | error_set(errp, QERR_IO_ERROR); | |
1409 | goto exit; | |
1410 | } | |
1411 | addr += l; | |
1412 | size -= l; | |
1413 | } | |
1414 | ||
1415 | exit: | |
1416 | fclose(f); | |
1417 | } | |
ab49ab5c LC |
1418 | |
1419 | void qmp_inject_nmi(Error **errp) | |
1420 | { | |
1421 | #if defined(TARGET_I386) | |
182735ef AF |
1422 | CPUState *cs; |
1423 | ||
bdc44640 | 1424 | CPU_FOREACH(cs) { |
182735ef AF |
1425 | X86CPU *cpu = X86_CPU(cs); |
1426 | CPUX86State *env = &cpu->env; | |
ab49ab5c | 1427 | |
02c09195 | 1428 | if (!env->apic_state) { |
182735ef | 1429 | cpu_interrupt(cs, CPU_INTERRUPT_NMI); |
02c09195 JK |
1430 | } else { |
1431 | apic_deliver_nmi(env->apic_state); | |
1432 | } | |
ab49ab5c | 1433 | } |
7f7f9752 ED |
1434 | #elif defined(TARGET_S390X) |
1435 | CPUState *cs; | |
1436 | S390CPU *cpu; | |
1437 | ||
bdc44640 | 1438 | CPU_FOREACH(cs) { |
7f7f9752 ED |
1439 | cpu = S390_CPU(cs); |
1440 | if (cpu->env.cpu_num == monitor_get_cpu_index()) { | |
1441 | if (s390_cpu_restart(S390_CPU(cs)) == -1) { | |
1442 | error_set(errp, QERR_UNSUPPORTED); | |
1443 | return; | |
1444 | } | |
1445 | break; | |
1446 | } | |
1447 | } | |
ab49ab5c LC |
1448 | #else |
1449 | error_set(errp, QERR_UNSUPPORTED); | |
1450 | #endif | |
1451 | } |