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cpus: Change cpu_handle_guest_debug() argument to CPUState
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CommitLineData
296af7c9
BS
1/*
2 * QEMU System Emulator
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25/* Needed early for CONFIG_BSD etc. */
26#include "config-host.h"
27
83c9089e 28#include "monitor/monitor.h"
9c17d615 29#include "sysemu/sysemu.h"
022c62cb 30#include "exec/gdbstub.h"
9c17d615
PB
31#include "sysemu/dma.h"
32#include "sysemu/kvm.h"
de0b36b6 33#include "qmp-commands.h"
296af7c9 34
1de7afc9 35#include "qemu/thread.h"
9c17d615
PB
36#include "sysemu/cpus.h"
37#include "sysemu/qtest.h"
1de7afc9
PB
38#include "qemu/main-loop.h"
39#include "qemu/bitmap.h"
0ff0fc19
JK
40
41#ifndef _WIN32
1de7afc9 42#include "qemu/compatfd.h"
0ff0fc19 43#endif
296af7c9 44
6d9cb73c
JK
45#ifdef CONFIG_LINUX
46
47#include <sys/prctl.h>
48
c0532a76
MT
49#ifndef PR_MCE_KILL
50#define PR_MCE_KILL 33
51#endif
52
6d9cb73c
JK
53#ifndef PR_MCE_KILL_SET
54#define PR_MCE_KILL_SET 1
55#endif
56
57#ifndef PR_MCE_KILL_EARLY
58#define PR_MCE_KILL_EARLY 1
59#endif
60
61#endif /* CONFIG_LINUX */
62
9349b4f9 63static CPUArchState *next_cpu;
296af7c9 64
a98ae1d8 65static bool cpu_thread_is_idle(CPUState *cpu)
ac873f1e 66{
c64ca814 67 if (cpu->stop || cpu->queued_work_first) {
ac873f1e
PM
68 return false;
69 }
f324e766 70 if (cpu->stopped || !runstate_is_running()) {
ac873f1e
PM
71 return true;
72 }
259186a7 73 if (!cpu->halted || qemu_cpu_has_work(cpu) ||
7ae26bd4 74 kvm_async_interrupts_enabled()) {
ac873f1e
PM
75 return false;
76 }
77 return true;
78}
79
80static bool all_cpu_threads_idle(void)
81{
82 CPUArchState *env;
83
84 for (env = first_cpu; env != NULL; env = env->next_cpu) {
a98ae1d8 85 if (!cpu_thread_is_idle(ENV_GET_CPU(env))) {
ac873f1e
PM
86 return false;
87 }
88 }
89 return true;
90}
91
946fb27c
PB
92/***********************************************************/
93/* guest cycle counter */
94
95/* Conversion factor from emulated instructions to virtual clock ticks. */
96static int icount_time_shift;
97/* Arbitrarily pick 1MIPS as the minimum allowable speed. */
98#define MAX_ICOUNT_SHIFT 10
99/* Compensate for varying guest execution speed. */
100static int64_t qemu_icount_bias;
101static QEMUTimer *icount_rt_timer;
102static QEMUTimer *icount_vm_timer;
103static QEMUTimer *icount_warp_timer;
104static int64_t vm_clock_warp_start;
105static int64_t qemu_icount;
106
107typedef struct TimersState {
108 int64_t cpu_ticks_prev;
109 int64_t cpu_ticks_offset;
110 int64_t cpu_clock_offset;
111 int32_t cpu_ticks_enabled;
112 int64_t dummy;
113} TimersState;
114
115TimersState timers_state;
116
117/* Return the virtual CPU time, based on the instruction counter. */
118int64_t cpu_get_icount(void)
119{
120 int64_t icount;
9349b4f9 121 CPUArchState *env = cpu_single_env;
946fb27c
PB
122
123 icount = qemu_icount;
124 if (env) {
125 if (!can_do_io(env)) {
126 fprintf(stderr, "Bad clock read\n");
127 }
128 icount -= (env->icount_decr.u16.low + env->icount_extra);
129 }
130 return qemu_icount_bias + (icount << icount_time_shift);
131}
132
133/* return the host CPU cycle counter and handle stop/restart */
134int64_t cpu_get_ticks(void)
135{
136 if (use_icount) {
137 return cpu_get_icount();
138 }
139 if (!timers_state.cpu_ticks_enabled) {
140 return timers_state.cpu_ticks_offset;
141 } else {
142 int64_t ticks;
143 ticks = cpu_get_real_ticks();
144 if (timers_state.cpu_ticks_prev > ticks) {
145 /* Note: non increasing ticks may happen if the host uses
146 software suspend */
147 timers_state.cpu_ticks_offset += timers_state.cpu_ticks_prev - ticks;
148 }
149 timers_state.cpu_ticks_prev = ticks;
150 return ticks + timers_state.cpu_ticks_offset;
151 }
152}
153
154/* return the host CPU monotonic timer and handle stop/restart */
155int64_t cpu_get_clock(void)
156{
157 int64_t ti;
158 if (!timers_state.cpu_ticks_enabled) {
159 return timers_state.cpu_clock_offset;
160 } else {
161 ti = get_clock();
162 return ti + timers_state.cpu_clock_offset;
163 }
164}
165
166/* enable cpu_get_ticks() */
167void cpu_enable_ticks(void)
168{
169 if (!timers_state.cpu_ticks_enabled) {
170 timers_state.cpu_ticks_offset -= cpu_get_real_ticks();
171 timers_state.cpu_clock_offset -= get_clock();
172 timers_state.cpu_ticks_enabled = 1;
173 }
174}
175
176/* disable cpu_get_ticks() : the clock is stopped. You must not call
177 cpu_get_ticks() after that. */
178void cpu_disable_ticks(void)
179{
180 if (timers_state.cpu_ticks_enabled) {
181 timers_state.cpu_ticks_offset = cpu_get_ticks();
182 timers_state.cpu_clock_offset = cpu_get_clock();
183 timers_state.cpu_ticks_enabled = 0;
184 }
185}
186
187/* Correlation between real and virtual time is always going to be
188 fairly approximate, so ignore small variation.
189 When the guest is idle real and virtual time will be aligned in
190 the IO wait loop. */
191#define ICOUNT_WOBBLE (get_ticks_per_sec() / 10)
192
193static void icount_adjust(void)
194{
195 int64_t cur_time;
196 int64_t cur_icount;
197 int64_t delta;
198 static int64_t last_delta;
199 /* If the VM is not running, then do nothing. */
200 if (!runstate_is_running()) {
201 return;
202 }
203 cur_time = cpu_get_clock();
204 cur_icount = qemu_get_clock_ns(vm_clock);
205 delta = cur_icount - cur_time;
206 /* FIXME: This is a very crude algorithm, somewhat prone to oscillation. */
207 if (delta > 0
208 && last_delta + ICOUNT_WOBBLE < delta * 2
209 && icount_time_shift > 0) {
210 /* The guest is getting too far ahead. Slow time down. */
211 icount_time_shift--;
212 }
213 if (delta < 0
214 && last_delta - ICOUNT_WOBBLE > delta * 2
215 && icount_time_shift < MAX_ICOUNT_SHIFT) {
216 /* The guest is getting too far behind. Speed time up. */
217 icount_time_shift++;
218 }
219 last_delta = delta;
220 qemu_icount_bias = cur_icount - (qemu_icount << icount_time_shift);
221}
222
223static void icount_adjust_rt(void *opaque)
224{
225 qemu_mod_timer(icount_rt_timer,
226 qemu_get_clock_ms(rt_clock) + 1000);
227 icount_adjust();
228}
229
230static void icount_adjust_vm(void *opaque)
231{
232 qemu_mod_timer(icount_vm_timer,
233 qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10);
234 icount_adjust();
235}
236
237static int64_t qemu_icount_round(int64_t count)
238{
239 return (count + (1 << icount_time_shift) - 1) >> icount_time_shift;
240}
241
242static void icount_warp_rt(void *opaque)
243{
244 if (vm_clock_warp_start == -1) {
245 return;
246 }
247
248 if (runstate_is_running()) {
249 int64_t clock = qemu_get_clock_ns(rt_clock);
250 int64_t warp_delta = clock - vm_clock_warp_start;
251 if (use_icount == 1) {
252 qemu_icount_bias += warp_delta;
253 } else {
254 /*
255 * In adaptive mode, do not let the vm_clock run too
256 * far ahead of real time.
257 */
258 int64_t cur_time = cpu_get_clock();
259 int64_t cur_icount = qemu_get_clock_ns(vm_clock);
260 int64_t delta = cur_time - cur_icount;
261 qemu_icount_bias += MIN(warp_delta, delta);
262 }
263 if (qemu_clock_expired(vm_clock)) {
264 qemu_notify_event();
265 }
266 }
267 vm_clock_warp_start = -1;
268}
269
8156be56
PB
270void qtest_clock_warp(int64_t dest)
271{
272 int64_t clock = qemu_get_clock_ns(vm_clock);
273 assert(qtest_enabled());
274 while (clock < dest) {
275 int64_t deadline = qemu_clock_deadline(vm_clock);
276 int64_t warp = MIN(dest - clock, deadline);
277 qemu_icount_bias += warp;
278 qemu_run_timers(vm_clock);
279 clock = qemu_get_clock_ns(vm_clock);
280 }
281 qemu_notify_event();
282}
283
946fb27c
PB
284void qemu_clock_warp(QEMUClock *clock)
285{
286 int64_t deadline;
287
288 /*
289 * There are too many global variables to make the "warp" behavior
290 * applicable to other clocks. But a clock argument removes the
291 * need for if statements all over the place.
292 */
293 if (clock != vm_clock || !use_icount) {
294 return;
295 }
296
297 /*
298 * If the CPUs have been sleeping, advance the vm_clock timer now. This
299 * ensures that the deadline for the timer is computed correctly below.
300 * This also makes sure that the insn counter is synchronized before the
301 * CPU starts running, in case the CPU is woken by an event other than
302 * the earliest vm_clock timer.
303 */
304 icount_warp_rt(NULL);
305 if (!all_cpu_threads_idle() || !qemu_clock_has_timers(vm_clock)) {
306 qemu_del_timer(icount_warp_timer);
307 return;
308 }
309
8156be56
PB
310 if (qtest_enabled()) {
311 /* When testing, qtest commands advance icount. */
312 return;
313 }
314
946fb27c
PB
315 vm_clock_warp_start = qemu_get_clock_ns(rt_clock);
316 deadline = qemu_clock_deadline(vm_clock);
317 if (deadline > 0) {
318 /*
319 * Ensure the vm_clock proceeds even when the virtual CPU goes to
320 * sleep. Otherwise, the CPU might be waiting for a future timer
321 * interrupt to wake it up, but the interrupt never comes because
322 * the vCPU isn't running any insns and thus doesn't advance the
323 * vm_clock.
324 *
325 * An extreme solution for this problem would be to never let VCPUs
326 * sleep in icount mode if there is a pending vm_clock timer; rather
327 * time could just advance to the next vm_clock event. Instead, we
328 * do stop VCPUs and only advance vm_clock after some "real" time,
329 * (related to the time left until the next event) has passed. This
330 * rt_clock timer will do this. This avoids that the warps are too
331 * visible externally---for example, you will not be sending network
07f35073 332 * packets continuously instead of every 100ms.
946fb27c
PB
333 */
334 qemu_mod_timer(icount_warp_timer, vm_clock_warp_start + deadline);
335 } else {
336 qemu_notify_event();
337 }
338}
339
340static const VMStateDescription vmstate_timers = {
341 .name = "timer",
342 .version_id = 2,
343 .minimum_version_id = 1,
344 .minimum_version_id_old = 1,
345 .fields = (VMStateField[]) {
346 VMSTATE_INT64(cpu_ticks_offset, TimersState),
347 VMSTATE_INT64(dummy, TimersState),
348 VMSTATE_INT64_V(cpu_clock_offset, TimersState, 2),
349 VMSTATE_END_OF_LIST()
350 }
351};
352
353void configure_icount(const char *option)
354{
355 vmstate_register(NULL, 0, &vmstate_timers, &timers_state);
356 if (!option) {
357 return;
358 }
359
360 icount_warp_timer = qemu_new_timer_ns(rt_clock, icount_warp_rt, NULL);
361 if (strcmp(option, "auto") != 0) {
362 icount_time_shift = strtol(option, NULL, 0);
363 use_icount = 1;
364 return;
365 }
366
367 use_icount = 2;
368
369 /* 125MIPS seems a reasonable initial guess at the guest speed.
370 It will be corrected fairly quickly anyway. */
371 icount_time_shift = 3;
372
373 /* Have both realtime and virtual time triggers for speed adjustment.
374 The realtime trigger catches emulated time passing too slowly,
375 the virtual time trigger catches emulated time passing too fast.
376 Realtime triggers occur even when idle, so use them less frequently
377 than VM triggers. */
378 icount_rt_timer = qemu_new_timer_ms(rt_clock, icount_adjust_rt, NULL);
379 qemu_mod_timer(icount_rt_timer,
380 qemu_get_clock_ms(rt_clock) + 1000);
381 icount_vm_timer = qemu_new_timer_ns(vm_clock, icount_adjust_vm, NULL);
382 qemu_mod_timer(icount_vm_timer,
383 qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10);
384}
385
296af7c9
BS
386/***********************************************************/
387void hw_error(const char *fmt, ...)
388{
389 va_list ap;
9349b4f9 390 CPUArchState *env;
55e5c285 391 CPUState *cpu;
296af7c9
BS
392
393 va_start(ap, fmt);
394 fprintf(stderr, "qemu: hardware error: ");
395 vfprintf(stderr, fmt, ap);
396 fprintf(stderr, "\n");
55e5c285
AF
397 for (env = first_cpu; env != NULL; env = env->next_cpu) {
398 cpu = ENV_GET_CPU(env);
399 fprintf(stderr, "CPU #%d:\n", cpu->cpu_index);
878096ee 400 cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU);
296af7c9
BS
401 }
402 va_end(ap);
403 abort();
404}
405
406void cpu_synchronize_all_states(void)
407{
cb446eca 408 CPUArchState *env;
296af7c9 409
cb446eca
AF
410 for (env = first_cpu; env; env = env->next_cpu) {
411 cpu_synchronize_state(ENV_GET_CPU(env));
296af7c9
BS
412 }
413}
414
415void cpu_synchronize_all_post_reset(void)
416{
9349b4f9 417 CPUArchState *cpu;
296af7c9
BS
418
419 for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
3f24a58f 420 cpu_synchronize_post_reset(ENV_GET_CPU(cpu));
296af7c9
BS
421 }
422}
423
424void cpu_synchronize_all_post_init(void)
425{
9349b4f9 426 CPUArchState *cpu;
296af7c9
BS
427
428 for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
3f24a58f 429 cpu_synchronize_post_init(ENV_GET_CPU(cpu));
296af7c9
BS
430 }
431}
432
2fa45344 433bool cpu_is_stopped(CPUState *cpu)
3ae9501c 434{
f324e766 435 return !runstate_is_running() || cpu->stopped;
3ae9501c
MT
436}
437
1dfb4dd9 438static void do_vm_stop(RunState state)
296af7c9 439{
1354869c 440 if (runstate_is_running()) {
296af7c9 441 cpu_disable_ticks();
296af7c9 442 pause_all_vcpus();
f5bbfba1 443 runstate_set(state);
1dfb4dd9 444 vm_state_notify(0, state);
922453bc 445 bdrv_drain_all();
55df6f33 446 bdrv_flush_all();
296af7c9
BS
447 monitor_protocol_event(QEVENT_STOP, NULL);
448 }
449}
450
a1fcaa73 451static bool cpu_can_run(CPUState *cpu)
296af7c9 452{
4fdeee7c 453 if (cpu->stop) {
a1fcaa73 454 return false;
0ab07c62 455 }
f324e766 456 if (cpu->stopped || !runstate_is_running()) {
a1fcaa73 457 return false;
0ab07c62 458 }
a1fcaa73 459 return true;
296af7c9
BS
460}
461
91325046 462static void cpu_handle_guest_debug(CPUState *cpu)
83f338f7 463{
64f6b346 464 gdb_set_stop_cpu(cpu);
8cf71710 465 qemu_system_debug_request();
f324e766 466 cpu->stopped = true;
3c638d06
JK
467}
468
714bd040
PB
469static void cpu_signal(int sig)
470{
471 if (cpu_single_env) {
60a3e17a 472 cpu_exit(ENV_GET_CPU(cpu_single_env));
714bd040
PB
473 }
474 exit_request = 1;
475}
714bd040 476
6d9cb73c
JK
477#ifdef CONFIG_LINUX
478static void sigbus_reraise(void)
479{
480 sigset_t set;
481 struct sigaction action;
482
483 memset(&action, 0, sizeof(action));
484 action.sa_handler = SIG_DFL;
485 if (!sigaction(SIGBUS, &action, NULL)) {
486 raise(SIGBUS);
487 sigemptyset(&set);
488 sigaddset(&set, SIGBUS);
489 sigprocmask(SIG_UNBLOCK, &set, NULL);
490 }
491 perror("Failed to re-raise SIGBUS!\n");
492 abort();
493}
494
495static void sigbus_handler(int n, struct qemu_signalfd_siginfo *siginfo,
496 void *ctx)
497{
498 if (kvm_on_sigbus(siginfo->ssi_code,
499 (void *)(intptr_t)siginfo->ssi_addr)) {
500 sigbus_reraise();
501 }
502}
503
504static void qemu_init_sigbus(void)
505{
506 struct sigaction action;
507
508 memset(&action, 0, sizeof(action));
509 action.sa_flags = SA_SIGINFO;
510 action.sa_sigaction = (void (*)(int, siginfo_t*, void*))sigbus_handler;
511 sigaction(SIGBUS, &action, NULL);
512
513 prctl(PR_MCE_KILL, PR_MCE_KILL_SET, PR_MCE_KILL_EARLY, 0, 0);
514}
515
290adf38 516static void qemu_kvm_eat_signals(CPUState *cpu)
1ab3c6c0
JK
517{
518 struct timespec ts = { 0, 0 };
519 siginfo_t siginfo;
520 sigset_t waitset;
521 sigset_t chkset;
522 int r;
523
524 sigemptyset(&waitset);
525 sigaddset(&waitset, SIG_IPI);
526 sigaddset(&waitset, SIGBUS);
527
528 do {
529 r = sigtimedwait(&waitset, &siginfo, &ts);
530 if (r == -1 && !(errno == EAGAIN || errno == EINTR)) {
531 perror("sigtimedwait");
532 exit(1);
533 }
534
535 switch (r) {
536 case SIGBUS:
290adf38 537 if (kvm_on_sigbus_vcpu(cpu, siginfo.si_code, siginfo.si_addr)) {
1ab3c6c0
JK
538 sigbus_reraise();
539 }
540 break;
541 default:
542 break;
543 }
544
545 r = sigpending(&chkset);
546 if (r == -1) {
547 perror("sigpending");
548 exit(1);
549 }
550 } while (sigismember(&chkset, SIG_IPI) || sigismember(&chkset, SIGBUS));
1ab3c6c0
JK
551}
552
6d9cb73c
JK
553#else /* !CONFIG_LINUX */
554
555static void qemu_init_sigbus(void)
556{
557}
1ab3c6c0 558
290adf38 559static void qemu_kvm_eat_signals(CPUState *cpu)
1ab3c6c0
JK
560{
561}
6d9cb73c
JK
562#endif /* !CONFIG_LINUX */
563
296af7c9 564#ifndef _WIN32
55f8d6ac
JK
565static void dummy_signal(int sig)
566{
567}
55f8d6ac 568
13618e05 569static void qemu_kvm_init_cpu_signals(CPUState *cpu)
714bd040
PB
570{
571 int r;
572 sigset_t set;
573 struct sigaction sigact;
574
575 memset(&sigact, 0, sizeof(sigact));
576 sigact.sa_handler = dummy_signal;
577 sigaction(SIG_IPI, &sigact, NULL);
578
714bd040
PB
579 pthread_sigmask(SIG_BLOCK, NULL, &set);
580 sigdelset(&set, SIG_IPI);
714bd040 581 sigdelset(&set, SIGBUS);
491d6e80 582 r = kvm_set_signal_mask(cpu, &set);
714bd040
PB
583 if (r) {
584 fprintf(stderr, "kvm_set_signal_mask: %s\n", strerror(-r));
585 exit(1);
586 }
587}
588
589static void qemu_tcg_init_cpu_signals(void)
590{
714bd040
PB
591 sigset_t set;
592 struct sigaction sigact;
593
594 memset(&sigact, 0, sizeof(sigact));
595 sigact.sa_handler = cpu_signal;
596 sigaction(SIG_IPI, &sigact, NULL);
597
598 sigemptyset(&set);
599 sigaddset(&set, SIG_IPI);
600 pthread_sigmask(SIG_UNBLOCK, &set, NULL);
714bd040
PB
601}
602
55f8d6ac 603#else /* _WIN32 */
13618e05 604static void qemu_kvm_init_cpu_signals(CPUState *cpu)
ff48eb5f 605{
714bd040
PB
606 abort();
607}
ff48eb5f 608
714bd040
PB
609static void qemu_tcg_init_cpu_signals(void)
610{
ff48eb5f 611}
714bd040 612#endif /* _WIN32 */
ff48eb5f 613
b2532d88 614static QemuMutex qemu_global_mutex;
46daff13
PB
615static QemuCond qemu_io_proceeded_cond;
616static bool iothread_requesting_mutex;
296af7c9
BS
617
618static QemuThread io_thread;
619
620static QemuThread *tcg_cpu_thread;
621static QemuCond *tcg_halt_cond;
622
296af7c9
BS
623/* cpu creation */
624static QemuCond qemu_cpu_cond;
625/* system init */
296af7c9 626static QemuCond qemu_pause_cond;
e82bcec2 627static QemuCond qemu_work_cond;
296af7c9 628
d3b12f5d 629void qemu_init_cpu_loop(void)
296af7c9 630{
6d9cb73c 631 qemu_init_sigbus();
ed94592b 632 qemu_cond_init(&qemu_cpu_cond);
ed94592b
AL
633 qemu_cond_init(&qemu_pause_cond);
634 qemu_cond_init(&qemu_work_cond);
46daff13 635 qemu_cond_init(&qemu_io_proceeded_cond);
296af7c9 636 qemu_mutex_init(&qemu_global_mutex);
296af7c9 637
b7680cb6 638 qemu_thread_get_self(&io_thread);
296af7c9
BS
639}
640
f100f0b3 641void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data)
e82bcec2
MT
642{
643 struct qemu_work_item wi;
644
60e82579 645 if (qemu_cpu_is_self(cpu)) {
e82bcec2
MT
646 func(data);
647 return;
648 }
649
650 wi.func = func;
651 wi.data = data;
c64ca814
AF
652 if (cpu->queued_work_first == NULL) {
653 cpu->queued_work_first = &wi;
0ab07c62 654 } else {
c64ca814 655 cpu->queued_work_last->next = &wi;
0ab07c62 656 }
c64ca814 657 cpu->queued_work_last = &wi;
e82bcec2
MT
658 wi.next = NULL;
659 wi.done = false;
660
c08d7424 661 qemu_cpu_kick(cpu);
e82bcec2 662 while (!wi.done) {
9349b4f9 663 CPUArchState *self_env = cpu_single_env;
e82bcec2
MT
664
665 qemu_cond_wait(&qemu_work_cond, &qemu_global_mutex);
666 cpu_single_env = self_env;
667 }
668}
669
6d45b109 670static void flush_queued_work(CPUState *cpu)
e82bcec2
MT
671{
672 struct qemu_work_item *wi;
673
c64ca814 674 if (cpu->queued_work_first == NULL) {
e82bcec2 675 return;
0ab07c62 676 }
e82bcec2 677
c64ca814
AF
678 while ((wi = cpu->queued_work_first)) {
679 cpu->queued_work_first = wi->next;
e82bcec2
MT
680 wi->func(wi->data);
681 wi->done = true;
682 }
c64ca814 683 cpu->queued_work_last = NULL;
e82bcec2
MT
684 qemu_cond_broadcast(&qemu_work_cond);
685}
686
509a0d78 687static void qemu_wait_io_event_common(CPUState *cpu)
296af7c9 688{
4fdeee7c
AF
689 if (cpu->stop) {
690 cpu->stop = false;
f324e766 691 cpu->stopped = true;
296af7c9
BS
692 qemu_cond_signal(&qemu_pause_cond);
693 }
6d45b109 694 flush_queued_work(cpu);
216fc9a4 695 cpu->thread_kicked = false;
296af7c9
BS
696}
697
6cabe1f3 698static void qemu_tcg_wait_io_event(void)
296af7c9 699{
9349b4f9 700 CPUArchState *env;
6cabe1f3 701
16400322 702 while (all_cpu_threads_idle()) {
ab33fcda
PB
703 /* Start accounting real time to the virtual clock if the CPUs
704 are idle. */
705 qemu_clock_warp(vm_clock);
9705fbb5 706 qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex);
16400322 707 }
296af7c9 708
46daff13
PB
709 while (iothread_requesting_mutex) {
710 qemu_cond_wait(&qemu_io_proceeded_cond, &qemu_global_mutex);
711 }
6cabe1f3
JK
712
713 for (env = first_cpu; env != NULL; env = env->next_cpu) {
509a0d78 714 qemu_wait_io_event_common(ENV_GET_CPU(env));
6cabe1f3 715 }
296af7c9
BS
716}
717
fd529e8f 718static void qemu_kvm_wait_io_event(CPUState *cpu)
296af7c9 719{
a98ae1d8 720 while (cpu_thread_is_idle(cpu)) {
f5c121b8 721 qemu_cond_wait(cpu->halt_cond, &qemu_global_mutex);
16400322 722 }
296af7c9 723
290adf38 724 qemu_kvm_eat_signals(cpu);
509a0d78 725 qemu_wait_io_event_common(cpu);
296af7c9
BS
726}
727
7e97cd88 728static void *qemu_kvm_cpu_thread_fn(void *arg)
296af7c9 729{
9349b4f9 730 CPUArchState *env = arg;
814e612e 731 CPUState *cpu = ENV_GET_CPU(env);
84b4915d 732 int r;
296af7c9 733
6164e6d6 734 qemu_mutex_lock(&qemu_global_mutex);
814e612e 735 qemu_thread_get_self(cpu->thread);
9f09e18a 736 cpu->thread_id = qemu_get_thread_id();
e479c207 737 cpu_single_env = env;
296af7c9 738
504134d2 739 r = kvm_init_vcpu(cpu);
84b4915d
JK
740 if (r < 0) {
741 fprintf(stderr, "kvm_init_vcpu failed: %s\n", strerror(-r));
742 exit(1);
743 }
296af7c9 744
13618e05 745 qemu_kvm_init_cpu_signals(cpu);
296af7c9
BS
746
747 /* signal CPU creation */
61a46217 748 cpu->created = true;
296af7c9
BS
749 qemu_cond_signal(&qemu_cpu_cond);
750
296af7c9 751 while (1) {
a1fcaa73 752 if (cpu_can_run(cpu)) {
1458c363 753 r = kvm_cpu_exec(cpu);
83f338f7 754 if (r == EXCP_DEBUG) {
91325046 755 cpu_handle_guest_debug(cpu);
83f338f7 756 }
0ab07c62 757 }
fd529e8f 758 qemu_kvm_wait_io_event(cpu);
296af7c9
BS
759 }
760
761 return NULL;
762}
763
c7f0f3b1
AL
764static void *qemu_dummy_cpu_thread_fn(void *arg)
765{
766#ifdef _WIN32
767 fprintf(stderr, "qtest is not supported under Windows\n");
768 exit(1);
769#else
770 CPUArchState *env = arg;
814e612e 771 CPUState *cpu = ENV_GET_CPU(env);
c7f0f3b1
AL
772 sigset_t waitset;
773 int r;
774
775 qemu_mutex_lock_iothread();
814e612e 776 qemu_thread_get_self(cpu->thread);
9f09e18a 777 cpu->thread_id = qemu_get_thread_id();
c7f0f3b1
AL
778
779 sigemptyset(&waitset);
780 sigaddset(&waitset, SIG_IPI);
781
782 /* signal CPU creation */
61a46217 783 cpu->created = true;
c7f0f3b1
AL
784 qemu_cond_signal(&qemu_cpu_cond);
785
786 cpu_single_env = env;
787 while (1) {
788 cpu_single_env = NULL;
789 qemu_mutex_unlock_iothread();
790 do {
791 int sig;
792 r = sigwait(&waitset, &sig);
793 } while (r == -1 && (errno == EAGAIN || errno == EINTR));
794 if (r == -1) {
795 perror("sigwait");
796 exit(1);
797 }
798 qemu_mutex_lock_iothread();
799 cpu_single_env = env;
509a0d78 800 qemu_wait_io_event_common(cpu);
c7f0f3b1
AL
801 }
802
803 return NULL;
804#endif
805}
806
bdb7ca67
JK
807static void tcg_exec_all(void);
808
a37677c3
IM
809static void tcg_signal_cpu_creation(CPUState *cpu, void *data)
810{
811 cpu->thread_id = qemu_get_thread_id();
812 cpu->created = true;
813}
814
7e97cd88 815static void *qemu_tcg_cpu_thread_fn(void *arg)
296af7c9 816{
c3586ba7
AF
817 CPUState *cpu = arg;
818 CPUArchState *env;
296af7c9 819
55f8d6ac 820 qemu_tcg_init_cpu_signals();
814e612e 821 qemu_thread_get_self(cpu->thread);
296af7c9 822
296af7c9 823 qemu_mutex_lock(&qemu_global_mutex);
a37677c3 824 qemu_for_each_cpu(tcg_signal_cpu_creation, NULL);
296af7c9
BS
825 qemu_cond_signal(&qemu_cpu_cond);
826
fa7d1867 827 /* wait for initial kick-off after machine start */
f324e766 828 while (ENV_GET_CPU(first_cpu)->stopped) {
fa7d1867 829 qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex);
8e564b4e
JK
830
831 /* process any pending work */
832 for (env = first_cpu; env != NULL; env = env->next_cpu) {
509a0d78 833 qemu_wait_io_event_common(ENV_GET_CPU(env));
8e564b4e 834 }
0ab07c62 835 }
296af7c9
BS
836
837 while (1) {
bdb7ca67 838 tcg_exec_all();
946fb27c 839 if (use_icount && qemu_clock_deadline(vm_clock) <= 0) {
3b2319a3
PB
840 qemu_notify_event();
841 }
6cabe1f3 842 qemu_tcg_wait_io_event();
296af7c9
BS
843 }
844
845 return NULL;
846}
847
2ff09a40 848static void qemu_cpu_kick_thread(CPUState *cpu)
cc015e9a
PB
849{
850#ifndef _WIN32
851 int err;
852
814e612e 853 err = pthread_kill(cpu->thread->thread, SIG_IPI);
cc015e9a
PB
854 if (err) {
855 fprintf(stderr, "qemu:%s: %s", __func__, strerror(err));
856 exit(1);
857 }
858#else /* _WIN32 */
60e82579 859 if (!qemu_cpu_is_self(cpu)) {
ed9164a3
OH
860 CONTEXT tcgContext;
861
862 if (SuspendThread(cpu->hThread) == (DWORD)-1) {
7f1721df 863 fprintf(stderr, "qemu:%s: GetLastError:%lu\n", __func__,
ed9164a3
OH
864 GetLastError());
865 exit(1);
866 }
867
868 /* On multi-core systems, we are not sure that the thread is actually
869 * suspended until we can get the context.
870 */
871 tcgContext.ContextFlags = CONTEXT_CONTROL;
872 while (GetThreadContext(cpu->hThread, &tcgContext) != 0) {
873 continue;
874 }
875
cc015e9a 876 cpu_signal(0);
ed9164a3
OH
877
878 if (ResumeThread(cpu->hThread) == (DWORD)-1) {
7f1721df 879 fprintf(stderr, "qemu:%s: GetLastError:%lu\n", __func__,
ed9164a3
OH
880 GetLastError());
881 exit(1);
882 }
cc015e9a
PB
883 }
884#endif
885}
886
c08d7424 887void qemu_cpu_kick(CPUState *cpu)
296af7c9 888{
f5c121b8 889 qemu_cond_broadcast(cpu->halt_cond);
216fc9a4 890 if (!tcg_enabled() && !cpu->thread_kicked) {
2ff09a40 891 qemu_cpu_kick_thread(cpu);
216fc9a4 892 cpu->thread_kicked = true;
aa2c364b 893 }
296af7c9
BS
894}
895
46d62fac 896void qemu_cpu_kick_self(void)
296af7c9 897{
b55c22c6 898#ifndef _WIN32
46d62fac 899 assert(cpu_single_env);
216fc9a4 900 CPUState *cpu_single_cpu = ENV_GET_CPU(cpu_single_env);
296af7c9 901
216fc9a4 902 if (!cpu_single_cpu->thread_kicked) {
2ff09a40 903 qemu_cpu_kick_thread(cpu_single_cpu);
216fc9a4 904 cpu_single_cpu->thread_kicked = true;
296af7c9 905 }
b55c22c6
PB
906#else
907 abort();
908#endif
296af7c9
BS
909}
910
60e82579 911bool qemu_cpu_is_self(CPUState *cpu)
296af7c9 912{
814e612e 913 return qemu_thread_is_self(cpu->thread);
296af7c9
BS
914}
915
aa723c23
JQ
916static bool qemu_in_vcpu_thread(void)
917{
60e82579 918 return cpu_single_env && qemu_cpu_is_self(ENV_GET_CPU(cpu_single_env));
aa723c23
JQ
919}
920
296af7c9
BS
921void qemu_mutex_lock_iothread(void)
922{
c7f0f3b1 923 if (!tcg_enabled()) {
296af7c9 924 qemu_mutex_lock(&qemu_global_mutex);
1a28cac3 925 } else {
46daff13 926 iothread_requesting_mutex = true;
1a28cac3 927 if (qemu_mutex_trylock(&qemu_global_mutex)) {
2ff09a40 928 qemu_cpu_kick_thread(ENV_GET_CPU(first_cpu));
1a28cac3
MT
929 qemu_mutex_lock(&qemu_global_mutex);
930 }
46daff13
PB
931 iothread_requesting_mutex = false;
932 qemu_cond_broadcast(&qemu_io_proceeded_cond);
1a28cac3 933 }
296af7c9
BS
934}
935
936void qemu_mutex_unlock_iothread(void)
937{
938 qemu_mutex_unlock(&qemu_global_mutex);
939}
940
941static int all_vcpus_paused(void)
942{
9349b4f9 943 CPUArchState *penv = first_cpu;
296af7c9
BS
944
945 while (penv) {
f324e766
AF
946 CPUState *pcpu = ENV_GET_CPU(penv);
947 if (!pcpu->stopped) {
296af7c9 948 return 0;
0ab07c62 949 }
5207a5e0 950 penv = penv->next_cpu;
296af7c9
BS
951 }
952
953 return 1;
954}
955
956void pause_all_vcpus(void)
957{
9349b4f9 958 CPUArchState *penv = first_cpu;
296af7c9 959
a5c57d64 960 qemu_clock_enable(vm_clock, false);
296af7c9 961 while (penv) {
4fdeee7c
AF
962 CPUState *pcpu = ENV_GET_CPU(penv);
963 pcpu->stop = true;
c08d7424 964 qemu_cpu_kick(pcpu);
5207a5e0 965 penv = penv->next_cpu;
296af7c9
BS
966 }
967
aa723c23 968 if (qemu_in_vcpu_thread()) {
d798e974
JK
969 cpu_stop_current();
970 if (!kvm_enabled()) {
10858193 971 penv = first_cpu;
d798e974 972 while (penv) {
4fdeee7c 973 CPUState *pcpu = ENV_GET_CPU(penv);
10858193 974 pcpu->stop = false;
f324e766 975 pcpu->stopped = true;
d798e974
JK
976 penv = penv->next_cpu;
977 }
978 return;
979 }
980 }
981
296af7c9 982 while (!all_vcpus_paused()) {
be7d6c57 983 qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex);
296af7c9
BS
984 penv = first_cpu;
985 while (penv) {
c08d7424 986 qemu_cpu_kick(ENV_GET_CPU(penv));
5207a5e0 987 penv = penv->next_cpu;
296af7c9
BS
988 }
989 }
990}
991
2993683b
IM
992void cpu_resume(CPUState *cpu)
993{
994 cpu->stop = false;
995 cpu->stopped = false;
996 qemu_cpu_kick(cpu);
997}
998
296af7c9
BS
999void resume_all_vcpus(void)
1000{
9349b4f9 1001 CPUArchState *penv = first_cpu;
296af7c9 1002
47113ab6 1003 qemu_clock_enable(vm_clock, true);
296af7c9 1004 while (penv) {
4fdeee7c 1005 CPUState *pcpu = ENV_GET_CPU(penv);
2993683b 1006 cpu_resume(pcpu);
5207a5e0 1007 penv = penv->next_cpu;
296af7c9
BS
1008 }
1009}
1010
e5ab30a2 1011static void qemu_tcg_init_vcpu(CPUState *cpu)
296af7c9 1012{
296af7c9
BS
1013 /* share a single thread for all cpus with TCG */
1014 if (!tcg_cpu_thread) {
814e612e 1015 cpu->thread = g_malloc0(sizeof(QemuThread));
f5c121b8
AF
1016 cpu->halt_cond = g_malloc0(sizeof(QemuCond));
1017 qemu_cond_init(cpu->halt_cond);
1018 tcg_halt_cond = cpu->halt_cond;
c3586ba7 1019 qemu_thread_create(cpu->thread, qemu_tcg_cpu_thread_fn, cpu,
1ecf47bf
PB
1020 QEMU_THREAD_JOINABLE);
1021#ifdef _WIN32
814e612e 1022 cpu->hThread = qemu_thread_get_handle(cpu->thread);
1ecf47bf 1023#endif
61a46217 1024 while (!cpu->created) {
18a85728 1025 qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
0ab07c62 1026 }
814e612e 1027 tcg_cpu_thread = cpu->thread;
296af7c9 1028 } else {
814e612e 1029 cpu->thread = tcg_cpu_thread;
f5c121b8 1030 cpu->halt_cond = tcg_halt_cond;
296af7c9
BS
1031 }
1032}
1033
9349b4f9 1034static void qemu_kvm_start_vcpu(CPUArchState *env)
296af7c9 1035{
814e612e
AF
1036 CPUState *cpu = ENV_GET_CPU(env);
1037
1038 cpu->thread = g_malloc0(sizeof(QemuThread));
f5c121b8
AF
1039 cpu->halt_cond = g_malloc0(sizeof(QemuCond));
1040 qemu_cond_init(cpu->halt_cond);
814e612e 1041 qemu_thread_create(cpu->thread, qemu_kvm_cpu_thread_fn, env,
1ecf47bf 1042 QEMU_THREAD_JOINABLE);
61a46217 1043 while (!cpu->created) {
18a85728 1044 qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
0ab07c62 1045 }
296af7c9
BS
1046}
1047
c7f0f3b1
AL
1048static void qemu_dummy_start_vcpu(CPUArchState *env)
1049{
814e612e
AF
1050 CPUState *cpu = ENV_GET_CPU(env);
1051
1052 cpu->thread = g_malloc0(sizeof(QemuThread));
f5c121b8
AF
1053 cpu->halt_cond = g_malloc0(sizeof(QemuCond));
1054 qemu_cond_init(cpu->halt_cond);
814e612e 1055 qemu_thread_create(cpu->thread, qemu_dummy_cpu_thread_fn, env,
c7f0f3b1 1056 QEMU_THREAD_JOINABLE);
61a46217 1057 while (!cpu->created) {
c7f0f3b1
AL
1058 qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
1059 }
1060}
1061
296af7c9
BS
1062void qemu_init_vcpu(void *_env)
1063{
9349b4f9 1064 CPUArchState *env = _env;
f324e766 1065 CPUState *cpu = ENV_GET_CPU(env);
296af7c9 1066
ce3960eb
AF
1067 cpu->nr_cores = smp_cores;
1068 cpu->nr_threads = smp_threads;
f324e766 1069 cpu->stopped = true;
0ab07c62 1070 if (kvm_enabled()) {
7e97cd88 1071 qemu_kvm_start_vcpu(env);
c7f0f3b1 1072 } else if (tcg_enabled()) {
e5ab30a2 1073 qemu_tcg_init_vcpu(cpu);
c7f0f3b1
AL
1074 } else {
1075 qemu_dummy_start_vcpu(env);
0ab07c62 1076 }
296af7c9
BS
1077}
1078
b4a3d965 1079void cpu_stop_current(void)
296af7c9 1080{
b4a3d965 1081 if (cpu_single_env) {
4fdeee7c
AF
1082 CPUState *cpu_single_cpu = ENV_GET_CPU(cpu_single_env);
1083 cpu_single_cpu->stop = false;
f324e766 1084 cpu_single_cpu->stopped = true;
60a3e17a 1085 cpu_exit(cpu_single_cpu);
67bb172f 1086 qemu_cond_signal(&qemu_pause_cond);
b4a3d965 1087 }
296af7c9
BS
1088}
1089
1dfb4dd9 1090void vm_stop(RunState state)
296af7c9 1091{
aa723c23 1092 if (qemu_in_vcpu_thread()) {
1dfb4dd9 1093 qemu_system_vmstop_request(state);
296af7c9
BS
1094 /*
1095 * FIXME: should not return to device code in case
1096 * vm_stop() has been requested.
1097 */
b4a3d965 1098 cpu_stop_current();
296af7c9
BS
1099 return;
1100 }
1dfb4dd9 1101 do_vm_stop(state);
296af7c9
BS
1102}
1103
8a9236f1
LC
1104/* does a state transition even if the VM is already stopped,
1105 current state is forgotten forever */
1106void vm_stop_force_state(RunState state)
1107{
1108 if (runstate_is_running()) {
1109 vm_stop(state);
1110 } else {
1111 runstate_set(state);
1112 }
1113}
1114
9349b4f9 1115static int tcg_cpu_exec(CPUArchState *env)
296af7c9
BS
1116{
1117 int ret;
1118#ifdef CONFIG_PROFILER
1119 int64_t ti;
1120#endif
1121
1122#ifdef CONFIG_PROFILER
1123 ti = profile_getclock();
1124#endif
1125 if (use_icount) {
1126 int64_t count;
1127 int decr;
1128 qemu_icount -= (env->icount_decr.u16.low + env->icount_extra);
1129 env->icount_decr.u16.low = 0;
1130 env->icount_extra = 0;
946fb27c 1131 count = qemu_icount_round(qemu_clock_deadline(vm_clock));
296af7c9
BS
1132 qemu_icount += count;
1133 decr = (count > 0xffff) ? 0xffff : count;
1134 count -= decr;
1135 env->icount_decr.u16.low = decr;
1136 env->icount_extra = count;
1137 }
1138 ret = cpu_exec(env);
1139#ifdef CONFIG_PROFILER
1140 qemu_time += profile_getclock() - ti;
1141#endif
1142 if (use_icount) {
1143 /* Fold pending instructions back into the
1144 instruction counter, and clear the interrupt flag. */
1145 qemu_icount -= (env->icount_decr.u16.low
1146 + env->icount_extra);
1147 env->icount_decr.u32 = 0;
1148 env->icount_extra = 0;
1149 }
1150 return ret;
1151}
1152
bdb7ca67 1153static void tcg_exec_all(void)
296af7c9 1154{
9a36085b
JK
1155 int r;
1156
ab33fcda
PB
1157 /* Account partial waits to the vm_clock. */
1158 qemu_clock_warp(vm_clock);
1159
0ab07c62 1160 if (next_cpu == NULL) {
296af7c9 1161 next_cpu = first_cpu;
0ab07c62 1162 }
c629a4bc 1163 for (; next_cpu != NULL && !exit_request; next_cpu = next_cpu->next_cpu) {
9349b4f9 1164 CPUArchState *env = next_cpu;
4fdeee7c 1165 CPUState *cpu = ENV_GET_CPU(env);
296af7c9
BS
1166
1167 qemu_clock_enable(vm_clock,
345f4426 1168 (env->singlestep_enabled & SSTEP_NOTIMER) == 0);
296af7c9 1169
a1fcaa73 1170 if (cpu_can_run(cpu)) {
bdb7ca67 1171 r = tcg_cpu_exec(env);
9a36085b 1172 if (r == EXCP_DEBUG) {
91325046 1173 cpu_handle_guest_debug(cpu);
3c638d06
JK
1174 break;
1175 }
f324e766 1176 } else if (cpu->stop || cpu->stopped) {
296af7c9
BS
1177 break;
1178 }
1179 }
c629a4bc 1180 exit_request = 0;
296af7c9
BS
1181}
1182
1183void set_numa_modes(void)
1184{
9349b4f9 1185 CPUArchState *env;
1b1ed8dc 1186 CPUState *cpu;
296af7c9
BS
1187 int i;
1188
1189 for (env = first_cpu; env != NULL; env = env->next_cpu) {
1b1ed8dc 1190 cpu = ENV_GET_CPU(env);
296af7c9 1191 for (i = 0; i < nb_numa_nodes; i++) {
55e5c285 1192 if (test_bit(cpu->cpu_index, node_cpumask[i])) {
1b1ed8dc 1193 cpu->numa_node = i;
296af7c9
BS
1194 }
1195 }
1196 }
1197}
1198
9a78eead 1199void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg)
262353cb
BS
1200{
1201 /* XXX: implement xxx_cpu_list for targets that still miss it */
e916cbf8
PM
1202#if defined(cpu_list)
1203 cpu_list(f, cpu_fprintf);
262353cb
BS
1204#endif
1205}
de0b36b6
LC
1206
1207CpuInfoList *qmp_query_cpus(Error **errp)
1208{
1209 CpuInfoList *head = NULL, *cur_item = NULL;
9349b4f9 1210 CPUArchState *env;
de0b36b6 1211
9f09e18a
AF
1212 for (env = first_cpu; env != NULL; env = env->next_cpu) {
1213 CPUState *cpu = ENV_GET_CPU(env);
de0b36b6
LC
1214 CpuInfoList *info;
1215
cb446eca 1216 cpu_synchronize_state(cpu);
de0b36b6
LC
1217
1218 info = g_malloc0(sizeof(*info));
1219 info->value = g_malloc0(sizeof(*info->value));
55e5c285 1220 info->value->CPU = cpu->cpu_index;
de0b36b6 1221 info->value->current = (env == first_cpu);
259186a7 1222 info->value->halted = cpu->halted;
9f09e18a 1223 info->value->thread_id = cpu->thread_id;
de0b36b6
LC
1224#if defined(TARGET_I386)
1225 info->value->has_pc = true;
1226 info->value->pc = env->eip + env->segs[R_CS].base;
1227#elif defined(TARGET_PPC)
1228 info->value->has_nip = true;
1229 info->value->nip = env->nip;
1230#elif defined(TARGET_SPARC)
1231 info->value->has_pc = true;
1232 info->value->pc = env->pc;
1233 info->value->has_npc = true;
1234 info->value->npc = env->npc;
1235#elif defined(TARGET_MIPS)
1236 info->value->has_PC = true;
1237 info->value->PC = env->active_tc.PC;
1238#endif
1239
1240 /* XXX: waiting for the qapi to support GSList */
1241 if (!cur_item) {
1242 head = cur_item = info;
1243 } else {
1244 cur_item->next = info;
1245 cur_item = info;
1246 }
1247 }
1248
1249 return head;
1250}
0cfd6a9a
LC
1251
1252void qmp_memsave(int64_t addr, int64_t size, const char *filename,
1253 bool has_cpu, int64_t cpu_index, Error **errp)
1254{
1255 FILE *f;
1256 uint32_t l;
9349b4f9 1257 CPUArchState *env;
55e5c285 1258 CPUState *cpu;
0cfd6a9a
LC
1259 uint8_t buf[1024];
1260
1261 if (!has_cpu) {
1262 cpu_index = 0;
1263 }
1264
151d1322
AF
1265 cpu = qemu_get_cpu(cpu_index);
1266 if (cpu == NULL) {
0cfd6a9a
LC
1267 error_set(errp, QERR_INVALID_PARAMETER_VALUE, "cpu-index",
1268 "a CPU number");
1269 return;
1270 }
151d1322 1271 env = cpu->env_ptr;
0cfd6a9a
LC
1272
1273 f = fopen(filename, "wb");
1274 if (!f) {
618da851 1275 error_setg_file_open(errp, errno, filename);
0cfd6a9a
LC
1276 return;
1277 }
1278
1279 while (size != 0) {
1280 l = sizeof(buf);
1281 if (l > size)
1282 l = size;
1283 cpu_memory_rw_debug(env, addr, buf, l, 0);
1284 if (fwrite(buf, 1, l, f) != l) {
1285 error_set(errp, QERR_IO_ERROR);
1286 goto exit;
1287 }
1288 addr += l;
1289 size -= l;
1290 }
1291
1292exit:
1293 fclose(f);
1294}
6d3962bf
LC
1295
1296void qmp_pmemsave(int64_t addr, int64_t size, const char *filename,
1297 Error **errp)
1298{
1299 FILE *f;
1300 uint32_t l;
1301 uint8_t buf[1024];
1302
1303 f = fopen(filename, "wb");
1304 if (!f) {
618da851 1305 error_setg_file_open(errp, errno, filename);
6d3962bf
LC
1306 return;
1307 }
1308
1309 while (size != 0) {
1310 l = sizeof(buf);
1311 if (l > size)
1312 l = size;
1313 cpu_physical_memory_rw(addr, buf, l, 0);
1314 if (fwrite(buf, 1, l, f) != l) {
1315 error_set(errp, QERR_IO_ERROR);
1316 goto exit;
1317 }
1318 addr += l;
1319 size -= l;
1320 }
1321
1322exit:
1323 fclose(f);
1324}
ab49ab5c
LC
1325
1326void qmp_inject_nmi(Error **errp)
1327{
1328#if defined(TARGET_I386)
9349b4f9 1329 CPUArchState *env;
ab49ab5c
LC
1330
1331 for (env = first_cpu; env != NULL; env = env->next_cpu) {
02c09195 1332 if (!env->apic_state) {
c3affe56 1333 cpu_interrupt(CPU(x86_env_get_cpu(env)), CPU_INTERRUPT_NMI);
02c09195
JK
1334 } else {
1335 apic_deliver_nmi(env->apic_state);
1336 }
ab49ab5c
LC
1337 }
1338#else
1339 error_set(errp, QERR_UNSUPPORTED);
1340#endif
1341}