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296af7c9
BS
1/*
2 * QEMU System Emulator
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25/* Needed early for CONFIG_BSD etc. */
26#include "config-host.h"
27
83c9089e 28#include "monitor/monitor.h"
9c17d615 29#include "sysemu/sysemu.h"
022c62cb 30#include "exec/gdbstub.h"
9c17d615
PB
31#include "sysemu/dma.h"
32#include "sysemu/kvm.h"
de0b36b6 33#include "qmp-commands.h"
296af7c9 34
1de7afc9 35#include "qemu/thread.h"
9c17d615
PB
36#include "sysemu/cpus.h"
37#include "sysemu/qtest.h"
1de7afc9
PB
38#include "qemu/main-loop.h"
39#include "qemu/bitmap.h"
0ff0fc19
JK
40
41#ifndef _WIN32
1de7afc9 42#include "qemu/compatfd.h"
0ff0fc19 43#endif
296af7c9 44
6d9cb73c
JK
45#ifdef CONFIG_LINUX
46
47#include <sys/prctl.h>
48
c0532a76
MT
49#ifndef PR_MCE_KILL
50#define PR_MCE_KILL 33
51#endif
52
6d9cb73c
JK
53#ifndef PR_MCE_KILL_SET
54#define PR_MCE_KILL_SET 1
55#endif
56
57#ifndef PR_MCE_KILL_EARLY
58#define PR_MCE_KILL_EARLY 1
59#endif
60
61#endif /* CONFIG_LINUX */
62
182735ef 63static CPUState *next_cpu;
296af7c9 64
a98ae1d8 65static bool cpu_thread_is_idle(CPUState *cpu)
ac873f1e 66{
c64ca814 67 if (cpu->stop || cpu->queued_work_first) {
ac873f1e
PM
68 return false;
69 }
f324e766 70 if (cpu->stopped || !runstate_is_running()) {
ac873f1e
PM
71 return true;
72 }
259186a7 73 if (!cpu->halted || qemu_cpu_has_work(cpu) ||
215e79c0 74 kvm_halt_in_kernel()) {
ac873f1e
PM
75 return false;
76 }
77 return true;
78}
79
80static bool all_cpu_threads_idle(void)
81{
182735ef 82 CPUState *cpu;
ac873f1e 83
182735ef
AF
84 for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
85 if (!cpu_thread_is_idle(cpu)) {
ac873f1e
PM
86 return false;
87 }
88 }
89 return true;
90}
91
946fb27c
PB
92/***********************************************************/
93/* guest cycle counter */
94
95/* Conversion factor from emulated instructions to virtual clock ticks. */
96static int icount_time_shift;
97/* Arbitrarily pick 1MIPS as the minimum allowable speed. */
98#define MAX_ICOUNT_SHIFT 10
99/* Compensate for varying guest execution speed. */
100static int64_t qemu_icount_bias;
101static QEMUTimer *icount_rt_timer;
102static QEMUTimer *icount_vm_timer;
103static QEMUTimer *icount_warp_timer;
104static int64_t vm_clock_warp_start;
105static int64_t qemu_icount;
106
107typedef struct TimersState {
108 int64_t cpu_ticks_prev;
109 int64_t cpu_ticks_offset;
110 int64_t cpu_clock_offset;
111 int32_t cpu_ticks_enabled;
112 int64_t dummy;
113} TimersState;
114
115TimersState timers_state;
116
117/* Return the virtual CPU time, based on the instruction counter. */
118int64_t cpu_get_icount(void)
119{
120 int64_t icount;
4917cf44 121 CPUState *cpu = current_cpu;
946fb27c
PB
122
123 icount = qemu_icount;
4917cf44
AF
124 if (cpu) {
125 CPUArchState *env = cpu->env_ptr;
946fb27c
PB
126 if (!can_do_io(env)) {
127 fprintf(stderr, "Bad clock read\n");
128 }
129 icount -= (env->icount_decr.u16.low + env->icount_extra);
130 }
131 return qemu_icount_bias + (icount << icount_time_shift);
132}
133
134/* return the host CPU cycle counter and handle stop/restart */
135int64_t cpu_get_ticks(void)
136{
137 if (use_icount) {
138 return cpu_get_icount();
139 }
140 if (!timers_state.cpu_ticks_enabled) {
141 return timers_state.cpu_ticks_offset;
142 } else {
143 int64_t ticks;
144 ticks = cpu_get_real_ticks();
145 if (timers_state.cpu_ticks_prev > ticks) {
146 /* Note: non increasing ticks may happen if the host uses
147 software suspend */
148 timers_state.cpu_ticks_offset += timers_state.cpu_ticks_prev - ticks;
149 }
150 timers_state.cpu_ticks_prev = ticks;
151 return ticks + timers_state.cpu_ticks_offset;
152 }
153}
154
155/* return the host CPU monotonic timer and handle stop/restart */
156int64_t cpu_get_clock(void)
157{
158 int64_t ti;
159 if (!timers_state.cpu_ticks_enabled) {
160 return timers_state.cpu_clock_offset;
161 } else {
162 ti = get_clock();
163 return ti + timers_state.cpu_clock_offset;
164 }
165}
166
167/* enable cpu_get_ticks() */
168void cpu_enable_ticks(void)
169{
170 if (!timers_state.cpu_ticks_enabled) {
171 timers_state.cpu_ticks_offset -= cpu_get_real_ticks();
172 timers_state.cpu_clock_offset -= get_clock();
173 timers_state.cpu_ticks_enabled = 1;
174 }
175}
176
177/* disable cpu_get_ticks() : the clock is stopped. You must not call
178 cpu_get_ticks() after that. */
179void cpu_disable_ticks(void)
180{
181 if (timers_state.cpu_ticks_enabled) {
182 timers_state.cpu_ticks_offset = cpu_get_ticks();
183 timers_state.cpu_clock_offset = cpu_get_clock();
184 timers_state.cpu_ticks_enabled = 0;
185 }
186}
187
188/* Correlation between real and virtual time is always going to be
189 fairly approximate, so ignore small variation.
190 When the guest is idle real and virtual time will be aligned in
191 the IO wait loop. */
192#define ICOUNT_WOBBLE (get_ticks_per_sec() / 10)
193
194static void icount_adjust(void)
195{
196 int64_t cur_time;
197 int64_t cur_icount;
198 int64_t delta;
199 static int64_t last_delta;
200 /* If the VM is not running, then do nothing. */
201 if (!runstate_is_running()) {
202 return;
203 }
204 cur_time = cpu_get_clock();
205 cur_icount = qemu_get_clock_ns(vm_clock);
206 delta = cur_icount - cur_time;
207 /* FIXME: This is a very crude algorithm, somewhat prone to oscillation. */
208 if (delta > 0
209 && last_delta + ICOUNT_WOBBLE < delta * 2
210 && icount_time_shift > 0) {
211 /* The guest is getting too far ahead. Slow time down. */
212 icount_time_shift--;
213 }
214 if (delta < 0
215 && last_delta - ICOUNT_WOBBLE > delta * 2
216 && icount_time_shift < MAX_ICOUNT_SHIFT) {
217 /* The guest is getting too far behind. Speed time up. */
218 icount_time_shift++;
219 }
220 last_delta = delta;
221 qemu_icount_bias = cur_icount - (qemu_icount << icount_time_shift);
222}
223
224static void icount_adjust_rt(void *opaque)
225{
226 qemu_mod_timer(icount_rt_timer,
227 qemu_get_clock_ms(rt_clock) + 1000);
228 icount_adjust();
229}
230
231static void icount_adjust_vm(void *opaque)
232{
233 qemu_mod_timer(icount_vm_timer,
234 qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10);
235 icount_adjust();
236}
237
238static int64_t qemu_icount_round(int64_t count)
239{
240 return (count + (1 << icount_time_shift) - 1) >> icount_time_shift;
241}
242
243static void icount_warp_rt(void *opaque)
244{
245 if (vm_clock_warp_start == -1) {
246 return;
247 }
248
249 if (runstate_is_running()) {
250 int64_t clock = qemu_get_clock_ns(rt_clock);
251 int64_t warp_delta = clock - vm_clock_warp_start;
252 if (use_icount == 1) {
253 qemu_icount_bias += warp_delta;
254 } else {
255 /*
256 * In adaptive mode, do not let the vm_clock run too
257 * far ahead of real time.
258 */
259 int64_t cur_time = cpu_get_clock();
260 int64_t cur_icount = qemu_get_clock_ns(vm_clock);
261 int64_t delta = cur_time - cur_icount;
262 qemu_icount_bias += MIN(warp_delta, delta);
263 }
264 if (qemu_clock_expired(vm_clock)) {
265 qemu_notify_event();
266 }
267 }
268 vm_clock_warp_start = -1;
269}
270
8156be56
PB
271void qtest_clock_warp(int64_t dest)
272{
273 int64_t clock = qemu_get_clock_ns(vm_clock);
274 assert(qtest_enabled());
275 while (clock < dest) {
276 int64_t deadline = qemu_clock_deadline(vm_clock);
277 int64_t warp = MIN(dest - clock, deadline);
278 qemu_icount_bias += warp;
279 qemu_run_timers(vm_clock);
280 clock = qemu_get_clock_ns(vm_clock);
281 }
282 qemu_notify_event();
283}
284
946fb27c
PB
285void qemu_clock_warp(QEMUClock *clock)
286{
287 int64_t deadline;
288
289 /*
290 * There are too many global variables to make the "warp" behavior
291 * applicable to other clocks. But a clock argument removes the
292 * need for if statements all over the place.
293 */
294 if (clock != vm_clock || !use_icount) {
295 return;
296 }
297
298 /*
299 * If the CPUs have been sleeping, advance the vm_clock timer now. This
300 * ensures that the deadline for the timer is computed correctly below.
301 * This also makes sure that the insn counter is synchronized before the
302 * CPU starts running, in case the CPU is woken by an event other than
303 * the earliest vm_clock timer.
304 */
305 icount_warp_rt(NULL);
306 if (!all_cpu_threads_idle() || !qemu_clock_has_timers(vm_clock)) {
307 qemu_del_timer(icount_warp_timer);
308 return;
309 }
310
8156be56
PB
311 if (qtest_enabled()) {
312 /* When testing, qtest commands advance icount. */
313 return;
314 }
315
946fb27c
PB
316 vm_clock_warp_start = qemu_get_clock_ns(rt_clock);
317 deadline = qemu_clock_deadline(vm_clock);
318 if (deadline > 0) {
319 /*
320 * Ensure the vm_clock proceeds even when the virtual CPU goes to
321 * sleep. Otherwise, the CPU might be waiting for a future timer
322 * interrupt to wake it up, but the interrupt never comes because
323 * the vCPU isn't running any insns and thus doesn't advance the
324 * vm_clock.
325 *
326 * An extreme solution for this problem would be to never let VCPUs
327 * sleep in icount mode if there is a pending vm_clock timer; rather
328 * time could just advance to the next vm_clock event. Instead, we
329 * do stop VCPUs and only advance vm_clock after some "real" time,
330 * (related to the time left until the next event) has passed. This
331 * rt_clock timer will do this. This avoids that the warps are too
332 * visible externally---for example, you will not be sending network
07f35073 333 * packets continuously instead of every 100ms.
946fb27c
PB
334 */
335 qemu_mod_timer(icount_warp_timer, vm_clock_warp_start + deadline);
336 } else {
337 qemu_notify_event();
338 }
339}
340
341static const VMStateDescription vmstate_timers = {
342 .name = "timer",
343 .version_id = 2,
344 .minimum_version_id = 1,
345 .minimum_version_id_old = 1,
346 .fields = (VMStateField[]) {
347 VMSTATE_INT64(cpu_ticks_offset, TimersState),
348 VMSTATE_INT64(dummy, TimersState),
349 VMSTATE_INT64_V(cpu_clock_offset, TimersState, 2),
350 VMSTATE_END_OF_LIST()
351 }
352};
353
354void configure_icount(const char *option)
355{
356 vmstate_register(NULL, 0, &vmstate_timers, &timers_state);
357 if (!option) {
358 return;
359 }
360
361 icount_warp_timer = qemu_new_timer_ns(rt_clock, icount_warp_rt, NULL);
362 if (strcmp(option, "auto") != 0) {
363 icount_time_shift = strtol(option, NULL, 0);
364 use_icount = 1;
365 return;
366 }
367
368 use_icount = 2;
369
370 /* 125MIPS seems a reasonable initial guess at the guest speed.
371 It will be corrected fairly quickly anyway. */
372 icount_time_shift = 3;
373
374 /* Have both realtime and virtual time triggers for speed adjustment.
375 The realtime trigger catches emulated time passing too slowly,
376 the virtual time trigger catches emulated time passing too fast.
377 Realtime triggers occur even when idle, so use them less frequently
378 than VM triggers. */
379 icount_rt_timer = qemu_new_timer_ms(rt_clock, icount_adjust_rt, NULL);
380 qemu_mod_timer(icount_rt_timer,
381 qemu_get_clock_ms(rt_clock) + 1000);
382 icount_vm_timer = qemu_new_timer_ns(vm_clock, icount_adjust_vm, NULL);
383 qemu_mod_timer(icount_vm_timer,
384 qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10);
385}
386
296af7c9
BS
387/***********************************************************/
388void hw_error(const char *fmt, ...)
389{
390 va_list ap;
55e5c285 391 CPUState *cpu;
296af7c9
BS
392
393 va_start(ap, fmt);
394 fprintf(stderr, "qemu: hardware error: ");
395 vfprintf(stderr, fmt, ap);
396 fprintf(stderr, "\n");
182735ef 397 for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
55e5c285 398 fprintf(stderr, "CPU #%d:\n", cpu->cpu_index);
878096ee 399 cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU);
296af7c9
BS
400 }
401 va_end(ap);
402 abort();
403}
404
405void cpu_synchronize_all_states(void)
406{
182735ef 407 CPUState *cpu;
296af7c9 408
182735ef
AF
409 for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
410 cpu_synchronize_state(cpu);
296af7c9
BS
411 }
412}
413
414void cpu_synchronize_all_post_reset(void)
415{
182735ef 416 CPUState *cpu;
296af7c9
BS
417
418 for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
182735ef 419 cpu_synchronize_post_reset(cpu);
296af7c9
BS
420 }
421}
422
423void cpu_synchronize_all_post_init(void)
424{
182735ef 425 CPUState *cpu;
296af7c9
BS
426
427 for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
182735ef 428 cpu_synchronize_post_init(cpu);
296af7c9
BS
429 }
430}
431
2fa45344 432bool cpu_is_stopped(CPUState *cpu)
3ae9501c 433{
f324e766 434 return !runstate_is_running() || cpu->stopped;
3ae9501c
MT
435}
436
56983463 437static int do_vm_stop(RunState state)
296af7c9 438{
56983463
KW
439 int ret = 0;
440
1354869c 441 if (runstate_is_running()) {
296af7c9 442 cpu_disable_ticks();
296af7c9 443 pause_all_vcpus();
f5bbfba1 444 runstate_set(state);
1dfb4dd9 445 vm_state_notify(0, state);
296af7c9
BS
446 monitor_protocol_event(QEVENT_STOP, NULL);
447 }
56983463 448
594a45ce
KW
449 bdrv_drain_all();
450 ret = bdrv_flush_all();
451
56983463 452 return ret;
296af7c9
BS
453}
454
a1fcaa73 455static bool cpu_can_run(CPUState *cpu)
296af7c9 456{
4fdeee7c 457 if (cpu->stop) {
a1fcaa73 458 return false;
0ab07c62 459 }
f324e766 460 if (cpu->stopped || !runstate_is_running()) {
a1fcaa73 461 return false;
0ab07c62 462 }
a1fcaa73 463 return true;
296af7c9
BS
464}
465
91325046 466static void cpu_handle_guest_debug(CPUState *cpu)
83f338f7 467{
64f6b346 468 gdb_set_stop_cpu(cpu);
8cf71710 469 qemu_system_debug_request();
f324e766 470 cpu->stopped = true;
3c638d06
JK
471}
472
714bd040
PB
473static void cpu_signal(int sig)
474{
4917cf44
AF
475 if (current_cpu) {
476 cpu_exit(current_cpu);
714bd040
PB
477 }
478 exit_request = 1;
479}
714bd040 480
6d9cb73c
JK
481#ifdef CONFIG_LINUX
482static void sigbus_reraise(void)
483{
484 sigset_t set;
485 struct sigaction action;
486
487 memset(&action, 0, sizeof(action));
488 action.sa_handler = SIG_DFL;
489 if (!sigaction(SIGBUS, &action, NULL)) {
490 raise(SIGBUS);
491 sigemptyset(&set);
492 sigaddset(&set, SIGBUS);
493 sigprocmask(SIG_UNBLOCK, &set, NULL);
494 }
495 perror("Failed to re-raise SIGBUS!\n");
496 abort();
497}
498
499static void sigbus_handler(int n, struct qemu_signalfd_siginfo *siginfo,
500 void *ctx)
501{
502 if (kvm_on_sigbus(siginfo->ssi_code,
503 (void *)(intptr_t)siginfo->ssi_addr)) {
504 sigbus_reraise();
505 }
506}
507
508static void qemu_init_sigbus(void)
509{
510 struct sigaction action;
511
512 memset(&action, 0, sizeof(action));
513 action.sa_flags = SA_SIGINFO;
514 action.sa_sigaction = (void (*)(int, siginfo_t*, void*))sigbus_handler;
515 sigaction(SIGBUS, &action, NULL);
516
517 prctl(PR_MCE_KILL, PR_MCE_KILL_SET, PR_MCE_KILL_EARLY, 0, 0);
518}
519
290adf38 520static void qemu_kvm_eat_signals(CPUState *cpu)
1ab3c6c0
JK
521{
522 struct timespec ts = { 0, 0 };
523 siginfo_t siginfo;
524 sigset_t waitset;
525 sigset_t chkset;
526 int r;
527
528 sigemptyset(&waitset);
529 sigaddset(&waitset, SIG_IPI);
530 sigaddset(&waitset, SIGBUS);
531
532 do {
533 r = sigtimedwait(&waitset, &siginfo, &ts);
534 if (r == -1 && !(errno == EAGAIN || errno == EINTR)) {
535 perror("sigtimedwait");
536 exit(1);
537 }
538
539 switch (r) {
540 case SIGBUS:
290adf38 541 if (kvm_on_sigbus_vcpu(cpu, siginfo.si_code, siginfo.si_addr)) {
1ab3c6c0
JK
542 sigbus_reraise();
543 }
544 break;
545 default:
546 break;
547 }
548
549 r = sigpending(&chkset);
550 if (r == -1) {
551 perror("sigpending");
552 exit(1);
553 }
554 } while (sigismember(&chkset, SIG_IPI) || sigismember(&chkset, SIGBUS));
1ab3c6c0
JK
555}
556
6d9cb73c
JK
557#else /* !CONFIG_LINUX */
558
559static void qemu_init_sigbus(void)
560{
561}
1ab3c6c0 562
290adf38 563static void qemu_kvm_eat_signals(CPUState *cpu)
1ab3c6c0
JK
564{
565}
6d9cb73c
JK
566#endif /* !CONFIG_LINUX */
567
296af7c9 568#ifndef _WIN32
55f8d6ac
JK
569static void dummy_signal(int sig)
570{
571}
55f8d6ac 572
13618e05 573static void qemu_kvm_init_cpu_signals(CPUState *cpu)
714bd040
PB
574{
575 int r;
576 sigset_t set;
577 struct sigaction sigact;
578
579 memset(&sigact, 0, sizeof(sigact));
580 sigact.sa_handler = dummy_signal;
581 sigaction(SIG_IPI, &sigact, NULL);
582
714bd040
PB
583 pthread_sigmask(SIG_BLOCK, NULL, &set);
584 sigdelset(&set, SIG_IPI);
714bd040 585 sigdelset(&set, SIGBUS);
491d6e80 586 r = kvm_set_signal_mask(cpu, &set);
714bd040
PB
587 if (r) {
588 fprintf(stderr, "kvm_set_signal_mask: %s\n", strerror(-r));
589 exit(1);
590 }
591}
592
593static void qemu_tcg_init_cpu_signals(void)
594{
714bd040
PB
595 sigset_t set;
596 struct sigaction sigact;
597
598 memset(&sigact, 0, sizeof(sigact));
599 sigact.sa_handler = cpu_signal;
600 sigaction(SIG_IPI, &sigact, NULL);
601
602 sigemptyset(&set);
603 sigaddset(&set, SIG_IPI);
604 pthread_sigmask(SIG_UNBLOCK, &set, NULL);
714bd040
PB
605}
606
55f8d6ac 607#else /* _WIN32 */
13618e05 608static void qemu_kvm_init_cpu_signals(CPUState *cpu)
ff48eb5f 609{
714bd040
PB
610 abort();
611}
ff48eb5f 612
714bd040
PB
613static void qemu_tcg_init_cpu_signals(void)
614{
ff48eb5f 615}
714bd040 616#endif /* _WIN32 */
ff48eb5f 617
b2532d88 618static QemuMutex qemu_global_mutex;
46daff13
PB
619static QemuCond qemu_io_proceeded_cond;
620static bool iothread_requesting_mutex;
296af7c9
BS
621
622static QemuThread io_thread;
623
624static QemuThread *tcg_cpu_thread;
625static QemuCond *tcg_halt_cond;
626
296af7c9
BS
627/* cpu creation */
628static QemuCond qemu_cpu_cond;
629/* system init */
296af7c9 630static QemuCond qemu_pause_cond;
e82bcec2 631static QemuCond qemu_work_cond;
296af7c9 632
d3b12f5d 633void qemu_init_cpu_loop(void)
296af7c9 634{
6d9cb73c 635 qemu_init_sigbus();
ed94592b 636 qemu_cond_init(&qemu_cpu_cond);
ed94592b
AL
637 qemu_cond_init(&qemu_pause_cond);
638 qemu_cond_init(&qemu_work_cond);
46daff13 639 qemu_cond_init(&qemu_io_proceeded_cond);
296af7c9 640 qemu_mutex_init(&qemu_global_mutex);
296af7c9 641
b7680cb6 642 qemu_thread_get_self(&io_thread);
296af7c9
BS
643}
644
f100f0b3 645void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data)
e82bcec2
MT
646{
647 struct qemu_work_item wi;
648
60e82579 649 if (qemu_cpu_is_self(cpu)) {
e82bcec2
MT
650 func(data);
651 return;
652 }
653
654 wi.func = func;
655 wi.data = data;
3c02270d 656 wi.free = false;
c64ca814
AF
657 if (cpu->queued_work_first == NULL) {
658 cpu->queued_work_first = &wi;
0ab07c62 659 } else {
c64ca814 660 cpu->queued_work_last->next = &wi;
0ab07c62 661 }
c64ca814 662 cpu->queued_work_last = &wi;
e82bcec2
MT
663 wi.next = NULL;
664 wi.done = false;
665
c08d7424 666 qemu_cpu_kick(cpu);
e82bcec2 667 while (!wi.done) {
4917cf44 668 CPUState *self_cpu = current_cpu;
e82bcec2
MT
669
670 qemu_cond_wait(&qemu_work_cond, &qemu_global_mutex);
4917cf44 671 current_cpu = self_cpu;
e82bcec2
MT
672 }
673}
674
3c02270d
CV
675void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data)
676{
677 struct qemu_work_item *wi;
678
679 if (qemu_cpu_is_self(cpu)) {
680 func(data);
681 return;
682 }
683
684 wi = g_malloc0(sizeof(struct qemu_work_item));
685 wi->func = func;
686 wi->data = data;
687 wi->free = true;
688 if (cpu->queued_work_first == NULL) {
689 cpu->queued_work_first = wi;
690 } else {
691 cpu->queued_work_last->next = wi;
692 }
693 cpu->queued_work_last = wi;
694 wi->next = NULL;
695 wi->done = false;
696
697 qemu_cpu_kick(cpu);
698}
699
6d45b109 700static void flush_queued_work(CPUState *cpu)
e82bcec2
MT
701{
702 struct qemu_work_item *wi;
703
c64ca814 704 if (cpu->queued_work_first == NULL) {
e82bcec2 705 return;
0ab07c62 706 }
e82bcec2 707
c64ca814
AF
708 while ((wi = cpu->queued_work_first)) {
709 cpu->queued_work_first = wi->next;
e82bcec2
MT
710 wi->func(wi->data);
711 wi->done = true;
3c02270d
CV
712 if (wi->free) {
713 g_free(wi);
714 }
e82bcec2 715 }
c64ca814 716 cpu->queued_work_last = NULL;
e82bcec2
MT
717 qemu_cond_broadcast(&qemu_work_cond);
718}
719
509a0d78 720static void qemu_wait_io_event_common(CPUState *cpu)
296af7c9 721{
4fdeee7c
AF
722 if (cpu->stop) {
723 cpu->stop = false;
f324e766 724 cpu->stopped = true;
296af7c9
BS
725 qemu_cond_signal(&qemu_pause_cond);
726 }
6d45b109 727 flush_queued_work(cpu);
216fc9a4 728 cpu->thread_kicked = false;
296af7c9
BS
729}
730
6cabe1f3 731static void qemu_tcg_wait_io_event(void)
296af7c9 732{
182735ef 733 CPUState *cpu;
6cabe1f3 734
16400322 735 while (all_cpu_threads_idle()) {
ab33fcda
PB
736 /* Start accounting real time to the virtual clock if the CPUs
737 are idle. */
738 qemu_clock_warp(vm_clock);
9705fbb5 739 qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex);
16400322 740 }
296af7c9 741
46daff13
PB
742 while (iothread_requesting_mutex) {
743 qemu_cond_wait(&qemu_io_proceeded_cond, &qemu_global_mutex);
744 }
6cabe1f3 745
182735ef
AF
746 for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
747 qemu_wait_io_event_common(cpu);
6cabe1f3 748 }
296af7c9
BS
749}
750
fd529e8f 751static void qemu_kvm_wait_io_event(CPUState *cpu)
296af7c9 752{
a98ae1d8 753 while (cpu_thread_is_idle(cpu)) {
f5c121b8 754 qemu_cond_wait(cpu->halt_cond, &qemu_global_mutex);
16400322 755 }
296af7c9 756
290adf38 757 qemu_kvm_eat_signals(cpu);
509a0d78 758 qemu_wait_io_event_common(cpu);
296af7c9
BS
759}
760
7e97cd88 761static void *qemu_kvm_cpu_thread_fn(void *arg)
296af7c9 762{
48a106bd 763 CPUState *cpu = arg;
84b4915d 764 int r;
296af7c9 765
6164e6d6 766 qemu_mutex_lock(&qemu_global_mutex);
814e612e 767 qemu_thread_get_self(cpu->thread);
9f09e18a 768 cpu->thread_id = qemu_get_thread_id();
4917cf44 769 current_cpu = cpu;
296af7c9 770
504134d2 771 r = kvm_init_vcpu(cpu);
84b4915d
JK
772 if (r < 0) {
773 fprintf(stderr, "kvm_init_vcpu failed: %s\n", strerror(-r));
774 exit(1);
775 }
296af7c9 776
13618e05 777 qemu_kvm_init_cpu_signals(cpu);
296af7c9
BS
778
779 /* signal CPU creation */
61a46217 780 cpu->created = true;
296af7c9
BS
781 qemu_cond_signal(&qemu_cpu_cond);
782
296af7c9 783 while (1) {
a1fcaa73 784 if (cpu_can_run(cpu)) {
1458c363 785 r = kvm_cpu_exec(cpu);
83f338f7 786 if (r == EXCP_DEBUG) {
91325046 787 cpu_handle_guest_debug(cpu);
83f338f7 788 }
0ab07c62 789 }
fd529e8f 790 qemu_kvm_wait_io_event(cpu);
296af7c9
BS
791 }
792
793 return NULL;
794}
795
c7f0f3b1
AL
796static void *qemu_dummy_cpu_thread_fn(void *arg)
797{
798#ifdef _WIN32
799 fprintf(stderr, "qtest is not supported under Windows\n");
800 exit(1);
801#else
10a9021d 802 CPUState *cpu = arg;
c7f0f3b1
AL
803 sigset_t waitset;
804 int r;
805
806 qemu_mutex_lock_iothread();
814e612e 807 qemu_thread_get_self(cpu->thread);
9f09e18a 808 cpu->thread_id = qemu_get_thread_id();
c7f0f3b1
AL
809
810 sigemptyset(&waitset);
811 sigaddset(&waitset, SIG_IPI);
812
813 /* signal CPU creation */
61a46217 814 cpu->created = true;
c7f0f3b1
AL
815 qemu_cond_signal(&qemu_cpu_cond);
816
4917cf44 817 current_cpu = cpu;
c7f0f3b1 818 while (1) {
4917cf44 819 current_cpu = NULL;
c7f0f3b1
AL
820 qemu_mutex_unlock_iothread();
821 do {
822 int sig;
823 r = sigwait(&waitset, &sig);
824 } while (r == -1 && (errno == EAGAIN || errno == EINTR));
825 if (r == -1) {
826 perror("sigwait");
827 exit(1);
828 }
829 qemu_mutex_lock_iothread();
4917cf44 830 current_cpu = cpu;
509a0d78 831 qemu_wait_io_event_common(cpu);
c7f0f3b1
AL
832 }
833
834 return NULL;
835#endif
836}
837
bdb7ca67
JK
838static void tcg_exec_all(void);
839
a37677c3
IM
840static void tcg_signal_cpu_creation(CPUState *cpu, void *data)
841{
842 cpu->thread_id = qemu_get_thread_id();
843 cpu->created = true;
844}
845
7e97cd88 846static void *qemu_tcg_cpu_thread_fn(void *arg)
296af7c9 847{
c3586ba7 848 CPUState *cpu = arg;
296af7c9 849
55f8d6ac 850 qemu_tcg_init_cpu_signals();
814e612e 851 qemu_thread_get_self(cpu->thread);
296af7c9 852
296af7c9 853 qemu_mutex_lock(&qemu_global_mutex);
a37677c3 854 qemu_for_each_cpu(tcg_signal_cpu_creation, NULL);
296af7c9
BS
855 qemu_cond_signal(&qemu_cpu_cond);
856
fa7d1867 857 /* wait for initial kick-off after machine start */
182735ef 858 while (first_cpu->stopped) {
fa7d1867 859 qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex);
8e564b4e
JK
860
861 /* process any pending work */
182735ef
AF
862 for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
863 qemu_wait_io_event_common(cpu);
8e564b4e 864 }
0ab07c62 865 }
296af7c9
BS
866
867 while (1) {
bdb7ca67 868 tcg_exec_all();
946fb27c 869 if (use_icount && qemu_clock_deadline(vm_clock) <= 0) {
3b2319a3
PB
870 qemu_notify_event();
871 }
6cabe1f3 872 qemu_tcg_wait_io_event();
296af7c9
BS
873 }
874
875 return NULL;
876}
877
2ff09a40 878static void qemu_cpu_kick_thread(CPUState *cpu)
cc015e9a
PB
879{
880#ifndef _WIN32
881 int err;
882
814e612e 883 err = pthread_kill(cpu->thread->thread, SIG_IPI);
cc015e9a
PB
884 if (err) {
885 fprintf(stderr, "qemu:%s: %s", __func__, strerror(err));
886 exit(1);
887 }
888#else /* _WIN32 */
60e82579 889 if (!qemu_cpu_is_self(cpu)) {
ed9164a3
OH
890 CONTEXT tcgContext;
891
892 if (SuspendThread(cpu->hThread) == (DWORD)-1) {
7f1721df 893 fprintf(stderr, "qemu:%s: GetLastError:%lu\n", __func__,
ed9164a3
OH
894 GetLastError());
895 exit(1);
896 }
897
898 /* On multi-core systems, we are not sure that the thread is actually
899 * suspended until we can get the context.
900 */
901 tcgContext.ContextFlags = CONTEXT_CONTROL;
902 while (GetThreadContext(cpu->hThread, &tcgContext) != 0) {
903 continue;
904 }
905
cc015e9a 906 cpu_signal(0);
ed9164a3
OH
907
908 if (ResumeThread(cpu->hThread) == (DWORD)-1) {
7f1721df 909 fprintf(stderr, "qemu:%s: GetLastError:%lu\n", __func__,
ed9164a3
OH
910 GetLastError());
911 exit(1);
912 }
cc015e9a
PB
913 }
914#endif
915}
916
c08d7424 917void qemu_cpu_kick(CPUState *cpu)
296af7c9 918{
f5c121b8 919 qemu_cond_broadcast(cpu->halt_cond);
216fc9a4 920 if (!tcg_enabled() && !cpu->thread_kicked) {
2ff09a40 921 qemu_cpu_kick_thread(cpu);
216fc9a4 922 cpu->thread_kicked = true;
aa2c364b 923 }
296af7c9
BS
924}
925
46d62fac 926void qemu_cpu_kick_self(void)
296af7c9 927{
b55c22c6 928#ifndef _WIN32
4917cf44 929 assert(current_cpu);
296af7c9 930
4917cf44
AF
931 if (!current_cpu->thread_kicked) {
932 qemu_cpu_kick_thread(current_cpu);
933 current_cpu->thread_kicked = true;
296af7c9 934 }
b55c22c6
PB
935#else
936 abort();
937#endif
296af7c9
BS
938}
939
60e82579 940bool qemu_cpu_is_self(CPUState *cpu)
296af7c9 941{
814e612e 942 return qemu_thread_is_self(cpu->thread);
296af7c9
BS
943}
944
aa723c23
JQ
945static bool qemu_in_vcpu_thread(void)
946{
4917cf44 947 return current_cpu && qemu_cpu_is_self(current_cpu);
aa723c23
JQ
948}
949
296af7c9
BS
950void qemu_mutex_lock_iothread(void)
951{
c7f0f3b1 952 if (!tcg_enabled()) {
296af7c9 953 qemu_mutex_lock(&qemu_global_mutex);
1a28cac3 954 } else {
46daff13 955 iothread_requesting_mutex = true;
1a28cac3 956 if (qemu_mutex_trylock(&qemu_global_mutex)) {
182735ef 957 qemu_cpu_kick_thread(first_cpu);
1a28cac3
MT
958 qemu_mutex_lock(&qemu_global_mutex);
959 }
46daff13
PB
960 iothread_requesting_mutex = false;
961 qemu_cond_broadcast(&qemu_io_proceeded_cond);
1a28cac3 962 }
296af7c9
BS
963}
964
965void qemu_mutex_unlock_iothread(void)
966{
967 qemu_mutex_unlock(&qemu_global_mutex);
968}
969
970static int all_vcpus_paused(void)
971{
182735ef 972 CPUState *cpu = first_cpu;
296af7c9 973
182735ef
AF
974 while (cpu) {
975 if (!cpu->stopped) {
296af7c9 976 return 0;
0ab07c62 977 }
182735ef 978 cpu = cpu->next_cpu;
296af7c9
BS
979 }
980
981 return 1;
982}
983
984void pause_all_vcpus(void)
985{
182735ef 986 CPUState *cpu = first_cpu;
296af7c9 987
a5c57d64 988 qemu_clock_enable(vm_clock, false);
182735ef
AF
989 while (cpu) {
990 cpu->stop = true;
991 qemu_cpu_kick(cpu);
992 cpu = cpu->next_cpu;
296af7c9
BS
993 }
994
aa723c23 995 if (qemu_in_vcpu_thread()) {
d798e974
JK
996 cpu_stop_current();
997 if (!kvm_enabled()) {
182735ef
AF
998 cpu = first_cpu;
999 while (cpu) {
1000 cpu->stop = false;
1001 cpu->stopped = true;
1002 cpu = cpu->next_cpu;
d798e974
JK
1003 }
1004 return;
1005 }
1006 }
1007
296af7c9 1008 while (!all_vcpus_paused()) {
be7d6c57 1009 qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex);
182735ef
AF
1010 cpu = first_cpu;
1011 while (cpu) {
1012 qemu_cpu_kick(cpu);
1013 cpu = cpu->next_cpu;
296af7c9
BS
1014 }
1015 }
1016}
1017
2993683b
IM
1018void cpu_resume(CPUState *cpu)
1019{
1020 cpu->stop = false;
1021 cpu->stopped = false;
1022 qemu_cpu_kick(cpu);
1023}
1024
296af7c9
BS
1025void resume_all_vcpus(void)
1026{
182735ef 1027 CPUState *cpu = first_cpu;
296af7c9 1028
47113ab6 1029 qemu_clock_enable(vm_clock, true);
182735ef
AF
1030 while (cpu) {
1031 cpu_resume(cpu);
1032 cpu = cpu->next_cpu;
296af7c9
BS
1033 }
1034}
1035
e5ab30a2 1036static void qemu_tcg_init_vcpu(CPUState *cpu)
296af7c9 1037{
296af7c9
BS
1038 /* share a single thread for all cpus with TCG */
1039 if (!tcg_cpu_thread) {
814e612e 1040 cpu->thread = g_malloc0(sizeof(QemuThread));
f5c121b8
AF
1041 cpu->halt_cond = g_malloc0(sizeof(QemuCond));
1042 qemu_cond_init(cpu->halt_cond);
1043 tcg_halt_cond = cpu->halt_cond;
c3586ba7 1044 qemu_thread_create(cpu->thread, qemu_tcg_cpu_thread_fn, cpu,
1ecf47bf
PB
1045 QEMU_THREAD_JOINABLE);
1046#ifdef _WIN32
814e612e 1047 cpu->hThread = qemu_thread_get_handle(cpu->thread);
1ecf47bf 1048#endif
61a46217 1049 while (!cpu->created) {
18a85728 1050 qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
0ab07c62 1051 }
814e612e 1052 tcg_cpu_thread = cpu->thread;
296af7c9 1053 } else {
814e612e 1054 cpu->thread = tcg_cpu_thread;
f5c121b8 1055 cpu->halt_cond = tcg_halt_cond;
296af7c9
BS
1056 }
1057}
1058
48a106bd 1059static void qemu_kvm_start_vcpu(CPUState *cpu)
296af7c9 1060{
814e612e 1061 cpu->thread = g_malloc0(sizeof(QemuThread));
f5c121b8
AF
1062 cpu->halt_cond = g_malloc0(sizeof(QemuCond));
1063 qemu_cond_init(cpu->halt_cond);
48a106bd 1064 qemu_thread_create(cpu->thread, qemu_kvm_cpu_thread_fn, cpu,
1ecf47bf 1065 QEMU_THREAD_JOINABLE);
61a46217 1066 while (!cpu->created) {
18a85728 1067 qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
0ab07c62 1068 }
296af7c9
BS
1069}
1070
10a9021d 1071static void qemu_dummy_start_vcpu(CPUState *cpu)
c7f0f3b1 1072{
814e612e 1073 cpu->thread = g_malloc0(sizeof(QemuThread));
f5c121b8
AF
1074 cpu->halt_cond = g_malloc0(sizeof(QemuCond));
1075 qemu_cond_init(cpu->halt_cond);
10a9021d 1076 qemu_thread_create(cpu->thread, qemu_dummy_cpu_thread_fn, cpu,
c7f0f3b1 1077 QEMU_THREAD_JOINABLE);
61a46217 1078 while (!cpu->created) {
c7f0f3b1
AL
1079 qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
1080 }
1081}
1082
c643bed9 1083void qemu_init_vcpu(CPUState *cpu)
296af7c9 1084{
ce3960eb
AF
1085 cpu->nr_cores = smp_cores;
1086 cpu->nr_threads = smp_threads;
f324e766 1087 cpu->stopped = true;
0ab07c62 1088 if (kvm_enabled()) {
48a106bd 1089 qemu_kvm_start_vcpu(cpu);
c7f0f3b1 1090 } else if (tcg_enabled()) {
e5ab30a2 1091 qemu_tcg_init_vcpu(cpu);
c7f0f3b1 1092 } else {
10a9021d 1093 qemu_dummy_start_vcpu(cpu);
0ab07c62 1094 }
296af7c9
BS
1095}
1096
b4a3d965 1097void cpu_stop_current(void)
296af7c9 1098{
4917cf44
AF
1099 if (current_cpu) {
1100 current_cpu->stop = false;
1101 current_cpu->stopped = true;
1102 cpu_exit(current_cpu);
67bb172f 1103 qemu_cond_signal(&qemu_pause_cond);
b4a3d965 1104 }
296af7c9
BS
1105}
1106
56983463 1107int vm_stop(RunState state)
296af7c9 1108{
aa723c23 1109 if (qemu_in_vcpu_thread()) {
1dfb4dd9 1110 qemu_system_vmstop_request(state);
296af7c9
BS
1111 /*
1112 * FIXME: should not return to device code in case
1113 * vm_stop() has been requested.
1114 */
b4a3d965 1115 cpu_stop_current();
56983463 1116 return 0;
296af7c9 1117 }
56983463
KW
1118
1119 return do_vm_stop(state);
296af7c9
BS
1120}
1121
8a9236f1
LC
1122/* does a state transition even if the VM is already stopped,
1123 current state is forgotten forever */
56983463 1124int vm_stop_force_state(RunState state)
8a9236f1
LC
1125{
1126 if (runstate_is_running()) {
56983463 1127 return vm_stop(state);
8a9236f1
LC
1128 } else {
1129 runstate_set(state);
594a45ce
KW
1130 /* Make sure to return an error if the flush in a previous vm_stop()
1131 * failed. */
1132 return bdrv_flush_all();
8a9236f1
LC
1133 }
1134}
1135
9349b4f9 1136static int tcg_cpu_exec(CPUArchState *env)
296af7c9
BS
1137{
1138 int ret;
1139#ifdef CONFIG_PROFILER
1140 int64_t ti;
1141#endif
1142
1143#ifdef CONFIG_PROFILER
1144 ti = profile_getclock();
1145#endif
1146 if (use_icount) {
1147 int64_t count;
1148 int decr;
1149 qemu_icount -= (env->icount_decr.u16.low + env->icount_extra);
1150 env->icount_decr.u16.low = 0;
1151 env->icount_extra = 0;
946fb27c 1152 count = qemu_icount_round(qemu_clock_deadline(vm_clock));
296af7c9
BS
1153 qemu_icount += count;
1154 decr = (count > 0xffff) ? 0xffff : count;
1155 count -= decr;
1156 env->icount_decr.u16.low = decr;
1157 env->icount_extra = count;
1158 }
1159 ret = cpu_exec(env);
1160#ifdef CONFIG_PROFILER
1161 qemu_time += profile_getclock() - ti;
1162#endif
1163 if (use_icount) {
1164 /* Fold pending instructions back into the
1165 instruction counter, and clear the interrupt flag. */
1166 qemu_icount -= (env->icount_decr.u16.low
1167 + env->icount_extra);
1168 env->icount_decr.u32 = 0;
1169 env->icount_extra = 0;
1170 }
1171 return ret;
1172}
1173
bdb7ca67 1174static void tcg_exec_all(void)
296af7c9 1175{
9a36085b
JK
1176 int r;
1177
ab33fcda
PB
1178 /* Account partial waits to the vm_clock. */
1179 qemu_clock_warp(vm_clock);
1180
0ab07c62 1181 if (next_cpu == NULL) {
296af7c9 1182 next_cpu = first_cpu;
0ab07c62 1183 }
c629a4bc 1184 for (; next_cpu != NULL && !exit_request; next_cpu = next_cpu->next_cpu) {
182735ef
AF
1185 CPUState *cpu = next_cpu;
1186 CPUArchState *env = cpu->env_ptr;
296af7c9
BS
1187
1188 qemu_clock_enable(vm_clock,
ed2803da 1189 (cpu->singlestep_enabled & SSTEP_NOTIMER) == 0);
296af7c9 1190
a1fcaa73 1191 if (cpu_can_run(cpu)) {
bdb7ca67 1192 r = tcg_cpu_exec(env);
9a36085b 1193 if (r == EXCP_DEBUG) {
91325046 1194 cpu_handle_guest_debug(cpu);
3c638d06
JK
1195 break;
1196 }
f324e766 1197 } else if (cpu->stop || cpu->stopped) {
296af7c9
BS
1198 break;
1199 }
1200 }
c629a4bc 1201 exit_request = 0;
296af7c9
BS
1202}
1203
1204void set_numa_modes(void)
1205{
1b1ed8dc 1206 CPUState *cpu;
296af7c9
BS
1207 int i;
1208
182735ef 1209 for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
296af7c9 1210 for (i = 0; i < nb_numa_nodes; i++) {
55e5c285 1211 if (test_bit(cpu->cpu_index, node_cpumask[i])) {
1b1ed8dc 1212 cpu->numa_node = i;
296af7c9
BS
1213 }
1214 }
1215 }
1216}
1217
9a78eead 1218void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg)
262353cb
BS
1219{
1220 /* XXX: implement xxx_cpu_list for targets that still miss it */
e916cbf8
PM
1221#if defined(cpu_list)
1222 cpu_list(f, cpu_fprintf);
262353cb
BS
1223#endif
1224}
de0b36b6
LC
1225
1226CpuInfoList *qmp_query_cpus(Error **errp)
1227{
1228 CpuInfoList *head = NULL, *cur_item = NULL;
182735ef 1229 CPUState *cpu;
de0b36b6 1230
182735ef 1231 for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
de0b36b6 1232 CpuInfoList *info;
182735ef
AF
1233#if defined(TARGET_I386)
1234 X86CPU *x86_cpu = X86_CPU(cpu);
1235 CPUX86State *env = &x86_cpu->env;
1236#elif defined(TARGET_PPC)
1237 PowerPCCPU *ppc_cpu = POWERPC_CPU(cpu);
1238 CPUPPCState *env = &ppc_cpu->env;
1239#elif defined(TARGET_SPARC)
1240 SPARCCPU *sparc_cpu = SPARC_CPU(cpu);
1241 CPUSPARCState *env = &sparc_cpu->env;
1242#elif defined(TARGET_MIPS)
1243 MIPSCPU *mips_cpu = MIPS_CPU(cpu);
1244 CPUMIPSState *env = &mips_cpu->env;
1245#endif
de0b36b6 1246
cb446eca 1247 cpu_synchronize_state(cpu);
de0b36b6
LC
1248
1249 info = g_malloc0(sizeof(*info));
1250 info->value = g_malloc0(sizeof(*info->value));
55e5c285 1251 info->value->CPU = cpu->cpu_index;
182735ef 1252 info->value->current = (cpu == first_cpu);
259186a7 1253 info->value->halted = cpu->halted;
9f09e18a 1254 info->value->thread_id = cpu->thread_id;
de0b36b6
LC
1255#if defined(TARGET_I386)
1256 info->value->has_pc = true;
1257 info->value->pc = env->eip + env->segs[R_CS].base;
1258#elif defined(TARGET_PPC)
1259 info->value->has_nip = true;
1260 info->value->nip = env->nip;
1261#elif defined(TARGET_SPARC)
1262 info->value->has_pc = true;
1263 info->value->pc = env->pc;
1264 info->value->has_npc = true;
1265 info->value->npc = env->npc;
1266#elif defined(TARGET_MIPS)
1267 info->value->has_PC = true;
1268 info->value->PC = env->active_tc.PC;
1269#endif
1270
1271 /* XXX: waiting for the qapi to support GSList */
1272 if (!cur_item) {
1273 head = cur_item = info;
1274 } else {
1275 cur_item->next = info;
1276 cur_item = info;
1277 }
1278 }
1279
1280 return head;
1281}
0cfd6a9a
LC
1282
1283void qmp_memsave(int64_t addr, int64_t size, const char *filename,
1284 bool has_cpu, int64_t cpu_index, Error **errp)
1285{
1286 FILE *f;
1287 uint32_t l;
55e5c285 1288 CPUState *cpu;
0cfd6a9a
LC
1289 uint8_t buf[1024];
1290
1291 if (!has_cpu) {
1292 cpu_index = 0;
1293 }
1294
151d1322
AF
1295 cpu = qemu_get_cpu(cpu_index);
1296 if (cpu == NULL) {
0cfd6a9a
LC
1297 error_set(errp, QERR_INVALID_PARAMETER_VALUE, "cpu-index",
1298 "a CPU number");
1299 return;
1300 }
1301
1302 f = fopen(filename, "wb");
1303 if (!f) {
618da851 1304 error_setg_file_open(errp, errno, filename);
0cfd6a9a
LC
1305 return;
1306 }
1307
1308 while (size != 0) {
1309 l = sizeof(buf);
1310 if (l > size)
1311 l = size;
f17ec444 1312 cpu_memory_rw_debug(cpu, addr, buf, l, 0);
0cfd6a9a
LC
1313 if (fwrite(buf, 1, l, f) != l) {
1314 error_set(errp, QERR_IO_ERROR);
1315 goto exit;
1316 }
1317 addr += l;
1318 size -= l;
1319 }
1320
1321exit:
1322 fclose(f);
1323}
6d3962bf
LC
1324
1325void qmp_pmemsave(int64_t addr, int64_t size, const char *filename,
1326 Error **errp)
1327{
1328 FILE *f;
1329 uint32_t l;
1330 uint8_t buf[1024];
1331
1332 f = fopen(filename, "wb");
1333 if (!f) {
618da851 1334 error_setg_file_open(errp, errno, filename);
6d3962bf
LC
1335 return;
1336 }
1337
1338 while (size != 0) {
1339 l = sizeof(buf);
1340 if (l > size)
1341 l = size;
1342 cpu_physical_memory_rw(addr, buf, l, 0);
1343 if (fwrite(buf, 1, l, f) != l) {
1344 error_set(errp, QERR_IO_ERROR);
1345 goto exit;
1346 }
1347 addr += l;
1348 size -= l;
1349 }
1350
1351exit:
1352 fclose(f);
1353}
ab49ab5c
LC
1354
1355void qmp_inject_nmi(Error **errp)
1356{
1357#if defined(TARGET_I386)
182735ef
AF
1358 CPUState *cs;
1359
1360 for (cs = first_cpu; cs != NULL; cs = cs->next_cpu) {
1361 X86CPU *cpu = X86_CPU(cs);
1362 CPUX86State *env = &cpu->env;
ab49ab5c 1363
02c09195 1364 if (!env->apic_state) {
182735ef 1365 cpu_interrupt(cs, CPU_INTERRUPT_NMI);
02c09195
JK
1366 } else {
1367 apic_deliver_nmi(env->apic_state);
1368 }
ab49ab5c
LC
1369 }
1370#else
1371 error_set(errp, QERR_UNSUPPORTED);
1372#endif
1373}