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Commit | Line | Data |
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296af7c9 BS |
1 | /* |
2 | * QEMU System Emulator | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | /* Needed early for CONFIG_BSD etc. */ | |
26 | #include "config-host.h" | |
27 | ||
83c9089e | 28 | #include "monitor/monitor.h" |
9c17d615 | 29 | #include "sysemu/sysemu.h" |
022c62cb | 30 | #include "exec/gdbstub.h" |
9c17d615 PB |
31 | #include "sysemu/dma.h" |
32 | #include "sysemu/kvm.h" | |
de0b36b6 | 33 | #include "qmp-commands.h" |
296af7c9 | 34 | |
1de7afc9 | 35 | #include "qemu/thread.h" |
9c17d615 PB |
36 | #include "sysemu/cpus.h" |
37 | #include "sysemu/qtest.h" | |
1de7afc9 PB |
38 | #include "qemu/main-loop.h" |
39 | #include "qemu/bitmap.h" | |
cb365646 | 40 | #include "qemu/seqlock.h" |
0ff0fc19 JK |
41 | |
42 | #ifndef _WIN32 | |
1de7afc9 | 43 | #include "qemu/compatfd.h" |
0ff0fc19 | 44 | #endif |
296af7c9 | 45 | |
6d9cb73c JK |
46 | #ifdef CONFIG_LINUX |
47 | ||
48 | #include <sys/prctl.h> | |
49 | ||
c0532a76 MT |
50 | #ifndef PR_MCE_KILL |
51 | #define PR_MCE_KILL 33 | |
52 | #endif | |
53 | ||
6d9cb73c JK |
54 | #ifndef PR_MCE_KILL_SET |
55 | #define PR_MCE_KILL_SET 1 | |
56 | #endif | |
57 | ||
58 | #ifndef PR_MCE_KILL_EARLY | |
59 | #define PR_MCE_KILL_EARLY 1 | |
60 | #endif | |
61 | ||
62 | #endif /* CONFIG_LINUX */ | |
63 | ||
182735ef | 64 | static CPUState *next_cpu; |
296af7c9 | 65 | |
321bc0b2 TC |
66 | bool cpu_is_stopped(CPUState *cpu) |
67 | { | |
68 | return cpu->stopped || !runstate_is_running(); | |
69 | } | |
70 | ||
a98ae1d8 | 71 | static bool cpu_thread_is_idle(CPUState *cpu) |
ac873f1e | 72 | { |
c64ca814 | 73 | if (cpu->stop || cpu->queued_work_first) { |
ac873f1e PM |
74 | return false; |
75 | } | |
321bc0b2 | 76 | if (cpu_is_stopped(cpu)) { |
ac873f1e PM |
77 | return true; |
78 | } | |
259186a7 | 79 | if (!cpu->halted || qemu_cpu_has_work(cpu) || |
215e79c0 | 80 | kvm_halt_in_kernel()) { |
ac873f1e PM |
81 | return false; |
82 | } | |
83 | return true; | |
84 | } | |
85 | ||
86 | static bool all_cpu_threads_idle(void) | |
87 | { | |
182735ef | 88 | CPUState *cpu; |
ac873f1e | 89 | |
bdc44640 | 90 | CPU_FOREACH(cpu) { |
182735ef | 91 | if (!cpu_thread_is_idle(cpu)) { |
ac873f1e PM |
92 | return false; |
93 | } | |
94 | } | |
95 | return true; | |
96 | } | |
97 | ||
946fb27c PB |
98 | /***********************************************************/ |
99 | /* guest cycle counter */ | |
100 | ||
101 | /* Conversion factor from emulated instructions to virtual clock ticks. */ | |
102 | static int icount_time_shift; | |
103 | /* Arbitrarily pick 1MIPS as the minimum allowable speed. */ | |
104 | #define MAX_ICOUNT_SHIFT 10 | |
105 | /* Compensate for varying guest execution speed. */ | |
106 | static int64_t qemu_icount_bias; | |
107 | static QEMUTimer *icount_rt_timer; | |
108 | static QEMUTimer *icount_vm_timer; | |
109 | static QEMUTimer *icount_warp_timer; | |
110 | static int64_t vm_clock_warp_start; | |
111 | static int64_t qemu_icount; | |
112 | ||
113 | typedef struct TimersState { | |
cb365646 | 114 | /* Protected by BQL. */ |
946fb27c PB |
115 | int64_t cpu_ticks_prev; |
116 | int64_t cpu_ticks_offset; | |
cb365646 LPF |
117 | |
118 | /* cpu_clock_offset can be read out of BQL, so protect it with | |
119 | * this lock. | |
120 | */ | |
121 | QemuSeqLock vm_clock_seqlock; | |
946fb27c PB |
122 | int64_t cpu_clock_offset; |
123 | int32_t cpu_ticks_enabled; | |
124 | int64_t dummy; | |
125 | } TimersState; | |
126 | ||
d9cd4007 | 127 | static TimersState timers_state; |
946fb27c PB |
128 | |
129 | /* Return the virtual CPU time, based on the instruction counter. */ | |
130 | int64_t cpu_get_icount(void) | |
131 | { | |
132 | int64_t icount; | |
4917cf44 | 133 | CPUState *cpu = current_cpu; |
946fb27c PB |
134 | |
135 | icount = qemu_icount; | |
4917cf44 AF |
136 | if (cpu) { |
137 | CPUArchState *env = cpu->env_ptr; | |
946fb27c PB |
138 | if (!can_do_io(env)) { |
139 | fprintf(stderr, "Bad clock read\n"); | |
140 | } | |
141 | icount -= (env->icount_decr.u16.low + env->icount_extra); | |
142 | } | |
143 | return qemu_icount_bias + (icount << icount_time_shift); | |
144 | } | |
145 | ||
146 | /* return the host CPU cycle counter and handle stop/restart */ | |
cb365646 | 147 | /* Caller must hold the BQL */ |
946fb27c PB |
148 | int64_t cpu_get_ticks(void) |
149 | { | |
150 | if (use_icount) { | |
151 | return cpu_get_icount(); | |
152 | } | |
153 | if (!timers_state.cpu_ticks_enabled) { | |
154 | return timers_state.cpu_ticks_offset; | |
155 | } else { | |
156 | int64_t ticks; | |
157 | ticks = cpu_get_real_ticks(); | |
158 | if (timers_state.cpu_ticks_prev > ticks) { | |
159 | /* Note: non increasing ticks may happen if the host uses | |
160 | software suspend */ | |
161 | timers_state.cpu_ticks_offset += timers_state.cpu_ticks_prev - ticks; | |
162 | } | |
163 | timers_state.cpu_ticks_prev = ticks; | |
164 | return ticks + timers_state.cpu_ticks_offset; | |
165 | } | |
166 | } | |
167 | ||
cb365646 | 168 | static int64_t cpu_get_clock_locked(void) |
946fb27c PB |
169 | { |
170 | int64_t ti; | |
cb365646 | 171 | |
946fb27c | 172 | if (!timers_state.cpu_ticks_enabled) { |
cb365646 | 173 | ti = timers_state.cpu_clock_offset; |
946fb27c PB |
174 | } else { |
175 | ti = get_clock(); | |
cb365646 | 176 | ti += timers_state.cpu_clock_offset; |
946fb27c | 177 | } |
cb365646 LPF |
178 | |
179 | return ti; | |
180 | } | |
181 | ||
182 | /* return the host CPU monotonic timer and handle stop/restart */ | |
183 | int64_t cpu_get_clock(void) | |
184 | { | |
185 | int64_t ti; | |
186 | unsigned start; | |
187 | ||
188 | do { | |
189 | start = seqlock_read_begin(&timers_state.vm_clock_seqlock); | |
190 | ti = cpu_get_clock_locked(); | |
191 | } while (seqlock_read_retry(&timers_state.vm_clock_seqlock, start)); | |
192 | ||
193 | return ti; | |
946fb27c PB |
194 | } |
195 | ||
cb365646 LPF |
196 | /* enable cpu_get_ticks() |
197 | * Caller must hold BQL which server as mutex for vm_clock_seqlock. | |
198 | */ | |
946fb27c PB |
199 | void cpu_enable_ticks(void) |
200 | { | |
cb365646 LPF |
201 | /* Here, the really thing protected by seqlock is cpu_clock_offset. */ |
202 | seqlock_write_lock(&timers_state.vm_clock_seqlock); | |
946fb27c PB |
203 | if (!timers_state.cpu_ticks_enabled) { |
204 | timers_state.cpu_ticks_offset -= cpu_get_real_ticks(); | |
205 | timers_state.cpu_clock_offset -= get_clock(); | |
206 | timers_state.cpu_ticks_enabled = 1; | |
207 | } | |
cb365646 | 208 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); |
946fb27c PB |
209 | } |
210 | ||
211 | /* disable cpu_get_ticks() : the clock is stopped. You must not call | |
cb365646 LPF |
212 | * cpu_get_ticks() after that. |
213 | * Caller must hold BQL which server as mutex for vm_clock_seqlock. | |
214 | */ | |
946fb27c PB |
215 | void cpu_disable_ticks(void) |
216 | { | |
cb365646 LPF |
217 | /* Here, the really thing protected by seqlock is cpu_clock_offset. */ |
218 | seqlock_write_lock(&timers_state.vm_clock_seqlock); | |
946fb27c PB |
219 | if (timers_state.cpu_ticks_enabled) { |
220 | timers_state.cpu_ticks_offset = cpu_get_ticks(); | |
cb365646 | 221 | timers_state.cpu_clock_offset = cpu_get_clock_locked(); |
946fb27c PB |
222 | timers_state.cpu_ticks_enabled = 0; |
223 | } | |
cb365646 | 224 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); |
946fb27c PB |
225 | } |
226 | ||
227 | /* Correlation between real and virtual time is always going to be | |
228 | fairly approximate, so ignore small variation. | |
229 | When the guest is idle real and virtual time will be aligned in | |
230 | the IO wait loop. */ | |
231 | #define ICOUNT_WOBBLE (get_ticks_per_sec() / 10) | |
232 | ||
233 | static void icount_adjust(void) | |
234 | { | |
235 | int64_t cur_time; | |
236 | int64_t cur_icount; | |
237 | int64_t delta; | |
238 | static int64_t last_delta; | |
239 | /* If the VM is not running, then do nothing. */ | |
240 | if (!runstate_is_running()) { | |
241 | return; | |
242 | } | |
243 | cur_time = cpu_get_clock(); | |
40daca54 | 244 | cur_icount = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); |
946fb27c PB |
245 | delta = cur_icount - cur_time; |
246 | /* FIXME: This is a very crude algorithm, somewhat prone to oscillation. */ | |
247 | if (delta > 0 | |
248 | && last_delta + ICOUNT_WOBBLE < delta * 2 | |
249 | && icount_time_shift > 0) { | |
250 | /* The guest is getting too far ahead. Slow time down. */ | |
251 | icount_time_shift--; | |
252 | } | |
253 | if (delta < 0 | |
254 | && last_delta - ICOUNT_WOBBLE > delta * 2 | |
255 | && icount_time_shift < MAX_ICOUNT_SHIFT) { | |
256 | /* The guest is getting too far behind. Speed time up. */ | |
257 | icount_time_shift++; | |
258 | } | |
259 | last_delta = delta; | |
260 | qemu_icount_bias = cur_icount - (qemu_icount << icount_time_shift); | |
261 | } | |
262 | ||
263 | static void icount_adjust_rt(void *opaque) | |
264 | { | |
40daca54 AB |
265 | timer_mod(icount_rt_timer, |
266 | qemu_clock_get_ms(QEMU_CLOCK_REALTIME) + 1000); | |
946fb27c PB |
267 | icount_adjust(); |
268 | } | |
269 | ||
270 | static void icount_adjust_vm(void *opaque) | |
271 | { | |
40daca54 AB |
272 | timer_mod(icount_vm_timer, |
273 | qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + | |
274 | get_ticks_per_sec() / 10); | |
946fb27c PB |
275 | icount_adjust(); |
276 | } | |
277 | ||
278 | static int64_t qemu_icount_round(int64_t count) | |
279 | { | |
280 | return (count + (1 << icount_time_shift) - 1) >> icount_time_shift; | |
281 | } | |
282 | ||
283 | static void icount_warp_rt(void *opaque) | |
284 | { | |
285 | if (vm_clock_warp_start == -1) { | |
286 | return; | |
287 | } | |
288 | ||
289 | if (runstate_is_running()) { | |
40daca54 | 290 | int64_t clock = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); |
946fb27c PB |
291 | int64_t warp_delta = clock - vm_clock_warp_start; |
292 | if (use_icount == 1) { | |
293 | qemu_icount_bias += warp_delta; | |
294 | } else { | |
295 | /* | |
40daca54 | 296 | * In adaptive mode, do not let QEMU_CLOCK_VIRTUAL run too |
946fb27c PB |
297 | * far ahead of real time. |
298 | */ | |
299 | int64_t cur_time = cpu_get_clock(); | |
40daca54 | 300 | int64_t cur_icount = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); |
946fb27c PB |
301 | int64_t delta = cur_time - cur_icount; |
302 | qemu_icount_bias += MIN(warp_delta, delta); | |
303 | } | |
40daca54 AB |
304 | if (qemu_clock_expired(QEMU_CLOCK_VIRTUAL)) { |
305 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); | |
946fb27c PB |
306 | } |
307 | } | |
308 | vm_clock_warp_start = -1; | |
309 | } | |
310 | ||
8156be56 PB |
311 | void qtest_clock_warp(int64_t dest) |
312 | { | |
40daca54 | 313 | int64_t clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); |
8156be56 PB |
314 | assert(qtest_enabled()); |
315 | while (clock < dest) { | |
40daca54 | 316 | int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
8156be56 PB |
317 | int64_t warp = MIN(dest - clock, deadline); |
318 | qemu_icount_bias += warp; | |
40daca54 AB |
319 | qemu_clock_run_timers(QEMU_CLOCK_VIRTUAL); |
320 | clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); | |
8156be56 | 321 | } |
40daca54 | 322 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); |
8156be56 PB |
323 | } |
324 | ||
40daca54 | 325 | void qemu_clock_warp(QEMUClockType type) |
946fb27c PB |
326 | { |
327 | int64_t deadline; | |
328 | ||
329 | /* | |
330 | * There are too many global variables to make the "warp" behavior | |
331 | * applicable to other clocks. But a clock argument removes the | |
332 | * need for if statements all over the place. | |
333 | */ | |
40daca54 | 334 | if (type != QEMU_CLOCK_VIRTUAL || !use_icount) { |
946fb27c PB |
335 | return; |
336 | } | |
337 | ||
338 | /* | |
40daca54 AB |
339 | * If the CPUs have been sleeping, advance QEMU_CLOCK_VIRTUAL timer now. |
340 | * This ensures that the deadline for the timer is computed correctly below. | |
946fb27c PB |
341 | * This also makes sure that the insn counter is synchronized before the |
342 | * CPU starts running, in case the CPU is woken by an event other than | |
40daca54 | 343 | * the earliest QEMU_CLOCK_VIRTUAL timer. |
946fb27c PB |
344 | */ |
345 | icount_warp_rt(NULL); | |
40daca54 AB |
346 | if (!all_cpu_threads_idle() || !qemu_clock_has_timers(QEMU_CLOCK_VIRTUAL)) { |
347 | timer_del(icount_warp_timer); | |
946fb27c PB |
348 | return; |
349 | } | |
350 | ||
8156be56 PB |
351 | if (qtest_enabled()) { |
352 | /* When testing, qtest commands advance icount. */ | |
353 | return; | |
354 | } | |
355 | ||
40daca54 | 356 | vm_clock_warp_start = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); |
ac70aafc | 357 | /* We want to use the earliest deadline from ALL vm_clocks */ |
40daca54 | 358 | deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
ac70aafc AB |
359 | |
360 | /* Maintain prior (possibly buggy) behaviour where if no deadline | |
40daca54 | 361 | * was set (as there is no QEMU_CLOCK_VIRTUAL timer) or it is more than |
ac70aafc AB |
362 | * INT32_MAX nanoseconds ahead, we still use INT32_MAX |
363 | * nanoseconds. | |
364 | */ | |
365 | if ((deadline < 0) || (deadline > INT32_MAX)) { | |
366 | deadline = INT32_MAX; | |
367 | } | |
368 | ||
946fb27c PB |
369 | if (deadline > 0) { |
370 | /* | |
40daca54 | 371 | * Ensure QEMU_CLOCK_VIRTUAL proceeds even when the virtual CPU goes to |
946fb27c PB |
372 | * sleep. Otherwise, the CPU might be waiting for a future timer |
373 | * interrupt to wake it up, but the interrupt never comes because | |
374 | * the vCPU isn't running any insns and thus doesn't advance the | |
40daca54 | 375 | * QEMU_CLOCK_VIRTUAL. |
946fb27c PB |
376 | * |
377 | * An extreme solution for this problem would be to never let VCPUs | |
40daca54 AB |
378 | * sleep in icount mode if there is a pending QEMU_CLOCK_VIRTUAL |
379 | * timer; rather time could just advance to the next QEMU_CLOCK_VIRTUAL | |
380 | * event. Instead, we do stop VCPUs and only advance QEMU_CLOCK_VIRTUAL | |
381 | * after some e"real" time, (related to the time left until the next | |
382 | * event) has passed. The QEMU_CLOCK_REALTIME timer will do this. | |
383 | * This avoids that the warps are visible externally; for example, | |
384 | * you will not be sending network packets continuously instead of | |
385 | * every 100ms. | |
946fb27c | 386 | */ |
40daca54 | 387 | timer_mod(icount_warp_timer, vm_clock_warp_start + deadline); |
ac70aafc | 388 | } else if (deadline == 0) { |
40daca54 | 389 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); |
946fb27c PB |
390 | } |
391 | } | |
392 | ||
393 | static const VMStateDescription vmstate_timers = { | |
394 | .name = "timer", | |
395 | .version_id = 2, | |
396 | .minimum_version_id = 1, | |
397 | .minimum_version_id_old = 1, | |
398 | .fields = (VMStateField[]) { | |
399 | VMSTATE_INT64(cpu_ticks_offset, TimersState), | |
400 | VMSTATE_INT64(dummy, TimersState), | |
401 | VMSTATE_INT64_V(cpu_clock_offset, TimersState, 2), | |
402 | VMSTATE_END_OF_LIST() | |
403 | } | |
404 | }; | |
405 | ||
406 | void configure_icount(const char *option) | |
407 | { | |
cb365646 | 408 | seqlock_init(&timers_state.vm_clock_seqlock, NULL); |
946fb27c PB |
409 | vmstate_register(NULL, 0, &vmstate_timers, &timers_state); |
410 | if (!option) { | |
411 | return; | |
412 | } | |
413 | ||
40daca54 AB |
414 | icount_warp_timer = timer_new_ns(QEMU_CLOCK_REALTIME, |
415 | icount_warp_rt, NULL); | |
946fb27c PB |
416 | if (strcmp(option, "auto") != 0) { |
417 | icount_time_shift = strtol(option, NULL, 0); | |
418 | use_icount = 1; | |
419 | return; | |
420 | } | |
421 | ||
422 | use_icount = 2; | |
423 | ||
424 | /* 125MIPS seems a reasonable initial guess at the guest speed. | |
425 | It will be corrected fairly quickly anyway. */ | |
426 | icount_time_shift = 3; | |
427 | ||
428 | /* Have both realtime and virtual time triggers for speed adjustment. | |
429 | The realtime trigger catches emulated time passing too slowly, | |
430 | the virtual time trigger catches emulated time passing too fast. | |
431 | Realtime triggers occur even when idle, so use them less frequently | |
432 | than VM triggers. */ | |
40daca54 AB |
433 | icount_rt_timer = timer_new_ms(QEMU_CLOCK_REALTIME, |
434 | icount_adjust_rt, NULL); | |
435 | timer_mod(icount_rt_timer, | |
436 | qemu_clock_get_ms(QEMU_CLOCK_REALTIME) + 1000); | |
437 | icount_vm_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, | |
438 | icount_adjust_vm, NULL); | |
439 | timer_mod(icount_vm_timer, | |
440 | qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + | |
441 | get_ticks_per_sec() / 10); | |
946fb27c PB |
442 | } |
443 | ||
296af7c9 BS |
444 | /***********************************************************/ |
445 | void hw_error(const char *fmt, ...) | |
446 | { | |
447 | va_list ap; | |
55e5c285 | 448 | CPUState *cpu; |
296af7c9 BS |
449 | |
450 | va_start(ap, fmt); | |
451 | fprintf(stderr, "qemu: hardware error: "); | |
452 | vfprintf(stderr, fmt, ap); | |
453 | fprintf(stderr, "\n"); | |
bdc44640 | 454 | CPU_FOREACH(cpu) { |
55e5c285 | 455 | fprintf(stderr, "CPU #%d:\n", cpu->cpu_index); |
878096ee | 456 | cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU); |
296af7c9 BS |
457 | } |
458 | va_end(ap); | |
459 | abort(); | |
460 | } | |
461 | ||
462 | void cpu_synchronize_all_states(void) | |
463 | { | |
182735ef | 464 | CPUState *cpu; |
296af7c9 | 465 | |
bdc44640 | 466 | CPU_FOREACH(cpu) { |
182735ef | 467 | cpu_synchronize_state(cpu); |
296af7c9 BS |
468 | } |
469 | } | |
470 | ||
471 | void cpu_synchronize_all_post_reset(void) | |
472 | { | |
182735ef | 473 | CPUState *cpu; |
296af7c9 | 474 | |
bdc44640 | 475 | CPU_FOREACH(cpu) { |
182735ef | 476 | cpu_synchronize_post_reset(cpu); |
296af7c9 BS |
477 | } |
478 | } | |
479 | ||
480 | void cpu_synchronize_all_post_init(void) | |
481 | { | |
182735ef | 482 | CPUState *cpu; |
296af7c9 | 483 | |
bdc44640 | 484 | CPU_FOREACH(cpu) { |
182735ef | 485 | cpu_synchronize_post_init(cpu); |
296af7c9 BS |
486 | } |
487 | } | |
488 | ||
56983463 | 489 | static int do_vm_stop(RunState state) |
296af7c9 | 490 | { |
56983463 KW |
491 | int ret = 0; |
492 | ||
1354869c | 493 | if (runstate_is_running()) { |
296af7c9 | 494 | cpu_disable_ticks(); |
296af7c9 | 495 | pause_all_vcpus(); |
f5bbfba1 | 496 | runstate_set(state); |
1dfb4dd9 | 497 | vm_state_notify(0, state); |
296af7c9 BS |
498 | monitor_protocol_event(QEVENT_STOP, NULL); |
499 | } | |
56983463 | 500 | |
594a45ce KW |
501 | bdrv_drain_all(); |
502 | ret = bdrv_flush_all(); | |
503 | ||
56983463 | 504 | return ret; |
296af7c9 BS |
505 | } |
506 | ||
a1fcaa73 | 507 | static bool cpu_can_run(CPUState *cpu) |
296af7c9 | 508 | { |
4fdeee7c | 509 | if (cpu->stop) { |
a1fcaa73 | 510 | return false; |
0ab07c62 | 511 | } |
321bc0b2 | 512 | if (cpu_is_stopped(cpu)) { |
a1fcaa73 | 513 | return false; |
0ab07c62 | 514 | } |
a1fcaa73 | 515 | return true; |
296af7c9 BS |
516 | } |
517 | ||
91325046 | 518 | static void cpu_handle_guest_debug(CPUState *cpu) |
83f338f7 | 519 | { |
64f6b346 | 520 | gdb_set_stop_cpu(cpu); |
8cf71710 | 521 | qemu_system_debug_request(); |
f324e766 | 522 | cpu->stopped = true; |
3c638d06 JK |
523 | } |
524 | ||
714bd040 PB |
525 | static void cpu_signal(int sig) |
526 | { | |
4917cf44 AF |
527 | if (current_cpu) { |
528 | cpu_exit(current_cpu); | |
714bd040 PB |
529 | } |
530 | exit_request = 1; | |
531 | } | |
714bd040 | 532 | |
6d9cb73c JK |
533 | #ifdef CONFIG_LINUX |
534 | static void sigbus_reraise(void) | |
535 | { | |
536 | sigset_t set; | |
537 | struct sigaction action; | |
538 | ||
539 | memset(&action, 0, sizeof(action)); | |
540 | action.sa_handler = SIG_DFL; | |
541 | if (!sigaction(SIGBUS, &action, NULL)) { | |
542 | raise(SIGBUS); | |
543 | sigemptyset(&set); | |
544 | sigaddset(&set, SIGBUS); | |
545 | sigprocmask(SIG_UNBLOCK, &set, NULL); | |
546 | } | |
547 | perror("Failed to re-raise SIGBUS!\n"); | |
548 | abort(); | |
549 | } | |
550 | ||
551 | static void sigbus_handler(int n, struct qemu_signalfd_siginfo *siginfo, | |
552 | void *ctx) | |
553 | { | |
554 | if (kvm_on_sigbus(siginfo->ssi_code, | |
555 | (void *)(intptr_t)siginfo->ssi_addr)) { | |
556 | sigbus_reraise(); | |
557 | } | |
558 | } | |
559 | ||
560 | static void qemu_init_sigbus(void) | |
561 | { | |
562 | struct sigaction action; | |
563 | ||
564 | memset(&action, 0, sizeof(action)); | |
565 | action.sa_flags = SA_SIGINFO; | |
566 | action.sa_sigaction = (void (*)(int, siginfo_t*, void*))sigbus_handler; | |
567 | sigaction(SIGBUS, &action, NULL); | |
568 | ||
569 | prctl(PR_MCE_KILL, PR_MCE_KILL_SET, PR_MCE_KILL_EARLY, 0, 0); | |
570 | } | |
571 | ||
290adf38 | 572 | static void qemu_kvm_eat_signals(CPUState *cpu) |
1ab3c6c0 JK |
573 | { |
574 | struct timespec ts = { 0, 0 }; | |
575 | siginfo_t siginfo; | |
576 | sigset_t waitset; | |
577 | sigset_t chkset; | |
578 | int r; | |
579 | ||
580 | sigemptyset(&waitset); | |
581 | sigaddset(&waitset, SIG_IPI); | |
582 | sigaddset(&waitset, SIGBUS); | |
583 | ||
584 | do { | |
585 | r = sigtimedwait(&waitset, &siginfo, &ts); | |
586 | if (r == -1 && !(errno == EAGAIN || errno == EINTR)) { | |
587 | perror("sigtimedwait"); | |
588 | exit(1); | |
589 | } | |
590 | ||
591 | switch (r) { | |
592 | case SIGBUS: | |
290adf38 | 593 | if (kvm_on_sigbus_vcpu(cpu, siginfo.si_code, siginfo.si_addr)) { |
1ab3c6c0 JK |
594 | sigbus_reraise(); |
595 | } | |
596 | break; | |
597 | default: | |
598 | break; | |
599 | } | |
600 | ||
601 | r = sigpending(&chkset); | |
602 | if (r == -1) { | |
603 | perror("sigpending"); | |
604 | exit(1); | |
605 | } | |
606 | } while (sigismember(&chkset, SIG_IPI) || sigismember(&chkset, SIGBUS)); | |
1ab3c6c0 JK |
607 | } |
608 | ||
6d9cb73c JK |
609 | #else /* !CONFIG_LINUX */ |
610 | ||
611 | static void qemu_init_sigbus(void) | |
612 | { | |
613 | } | |
1ab3c6c0 | 614 | |
290adf38 | 615 | static void qemu_kvm_eat_signals(CPUState *cpu) |
1ab3c6c0 JK |
616 | { |
617 | } | |
6d9cb73c JK |
618 | #endif /* !CONFIG_LINUX */ |
619 | ||
296af7c9 | 620 | #ifndef _WIN32 |
55f8d6ac JK |
621 | static void dummy_signal(int sig) |
622 | { | |
623 | } | |
55f8d6ac | 624 | |
13618e05 | 625 | static void qemu_kvm_init_cpu_signals(CPUState *cpu) |
714bd040 PB |
626 | { |
627 | int r; | |
628 | sigset_t set; | |
629 | struct sigaction sigact; | |
630 | ||
631 | memset(&sigact, 0, sizeof(sigact)); | |
632 | sigact.sa_handler = dummy_signal; | |
633 | sigaction(SIG_IPI, &sigact, NULL); | |
634 | ||
714bd040 PB |
635 | pthread_sigmask(SIG_BLOCK, NULL, &set); |
636 | sigdelset(&set, SIG_IPI); | |
714bd040 | 637 | sigdelset(&set, SIGBUS); |
491d6e80 | 638 | r = kvm_set_signal_mask(cpu, &set); |
714bd040 PB |
639 | if (r) { |
640 | fprintf(stderr, "kvm_set_signal_mask: %s\n", strerror(-r)); | |
641 | exit(1); | |
642 | } | |
643 | } | |
644 | ||
645 | static void qemu_tcg_init_cpu_signals(void) | |
646 | { | |
714bd040 PB |
647 | sigset_t set; |
648 | struct sigaction sigact; | |
649 | ||
650 | memset(&sigact, 0, sizeof(sigact)); | |
651 | sigact.sa_handler = cpu_signal; | |
652 | sigaction(SIG_IPI, &sigact, NULL); | |
653 | ||
654 | sigemptyset(&set); | |
655 | sigaddset(&set, SIG_IPI); | |
656 | pthread_sigmask(SIG_UNBLOCK, &set, NULL); | |
714bd040 PB |
657 | } |
658 | ||
55f8d6ac | 659 | #else /* _WIN32 */ |
13618e05 | 660 | static void qemu_kvm_init_cpu_signals(CPUState *cpu) |
ff48eb5f | 661 | { |
714bd040 PB |
662 | abort(); |
663 | } | |
ff48eb5f | 664 | |
714bd040 PB |
665 | static void qemu_tcg_init_cpu_signals(void) |
666 | { | |
ff48eb5f | 667 | } |
714bd040 | 668 | #endif /* _WIN32 */ |
ff48eb5f | 669 | |
b2532d88 | 670 | static QemuMutex qemu_global_mutex; |
46daff13 PB |
671 | static QemuCond qemu_io_proceeded_cond; |
672 | static bool iothread_requesting_mutex; | |
296af7c9 BS |
673 | |
674 | static QemuThread io_thread; | |
675 | ||
676 | static QemuThread *tcg_cpu_thread; | |
677 | static QemuCond *tcg_halt_cond; | |
678 | ||
296af7c9 BS |
679 | /* cpu creation */ |
680 | static QemuCond qemu_cpu_cond; | |
681 | /* system init */ | |
296af7c9 | 682 | static QemuCond qemu_pause_cond; |
e82bcec2 | 683 | static QemuCond qemu_work_cond; |
296af7c9 | 684 | |
d3b12f5d | 685 | void qemu_init_cpu_loop(void) |
296af7c9 | 686 | { |
6d9cb73c | 687 | qemu_init_sigbus(); |
ed94592b | 688 | qemu_cond_init(&qemu_cpu_cond); |
ed94592b AL |
689 | qemu_cond_init(&qemu_pause_cond); |
690 | qemu_cond_init(&qemu_work_cond); | |
46daff13 | 691 | qemu_cond_init(&qemu_io_proceeded_cond); |
296af7c9 | 692 | qemu_mutex_init(&qemu_global_mutex); |
296af7c9 | 693 | |
b7680cb6 | 694 | qemu_thread_get_self(&io_thread); |
296af7c9 BS |
695 | } |
696 | ||
f100f0b3 | 697 | void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data) |
e82bcec2 MT |
698 | { |
699 | struct qemu_work_item wi; | |
700 | ||
60e82579 | 701 | if (qemu_cpu_is_self(cpu)) { |
e82bcec2 MT |
702 | func(data); |
703 | return; | |
704 | } | |
705 | ||
706 | wi.func = func; | |
707 | wi.data = data; | |
3c02270d | 708 | wi.free = false; |
c64ca814 AF |
709 | if (cpu->queued_work_first == NULL) { |
710 | cpu->queued_work_first = &wi; | |
0ab07c62 | 711 | } else { |
c64ca814 | 712 | cpu->queued_work_last->next = &wi; |
0ab07c62 | 713 | } |
c64ca814 | 714 | cpu->queued_work_last = &wi; |
e82bcec2 MT |
715 | wi.next = NULL; |
716 | wi.done = false; | |
717 | ||
c08d7424 | 718 | qemu_cpu_kick(cpu); |
e82bcec2 | 719 | while (!wi.done) { |
4917cf44 | 720 | CPUState *self_cpu = current_cpu; |
e82bcec2 MT |
721 | |
722 | qemu_cond_wait(&qemu_work_cond, &qemu_global_mutex); | |
4917cf44 | 723 | current_cpu = self_cpu; |
e82bcec2 MT |
724 | } |
725 | } | |
726 | ||
3c02270d CV |
727 | void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data) |
728 | { | |
729 | struct qemu_work_item *wi; | |
730 | ||
731 | if (qemu_cpu_is_self(cpu)) { | |
732 | func(data); | |
733 | return; | |
734 | } | |
735 | ||
736 | wi = g_malloc0(sizeof(struct qemu_work_item)); | |
737 | wi->func = func; | |
738 | wi->data = data; | |
739 | wi->free = true; | |
740 | if (cpu->queued_work_first == NULL) { | |
741 | cpu->queued_work_first = wi; | |
742 | } else { | |
743 | cpu->queued_work_last->next = wi; | |
744 | } | |
745 | cpu->queued_work_last = wi; | |
746 | wi->next = NULL; | |
747 | wi->done = false; | |
748 | ||
749 | qemu_cpu_kick(cpu); | |
750 | } | |
751 | ||
6d45b109 | 752 | static void flush_queued_work(CPUState *cpu) |
e82bcec2 MT |
753 | { |
754 | struct qemu_work_item *wi; | |
755 | ||
c64ca814 | 756 | if (cpu->queued_work_first == NULL) { |
e82bcec2 | 757 | return; |
0ab07c62 | 758 | } |
e82bcec2 | 759 | |
c64ca814 AF |
760 | while ((wi = cpu->queued_work_first)) { |
761 | cpu->queued_work_first = wi->next; | |
e82bcec2 MT |
762 | wi->func(wi->data); |
763 | wi->done = true; | |
3c02270d CV |
764 | if (wi->free) { |
765 | g_free(wi); | |
766 | } | |
e82bcec2 | 767 | } |
c64ca814 | 768 | cpu->queued_work_last = NULL; |
e82bcec2 MT |
769 | qemu_cond_broadcast(&qemu_work_cond); |
770 | } | |
771 | ||
509a0d78 | 772 | static void qemu_wait_io_event_common(CPUState *cpu) |
296af7c9 | 773 | { |
4fdeee7c AF |
774 | if (cpu->stop) { |
775 | cpu->stop = false; | |
f324e766 | 776 | cpu->stopped = true; |
296af7c9 BS |
777 | qemu_cond_signal(&qemu_pause_cond); |
778 | } | |
6d45b109 | 779 | flush_queued_work(cpu); |
216fc9a4 | 780 | cpu->thread_kicked = false; |
296af7c9 BS |
781 | } |
782 | ||
6cabe1f3 | 783 | static void qemu_tcg_wait_io_event(void) |
296af7c9 | 784 | { |
182735ef | 785 | CPUState *cpu; |
6cabe1f3 | 786 | |
16400322 | 787 | while (all_cpu_threads_idle()) { |
ab33fcda PB |
788 | /* Start accounting real time to the virtual clock if the CPUs |
789 | are idle. */ | |
40daca54 | 790 | qemu_clock_warp(QEMU_CLOCK_VIRTUAL); |
9705fbb5 | 791 | qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex); |
16400322 | 792 | } |
296af7c9 | 793 | |
46daff13 PB |
794 | while (iothread_requesting_mutex) { |
795 | qemu_cond_wait(&qemu_io_proceeded_cond, &qemu_global_mutex); | |
796 | } | |
6cabe1f3 | 797 | |
bdc44640 | 798 | CPU_FOREACH(cpu) { |
182735ef | 799 | qemu_wait_io_event_common(cpu); |
6cabe1f3 | 800 | } |
296af7c9 BS |
801 | } |
802 | ||
fd529e8f | 803 | static void qemu_kvm_wait_io_event(CPUState *cpu) |
296af7c9 | 804 | { |
a98ae1d8 | 805 | while (cpu_thread_is_idle(cpu)) { |
f5c121b8 | 806 | qemu_cond_wait(cpu->halt_cond, &qemu_global_mutex); |
16400322 | 807 | } |
296af7c9 | 808 | |
290adf38 | 809 | qemu_kvm_eat_signals(cpu); |
509a0d78 | 810 | qemu_wait_io_event_common(cpu); |
296af7c9 BS |
811 | } |
812 | ||
7e97cd88 | 813 | static void *qemu_kvm_cpu_thread_fn(void *arg) |
296af7c9 | 814 | { |
48a106bd | 815 | CPUState *cpu = arg; |
84b4915d | 816 | int r; |
296af7c9 | 817 | |
6164e6d6 | 818 | qemu_mutex_lock(&qemu_global_mutex); |
814e612e | 819 | qemu_thread_get_self(cpu->thread); |
9f09e18a | 820 | cpu->thread_id = qemu_get_thread_id(); |
4917cf44 | 821 | current_cpu = cpu; |
296af7c9 | 822 | |
504134d2 | 823 | r = kvm_init_vcpu(cpu); |
84b4915d JK |
824 | if (r < 0) { |
825 | fprintf(stderr, "kvm_init_vcpu failed: %s\n", strerror(-r)); | |
826 | exit(1); | |
827 | } | |
296af7c9 | 828 | |
13618e05 | 829 | qemu_kvm_init_cpu_signals(cpu); |
296af7c9 BS |
830 | |
831 | /* signal CPU creation */ | |
61a46217 | 832 | cpu->created = true; |
296af7c9 BS |
833 | qemu_cond_signal(&qemu_cpu_cond); |
834 | ||
296af7c9 | 835 | while (1) { |
a1fcaa73 | 836 | if (cpu_can_run(cpu)) { |
1458c363 | 837 | r = kvm_cpu_exec(cpu); |
83f338f7 | 838 | if (r == EXCP_DEBUG) { |
91325046 | 839 | cpu_handle_guest_debug(cpu); |
83f338f7 | 840 | } |
0ab07c62 | 841 | } |
fd529e8f | 842 | qemu_kvm_wait_io_event(cpu); |
296af7c9 BS |
843 | } |
844 | ||
845 | return NULL; | |
846 | } | |
847 | ||
c7f0f3b1 AL |
848 | static void *qemu_dummy_cpu_thread_fn(void *arg) |
849 | { | |
850 | #ifdef _WIN32 | |
851 | fprintf(stderr, "qtest is not supported under Windows\n"); | |
852 | exit(1); | |
853 | #else | |
10a9021d | 854 | CPUState *cpu = arg; |
c7f0f3b1 AL |
855 | sigset_t waitset; |
856 | int r; | |
857 | ||
858 | qemu_mutex_lock_iothread(); | |
814e612e | 859 | qemu_thread_get_self(cpu->thread); |
9f09e18a | 860 | cpu->thread_id = qemu_get_thread_id(); |
c7f0f3b1 AL |
861 | |
862 | sigemptyset(&waitset); | |
863 | sigaddset(&waitset, SIG_IPI); | |
864 | ||
865 | /* signal CPU creation */ | |
61a46217 | 866 | cpu->created = true; |
c7f0f3b1 AL |
867 | qemu_cond_signal(&qemu_cpu_cond); |
868 | ||
4917cf44 | 869 | current_cpu = cpu; |
c7f0f3b1 | 870 | while (1) { |
4917cf44 | 871 | current_cpu = NULL; |
c7f0f3b1 AL |
872 | qemu_mutex_unlock_iothread(); |
873 | do { | |
874 | int sig; | |
875 | r = sigwait(&waitset, &sig); | |
876 | } while (r == -1 && (errno == EAGAIN || errno == EINTR)); | |
877 | if (r == -1) { | |
878 | perror("sigwait"); | |
879 | exit(1); | |
880 | } | |
881 | qemu_mutex_lock_iothread(); | |
4917cf44 | 882 | current_cpu = cpu; |
509a0d78 | 883 | qemu_wait_io_event_common(cpu); |
c7f0f3b1 AL |
884 | } |
885 | ||
886 | return NULL; | |
887 | #endif | |
888 | } | |
889 | ||
bdb7ca67 JK |
890 | static void tcg_exec_all(void); |
891 | ||
7e97cd88 | 892 | static void *qemu_tcg_cpu_thread_fn(void *arg) |
296af7c9 | 893 | { |
c3586ba7 | 894 | CPUState *cpu = arg; |
296af7c9 | 895 | |
55f8d6ac | 896 | qemu_tcg_init_cpu_signals(); |
814e612e | 897 | qemu_thread_get_self(cpu->thread); |
296af7c9 | 898 | |
296af7c9 | 899 | qemu_mutex_lock(&qemu_global_mutex); |
38fcbd3f AF |
900 | CPU_FOREACH(cpu) { |
901 | cpu->thread_id = qemu_get_thread_id(); | |
902 | cpu->created = true; | |
903 | } | |
296af7c9 BS |
904 | qemu_cond_signal(&qemu_cpu_cond); |
905 | ||
fa7d1867 | 906 | /* wait for initial kick-off after machine start */ |
bdc44640 | 907 | while (QTAILQ_FIRST(&cpus)->stopped) { |
fa7d1867 | 908 | qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex); |
8e564b4e JK |
909 | |
910 | /* process any pending work */ | |
bdc44640 | 911 | CPU_FOREACH(cpu) { |
182735ef | 912 | qemu_wait_io_event_common(cpu); |
8e564b4e | 913 | } |
0ab07c62 | 914 | } |
296af7c9 BS |
915 | |
916 | while (1) { | |
bdb7ca67 | 917 | tcg_exec_all(); |
ac70aafc AB |
918 | |
919 | if (use_icount) { | |
40daca54 | 920 | int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
ac70aafc AB |
921 | |
922 | if (deadline == 0) { | |
40daca54 | 923 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); |
ac70aafc | 924 | } |
3b2319a3 | 925 | } |
6cabe1f3 | 926 | qemu_tcg_wait_io_event(); |
296af7c9 BS |
927 | } |
928 | ||
929 | return NULL; | |
930 | } | |
931 | ||
2ff09a40 | 932 | static void qemu_cpu_kick_thread(CPUState *cpu) |
cc015e9a PB |
933 | { |
934 | #ifndef _WIN32 | |
935 | int err; | |
936 | ||
814e612e | 937 | err = pthread_kill(cpu->thread->thread, SIG_IPI); |
cc015e9a PB |
938 | if (err) { |
939 | fprintf(stderr, "qemu:%s: %s", __func__, strerror(err)); | |
940 | exit(1); | |
941 | } | |
942 | #else /* _WIN32 */ | |
60e82579 | 943 | if (!qemu_cpu_is_self(cpu)) { |
ed9164a3 OH |
944 | CONTEXT tcgContext; |
945 | ||
946 | if (SuspendThread(cpu->hThread) == (DWORD)-1) { | |
7f1721df | 947 | fprintf(stderr, "qemu:%s: GetLastError:%lu\n", __func__, |
ed9164a3 OH |
948 | GetLastError()); |
949 | exit(1); | |
950 | } | |
951 | ||
952 | /* On multi-core systems, we are not sure that the thread is actually | |
953 | * suspended until we can get the context. | |
954 | */ | |
955 | tcgContext.ContextFlags = CONTEXT_CONTROL; | |
956 | while (GetThreadContext(cpu->hThread, &tcgContext) != 0) { | |
957 | continue; | |
958 | } | |
959 | ||
cc015e9a | 960 | cpu_signal(0); |
ed9164a3 OH |
961 | |
962 | if (ResumeThread(cpu->hThread) == (DWORD)-1) { | |
7f1721df | 963 | fprintf(stderr, "qemu:%s: GetLastError:%lu\n", __func__, |
ed9164a3 OH |
964 | GetLastError()); |
965 | exit(1); | |
966 | } | |
cc015e9a PB |
967 | } |
968 | #endif | |
969 | } | |
970 | ||
c08d7424 | 971 | void qemu_cpu_kick(CPUState *cpu) |
296af7c9 | 972 | { |
f5c121b8 | 973 | qemu_cond_broadcast(cpu->halt_cond); |
216fc9a4 | 974 | if (!tcg_enabled() && !cpu->thread_kicked) { |
2ff09a40 | 975 | qemu_cpu_kick_thread(cpu); |
216fc9a4 | 976 | cpu->thread_kicked = true; |
aa2c364b | 977 | } |
296af7c9 BS |
978 | } |
979 | ||
46d62fac | 980 | void qemu_cpu_kick_self(void) |
296af7c9 | 981 | { |
b55c22c6 | 982 | #ifndef _WIN32 |
4917cf44 | 983 | assert(current_cpu); |
296af7c9 | 984 | |
4917cf44 AF |
985 | if (!current_cpu->thread_kicked) { |
986 | qemu_cpu_kick_thread(current_cpu); | |
987 | current_cpu->thread_kicked = true; | |
296af7c9 | 988 | } |
b55c22c6 PB |
989 | #else |
990 | abort(); | |
991 | #endif | |
296af7c9 BS |
992 | } |
993 | ||
60e82579 | 994 | bool qemu_cpu_is_self(CPUState *cpu) |
296af7c9 | 995 | { |
814e612e | 996 | return qemu_thread_is_self(cpu->thread); |
296af7c9 BS |
997 | } |
998 | ||
aa723c23 JQ |
999 | static bool qemu_in_vcpu_thread(void) |
1000 | { | |
4917cf44 | 1001 | return current_cpu && qemu_cpu_is_self(current_cpu); |
aa723c23 JQ |
1002 | } |
1003 | ||
296af7c9 BS |
1004 | void qemu_mutex_lock_iothread(void) |
1005 | { | |
c7f0f3b1 | 1006 | if (!tcg_enabled()) { |
296af7c9 | 1007 | qemu_mutex_lock(&qemu_global_mutex); |
1a28cac3 | 1008 | } else { |
46daff13 | 1009 | iothread_requesting_mutex = true; |
1a28cac3 | 1010 | if (qemu_mutex_trylock(&qemu_global_mutex)) { |
182735ef | 1011 | qemu_cpu_kick_thread(first_cpu); |
1a28cac3 MT |
1012 | qemu_mutex_lock(&qemu_global_mutex); |
1013 | } | |
46daff13 PB |
1014 | iothread_requesting_mutex = false; |
1015 | qemu_cond_broadcast(&qemu_io_proceeded_cond); | |
1a28cac3 | 1016 | } |
296af7c9 BS |
1017 | } |
1018 | ||
1019 | void qemu_mutex_unlock_iothread(void) | |
1020 | { | |
1021 | qemu_mutex_unlock(&qemu_global_mutex); | |
1022 | } | |
1023 | ||
1024 | static int all_vcpus_paused(void) | |
1025 | { | |
bdc44640 | 1026 | CPUState *cpu; |
296af7c9 | 1027 | |
bdc44640 | 1028 | CPU_FOREACH(cpu) { |
182735ef | 1029 | if (!cpu->stopped) { |
296af7c9 | 1030 | return 0; |
0ab07c62 | 1031 | } |
296af7c9 BS |
1032 | } |
1033 | ||
1034 | return 1; | |
1035 | } | |
1036 | ||
1037 | void pause_all_vcpus(void) | |
1038 | { | |
bdc44640 | 1039 | CPUState *cpu; |
296af7c9 | 1040 | |
40daca54 | 1041 | qemu_clock_enable(QEMU_CLOCK_VIRTUAL, false); |
bdc44640 | 1042 | CPU_FOREACH(cpu) { |
182735ef AF |
1043 | cpu->stop = true; |
1044 | qemu_cpu_kick(cpu); | |
296af7c9 BS |
1045 | } |
1046 | ||
aa723c23 | 1047 | if (qemu_in_vcpu_thread()) { |
d798e974 JK |
1048 | cpu_stop_current(); |
1049 | if (!kvm_enabled()) { | |
bdc44640 | 1050 | CPU_FOREACH(cpu) { |
182735ef AF |
1051 | cpu->stop = false; |
1052 | cpu->stopped = true; | |
d798e974 JK |
1053 | } |
1054 | return; | |
1055 | } | |
1056 | } | |
1057 | ||
296af7c9 | 1058 | while (!all_vcpus_paused()) { |
be7d6c57 | 1059 | qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex); |
bdc44640 | 1060 | CPU_FOREACH(cpu) { |
182735ef | 1061 | qemu_cpu_kick(cpu); |
296af7c9 BS |
1062 | } |
1063 | } | |
1064 | } | |
1065 | ||
2993683b IM |
1066 | void cpu_resume(CPUState *cpu) |
1067 | { | |
1068 | cpu->stop = false; | |
1069 | cpu->stopped = false; | |
1070 | qemu_cpu_kick(cpu); | |
1071 | } | |
1072 | ||
296af7c9 BS |
1073 | void resume_all_vcpus(void) |
1074 | { | |
bdc44640 | 1075 | CPUState *cpu; |
296af7c9 | 1076 | |
40daca54 | 1077 | qemu_clock_enable(QEMU_CLOCK_VIRTUAL, true); |
bdc44640 | 1078 | CPU_FOREACH(cpu) { |
182735ef | 1079 | cpu_resume(cpu); |
296af7c9 BS |
1080 | } |
1081 | } | |
1082 | ||
e5ab30a2 | 1083 | static void qemu_tcg_init_vcpu(CPUState *cpu) |
296af7c9 | 1084 | { |
296af7c9 BS |
1085 | /* share a single thread for all cpus with TCG */ |
1086 | if (!tcg_cpu_thread) { | |
814e612e | 1087 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1088 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1089 | qemu_cond_init(cpu->halt_cond); | |
1090 | tcg_halt_cond = cpu->halt_cond; | |
c3586ba7 | 1091 | qemu_thread_create(cpu->thread, qemu_tcg_cpu_thread_fn, cpu, |
1ecf47bf PB |
1092 | QEMU_THREAD_JOINABLE); |
1093 | #ifdef _WIN32 | |
814e612e | 1094 | cpu->hThread = qemu_thread_get_handle(cpu->thread); |
1ecf47bf | 1095 | #endif |
61a46217 | 1096 | while (!cpu->created) { |
18a85728 | 1097 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 1098 | } |
814e612e | 1099 | tcg_cpu_thread = cpu->thread; |
296af7c9 | 1100 | } else { |
814e612e | 1101 | cpu->thread = tcg_cpu_thread; |
f5c121b8 | 1102 | cpu->halt_cond = tcg_halt_cond; |
296af7c9 BS |
1103 | } |
1104 | } | |
1105 | ||
48a106bd | 1106 | static void qemu_kvm_start_vcpu(CPUState *cpu) |
296af7c9 | 1107 | { |
814e612e | 1108 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1109 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1110 | qemu_cond_init(cpu->halt_cond); | |
48a106bd | 1111 | qemu_thread_create(cpu->thread, qemu_kvm_cpu_thread_fn, cpu, |
1ecf47bf | 1112 | QEMU_THREAD_JOINABLE); |
61a46217 | 1113 | while (!cpu->created) { |
18a85728 | 1114 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 1115 | } |
296af7c9 BS |
1116 | } |
1117 | ||
10a9021d | 1118 | static void qemu_dummy_start_vcpu(CPUState *cpu) |
c7f0f3b1 | 1119 | { |
814e612e | 1120 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1121 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1122 | qemu_cond_init(cpu->halt_cond); | |
10a9021d | 1123 | qemu_thread_create(cpu->thread, qemu_dummy_cpu_thread_fn, cpu, |
c7f0f3b1 | 1124 | QEMU_THREAD_JOINABLE); |
61a46217 | 1125 | while (!cpu->created) { |
c7f0f3b1 AL |
1126 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
1127 | } | |
1128 | } | |
1129 | ||
c643bed9 | 1130 | void qemu_init_vcpu(CPUState *cpu) |
296af7c9 | 1131 | { |
ce3960eb AF |
1132 | cpu->nr_cores = smp_cores; |
1133 | cpu->nr_threads = smp_threads; | |
f324e766 | 1134 | cpu->stopped = true; |
0ab07c62 | 1135 | if (kvm_enabled()) { |
48a106bd | 1136 | qemu_kvm_start_vcpu(cpu); |
c7f0f3b1 | 1137 | } else if (tcg_enabled()) { |
e5ab30a2 | 1138 | qemu_tcg_init_vcpu(cpu); |
c7f0f3b1 | 1139 | } else { |
10a9021d | 1140 | qemu_dummy_start_vcpu(cpu); |
0ab07c62 | 1141 | } |
296af7c9 BS |
1142 | } |
1143 | ||
b4a3d965 | 1144 | void cpu_stop_current(void) |
296af7c9 | 1145 | { |
4917cf44 AF |
1146 | if (current_cpu) { |
1147 | current_cpu->stop = false; | |
1148 | current_cpu->stopped = true; | |
1149 | cpu_exit(current_cpu); | |
67bb172f | 1150 | qemu_cond_signal(&qemu_pause_cond); |
b4a3d965 | 1151 | } |
296af7c9 BS |
1152 | } |
1153 | ||
56983463 | 1154 | int vm_stop(RunState state) |
296af7c9 | 1155 | { |
aa723c23 | 1156 | if (qemu_in_vcpu_thread()) { |
1dfb4dd9 | 1157 | qemu_system_vmstop_request(state); |
296af7c9 BS |
1158 | /* |
1159 | * FIXME: should not return to device code in case | |
1160 | * vm_stop() has been requested. | |
1161 | */ | |
b4a3d965 | 1162 | cpu_stop_current(); |
56983463 | 1163 | return 0; |
296af7c9 | 1164 | } |
56983463 KW |
1165 | |
1166 | return do_vm_stop(state); | |
296af7c9 BS |
1167 | } |
1168 | ||
8a9236f1 LC |
1169 | /* does a state transition even if the VM is already stopped, |
1170 | current state is forgotten forever */ | |
56983463 | 1171 | int vm_stop_force_state(RunState state) |
8a9236f1 LC |
1172 | { |
1173 | if (runstate_is_running()) { | |
56983463 | 1174 | return vm_stop(state); |
8a9236f1 LC |
1175 | } else { |
1176 | runstate_set(state); | |
594a45ce KW |
1177 | /* Make sure to return an error if the flush in a previous vm_stop() |
1178 | * failed. */ | |
1179 | return bdrv_flush_all(); | |
8a9236f1 LC |
1180 | } |
1181 | } | |
1182 | ||
9349b4f9 | 1183 | static int tcg_cpu_exec(CPUArchState *env) |
296af7c9 BS |
1184 | { |
1185 | int ret; | |
1186 | #ifdef CONFIG_PROFILER | |
1187 | int64_t ti; | |
1188 | #endif | |
1189 | ||
1190 | #ifdef CONFIG_PROFILER | |
1191 | ti = profile_getclock(); | |
1192 | #endif | |
1193 | if (use_icount) { | |
1194 | int64_t count; | |
ac70aafc | 1195 | int64_t deadline; |
296af7c9 BS |
1196 | int decr; |
1197 | qemu_icount -= (env->icount_decr.u16.low + env->icount_extra); | |
1198 | env->icount_decr.u16.low = 0; | |
1199 | env->icount_extra = 0; | |
40daca54 | 1200 | deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
ac70aafc AB |
1201 | |
1202 | /* Maintain prior (possibly buggy) behaviour where if no deadline | |
40daca54 | 1203 | * was set (as there is no QEMU_CLOCK_VIRTUAL timer) or it is more than |
ac70aafc AB |
1204 | * INT32_MAX nanoseconds ahead, we still use INT32_MAX |
1205 | * nanoseconds. | |
1206 | */ | |
1207 | if ((deadline < 0) || (deadline > INT32_MAX)) { | |
1208 | deadline = INT32_MAX; | |
1209 | } | |
1210 | ||
1211 | count = qemu_icount_round(deadline); | |
296af7c9 BS |
1212 | qemu_icount += count; |
1213 | decr = (count > 0xffff) ? 0xffff : count; | |
1214 | count -= decr; | |
1215 | env->icount_decr.u16.low = decr; | |
1216 | env->icount_extra = count; | |
1217 | } | |
1218 | ret = cpu_exec(env); | |
1219 | #ifdef CONFIG_PROFILER | |
1220 | qemu_time += profile_getclock() - ti; | |
1221 | #endif | |
1222 | if (use_icount) { | |
1223 | /* Fold pending instructions back into the | |
1224 | instruction counter, and clear the interrupt flag. */ | |
1225 | qemu_icount -= (env->icount_decr.u16.low | |
1226 | + env->icount_extra); | |
1227 | env->icount_decr.u32 = 0; | |
1228 | env->icount_extra = 0; | |
1229 | } | |
1230 | return ret; | |
1231 | } | |
1232 | ||
bdb7ca67 | 1233 | static void tcg_exec_all(void) |
296af7c9 | 1234 | { |
9a36085b JK |
1235 | int r; |
1236 | ||
40daca54 AB |
1237 | /* Account partial waits to QEMU_CLOCK_VIRTUAL. */ |
1238 | qemu_clock_warp(QEMU_CLOCK_VIRTUAL); | |
ab33fcda | 1239 | |
0ab07c62 | 1240 | if (next_cpu == NULL) { |
296af7c9 | 1241 | next_cpu = first_cpu; |
0ab07c62 | 1242 | } |
bdc44640 | 1243 | for (; next_cpu != NULL && !exit_request; next_cpu = CPU_NEXT(next_cpu)) { |
182735ef AF |
1244 | CPUState *cpu = next_cpu; |
1245 | CPUArchState *env = cpu->env_ptr; | |
296af7c9 | 1246 | |
40daca54 | 1247 | qemu_clock_enable(QEMU_CLOCK_VIRTUAL, |
ed2803da | 1248 | (cpu->singlestep_enabled & SSTEP_NOTIMER) == 0); |
296af7c9 | 1249 | |
a1fcaa73 | 1250 | if (cpu_can_run(cpu)) { |
bdb7ca67 | 1251 | r = tcg_cpu_exec(env); |
9a36085b | 1252 | if (r == EXCP_DEBUG) { |
91325046 | 1253 | cpu_handle_guest_debug(cpu); |
3c638d06 JK |
1254 | break; |
1255 | } | |
f324e766 | 1256 | } else if (cpu->stop || cpu->stopped) { |
296af7c9 BS |
1257 | break; |
1258 | } | |
1259 | } | |
c629a4bc | 1260 | exit_request = 0; |
296af7c9 BS |
1261 | } |
1262 | ||
1263 | void set_numa_modes(void) | |
1264 | { | |
1b1ed8dc | 1265 | CPUState *cpu; |
296af7c9 BS |
1266 | int i; |
1267 | ||
bdc44640 | 1268 | CPU_FOREACH(cpu) { |
296af7c9 | 1269 | for (i = 0; i < nb_numa_nodes; i++) { |
55e5c285 | 1270 | if (test_bit(cpu->cpu_index, node_cpumask[i])) { |
1b1ed8dc | 1271 | cpu->numa_node = i; |
296af7c9 BS |
1272 | } |
1273 | } | |
1274 | } | |
1275 | } | |
1276 | ||
9a78eead | 1277 | void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg) |
262353cb BS |
1278 | { |
1279 | /* XXX: implement xxx_cpu_list for targets that still miss it */ | |
e916cbf8 PM |
1280 | #if defined(cpu_list) |
1281 | cpu_list(f, cpu_fprintf); | |
262353cb BS |
1282 | #endif |
1283 | } | |
de0b36b6 LC |
1284 | |
1285 | CpuInfoList *qmp_query_cpus(Error **errp) | |
1286 | { | |
1287 | CpuInfoList *head = NULL, *cur_item = NULL; | |
182735ef | 1288 | CPUState *cpu; |
de0b36b6 | 1289 | |
bdc44640 | 1290 | CPU_FOREACH(cpu) { |
de0b36b6 | 1291 | CpuInfoList *info; |
182735ef AF |
1292 | #if defined(TARGET_I386) |
1293 | X86CPU *x86_cpu = X86_CPU(cpu); | |
1294 | CPUX86State *env = &x86_cpu->env; | |
1295 | #elif defined(TARGET_PPC) | |
1296 | PowerPCCPU *ppc_cpu = POWERPC_CPU(cpu); | |
1297 | CPUPPCState *env = &ppc_cpu->env; | |
1298 | #elif defined(TARGET_SPARC) | |
1299 | SPARCCPU *sparc_cpu = SPARC_CPU(cpu); | |
1300 | CPUSPARCState *env = &sparc_cpu->env; | |
1301 | #elif defined(TARGET_MIPS) | |
1302 | MIPSCPU *mips_cpu = MIPS_CPU(cpu); | |
1303 | CPUMIPSState *env = &mips_cpu->env; | |
1304 | #endif | |
de0b36b6 | 1305 | |
cb446eca | 1306 | cpu_synchronize_state(cpu); |
de0b36b6 LC |
1307 | |
1308 | info = g_malloc0(sizeof(*info)); | |
1309 | info->value = g_malloc0(sizeof(*info->value)); | |
55e5c285 | 1310 | info->value->CPU = cpu->cpu_index; |
182735ef | 1311 | info->value->current = (cpu == first_cpu); |
259186a7 | 1312 | info->value->halted = cpu->halted; |
9f09e18a | 1313 | info->value->thread_id = cpu->thread_id; |
de0b36b6 LC |
1314 | #if defined(TARGET_I386) |
1315 | info->value->has_pc = true; | |
1316 | info->value->pc = env->eip + env->segs[R_CS].base; | |
1317 | #elif defined(TARGET_PPC) | |
1318 | info->value->has_nip = true; | |
1319 | info->value->nip = env->nip; | |
1320 | #elif defined(TARGET_SPARC) | |
1321 | info->value->has_pc = true; | |
1322 | info->value->pc = env->pc; | |
1323 | info->value->has_npc = true; | |
1324 | info->value->npc = env->npc; | |
1325 | #elif defined(TARGET_MIPS) | |
1326 | info->value->has_PC = true; | |
1327 | info->value->PC = env->active_tc.PC; | |
1328 | #endif | |
1329 | ||
1330 | /* XXX: waiting for the qapi to support GSList */ | |
1331 | if (!cur_item) { | |
1332 | head = cur_item = info; | |
1333 | } else { | |
1334 | cur_item->next = info; | |
1335 | cur_item = info; | |
1336 | } | |
1337 | } | |
1338 | ||
1339 | return head; | |
1340 | } | |
0cfd6a9a LC |
1341 | |
1342 | void qmp_memsave(int64_t addr, int64_t size, const char *filename, | |
1343 | bool has_cpu, int64_t cpu_index, Error **errp) | |
1344 | { | |
1345 | FILE *f; | |
1346 | uint32_t l; | |
55e5c285 | 1347 | CPUState *cpu; |
0cfd6a9a LC |
1348 | uint8_t buf[1024]; |
1349 | ||
1350 | if (!has_cpu) { | |
1351 | cpu_index = 0; | |
1352 | } | |
1353 | ||
151d1322 AF |
1354 | cpu = qemu_get_cpu(cpu_index); |
1355 | if (cpu == NULL) { | |
0cfd6a9a LC |
1356 | error_set(errp, QERR_INVALID_PARAMETER_VALUE, "cpu-index", |
1357 | "a CPU number"); | |
1358 | return; | |
1359 | } | |
1360 | ||
1361 | f = fopen(filename, "wb"); | |
1362 | if (!f) { | |
618da851 | 1363 | error_setg_file_open(errp, errno, filename); |
0cfd6a9a LC |
1364 | return; |
1365 | } | |
1366 | ||
1367 | while (size != 0) { | |
1368 | l = sizeof(buf); | |
1369 | if (l > size) | |
1370 | l = size; | |
f17ec444 | 1371 | cpu_memory_rw_debug(cpu, addr, buf, l, 0); |
0cfd6a9a LC |
1372 | if (fwrite(buf, 1, l, f) != l) { |
1373 | error_set(errp, QERR_IO_ERROR); | |
1374 | goto exit; | |
1375 | } | |
1376 | addr += l; | |
1377 | size -= l; | |
1378 | } | |
1379 | ||
1380 | exit: | |
1381 | fclose(f); | |
1382 | } | |
6d3962bf LC |
1383 | |
1384 | void qmp_pmemsave(int64_t addr, int64_t size, const char *filename, | |
1385 | Error **errp) | |
1386 | { | |
1387 | FILE *f; | |
1388 | uint32_t l; | |
1389 | uint8_t buf[1024]; | |
1390 | ||
1391 | f = fopen(filename, "wb"); | |
1392 | if (!f) { | |
618da851 | 1393 | error_setg_file_open(errp, errno, filename); |
6d3962bf LC |
1394 | return; |
1395 | } | |
1396 | ||
1397 | while (size != 0) { | |
1398 | l = sizeof(buf); | |
1399 | if (l > size) | |
1400 | l = size; | |
1401 | cpu_physical_memory_rw(addr, buf, l, 0); | |
1402 | if (fwrite(buf, 1, l, f) != l) { | |
1403 | error_set(errp, QERR_IO_ERROR); | |
1404 | goto exit; | |
1405 | } | |
1406 | addr += l; | |
1407 | size -= l; | |
1408 | } | |
1409 | ||
1410 | exit: | |
1411 | fclose(f); | |
1412 | } | |
ab49ab5c LC |
1413 | |
1414 | void qmp_inject_nmi(Error **errp) | |
1415 | { | |
1416 | #if defined(TARGET_I386) | |
182735ef AF |
1417 | CPUState *cs; |
1418 | ||
bdc44640 | 1419 | CPU_FOREACH(cs) { |
182735ef AF |
1420 | X86CPU *cpu = X86_CPU(cs); |
1421 | CPUX86State *env = &cpu->env; | |
ab49ab5c | 1422 | |
02c09195 | 1423 | if (!env->apic_state) { |
182735ef | 1424 | cpu_interrupt(cs, CPU_INTERRUPT_NMI); |
02c09195 JK |
1425 | } else { |
1426 | apic_deliver_nmi(env->apic_state); | |
1427 | } | |
ab49ab5c | 1428 | } |
7f7f9752 ED |
1429 | #elif defined(TARGET_S390X) |
1430 | CPUState *cs; | |
1431 | S390CPU *cpu; | |
1432 | ||
bdc44640 | 1433 | CPU_FOREACH(cs) { |
7f7f9752 ED |
1434 | cpu = S390_CPU(cs); |
1435 | if (cpu->env.cpu_num == monitor_get_cpu_index()) { | |
1436 | if (s390_cpu_restart(S390_CPU(cs)) == -1) { | |
1437 | error_set(errp, QERR_UNSUPPORTED); | |
1438 | return; | |
1439 | } | |
1440 | break; | |
1441 | } | |
1442 | } | |
ab49ab5c LC |
1443 | #else |
1444 | error_set(errp, QERR_UNSUPPORTED); | |
1445 | #endif | |
1446 | } |