[mirror_ubuntu-bionic-kernel.git] / crypto / async_tx / async_tx.c

/*
 * core routines for the asynchronous memory transfer/transform api
 *
 * Copyright © 2006, Intel Corporation.
 *
 *	Dan Williams <dan.j.williams@intel.com>
 *
 *	with architecture considerations by:
 *	Neil Brown <neilb@suse.de>
 *	Jeff Garzik <jeff@garzik.org>
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program; if not, write to the Free Software Foundation, Inc.,
 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
 *
 */
#include <linux/rculist.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/async_tx.h>

#ifdef CONFIG_DMA_ENGINE
static int __init async_tx_init(void)
{
	async_dmaengine_get();

	printk(KERN_INFO "async_tx: api initialized (async)\n");

	return 0;
}

static void __exit async_tx_exit(void)
{
	async_dmaengine_put();
}

module_init(async_tx_init);
module_exit(async_tx_exit);

/**
 * __async_tx_find_channel - find a channel to carry out the operation or let
 *	the transaction execute synchronously
 * @submit: transaction dependency and submission modifiers
 * @tx_type: transaction type
 */
struct dma_chan *
__async_tx_find_channel(struct async_submit_ctl *submit,
			enum dma_transaction_type tx_type)
{
	struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;

	/* see if we can keep the chain on one channel */
	if (depend_tx &&
	    dma_has_cap(tx_type, depend_tx->chan->device->cap_mask))
		return depend_tx->chan;
	return async_dma_find_channel(tx_type);
}
EXPORT_SYMBOL_GPL(__async_tx_find_channel);
#endif


/**
 * async_tx_channel_switch - queue an interrupt descriptor with a dependency
 * 	pre-attached.
 * @depend_tx: the operation that must finish before the new operation runs
 * @tx: the new operation
 */
static void
async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx,
			struct dma_async_tx_descriptor *tx)
{
	struct dma_chan *chan = depend_tx->chan;
	struct dma_device *device = chan->device;
	struct dma_async_tx_descriptor *intr_tx = (void *) ~0;

	/* first check to see if we can still append to depend_tx */
	txd_lock(depend_tx);
	if (txd_parent(depend_tx) && depend_tx->chan == tx->chan) {
		txd_chain(depend_tx, tx);
		intr_tx = NULL;
	}
	txd_unlock(depend_tx);

	/* attached dependency, flush the parent channel */
	if (!intr_tx) {
		device->device_issue_pending(chan);
		return;
	}

	/* see if we can schedule an interrupt
	 * otherwise poll for completion
	 */
	if (dma_has_cap(DMA_INTERRUPT, device->cap_mask))
		intr_tx = device->device_prep_dma_interrupt(chan, 0);
	else
		intr_tx = NULL;

	if (intr_tx) {
		intr_tx->callback = NULL;
		intr_tx->callback_param = NULL;
		/* safe to chain outside the lock since we know we are
		 * not submitted yet
		 */
		txd_chain(intr_tx, tx);

		/* check if we need to append */
		txd_lock(depend_tx);
		if (txd_parent(depend_tx)) {
			txd_chain(depend_tx, intr_tx);
			async_tx_ack(intr_tx);
			intr_tx = NULL;
		}
		txd_unlock(depend_tx);

		if (intr_tx) {
			txd_clear_parent(intr_tx);
			intr_tx->tx_submit(intr_tx);
			async_tx_ack(intr_tx);
		}
		device->device_issue_pending(chan);
	} else {
		if (dma_wait_for_async_tx(depend_tx) != DMA_COMPLETE)
			panic("%s: DMA error waiting for depend_tx\n",
			      __func__);
		tx->tx_submit(tx);
	}
}


/**
 * submit_disposition - flags for routing an incoming operation
 * @ASYNC_TX_SUBMITTED: we were able to append the new operation under the lock
 * @ASYNC_TX_CHANNEL_SWITCH: when the lock is dropped schedule a channel switch
 * @ASYNC_TX_DIRECT_SUBMIT: when the lock is dropped submit directly
 *
 * while holding depend_tx->lock we must avoid submitting new operations
 * to prevent a circular locking dependency with drivers that already
 * hold a channel lock when calling async_tx_run_dependencies.
 */
enum submit_disposition {
	ASYNC_TX_SUBMITTED,
	ASYNC_TX_CHANNEL_SWITCH,
	ASYNC_TX_DIRECT_SUBMIT,
};

void
async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx,
		struct async_submit_ctl *submit)
{
	struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;

	tx->callback = submit->cb_fn;
	tx->callback_param = submit->cb_param;

	if (depend_tx) {
		enum submit_disposition s;

		/* sanity check the dependency chain:
		 * 1/ if ack is already set then we cannot be sure
		 * we are referring to the correct operation
		 * 2/ dependencies are 1:1 i.e. two transactions can
		 * not depend on the same parent
		 */
		BUG_ON(async_tx_test_ack(depend_tx) || txd_next(depend_tx) ||
		       txd_parent(tx));

		/* the lock prevents async_tx_run_dependencies from missing
		 * the setting of ->next when ->parent != NULL
		 */
		txd_lock(depend_tx);
		if (txd_parent(depend_tx)) {
			/* we have a parent so we can not submit directly
			 * if we are staying on the same channel: append
			 * else: channel switch
			 */
			if (depend_tx->chan == chan) {
				txd_chain(depend_tx, tx);
				s = ASYNC_TX_SUBMITTED;
			} else
				s = ASYNC_TX_CHANNEL_SWITCH;
		} else {
			/* we do not have a parent so we may be able to submit
			 * directly if we are staying on the same channel
			 */
			if (depend_tx->chan == chan)
				s = ASYNC_TX_DIRECT_SUBMIT;
			else
				s = ASYNC_TX_CHANNEL_SWITCH;
		}
		txd_unlock(depend_tx);

		switch (s) {
		case ASYNC_TX_SUBMITTED:
			break;
		case ASYNC_TX_CHANNEL_SWITCH:
			async_tx_channel_switch(depend_tx, tx);
			break;
		case ASYNC_TX_DIRECT_SUBMIT:
			txd_clear_parent(tx);
			tx->tx_submit(tx);
			break;
		}
	} else {
		txd_clear_parent(tx);
		tx->tx_submit(tx);
	}

	if (submit->flags & ASYNC_TX_ACK)
		async_tx_ack(tx);

	if (depend_tx)
		async_tx_ack(depend_tx);
}
EXPORT_SYMBOL_GPL(async_tx_submit);

/**
 * async_trigger_callback - schedules the callback function to be run
 * @submit: submission and completion parameters
 *
 * honored flags: ASYNC_TX_ACK
 *
 * The callback is run after any dependent operations have completed.
 */
struct dma_async_tx_descriptor *
async_trigger_callback(struct async_submit_ctl *submit)
{
	struct dma_chan *chan;
	struct dma_device *device;
	struct dma_async_tx_descriptor *tx;
	struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;

	if (depend_tx) {
		chan = depend_tx->chan;
		device = chan->device;

		/* see if we can schedule an interrupt
		 * otherwise poll for completion
		 */
		if (device && !dma_has_cap(DMA_INTERRUPT, device->cap_mask))
			device = NULL;

		tx = device ? device->device_prep_dma_interrupt(chan, 0) : NULL;
	} else
		tx = NULL;

	if (tx) {
		pr_debug("%s: (async)\n", __func__);

		async_tx_submit(chan, tx, submit);
	} else {
		pr_debug("%s: (sync)\n", __func__);

		/* wait for any prerequisite operations */
		async_tx_quiesce(&submit->depend_tx);

		async_tx_sync_epilog(submit);
	}

	return tx;
}
EXPORT_SYMBOL_GPL(async_trigger_callback);

/**
 * async_tx_quiesce - ensure tx is complete and freeable upon return
 * @tx - transaction to quiesce
 */
void async_tx_quiesce(struct dma_async_tx_descriptor **tx)
{
	if (*tx) {
		/* if ack is already set then we cannot be sure
		 * we are referring to the correct operation
		 */
		BUG_ON(async_tx_test_ack(*tx));
		if (dma_wait_for_async_tx(*tx) != DMA_COMPLETE)
			panic("%s: DMA error waiting for transaction\n",
			      __func__);
		async_tx_ack(*tx);
		*tx = NULL;
	}
}
EXPORT_SYMBOL_GPL(async_tx_quiesce);

MODULE_AUTHOR("Intel Corporation");
MODULE_DESCRIPTION("Asynchronous Bulk Memory Transactions API");
MODULE_LICENSE("GPL");
Commit	Line	Data
9bc89cd8 DW	1	/*
	2	* core routines for the asynchronous memory transfer/transform api
	3	*
	4	* Copyright © 2006, Intel Corporation.
	5	*
	6	* Dan Williams <dan.j.williams@intel.com>
	7	*
	8	* with architecture considerations by:
	9	* Neil Brown <neilb@suse.de>
	10	* Jeff Garzik <jeff@garzik.org>
	11	*
	12	* This program is free software; you can redistribute it and/or modify it
	13	* under the terms and conditions of the GNU General Public License,
	14	* version 2, as published by the Free Software Foundation.
	15	*
	16	* This program is distributed in the hope it will be useful, but WITHOUT
	17	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	18	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	19	* more details.
	20	*
	21	* You should have received a copy of the GNU General Public License along with
	22	* this program; if not, write to the Free Software Foundation, Inc.,
	23	* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
	24	*
	25	*/
82524746	26	#include <linux/rculist.h>
4bb33cc8	27	#include <linux/module.h>
9bc89cd8 DW	28	#include <linux/kernel.h>
	29	#include <linux/async_tx.h>
	30
	31	#ifdef CONFIG_DMA_ENGINE
bec08513	32	static int __init async_tx_init(void)
9bc89cd8	33	{
729b5d1b	34	async_dmaengine_get();
9bc89cd8 DW	35
	36	printk(KERN_INFO "async_tx: api initialized (async)\n");
	37
	38	return 0;
9bc89cd8 DW	39	}
	40
	41	static void __exit async_tx_exit(void)
	42	{
729b5d1b	43	async_dmaengine_put();
9bc89cd8 DW	44	}
9bc89cd8 DW	45
af1f951e DW	46	module_init(async_tx_init);
	47	module_exit(async_tx_exit);
	48
9bc89cd8	49	/**
47437b2c	50	* __async_tx_find_channel - find a channel to carry out the operation or let
9bc89cd8	51	* the transaction execute synchronously
a08abd8c	52	* @submit: transaction dependency and submission modifiers
9bc89cd8 DW	53	* @tx_type: transaction type
	54	*/
	55	struct dma_chan *
a08abd8c DW	56	__async_tx_find_channel(struct async_submit_ctl *submit,
a08abd8c DW	57	enum dma_transaction_type tx_type)
9bc89cd8	58	{
a08abd8c DW	59	struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;
a08abd8c DW	60
9bc89cd8 DW	61	/* see if we can keep the chain on one channel */
9bc89cd8 DW	62	if (depend_tx &&
bec08513	63	dma_has_cap(tx_type, depend_tx->chan->device->cap_mask))
9bc89cd8	64	return depend_tx->chan;
729b5d1b	65	return async_dma_find_channel(tx_type);
9bc89cd8	66	}
47437b2c	67	EXPORT_SYMBOL_GPL(__async_tx_find_channel);
9bc89cd8 DW	68	#endif
9bc89cd8 DW	69
19242d72 DW	70
	71	/**
	72	* async_tx_channel_switch - queue an interrupt descriptor with a dependency
	73	* pre-attached.
	74	* @depend_tx: the operation that must finish before the new operation runs
	75	* @tx: the new operation
	76	*/
	77	static void
	78	async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx,
	79	struct dma_async_tx_descriptor *tx)
	80	{
95475e57 DW	81	struct dma_chan *chan = depend_tx->chan;
95475e57 DW	82	struct dma_device *device = chan->device;
19242d72 DW	83	struct dma_async_tx_descriptor intr_tx = (void ) ~0;
	84
	85	/* first check to see if we can still append to depend_tx */
caa20d97 DW	86	txd_lock(depend_tx);
	87	if (txd_parent(depend_tx) && depend_tx->chan == tx->chan) {
	88	txd_chain(depend_tx, tx);
19242d72 DW	89	intr_tx = NULL;
19242d72 DW	90	}
caa20d97	91	txd_unlock(depend_tx);
19242d72	92
95475e57 DW	93	/* attached dependency, flush the parent channel */
	94	if (!intr_tx) {
	95	device->device_issue_pending(chan);
19242d72	96	return;
95475e57	97	}
19242d72 DW	98
	99	/* see if we can schedule an interrupt
	100	* otherwise poll for completion
	101	*/
	102	if (dma_has_cap(DMA_INTERRUPT, device->cap_mask))
636bdeaa	103	intr_tx = device->device_prep_dma_interrupt(chan, 0);
19242d72 DW	104	else
	105	intr_tx = NULL;
	106
	107	if (intr_tx) {
	108	intr_tx->callback = NULL;
	109	intr_tx->callback_param = NULL;
caa20d97	110	/* safe to chain outside the lock since we know we are
19242d72 DW	111	* not submitted yet
19242d72 DW	112	*/
caa20d97	113	txd_chain(intr_tx, tx);
19242d72 DW	114
19242d72 DW	115	/* check if we need to append */
caa20d97 DW	116	txd_lock(depend_tx);
	117	if (txd_parent(depend_tx)) {
	118	txd_chain(depend_tx, intr_tx);
19242d72 DW	119	async_tx_ack(intr_tx);
	120	intr_tx = NULL;
	121	}
caa20d97	122	txd_unlock(depend_tx);
19242d72 DW	123
19242d72 DW	124	if (intr_tx) {
caa20d97	125	txd_clear_parent(intr_tx);
19242d72 DW	126	intr_tx->tx_submit(intr_tx);
	127	async_tx_ack(intr_tx);
	128	}
95475e57	129	device->device_issue_pending(chan);
19242d72	130	} else {
157efa8c	131	if (dma_wait_for_async_tx(depend_tx) != DMA_COMPLETE)
7d283397	132	panic("%s: DMA error waiting for depend_tx\n",
19242d72 DW	133	__func__);
	134	tx->tx_submit(tx);
	135	}
	136	}
	137
	138
	139	/**
a08abd8c	140	* submit_disposition - flags for routing an incoming operation
19242d72 DW	141	* @ASYNC_TX_SUBMITTED: we were able to append the new operation under the lock
	142	* @ASYNC_TX_CHANNEL_SWITCH: when the lock is dropped schedule a channel switch
	143	* @ASYNC_TX_DIRECT_SUBMIT: when the lock is dropped submit directly
a08abd8c DW	144	*
	145	* while holding depend_tx->lock we must avoid submitting new operations
	146	* to prevent a circular locking dependency with drivers that already
	147	* hold a channel lock when calling async_tx_run_dependencies.
19242d72 DW	148	*/
	149	enum submit_disposition {
	150	ASYNC_TX_SUBMITTED,
	151	ASYNC_TX_CHANNEL_SWITCH,
	152	ASYNC_TX_DIRECT_SUBMIT,
	153	};
	154
9bc89cd8 DW	155	void
9bc89cd8 DW	156	async_tx_submit(struct dma_chan chan, struct dma_async_tx_descriptor tx,
a08abd8c	157	struct async_submit_ctl *submit)
9bc89cd8	158	{
a08abd8c DW	159	struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;
	160
	161	tx->callback = submit->cb_fn;
	162	tx->callback_param = submit->cb_param;
9bc89cd8	163
19242d72 DW	164	if (depend_tx) {
	165	enum submit_disposition s;
	166
	167	/* sanity check the dependency chain:
	168	* 1/ if ack is already set then we cannot be sure
9bc89cd8	169	* we are referring to the correct operation
19242d72 DW	170	* 2/ dependencies are 1:1 i.e. two transactions can
19242d72 DW	171	* not depend on the same parent
9bc89cd8	172	*/
caa20d97 DW	173	BUG_ON(async_tx_test_ack(depend_tx) \|\| txd_next(depend_tx) \|\|
caa20d97 DW	174	txd_parent(tx));
9bc89cd8	175
19242d72 DW	176	/* the lock prevents async_tx_run_dependencies from missing
	177	* the setting of ->next when ->parent != NULL
	178	*/
caa20d97 DW	179	txd_lock(depend_tx);
caa20d97 DW	180	if (txd_parent(depend_tx)) {
19242d72 DW	181	/* we have a parent so we can not submit directly
	182	* if we are staying on the same channel: append
	183	* else: channel switch
	184	*/
	185	if (depend_tx->chan == chan) {
caa20d97	186	txd_chain(depend_tx, tx);
19242d72 DW	187	s = ASYNC_TX_SUBMITTED;
	188	} else
	189	s = ASYNC_TX_CHANNEL_SWITCH;
	190	} else {
	191	/* we do not have a parent so we may be able to submit
	192	* directly if we are staying on the same channel
	193	*/
	194	if (depend_tx->chan == chan)
	195	s = ASYNC_TX_DIRECT_SUBMIT;
	196	else
	197	s = ASYNC_TX_CHANNEL_SWITCH;
9bc89cd8	198	}
caa20d97	199	txd_unlock(depend_tx);
9bc89cd8	200
19242d72 DW	201	switch (s) {
	202	case ASYNC_TX_SUBMITTED:
	203	break;
	204	case ASYNC_TX_CHANNEL_SWITCH:
	205	async_tx_channel_switch(depend_tx, tx);
	206	break;
	207	case ASYNC_TX_DIRECT_SUBMIT:
caa20d97	208	txd_clear_parent(tx);
19242d72 DW	209	tx->tx_submit(tx);
	210	break;
	211	}
9bc89cd8	212	} else {
caa20d97	213	txd_clear_parent(tx);
9bc89cd8 DW	214	tx->tx_submit(tx);
	215	}
	216
a08abd8c	217	if (submit->flags & ASYNC_TX_ACK)
9bc89cd8 DW	218	async_tx_ack(tx);
9bc89cd8 DW	219
88ba2aa5	220	if (depend_tx)
9bc89cd8 DW	221	async_tx_ack(depend_tx);
	222	}
	223	EXPORT_SYMBOL_GPL(async_tx_submit);
	224
	225	/**
a08abd8c DW	226	* async_trigger_callback - schedules the callback function to be run
	227	* @submit: submission and completion parameters
	228	*
	229	* honored flags: ASYNC_TX_ACK
	230	*
	231	* The callback is run after any dependent operations have completed.
9bc89cd8 DW	232	*/
9bc89cd8 DW	233	struct dma_async_tx_descriptor *
a08abd8c	234	async_trigger_callback(struct async_submit_ctl *submit)
9bc89cd8 DW	235	{
	236	struct dma_chan *chan;
	237	struct dma_device *device;
	238	struct dma_async_tx_descriptor *tx;
a08abd8c	239	struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;
9bc89cd8 DW	240
	241	if (depend_tx) {
	242	chan = depend_tx->chan;
	243	device = chan->device;
	244
	245	/* see if we can schedule an interrupt
	246	* otherwise poll for completion
	247	*/
	248	if (device && !dma_has_cap(DMA_INTERRUPT, device->cap_mask))
	249	device = NULL;
	250
636bdeaa	251	tx = device ? device->device_prep_dma_interrupt(chan, 0) : NULL;
9bc89cd8 DW	252	} else
	253	tx = NULL;
	254
	255	if (tx) {
3280ab3e	256	pr_debug("%s: (async)\n", __func__);
9bc89cd8	257
a08abd8c	258	async_tx_submit(chan, tx, submit);
9bc89cd8	259	} else {
3280ab3e	260	pr_debug("%s: (sync)\n", __func__);
9bc89cd8 DW	261
9bc89cd8 DW	262	/* wait for any prerequisite operations */
a08abd8c	263	async_tx_quiesce(&submit->depend_tx);
9bc89cd8	264
a08abd8c	265	async_tx_sync_epilog(submit);
9bc89cd8 DW	266	}
	267
	268	return tx;
	269	}
	270	EXPORT_SYMBOL_GPL(async_trigger_callback);
	271
d2c52b79 DW	272	/**
	273	* async_tx_quiesce - ensure tx is complete and freeable upon return
	274	* @tx - transaction to quiesce
	275	*/
	276	void async_tx_quiesce(struct dma_async_tx_descriptor **tx)
	277	{
	278	if (*tx) {
	279	/* if ack is already set then we cannot be sure
	280	* we are referring to the correct operation
	281	*/
	282	BUG_ON(async_tx_test_ack(*tx));
157efa8c	283	if (dma_wait_for_async_tx(*tx) != DMA_COMPLETE)
7d283397 BZ	284	panic("%s: DMA error waiting for transaction\n",
7d283397 BZ	285	__func__);
d2c52b79 DW	286	async_tx_ack(*tx);
	287	*tx = NULL;
	288	}
	289	}
	290	EXPORT_SYMBOL_GPL(async_tx_quiesce);
	291
9bc89cd8 DW	292	MODULE_AUTHOR("Intel Corporation");
	293	MODULE_DESCRIPTION("Asynchronous Bulk Memory Transactions API");
	294	MODULE_LICENSE("GPL");