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9bc89cd8 DW |
1 | /* |
2 | * xor offload engine api | |
3 | * | |
4 | * Copyright © 2006, Intel Corporation. | |
5 | * | |
6 | * Dan Williams <dan.j.williams@intel.com> | |
7 | * | |
8 | * with architecture considerations by: | |
9 | * Neil Brown <neilb@suse.de> | |
10 | * Jeff Garzik <jeff@garzik.org> | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify it | |
13 | * under the terms and conditions of the GNU General Public License, | |
14 | * version 2, as published by the Free Software Foundation. | |
15 | * | |
16 | * This program is distributed in the hope it will be useful, but WITHOUT | |
17 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
18 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
19 | * more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License along with | |
22 | * this program; if not, write to the Free Software Foundation, Inc., | |
23 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
24 | * | |
25 | */ | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/interrupt.h> | |
4bb33cc8 | 28 | #include <linux/module.h> |
9bc89cd8 DW |
29 | #include <linux/mm.h> |
30 | #include <linux/dma-mapping.h> | |
31 | #include <linux/raid/xor.h> | |
32 | #include <linux/async_tx.h> | |
33 | ||
06164f31 DW |
34 | /* do_async_xor - dma map the pages and perform the xor with an engine */ |
35 | static __async_inline struct dma_async_tx_descriptor * | |
fb36ab14 | 36 | do_async_xor(struct dma_chan *chan, struct dmaengine_unmap_data *unmap, |
a08abd8c | 37 | struct async_submit_ctl *submit) |
9bc89cd8 | 38 | { |
1e55db2d | 39 | struct dma_device *dma = chan->device; |
1e55db2d | 40 | struct dma_async_tx_descriptor *tx = NULL; |
a08abd8c DW |
41 | dma_async_tx_callback cb_fn_orig = submit->cb_fn; |
42 | void *cb_param_orig = submit->cb_param; | |
43 | enum async_tx_flags flags_orig = submit->flags; | |
1e55db2d | 44 | enum dma_ctrl_flags dma_flags; |
fb36ab14 DW |
45 | int src_cnt = unmap->to_cnt; |
46 | int xor_src_cnt; | |
47 | dma_addr_t dma_dest = unmap->addr[unmap->to_cnt]; | |
48 | dma_addr_t *src_list = unmap->addr; | |
0036731c | 49 | |
1e55db2d | 50 | while (src_cnt) { |
fb36ab14 DW |
51 | dma_addr_t tmp; |
52 | ||
a08abd8c | 53 | submit->flags = flags_orig; |
b2f46fd8 | 54 | xor_src_cnt = min(src_cnt, (int)dma->max_xor); |
fb36ab14 DW |
55 | /* if we are submitting additional xors, leave the chain open |
56 | * and clear the callback parameters | |
1e55db2d | 57 | */ |
fb36ab14 | 58 | dma_flags = DMA_COMPL_SKIP_SRC_UNMAP | DMA_COMPL_SKIP_DEST_UNMAP; |
1e55db2d | 59 | if (src_cnt > xor_src_cnt) { |
a08abd8c | 60 | submit->flags &= ~ASYNC_TX_ACK; |
0403e382 | 61 | submit->flags |= ASYNC_TX_FENCE; |
a08abd8c DW |
62 | submit->cb_fn = NULL; |
63 | submit->cb_param = NULL; | |
1e55db2d | 64 | } else { |
a08abd8c DW |
65 | submit->cb_fn = cb_fn_orig; |
66 | submit->cb_param = cb_param_orig; | |
1e55db2d | 67 | } |
a08abd8c | 68 | if (submit->cb_fn) |
1e55db2d | 69 | dma_flags |= DMA_PREP_INTERRUPT; |
0403e382 DW |
70 | if (submit->flags & ASYNC_TX_FENCE) |
71 | dma_flags |= DMA_PREP_FENCE; | |
fb36ab14 DW |
72 | |
73 | /* Drivers force forward progress in case they can not provide a | |
74 | * descriptor | |
1e55db2d | 75 | */ |
fb36ab14 DW |
76 | tmp = src_list[0]; |
77 | if (src_list > unmap->addr) | |
78 | src_list[0] = dma_dest; | |
79 | tx = dma->device_prep_dma_xor(chan, dma_dest, src_list, | |
80 | xor_src_cnt, unmap->len, | |
81 | dma_flags); | |
82 | src_list[0] = tmp; | |
83 | ||
1e55db2d | 84 | |
669ab0b2 | 85 | if (unlikely(!tx)) |
a08abd8c | 86 | async_tx_quiesce(&submit->depend_tx); |
0036731c | 87 | |
25985edc | 88 | /* spin wait for the preceding transactions to complete */ |
669ab0b2 DW |
89 | while (unlikely(!tx)) { |
90 | dma_async_issue_pending(chan); | |
1e55db2d | 91 | tx = dma->device_prep_dma_xor(chan, dma_dest, |
fb36ab14 DW |
92 | src_list, |
93 | xor_src_cnt, unmap->len, | |
1e55db2d | 94 | dma_flags); |
669ab0b2 | 95 | } |
9bc89cd8 | 96 | |
fb36ab14 | 97 | dma_set_unmap(tx, unmap); |
a08abd8c DW |
98 | async_tx_submit(chan, tx, submit); |
99 | submit->depend_tx = tx; | |
1e55db2d DW |
100 | |
101 | if (src_cnt > xor_src_cnt) { | |
102 | /* drop completed sources */ | |
103 | src_cnt -= xor_src_cnt; | |
1e55db2d | 104 | /* use the intermediate result a source */ |
1e55db2d | 105 | src_cnt++; |
fb36ab14 | 106 | src_list += xor_src_cnt - 1; |
1e55db2d DW |
107 | } else |
108 | break; | |
109 | } | |
0036731c DW |
110 | |
111 | return tx; | |
9bc89cd8 DW |
112 | } |
113 | ||
114 | static void | |
115 | do_sync_xor(struct page *dest, struct page **src_list, unsigned int offset, | |
a08abd8c | 116 | int src_cnt, size_t len, struct async_submit_ctl *submit) |
9bc89cd8 | 117 | { |
9bc89cd8 | 118 | int i; |
b2141e69 | 119 | int xor_src_cnt = 0; |
1e55db2d DW |
120 | int src_off = 0; |
121 | void *dest_buf; | |
04ce9ab3 | 122 | void **srcs; |
9bc89cd8 | 123 | |
04ce9ab3 DW |
124 | if (submit->scribble) |
125 | srcs = submit->scribble; | |
126 | else | |
127 | srcs = (void **) src_list; | |
128 | ||
129 | /* convert to buffer pointers */ | |
9bc89cd8 | 130 | for (i = 0; i < src_cnt; i++) |
b2141e69 N |
131 | if (src_list[i]) |
132 | srcs[xor_src_cnt++] = page_address(src_list[i]) + offset; | |
133 | src_cnt = xor_src_cnt; | |
9bc89cd8 | 134 | /* set destination address */ |
1e55db2d | 135 | dest_buf = page_address(dest) + offset; |
9bc89cd8 | 136 | |
a08abd8c | 137 | if (submit->flags & ASYNC_TX_XOR_ZERO_DST) |
1e55db2d | 138 | memset(dest_buf, 0, len); |
9bc89cd8 | 139 | |
1e55db2d DW |
140 | while (src_cnt > 0) { |
141 | /* process up to 'MAX_XOR_BLOCKS' sources */ | |
142 | xor_src_cnt = min(src_cnt, MAX_XOR_BLOCKS); | |
143 | xor_blocks(xor_src_cnt, len, dest_buf, &srcs[src_off]); | |
144 | ||
145 | /* drop completed sources */ | |
146 | src_cnt -= xor_src_cnt; | |
147 | src_off += xor_src_cnt; | |
148 | } | |
9bc89cd8 | 149 | |
a08abd8c | 150 | async_tx_sync_epilog(submit); |
9bc89cd8 DW |
151 | } |
152 | ||
153 | /** | |
154 | * async_xor - attempt to xor a set of blocks with a dma engine. | |
9bc89cd8 | 155 | * @dest: destination page |
a08abd8c DW |
156 | * @src_list: array of source pages |
157 | * @offset: common src/dst offset to start transaction | |
9bc89cd8 DW |
158 | * @src_cnt: number of source pages |
159 | * @len: length in bytes | |
a08abd8c DW |
160 | * @submit: submission / completion modifiers |
161 | * | |
162 | * honored flags: ASYNC_TX_ACK, ASYNC_TX_XOR_ZERO_DST, ASYNC_TX_XOR_DROP_DST | |
163 | * | |
164 | * xor_blocks always uses the dest as a source so the | |
165 | * ASYNC_TX_XOR_ZERO_DST flag must be set to not include dest data in | |
166 | * the calculation. The assumption with dma eninges is that they only | |
167 | * use the destination buffer as a source when it is explicity specified | |
168 | * in the source list. | |
169 | * | |
170 | * src_list note: if the dest is also a source it must be at index zero. | |
171 | * The contents of this array will be overwritten if a scribble region | |
172 | * is not specified. | |
9bc89cd8 DW |
173 | */ |
174 | struct dma_async_tx_descriptor * | |
175 | async_xor(struct page *dest, struct page **src_list, unsigned int offset, | |
a08abd8c | 176 | int src_cnt, size_t len, struct async_submit_ctl *submit) |
9bc89cd8 | 177 | { |
a08abd8c | 178 | struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR, |
47437b2c DW |
179 | &dest, 1, src_list, |
180 | src_cnt, len); | |
fb36ab14 DW |
181 | struct dma_device *device = chan ? chan->device : NULL; |
182 | struct dmaengine_unmap_data *unmap = NULL; | |
04ce9ab3 | 183 | |
9bc89cd8 DW |
184 | BUG_ON(src_cnt <= 1); |
185 | ||
fb36ab14 DW |
186 | if (device) |
187 | unmap = dmaengine_get_unmap_data(device->dev, src_cnt+1, GFP_NOIO); | |
188 | ||
189 | if (unmap && is_dma_xor_aligned(device, offset, 0, len)) { | |
190 | struct dma_async_tx_descriptor *tx; | |
191 | int i, j; | |
04ce9ab3 | 192 | |
1e55db2d DW |
193 | /* run the xor asynchronously */ |
194 | pr_debug("%s (async): len: %zu\n", __func__, len); | |
9bc89cd8 | 195 | |
fb36ab14 DW |
196 | unmap->len = len; |
197 | for (i = 0, j = 0; i < src_cnt; i++) { | |
198 | if (!src_list[i]) | |
199 | continue; | |
200 | unmap->to_cnt++; | |
201 | unmap->addr[j++] = dma_map_page(device->dev, src_list[i], | |
202 | offset, len, DMA_TO_DEVICE); | |
203 | } | |
204 | ||
205 | /* map it bidirectional as it may be re-used as a source */ | |
206 | unmap->addr[j] = dma_map_page(device->dev, dest, offset, len, | |
207 | DMA_BIDIRECTIONAL); | |
208 | unmap->bidi_cnt = 1; | |
209 | ||
210 | tx = do_async_xor(chan, unmap, submit); | |
211 | dmaengine_unmap_put(unmap); | |
212 | return tx; | |
1e55db2d | 213 | } else { |
fb36ab14 | 214 | dmaengine_unmap_put(unmap); |
1e55db2d DW |
215 | /* run the xor synchronously */ |
216 | pr_debug("%s (sync): len: %zu\n", __func__, len); | |
04ce9ab3 DW |
217 | WARN_ONCE(chan, "%s: no space for dma address conversion\n", |
218 | __func__); | |
9bc89cd8 | 219 | |
1e55db2d DW |
220 | /* in the sync case the dest is an implied source |
221 | * (assumes the dest is the first source) | |
9bc89cd8 | 222 | */ |
a08abd8c | 223 | if (submit->flags & ASYNC_TX_XOR_DROP_DST) { |
1e55db2d DW |
224 | src_cnt--; |
225 | src_list++; | |
226 | } | |
9bc89cd8 | 227 | |
1e55db2d | 228 | /* wait for any prerequisite operations */ |
a08abd8c | 229 | async_tx_quiesce(&submit->depend_tx); |
9bc89cd8 | 230 | |
a08abd8c | 231 | do_sync_xor(dest, src_list, offset, src_cnt, len, submit); |
9bc89cd8 | 232 | |
1e55db2d | 233 | return NULL; |
9bc89cd8 | 234 | } |
9bc89cd8 DW |
235 | } |
236 | EXPORT_SYMBOL_GPL(async_xor); | |
237 | ||
238 | static int page_is_zero(struct page *p, unsigned int offset, size_t len) | |
239 | { | |
2c88ae90 | 240 | return !memchr_inv(page_address(p) + offset, 0, len); |
9bc89cd8 DW |
241 | } |
242 | ||
7b3cc2b1 DW |
243 | static inline struct dma_chan * |
244 | xor_val_chan(struct async_submit_ctl *submit, struct page *dest, | |
245 | struct page **src_list, int src_cnt, size_t len) | |
246 | { | |
247 | #ifdef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA | |
248 | return NULL; | |
249 | #endif | |
250 | return async_tx_find_channel(submit, DMA_XOR_VAL, &dest, 1, src_list, | |
251 | src_cnt, len); | |
252 | } | |
253 | ||
9bc89cd8 | 254 | /** |
099f53cb | 255 | * async_xor_val - attempt a xor parity check with a dma engine. |
9bc89cd8 | 256 | * @dest: destination page used if the xor is performed synchronously |
a08abd8c | 257 | * @src_list: array of source pages |
9bc89cd8 DW |
258 | * @offset: offset in pages to start transaction |
259 | * @src_cnt: number of source pages | |
260 | * @len: length in bytes | |
261 | * @result: 0 if sum == 0 else non-zero | |
a08abd8c DW |
262 | * @submit: submission / completion modifiers |
263 | * | |
264 | * honored flags: ASYNC_TX_ACK | |
265 | * | |
266 | * src_list note: if the dest is also a source it must be at index zero. | |
267 | * The contents of this array will be overwritten if a scribble region | |
268 | * is not specified. | |
9bc89cd8 DW |
269 | */ |
270 | struct dma_async_tx_descriptor * | |
a08abd8c | 271 | async_xor_val(struct page *dest, struct page **src_list, unsigned int offset, |
ad283ea4 | 272 | int src_cnt, size_t len, enum sum_check_flags *result, |
a08abd8c | 273 | struct async_submit_ctl *submit) |
9bc89cd8 | 274 | { |
7b3cc2b1 | 275 | struct dma_chan *chan = xor_val_chan(submit, dest, src_list, src_cnt, len); |
9bc89cd8 | 276 | struct dma_device *device = chan ? chan->device : NULL; |
0036731c | 277 | struct dma_async_tx_descriptor *tx = NULL; |
04ce9ab3 | 278 | dma_addr_t *dma_src = NULL; |
9bc89cd8 DW |
279 | |
280 | BUG_ON(src_cnt <= 1); | |
281 | ||
04ce9ab3 DW |
282 | if (submit->scribble) |
283 | dma_src = submit->scribble; | |
284 | else if (sizeof(dma_addr_t) <= sizeof(struct page *)) | |
285 | dma_src = (dma_addr_t *) src_list; | |
286 | ||
83544ae9 DW |
287 | if (dma_src && device && src_cnt <= device->max_xor && |
288 | is_dma_xor_aligned(device, offset, 0, len)) { | |
0403e382 | 289 | unsigned long dma_prep_flags = 0; |
0036731c | 290 | int i; |
9bc89cd8 | 291 | |
3280ab3e | 292 | pr_debug("%s: (async) len: %zu\n", __func__, len); |
9bc89cd8 | 293 | |
0403e382 DW |
294 | if (submit->cb_fn) |
295 | dma_prep_flags |= DMA_PREP_INTERRUPT; | |
296 | if (submit->flags & ASYNC_TX_FENCE) | |
297 | dma_prep_flags |= DMA_PREP_FENCE; | |
0036731c DW |
298 | for (i = 0; i < src_cnt; i++) |
299 | dma_src[i] = dma_map_page(device->dev, src_list[i], | |
300 | offset, len, DMA_TO_DEVICE); | |
301 | ||
099f53cb DW |
302 | tx = device->device_prep_dma_xor_val(chan, dma_src, src_cnt, |
303 | len, result, | |
304 | dma_prep_flags); | |
669ab0b2 | 305 | if (unlikely(!tx)) { |
a08abd8c | 306 | async_tx_quiesce(&submit->depend_tx); |
0036731c | 307 | |
e34a8ae7 | 308 | while (!tx) { |
669ab0b2 | 309 | dma_async_issue_pending(chan); |
099f53cb | 310 | tx = device->device_prep_dma_xor_val(chan, |
0036731c | 311 | dma_src, src_cnt, len, result, |
d4c56f97 | 312 | dma_prep_flags); |
e34a8ae7 | 313 | } |
9bc89cd8 DW |
314 | } |
315 | ||
a08abd8c | 316 | async_tx_submit(chan, tx, submit); |
9bc89cd8 | 317 | } else { |
a08abd8c | 318 | enum async_tx_flags flags_orig = submit->flags; |
9bc89cd8 | 319 | |
3280ab3e | 320 | pr_debug("%s: (sync) len: %zu\n", __func__, len); |
04ce9ab3 DW |
321 | WARN_ONCE(device && src_cnt <= device->max_xor, |
322 | "%s: no space for dma address conversion\n", | |
323 | __func__); | |
9bc89cd8 | 324 | |
a08abd8c DW |
325 | submit->flags |= ASYNC_TX_XOR_DROP_DST; |
326 | submit->flags &= ~ASYNC_TX_ACK; | |
9bc89cd8 | 327 | |
a08abd8c | 328 | tx = async_xor(dest, src_list, offset, src_cnt, len, submit); |
9bc89cd8 | 329 | |
d2c52b79 | 330 | async_tx_quiesce(&tx); |
9bc89cd8 | 331 | |
ad283ea4 | 332 | *result = !page_is_zero(dest, offset, len) << SUM_CHECK_P; |
9bc89cd8 | 333 | |
a08abd8c DW |
334 | async_tx_sync_epilog(submit); |
335 | submit->flags = flags_orig; | |
9bc89cd8 DW |
336 | } |
337 | ||
338 | return tx; | |
339 | } | |
099f53cb | 340 | EXPORT_SYMBOL_GPL(async_xor_val); |
9bc89cd8 | 341 | |
9bc89cd8 DW |
342 | MODULE_AUTHOR("Intel Corporation"); |
343 | MODULE_DESCRIPTION("asynchronous xor/xor-zero-sum api"); | |
344 | MODULE_LICENSE("GPL"); |