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2874c5fd 1// SPDX-License-Identifier: GPL-2.0-or-later
735d37b5
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2/*
3 * Handle async block request by crypto hardware engine.
4 *
5 * Copyright (C) 2016 Linaro, Inc.
6 *
7 * Author: Baolin Wang <baolin.wang@linaro.org>
735d37b5
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8 */
9
10#include <linux/err.h>
11#include <linux/delay.h>
2589ad84 12#include <crypto/engine.h>
ae7e81c0 13#include <uapi/linux/sched/types.h>
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14#include "internal.h"
15
16#define CRYPTO_ENGINE_MAX_QLEN 10
17
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CL
18/**
19 * crypto_finalize_request - finalize one request if the request is done
20 * @engine: the hardware engine
21 * @req: the request need to be finalized
22 * @err: error number
23 */
24static void crypto_finalize_request(struct crypto_engine *engine,
6a89f492 25 struct crypto_async_request *req, int err)
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CL
26{
27 unsigned long flags;
6a89f492 28 bool finalize_req = false;
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29 int ret;
30 struct crypto_engine_ctx *enginectx;
31
6a89f492
IP
32 /*
33 * If hardware cannot enqueue more requests
34 * and retry mechanism is not supported
35 * make sure we are completing the current request
36 */
37 if (!engine->retry_support) {
38 spin_lock_irqsave(&engine->queue_lock, flags);
39 if (engine->cur_req == req) {
40 finalize_req = true;
41 engine->cur_req = NULL;
42 }
43 spin_unlock_irqrestore(&engine->queue_lock, flags);
44 }
218d1cc1 45
6a89f492 46 if (finalize_req || engine->retry_support) {
218d1cc1 47 enginectx = crypto_tfm_ctx(req->tfm);
6a89f492 48 if (enginectx->op.prepare_request &&
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49 enginectx->op.unprepare_request) {
50 ret = enginectx->op.unprepare_request(engine, req);
51 if (ret)
52 dev_err(engine->dev, "failed to unprepare request\n");
53 }
218d1cc1 54 }
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CL
55 req->complete(req, err);
56
57 kthread_queue_work(engine->kworker, &engine->pump_requests);
58}
59
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60/**
61 * crypto_pump_requests - dequeue one request from engine queue to process
62 * @engine: the hardware engine
63 * @in_kthread: true if we are in the context of the request pump thread
64 *
65 * This function checks if there is any request in the engine queue that
66 * needs processing and if so call out to the driver to initialize hardware
67 * and handle each request.
68 */
69static void crypto_pump_requests(struct crypto_engine *engine,
70 bool in_kthread)
71{
72 struct crypto_async_request *async_req, *backlog;
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73 unsigned long flags;
74 bool was_busy = false;
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75 int ret;
76 struct crypto_engine_ctx *enginectx;
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77
78 spin_lock_irqsave(&engine->queue_lock, flags);
79
80 /* Make sure we are not already running a request */
6a89f492 81 if (!engine->retry_support && engine->cur_req)
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82 goto out;
83
84 /* If another context is idling then defer */
85 if (engine->idling) {
c4ca2b0b 86 kthread_queue_work(engine->kworker, &engine->pump_requests);
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87 goto out;
88 }
89
90 /* Check if the engine queue is idle */
91 if (!crypto_queue_len(&engine->queue) || !engine->running) {
92 if (!engine->busy)
93 goto out;
94
95 /* Only do teardown in the thread */
96 if (!in_kthread) {
c4ca2b0b 97 kthread_queue_work(engine->kworker,
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98 &engine->pump_requests);
99 goto out;
100 }
101
102 engine->busy = false;
103 engine->idling = true;
104 spin_unlock_irqrestore(&engine->queue_lock, flags);
105
106 if (engine->unprepare_crypt_hardware &&
107 engine->unprepare_crypt_hardware(engine))
88d58ef8 108 dev_err(engine->dev, "failed to unprepare crypt hardware\n");
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109
110 spin_lock_irqsave(&engine->queue_lock, flags);
111 engine->idling = false;
112 goto out;
113 }
114
6a89f492 115start_request:
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116 /* Get the fist request from the engine queue to handle */
117 backlog = crypto_get_backlog(&engine->queue);
118 async_req = crypto_dequeue_request(&engine->queue);
119 if (!async_req)
120 goto out;
121
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IP
122 /*
123 * If hardware doesn't support the retry mechanism,
124 * keep track of the request we are processing now.
125 * We'll need it on completion (crypto_finalize_request).
126 */
127 if (!engine->retry_support)
128 engine->cur_req = async_req;
129
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130 if (backlog)
131 backlog->complete(backlog, -EINPROGRESS);
132
133 if (engine->busy)
134 was_busy = true;
135 else
136 engine->busy = true;
137
138 spin_unlock_irqrestore(&engine->queue_lock, flags);
139
140 /* Until here we get the request need to be encrypted successfully */
141 if (!was_busy && engine->prepare_crypt_hardware) {
142 ret = engine->prepare_crypt_hardware(engine);
143 if (ret) {
88d58ef8 144 dev_err(engine->dev, "failed to prepare crypt hardware\n");
6a89f492 145 goto req_err_2;
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146 }
147 }
148
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149 enginectx = crypto_tfm_ctx(async_req->tfm);
150
151 if (enginectx->op.prepare_request) {
152 ret = enginectx->op.prepare_request(engine, async_req);
4cba7cf0 153 if (ret) {
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154 dev_err(engine->dev, "failed to prepare request: %d\n",
155 ret);
6a89f492 156 goto req_err_2;
4cba7cf0 157 }
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158 }
159 if (!enginectx->op.do_one_request) {
160 dev_err(engine->dev, "failed to do request\n");
161 ret = -EINVAL;
6a89f492 162 goto req_err_1;
735d37b5 163 }
6a89f492 164
218d1cc1 165 ret = enginectx->op.do_one_request(engine, async_req);
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166
167 /* Request unsuccessfully executed by hardware */
168 if (ret < 0) {
169 /*
170 * If hardware queue is full (-ENOSPC), requeue request
171 * regardless of backlog flag.
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IP
172 * Otherwise, unprepare and complete the request.
173 */
174 if (!engine->retry_support ||
d1c72f6e 175 (ret != -ENOSPC)) {
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IP
176 dev_err(engine->dev,
177 "Failed to do one request from queue: %d\n",
178 ret);
179 goto req_err_1;
180 }
181 /*
182 * If retry mechanism is supported,
183 * unprepare current request and
184 * enqueue it back into crypto-engine queue.
185 */
186 if (enginectx->op.unprepare_request) {
187 ret = enginectx->op.unprepare_request(engine,
188 async_req);
189 if (ret)
190 dev_err(engine->dev,
191 "failed to unprepare request\n");
192 }
193 spin_lock_irqsave(&engine->queue_lock, flags);
194 /*
195 * If hardware was unable to execute request, enqueue it
196 * back in front of crypto-engine queue, to keep the order
197 * of requests.
198 */
199 crypto_enqueue_request_head(&engine->queue, async_req);
200
201 kthread_queue_work(engine->kworker, &engine->pump_requests);
202 goto out;
218d1cc1 203 }
735d37b5 204
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IP
205 goto retry;
206
207req_err_1:
208 if (enginectx->op.unprepare_request) {
209 ret = enginectx->op.unprepare_request(engine, async_req);
210 if (ret)
211 dev_err(engine->dev, "failed to unprepare request\n");
212 }
213
214req_err_2:
215 async_req->complete(async_req, ret);
216
217retry:
218 /* If retry mechanism is supported, send new requests to engine */
219 if (engine->retry_support) {
220 spin_lock_irqsave(&engine->queue_lock, flags);
221 goto start_request;
222 }
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223 return;
224
225out:
226 spin_unlock_irqrestore(&engine->queue_lock, flags);
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IP
227
228 /*
229 * Batch requests is possible only if
230 * hardware can enqueue multiple requests
231 */
232 if (engine->do_batch_requests) {
233 ret = engine->do_batch_requests(engine);
234 if (ret)
235 dev_err(engine->dev, "failed to do batch requests: %d\n",
236 ret);
237 }
238
6a89f492 239 return;
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240}
241
242static void crypto_pump_work(struct kthread_work *work)
243{
244 struct crypto_engine *engine =
245 container_of(work, struct crypto_engine, pump_requests);
246
247 crypto_pump_requests(engine, true);
248}
249
250/**
218d1cc1 251 * crypto_transfer_request - transfer the new request into the engine queue
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252 * @engine: the hardware engine
253 * @req: the request need to be listed into the engine queue
254 */
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255static int crypto_transfer_request(struct crypto_engine *engine,
256 struct crypto_async_request *req,
4cba7cf0 257 bool need_pump)
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258{
259 unsigned long flags;
260 int ret;
261
262 spin_lock_irqsave(&engine->queue_lock, flags);
263
264 if (!engine->running) {
265 spin_unlock_irqrestore(&engine->queue_lock, flags);
266 return -ESHUTDOWN;
267 }
268
218d1cc1 269 ret = crypto_enqueue_request(&engine->queue, req);
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270
271 if (!engine->busy && need_pump)
c4ca2b0b 272 kthread_queue_work(engine->kworker, &engine->pump_requests);
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273
274 spin_unlock_irqrestore(&engine->queue_lock, flags);
275 return ret;
276}
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277
278/**
218d1cc1 279 * crypto_transfer_request_to_engine - transfer one request to list
4cba7cf0
CL
280 * into the engine queue
281 * @engine: the hardware engine
282 * @req: the request need to be listed into the engine queue
283 */
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284static int crypto_transfer_request_to_engine(struct crypto_engine *engine,
285 struct crypto_async_request *req)
4cba7cf0 286{
218d1cc1 287 return crypto_transfer_request(engine, req, true);
4cba7cf0 288}
4cba7cf0 289
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CL
290/**
291 * crypto_transfer_aead_request_to_engine - transfer one aead_request
292 * to list into the engine queue
293 * @engine: the hardware engine
294 * @req: the request need to be listed into the engine queue
295 */
296int crypto_transfer_aead_request_to_engine(struct crypto_engine *engine,
297 struct aead_request *req)
298{
299 return crypto_transfer_request_to_engine(engine, &req->base);
300}
301EXPORT_SYMBOL_GPL(crypto_transfer_aead_request_to_engine);
4cba7cf0 302
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CL
303/**
304 * crypto_transfer_akcipher_request_to_engine - transfer one akcipher_request
305 * to list into the engine queue
306 * @engine: the hardware engine
307 * @req: the request need to be listed into the engine queue
308 */
309int crypto_transfer_akcipher_request_to_engine(struct crypto_engine *engine,
310 struct akcipher_request *req)
311{
312 return crypto_transfer_request_to_engine(engine, &req->base);
4cba7cf0 313}
218d1cc1 314EXPORT_SYMBOL_GPL(crypto_transfer_akcipher_request_to_engine);
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315
316/**
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317 * crypto_transfer_hash_request_to_engine - transfer one ahash_request
318 * to list into the engine queue
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319 * @engine: the hardware engine
320 * @req: the request need to be listed into the engine queue
321 */
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322int crypto_transfer_hash_request_to_engine(struct crypto_engine *engine,
323 struct ahash_request *req)
735d37b5 324{
218d1cc1 325 return crypto_transfer_request_to_engine(engine, &req->base);
735d37b5 326}
4cba7cf0 327EXPORT_SYMBOL_GPL(crypto_transfer_hash_request_to_engine);
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328
329/**
218d1cc1
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330 * crypto_transfer_skcipher_request_to_engine - transfer one skcipher_request
331 * to list into the engine queue
332 * @engine: the hardware engine
333 * @req: the request need to be listed into the engine queue
334 */
335int crypto_transfer_skcipher_request_to_engine(struct crypto_engine *engine,
336 struct skcipher_request *req)
337{
338 return crypto_transfer_request_to_engine(engine, &req->base);
339}
340EXPORT_SYMBOL_GPL(crypto_transfer_skcipher_request_to_engine);
341
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342/**
343 * crypto_finalize_aead_request - finalize one aead_request if
344 * the request is done
345 * @engine: the hardware engine
346 * @req: the request need to be finalized
347 * @err: error number
348 */
349void crypto_finalize_aead_request(struct crypto_engine *engine,
350 struct aead_request *req, int err)
351{
352 return crypto_finalize_request(engine, &req->base, err);
353}
354EXPORT_SYMBOL_GPL(crypto_finalize_aead_request);
735d37b5 355
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356/**
357 * crypto_finalize_akcipher_request - finalize one akcipher_request if
358 * the request is done
359 * @engine: the hardware engine
360 * @req: the request need to be finalized
361 * @err: error number
362 */
363void crypto_finalize_akcipher_request(struct crypto_engine *engine,
364 struct akcipher_request *req, int err)
365{
366 return crypto_finalize_request(engine, &req->base, err);
4cba7cf0 367}
218d1cc1 368EXPORT_SYMBOL_GPL(crypto_finalize_akcipher_request);
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369
370/**
218d1cc1
CL
371 * crypto_finalize_hash_request - finalize one ahash_request if
372 * the request is done
4cba7cf0
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373 * @engine: the hardware engine
374 * @req: the request need to be finalized
375 * @err: error number
376 */
377void crypto_finalize_hash_request(struct crypto_engine *engine,
378 struct ahash_request *req, int err)
379{
218d1cc1 380 return crypto_finalize_request(engine, &req->base, err);
735d37b5 381}
4cba7cf0 382EXPORT_SYMBOL_GPL(crypto_finalize_hash_request);
735d37b5 383
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CL
384/**
385 * crypto_finalize_skcipher_request - finalize one skcipher_request if
386 * the request is done
387 * @engine: the hardware engine
388 * @req: the request need to be finalized
389 * @err: error number
390 */
391void crypto_finalize_skcipher_request(struct crypto_engine *engine,
392 struct skcipher_request *req, int err)
393{
394 return crypto_finalize_request(engine, &req->base, err);
395}
396EXPORT_SYMBOL_GPL(crypto_finalize_skcipher_request);
397
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398/**
399 * crypto_engine_start - start the hardware engine
400 * @engine: the hardware engine need to be started
401 *
402 * Return 0 on success, else on fail.
403 */
404int crypto_engine_start(struct crypto_engine *engine)
405{
406 unsigned long flags;
407
408 spin_lock_irqsave(&engine->queue_lock, flags);
409
410 if (engine->running || engine->busy) {
411 spin_unlock_irqrestore(&engine->queue_lock, flags);
412 return -EBUSY;
413 }
414
415 engine->running = true;
416 spin_unlock_irqrestore(&engine->queue_lock, flags);
417
c4ca2b0b 418 kthread_queue_work(engine->kworker, &engine->pump_requests);
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419
420 return 0;
421}
422EXPORT_SYMBOL_GPL(crypto_engine_start);
423
424/**
425 * crypto_engine_stop - stop the hardware engine
426 * @engine: the hardware engine need to be stopped
427 *
428 * Return 0 on success, else on fail.
429 */
430int crypto_engine_stop(struct crypto_engine *engine)
431{
432 unsigned long flags;
4cba7cf0 433 unsigned int limit = 500;
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434 int ret = 0;
435
436 spin_lock_irqsave(&engine->queue_lock, flags);
437
438 /*
439 * If the engine queue is not empty or the engine is on busy state,
440 * we need to wait for a while to pump the requests of engine queue.
441 */
442 while ((crypto_queue_len(&engine->queue) || engine->busy) && limit--) {
443 spin_unlock_irqrestore(&engine->queue_lock, flags);
444 msleep(20);
445 spin_lock_irqsave(&engine->queue_lock, flags);
446 }
447
448 if (crypto_queue_len(&engine->queue) || engine->busy)
449 ret = -EBUSY;
450 else
451 engine->running = false;
452
453 spin_unlock_irqrestore(&engine->queue_lock, flags);
454
455 if (ret)
88d58ef8 456 dev_warn(engine->dev, "could not stop engine\n");
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457
458 return ret;
459}
460EXPORT_SYMBOL_GPL(crypto_engine_stop);
461
462/**
6a89f492
IP
463 * crypto_engine_alloc_init_and_set - allocate crypto hardware engine structure
464 * and initialize it by setting the maximum number of entries in the software
465 * crypto-engine queue.
735d37b5 466 * @dev: the device attached with one hardware engine
6a89f492 467 * @retry_support: whether hardware has support for retry mechanism
8d908226
IP
468 * @cbk_do_batch: pointer to a callback function to be invoked when executing a
469 * a batch of requests.
470 * This has the form:
471 * callback(struct crypto_engine *engine)
472 * where:
473 * @engine: the crypto engine structure.
735d37b5 474 * @rt: whether this queue is set to run as a realtime task
6a89f492 475 * @qlen: maximum size of the crypto-engine queue
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476 *
477 * This must be called from context that can sleep.
478 * Return: the crypto engine structure on success, else NULL.
479 */
6a89f492
IP
480struct crypto_engine *crypto_engine_alloc_init_and_set(struct device *dev,
481 bool retry_support,
8d908226 482 int (*cbk_do_batch)(struct crypto_engine *engine),
6a89f492 483 bool rt, int qlen)
735d37b5 484{
d13dfae3 485 struct sched_param param = { .sched_priority = MAX_RT_PRIO / 2 };
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486 struct crypto_engine *engine;
487
488 if (!dev)
489 return NULL;
490
491 engine = devm_kzalloc(dev, sizeof(*engine), GFP_KERNEL);
492 if (!engine)
493 return NULL;
494
88d58ef8 495 engine->dev = dev;
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496 engine->rt = rt;
497 engine->running = false;
498 engine->busy = false;
499 engine->idling = false;
6a89f492 500 engine->retry_support = retry_support;
735d37b5 501 engine->priv_data = dev;
8d908226
IP
502 /*
503 * Batch requests is possible only if
504 * hardware has support for retry mechanism.
505 */
506 engine->do_batch_requests = retry_support ? cbk_do_batch : NULL;
507
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508 snprintf(engine->name, sizeof(engine->name),
509 "%s-engine", dev_name(dev));
510
6a89f492 511 crypto_init_queue(&engine->queue, qlen);
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512 spin_lock_init(&engine->queue_lock);
513
c4ca2b0b
PM
514 engine->kworker = kthread_create_worker(0, "%s", engine->name);
515 if (IS_ERR(engine->kworker)) {
735d37b5
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516 dev_err(dev, "failed to create crypto request pump task\n");
517 return NULL;
518 }
3989144f 519 kthread_init_work(&engine->pump_requests, crypto_pump_work);
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520
521 if (engine->rt) {
522 dev_info(dev, "will run requests pump with realtime priority\n");
c4ca2b0b 523 sched_setscheduler(engine->kworker->task, SCHED_FIFO, &param);
735d37b5
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524 }
525
526 return engine;
527}
6a89f492
IP
528EXPORT_SYMBOL_GPL(crypto_engine_alloc_init_and_set);
529
530/**
531 * crypto_engine_alloc_init - allocate crypto hardware engine structure and
532 * initialize it.
533 * @dev: the device attached with one hardware engine
534 * @rt: whether this queue is set to run as a realtime task
535 *
536 * This must be called from context that can sleep.
537 * Return: the crypto engine structure on success, else NULL.
538 */
539struct crypto_engine *crypto_engine_alloc_init(struct device *dev, bool rt)
540{
8d908226 541 return crypto_engine_alloc_init_and_set(dev, false, NULL, rt,
6a89f492
IP
542 CRYPTO_ENGINE_MAX_QLEN);
543}
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544EXPORT_SYMBOL_GPL(crypto_engine_alloc_init);
545
546/**
547 * crypto_engine_exit - free the resources of hardware engine when exit
548 * @engine: the hardware engine need to be freed
549 *
550 * Return 0 for success.
551 */
552int crypto_engine_exit(struct crypto_engine *engine)
553{
554 int ret;
555
556 ret = crypto_engine_stop(engine);
557 if (ret)
558 return ret;
559
c4ca2b0b 560 kthread_destroy_worker(engine->kworker);
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561
562 return 0;
563}
564EXPORT_SYMBOL_GPL(crypto_engine_exit);
565
566MODULE_LICENSE("GPL");
567MODULE_DESCRIPTION("Crypto hardware engine framework");