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moved common softmmu code to common header (Paul Brook)
[mirror_qemu.git] / disas.c
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b9adb4a6 1/* General "disassemble this chunk" code. Used for debugging. */
5bbe9299 2#include "config.h"
b9adb4a6 3#include "dis-asm.h"
b9adb4a6 4#include "elf.h"
aa0aa4fa 5#include <errno.h>
b9adb4a6 6
c6105c0a
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7#include "cpu.h"
8#include "exec-all.h"
9307c4c1 9#include "disas.h"
c6105c0a 10
b9adb4a6 11/* Filled in by elfload.c. Simplistic, but will do for now. */
e80cfcfc 12struct syminfo *syminfos = NULL;
b9adb4a6 13
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14/* Get LENGTH bytes from info's buffer, at target address memaddr.
15 Transfer them to myaddr. */
16int
17buffer_read_memory (memaddr, myaddr, length, info)
18 bfd_vma memaddr;
19 bfd_byte *myaddr;
20 int length;
21 struct disassemble_info *info;
22{
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23 if (memaddr < info->buffer_vma
24 || memaddr + length > info->buffer_vma + info->buffer_length)
25 /* Out of bounds. Use EIO because GDB uses it. */
26 return EIO;
27 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
28 return 0;
aa0aa4fa
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29}
30
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31/* Get LENGTH bytes from info's buffer, at target address memaddr.
32 Transfer them to myaddr. */
33static int
c27004ec
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34target_read_memory (bfd_vma memaddr,
35 bfd_byte *myaddr,
36 int length,
37 struct disassemble_info *info)
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38{
39 int i;
40 for(i = 0; i < length; i++) {
c27004ec 41 myaddr[i] = ldub_code(memaddr + i);
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42 }
43 return 0;
44}
c6105c0a 45
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46/* Print an error message. We can assume that this is in response to
47 an error return from buffer_read_memory. */
48void
49perror_memory (status, memaddr, info)
50 int status;
51 bfd_vma memaddr;
52 struct disassemble_info *info;
53{
54 if (status != EIO)
55 /* Can't happen. */
56 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
57 else
58 /* Actually, address between memaddr and memaddr + len was
59 out of bounds. */
60 (*info->fprintf_func) (info->stream,
d44b29c2 61 "Address 0x%llx is out of bounds.\n", memaddr);
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62}
63
64/* This could be in a separate file, to save miniscule amounts of space
65 in statically linked executables. */
66
67/* Just print the address is hex. This is included for completeness even
68 though both GDB and objdump provide their own (to print symbolic
69 addresses). */
70
71void
72generic_print_address (addr, info)
73 bfd_vma addr;
74 struct disassemble_info *info;
75{
d44b29c2 76 (*info->fprintf_func) (info->stream, "0x%llx", addr);
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77}
78
79/* Just return the given address. */
80
81int
82generic_symbol_at_address (addr, info)
83 bfd_vma addr;
84 struct disassemble_info * info;
85{
86 return 1;
87}
88
89bfd_vma bfd_getl32 (const bfd_byte *addr)
90{
91 unsigned long v;
92
93 v = (unsigned long) addr[0];
94 v |= (unsigned long) addr[1] << 8;
95 v |= (unsigned long) addr[2] << 16;
96 v |= (unsigned long) addr[3] << 24;
97 return (bfd_vma) v;
98}
99
100bfd_vma bfd_getb32 (const bfd_byte *addr)
101{
102 unsigned long v;
103
104 v = (unsigned long) addr[0] << 24;
105 v |= (unsigned long) addr[1] << 16;
106 v |= (unsigned long) addr[2] << 8;
107 v |= (unsigned long) addr[3];
108 return (bfd_vma) v;
109}
110
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111bfd_vma bfd_getl16 (const bfd_byte *addr)
112{
113 unsigned long v;
114
115 v = (unsigned long) addr[0];
116 v |= (unsigned long) addr[1] << 8;
117 return (bfd_vma) v;
118}
119
120bfd_vma bfd_getb16 (const bfd_byte *addr)
121{
122 unsigned long v;
123
124 v = (unsigned long) addr[0] << 24;
125 v |= (unsigned long) addr[1] << 16;
126 return (bfd_vma) v;
127}
128
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129#ifdef TARGET_ARM
130static int
131print_insn_thumb1(bfd_vma pc, disassemble_info *info)
132{
133 return print_insn_arm(pc | 1, info);
134}
135#endif
136
137/* Disassemble this for me please... (debugging). 'flags' has teh following
138 values:
139 i386 - nonzero means 16 bit code
140 arm - nonzero means thumb code
141 other targets - unused
142 */
83b34f8b 143void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
b9adb4a6 144{
c27004ec 145 target_ulong pc;
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146 int count;
147 struct disassemble_info disasm_info;
148 int (*print_insn)(bfd_vma pc, disassemble_info *info);
149
150 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
151
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152 disasm_info.read_memory_func = target_read_memory;
153 disasm_info.buffer_vma = code;
154 disasm_info.buffer_length = size;
155
156#ifdef TARGET_WORDS_BIGENDIAN
157 disasm_info.endian = BFD_ENDIAN_BIG;
158#else
159 disasm_info.endian = BFD_ENDIAN_LITTLE;
160#endif
161#if defined(TARGET_I386)
162 if (flags == 2)
163 disasm_info.mach = bfd_mach_x86_64;
164 else if (flags == 1)
165 disasm_info.mach = bfd_mach_i386_i8086;
166 else
167 disasm_info.mach = bfd_mach_i386_i386;
168 print_insn = print_insn_i386;
169#elif defined(TARGET_ARM)
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170 if (flags)
171 print_insn = print_insn_thumb1;
172 else
173 print_insn = print_insn_arm;
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174#elif defined(TARGET_SPARC)
175 print_insn = print_insn_sparc;
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176#ifdef TARGET_SPARC64
177 disasm_info.mach = bfd_mach_sparc_v9b;
178#endif
c27004ec 179#elif defined(TARGET_PPC)
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180 if (cpu_single_env->msr[MSR_LE])
181 disasm_info.endian = BFD_ENDIAN_LITTLE;
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182#ifdef TARGET_PPC64
183 disasm_info.mach = bfd_mach_ppc64;
184#else
185 disasm_info.mach = bfd_mach_ppc;
186#endif
c27004ec 187 print_insn = print_insn_ppc;
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188#elif defined(TARGET_MIPS)
189 print_insn = print_insn_big_mips;
c27004ec 190#else
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191 fprintf(out, "0x" TARGET_FMT_lx
192 ": Asm output not supported on this arch\n", code);
c27004ec 193 return;
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194#endif
195
c27004ec 196 for (pc = code; pc < code + size; pc += count) {
fa15e030 197 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
c27004ec
FB
198 count = print_insn(pc, &disasm_info);
199#if 0
200 {
201 int i;
202 uint8_t b;
203 fprintf(out, " {");
204 for(i = 0; i < count; i++) {
205 target_read_memory(pc + i, &b, 1, &disasm_info);
206 fprintf(out, " %02x", b);
207 }
208 fprintf(out, " }");
209 }
210#endif
211 fprintf(out, "\n");
212 if (count < 0)
213 break;
214 }
215}
216
217/* Disassemble this for me please... (debugging). */
218void disas(FILE *out, void *code, unsigned long size)
219{
220 unsigned long pc;
221 int count;
222 struct disassemble_info disasm_info;
223 int (*print_insn)(bfd_vma pc, disassemble_info *info);
224
225 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
226
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FB
227 disasm_info.buffer = code;
228 disasm_info.buffer_vma = (unsigned long)code;
229 disasm_info.buffer_length = size;
230
b9adb4a6 231#ifdef WORDS_BIGENDIAN
c27004ec 232 disasm_info.endian = BFD_ENDIAN_BIG;
b9adb4a6 233#else
c27004ec 234 disasm_info.endian = BFD_ENDIAN_LITTLE;
b9adb4a6 235#endif
bc51c5c9 236#if defined(__i386__)
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237 disasm_info.mach = bfd_mach_i386_i386;
238 print_insn = print_insn_i386;
bc51c5c9 239#elif defined(__x86_64__)
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FB
240 disasm_info.mach = bfd_mach_x86_64;
241 print_insn = print_insn_i386;
b9adb4a6 242#elif defined(__powerpc__)
c27004ec 243 print_insn = print_insn_ppc;
a993ba85 244#elif defined(__alpha__)
c27004ec 245 print_insn = print_insn_alpha;
aa0aa4fa 246#elif defined(__sparc__)
c27004ec 247 print_insn = print_insn_sparc;
aa0aa4fa 248#elif defined(__arm__)
c27004ec 249 print_insn = print_insn_arm;
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250#elif defined(__MIPSEB__)
251 print_insn = print_insn_big_mips;
252#elif defined(__MIPSEL__)
253 print_insn = print_insn_little_mips;
b9adb4a6 254#else
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255 fprintf(out, "0x%lx: Asm output not supported on this arch\n",
256 (long) code);
c27004ec 257 return;
b9adb4a6 258#endif
c27004ec
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259 for (pc = (unsigned long)code; pc < (unsigned long)code + size; pc += count) {
260 fprintf(out, "0x%08lx: ", pc);
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261#ifdef __arm__
262 /* since data are included in the code, it is better to
263 display code data too */
95cbfc64 264 if (is_host) {
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265 fprintf(out, "%08x ", (int)bfd_getl32((const bfd_byte *)pc));
266 }
267#endif
c27004ec 268 count = print_insn(pc, &disasm_info);
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269 fprintf(out, "\n");
270 if (count < 0)
271 break;
272 }
273}
274
275/* Look up symbol for debugging purpose. Returns "" if unknown. */
c27004ec 276const char *lookup_symbol(target_ulong orig_addr)
b9adb4a6
FB
277{
278 unsigned int i;
279 /* Hack, because we know this is x86. */
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FB
280 Elf32_Sym *sym;
281 struct syminfo *s;
282
283 for (s = syminfos; s; s = s->next) {
284 sym = s->disas_symtab;
285 for (i = 0; i < s->disas_num_syms; i++) {
286 if (sym[i].st_shndx == SHN_UNDEF
287 || sym[i].st_shndx >= SHN_LORESERVE)
288 continue;
b9adb4a6 289
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290 if (ELF_ST_TYPE(sym[i].st_info) != STT_FUNC)
291 continue;
b9adb4a6 292
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293 if (orig_addr >= sym[i].st_value
294 && orig_addr < sym[i].st_value + sym[i].st_size)
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295 return s->disas_strtab + sym[i].st_name;
296 }
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297 }
298 return "";
299}
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300
301#if !defined(CONFIG_USER_ONLY)
302
3d2cfdf1
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303void term_vprintf(const char *fmt, va_list ap);
304void term_printf(const char *fmt, ...);
305
9307c4c1
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306static int monitor_disas_is_physical;
307
308static int
309monitor_read_memory (memaddr, myaddr, length, info)
310 bfd_vma memaddr;
311 bfd_byte *myaddr;
312 int length;
313 struct disassemble_info *info;
314{
315 if (monitor_disas_is_physical) {
316 cpu_physical_memory_rw(memaddr, myaddr, length, 0);
317 } else {
318 cpu_memory_rw_debug(cpu_single_env, memaddr,myaddr, length, 0);
319 }
320 return 0;
321}
322
3d2cfdf1
FB
323static int monitor_fprintf(FILE *stream, const char *fmt, ...)
324{
325 va_list ap;
326 va_start(ap, fmt);
327 term_vprintf(fmt, ap);
328 va_end(ap);
329 return 0;
330}
331
9307c4c1
FB
332void monitor_disas(target_ulong pc, int nb_insn, int is_physical, int flags)
333{
9307c4c1
FB
334 int count, i;
335 struct disassemble_info disasm_info;
336 int (*print_insn)(bfd_vma pc, disassemble_info *info);
337
3d2cfdf1 338 INIT_DISASSEMBLE_INFO(disasm_info, NULL, monitor_fprintf);
9307c4c1
FB
339
340 monitor_disas_is_physical = is_physical;
341 disasm_info.read_memory_func = monitor_read_memory;
342
343 disasm_info.buffer_vma = pc;
344
345#ifdef TARGET_WORDS_BIGENDIAN
346 disasm_info.endian = BFD_ENDIAN_BIG;
347#else
348 disasm_info.endian = BFD_ENDIAN_LITTLE;
349#endif
350#if defined(TARGET_I386)
fa15e030
FB
351 if (flags == 2)
352 disasm_info.mach = bfd_mach_x86_64;
353 else if (flags == 1)
9307c4c1 354 disasm_info.mach = bfd_mach_i386_i8086;
fa15e030
FB
355 else
356 disasm_info.mach = bfd_mach_i386_i386;
9307c4c1
FB
357 print_insn = print_insn_i386;
358#elif defined(TARGET_ARM)
359 print_insn = print_insn_arm;
360#elif defined(TARGET_SPARC)
361 print_insn = print_insn_sparc;
362#elif defined(TARGET_PPC)
a2458627
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363#ifdef TARGET_PPC64
364 disasm_info.mach = bfd_mach_ppc64;
365#else
366 disasm_info.mach = bfd_mach_ppc;
367#endif
9307c4c1 368 print_insn = print_insn_ppc;
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FB
369#elif defined(TARGET_MIPS)
370 print_insn = print_insn_big_mips;
9307c4c1 371#else
b8076a74
FB
372 term_printf("0x" TARGET_FMT_lx
373 ": Asm output not supported on this arch\n", pc);
9307c4c1
FB
374 return;
375#endif
376
377 for(i = 0; i < nb_insn; i++) {
fa15e030 378 term_printf("0x" TARGET_FMT_lx ": ", pc);
9307c4c1 379 count = print_insn(pc, &disasm_info);
3d2cfdf1 380 term_printf("\n");
9307c4c1
FB
381 if (count < 0)
382 break;
383 pc += count;
384 }
385}
386#endif