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monitor: Remove some type casts which are no longer needed
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CommitLineData
b9adb4a6 1/* General "disassemble this chunk" code. Used for debugging. */
5bbe9299 2#include "config.h"
b9adb4a6 3#include "dis-asm.h"
b9adb4a6 4#include "elf.h"
aa0aa4fa 5#include <errno.h>
b9adb4a6 6
c6105c0a
FB
7#include "cpu.h"
8#include "exec-all.h"
9307c4c1 9#include "disas.h"
c6105c0a 10
b9adb4a6 11/* Filled in by elfload.c. Simplistic, but will do for now. */
e80cfcfc 12struct syminfo *syminfos = NULL;
b9adb4a6 13
aa0aa4fa
FB
14/* Get LENGTH bytes from info's buffer, at target address memaddr.
15 Transfer them to myaddr. */
16int
3a742b76
PB
17buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
18 struct disassemble_info *info)
aa0aa4fa 19{
c6105c0a
FB
20 if (memaddr < info->buffer_vma
21 || memaddr + length > info->buffer_vma + info->buffer_length)
22 /* Out of bounds. Use EIO because GDB uses it. */
23 return EIO;
24 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
25 return 0;
aa0aa4fa
FB
26}
27
c6105c0a
FB
28/* Get LENGTH bytes from info's buffer, at target address memaddr.
29 Transfer them to myaddr. */
30static int
c27004ec
FB
31target_read_memory (bfd_vma memaddr,
32 bfd_byte *myaddr,
33 int length,
34 struct disassemble_info *info)
c6105c0a 35{
e612a1f7 36 cpu_memory_rw_debug(cpu_single_env, memaddr, myaddr, length, 0);
c6105c0a
FB
37 return 0;
38}
c6105c0a 39
aa0aa4fa
FB
40/* Print an error message. We can assume that this is in response to
41 an error return from buffer_read_memory. */
42void
3a742b76 43perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
aa0aa4fa
FB
44{
45 if (status != EIO)
46 /* Can't happen. */
47 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
48 else
49 /* Actually, address between memaddr and memaddr + len was
50 out of bounds. */
51 (*info->fprintf_func) (info->stream,
26a76461 52 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
aa0aa4fa
FB
53}
54
55/* This could be in a separate file, to save miniscule amounts of space
56 in statically linked executables. */
57
58/* Just print the address is hex. This is included for completeness even
59 though both GDB and objdump provide their own (to print symbolic
60 addresses). */
61
62void
3a742b76 63generic_print_address (bfd_vma addr, struct disassemble_info *info)
aa0aa4fa 64{
26a76461 65 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
aa0aa4fa
FB
66}
67
68/* Just return the given address. */
69
70int
3a742b76 71generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
aa0aa4fa
FB
72{
73 return 1;
74}
75
903ec55c
AJ
76bfd_vma bfd_getl64 (const bfd_byte *addr)
77{
78 unsigned long long v;
79
80 v = (unsigned long long) addr[0];
81 v |= (unsigned long long) addr[1] << 8;
82 v |= (unsigned long long) addr[2] << 16;
83 v |= (unsigned long long) addr[3] << 24;
84 v |= (unsigned long long) addr[4] << 32;
85 v |= (unsigned long long) addr[5] << 40;
86 v |= (unsigned long long) addr[6] << 48;
87 v |= (unsigned long long) addr[7] << 56;
88 return (bfd_vma) v;
89}
90
aa0aa4fa
FB
91bfd_vma bfd_getl32 (const bfd_byte *addr)
92{
93 unsigned long v;
94
95 v = (unsigned long) addr[0];
96 v |= (unsigned long) addr[1] << 8;
97 v |= (unsigned long) addr[2] << 16;
98 v |= (unsigned long) addr[3] << 24;
99 return (bfd_vma) v;
100}
101
102bfd_vma bfd_getb32 (const bfd_byte *addr)
103{
104 unsigned long v;
105
106 v = (unsigned long) addr[0] << 24;
107 v |= (unsigned long) addr[1] << 16;
108 v |= (unsigned long) addr[2] << 8;
109 v |= (unsigned long) addr[3];
110 return (bfd_vma) v;
111}
112
6af0bf9c
FB
113bfd_vma bfd_getl16 (const bfd_byte *addr)
114{
115 unsigned long v;
116
117 v = (unsigned long) addr[0];
118 v |= (unsigned long) addr[1] << 8;
119 return (bfd_vma) v;
120}
121
122bfd_vma bfd_getb16 (const bfd_byte *addr)
123{
124 unsigned long v;
125
126 v = (unsigned long) addr[0] << 24;
127 v |= (unsigned long) addr[1] << 16;
128 return (bfd_vma) v;
129}
130
c2d551ff
FB
131#ifdef TARGET_ARM
132static int
133print_insn_thumb1(bfd_vma pc, disassemble_info *info)
134{
135 return print_insn_arm(pc | 1, info);
136}
137#endif
138
e91c8a77 139/* Disassemble this for me please... (debugging). 'flags' has the following
c2d551ff
FB
140 values:
141 i386 - nonzero means 16 bit code
5fafdf24 142 arm - nonzero means thumb code
6a00d601 143 ppc - nonzero means little endian
c2d551ff
FB
144 other targets - unused
145 */
83b34f8b 146void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
b9adb4a6 147{
c27004ec 148 target_ulong pc;
b9adb4a6
FB
149 int count;
150 struct disassemble_info disasm_info;
151 int (*print_insn)(bfd_vma pc, disassemble_info *info);
152
153 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
154
c27004ec
FB
155 disasm_info.read_memory_func = target_read_memory;
156 disasm_info.buffer_vma = code;
157 disasm_info.buffer_length = size;
158
159#ifdef TARGET_WORDS_BIGENDIAN
160 disasm_info.endian = BFD_ENDIAN_BIG;
161#else
162 disasm_info.endian = BFD_ENDIAN_LITTLE;
163#endif
164#if defined(TARGET_I386)
165 if (flags == 2)
166 disasm_info.mach = bfd_mach_x86_64;
5fafdf24 167 else if (flags == 1)
c27004ec
FB
168 disasm_info.mach = bfd_mach_i386_i8086;
169 else
170 disasm_info.mach = bfd_mach_i386_i386;
171 print_insn = print_insn_i386;
172#elif defined(TARGET_ARM)
c2d551ff
FB
173 if (flags)
174 print_insn = print_insn_thumb1;
175 else
176 print_insn = print_insn_arm;
c27004ec
FB
177#elif defined(TARGET_SPARC)
178 print_insn = print_insn_sparc;
3475187d
FB
179#ifdef TARGET_SPARC64
180 disasm_info.mach = bfd_mach_sparc_v9b;
3b46e624 181#endif
c27004ec 182#elif defined(TARGET_PPC)
237c0af0 183 if (flags >> 16)
111bfab3 184 disasm_info.endian = BFD_ENDIAN_LITTLE;
237c0af0
JM
185 if (flags & 0xFFFF) {
186 /* If we have a precise definitions of the instructions set, use it */
187 disasm_info.mach = flags & 0xFFFF;
188 } else {
a2458627 189#ifdef TARGET_PPC64
237c0af0 190 disasm_info.mach = bfd_mach_ppc64;
a2458627 191#else
237c0af0 192 disasm_info.mach = bfd_mach_ppc;
a2458627 193#endif
237c0af0 194 }
c27004ec 195 print_insn = print_insn_ppc;
e6e5906b
PB
196#elif defined(TARGET_M68K)
197 print_insn = print_insn_m68k;
6af0bf9c 198#elif defined(TARGET_MIPS)
76b3030c 199#ifdef TARGET_WORDS_BIGENDIAN
6af0bf9c 200 print_insn = print_insn_big_mips;
76b3030c
FB
201#else
202 print_insn = print_insn_little_mips;
203#endif
fdf9b3e8
FB
204#elif defined(TARGET_SH4)
205 disasm_info.mach = bfd_mach_sh4;
206 print_insn = print_insn_sh;
eddf68a6
JM
207#elif defined(TARGET_ALPHA)
208 disasm_info.mach = bfd_mach_alpha;
209 print_insn = print_insn_alpha;
a25fd137 210#elif defined(TARGET_CRIS)
b09cd072
EI
211 if (flags != 32) {
212 disasm_info.mach = bfd_mach_cris_v0_v10;
213 print_insn = print_insn_crisv10;
214 } else {
215 disasm_info.mach = bfd_mach_cris_v32;
216 print_insn = print_insn_crisv32;
217 }
db500609
UH
218#elif defined(TARGET_S390X)
219 disasm_info.mach = bfd_mach_s390_64;
220 print_insn = print_insn_s390;
e90e390c
EI
221#elif defined(TARGET_MICROBLAZE)
222 disasm_info.mach = bfd_arch_microblaze;
223 print_insn = print_insn_microblaze;
c27004ec 224#else
b8076a74
FB
225 fprintf(out, "0x" TARGET_FMT_lx
226 ": Asm output not supported on this arch\n", code);
c27004ec 227 return;
c6105c0a
FB
228#endif
229
7e000c2e 230 for (pc = code; size > 0; pc += count, size -= count) {
fa15e030 231 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
c27004ec
FB
232 count = print_insn(pc, &disasm_info);
233#if 0
234 {
235 int i;
236 uint8_t b;
237 fprintf(out, " {");
238 for(i = 0; i < count; i++) {
239 target_read_memory(pc + i, &b, 1, &disasm_info);
240 fprintf(out, " %02x", b);
241 }
242 fprintf(out, " }");
243 }
244#endif
245 fprintf(out, "\n");
246 if (count < 0)
247 break;
754d00ae 248 if (size < count) {
249 fprintf(out,
250 "Disassembler disagrees with translator over instruction "
251 "decoding\n"
252 "Please report this to qemu-devel@nongnu.org\n");
253 break;
254 }
c27004ec
FB
255 }
256}
257
258/* Disassemble this for me please... (debugging). */
259void disas(FILE *out, void *code, unsigned long size)
260{
261 unsigned long pc;
262 int count;
263 struct disassemble_info disasm_info;
264 int (*print_insn)(bfd_vma pc, disassemble_info *info);
265
266 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
267
b9adb4a6
FB
268 disasm_info.buffer = code;
269 disasm_info.buffer_vma = (unsigned long)code;
270 disasm_info.buffer_length = size;
271
e2542fe2 272#ifdef HOST_WORDS_BIGENDIAN
c27004ec 273 disasm_info.endian = BFD_ENDIAN_BIG;
b9adb4a6 274#else
c27004ec 275 disasm_info.endian = BFD_ENDIAN_LITTLE;
b9adb4a6 276#endif
bc51c5c9 277#if defined(__i386__)
c27004ec
FB
278 disasm_info.mach = bfd_mach_i386_i386;
279 print_insn = print_insn_i386;
bc51c5c9 280#elif defined(__x86_64__)
c27004ec
FB
281 disasm_info.mach = bfd_mach_x86_64;
282 print_insn = print_insn_i386;
e58ffeb3 283#elif defined(_ARCH_PPC)
c27004ec 284 print_insn = print_insn_ppc;
a993ba85 285#elif defined(__alpha__)
c27004ec 286 print_insn = print_insn_alpha;
aa0aa4fa 287#elif defined(__sparc__)
c27004ec 288 print_insn = print_insn_sparc;
6ecd4534
BS
289#if defined(__sparc_v8plus__) || defined(__sparc_v8plusa__) || defined(__sparc_v9__)
290 disasm_info.mach = bfd_mach_sparc_v9b;
291#endif
5fafdf24 292#elif defined(__arm__)
c27004ec 293 print_insn = print_insn_arm;
6af0bf9c
FB
294#elif defined(__MIPSEB__)
295 print_insn = print_insn_big_mips;
296#elif defined(__MIPSEL__)
297 print_insn = print_insn_little_mips;
48024e4a
FB
298#elif defined(__m68k__)
299 print_insn = print_insn_m68k;
8f860bb8
TS
300#elif defined(__s390__)
301 print_insn = print_insn_s390;
f54b3f92
AJ
302#elif defined(__hppa__)
303 print_insn = print_insn_hppa;
903ec55c
AJ
304#elif defined(__ia64__)
305 print_insn = print_insn_ia64;
b9adb4a6 306#else
b8076a74
FB
307 fprintf(out, "0x%lx: Asm output not supported on this arch\n",
308 (long) code);
c27004ec 309 return;
b9adb4a6 310#endif
7e000c2e 311 for (pc = (unsigned long)code; size > 0; pc += count, size -= count) {
c27004ec 312 fprintf(out, "0x%08lx: ", pc);
c27004ec 313 count = print_insn(pc, &disasm_info);
b9adb4a6
FB
314 fprintf(out, "\n");
315 if (count < 0)
316 break;
317 }
318}
319
320/* Look up symbol for debugging purpose. Returns "" if unknown. */
c27004ec 321const char *lookup_symbol(target_ulong orig_addr)
b9adb4a6 322{
49918a75 323 const char *symbol = "";
e80cfcfc 324 struct syminfo *s;
3b46e624 325
e80cfcfc 326 for (s = syminfos; s; s = s->next) {
49918a75
PB
327 symbol = s->lookup_symbol(s, orig_addr);
328 if (symbol[0] != '\0') {
329 break;
330 }
b9adb4a6 331 }
49918a75
PB
332
333 return symbol;
b9adb4a6 334}
9307c4c1
FB
335
336#if !defined(CONFIG_USER_ONLY)
337
376253ec 338#include "monitor.h"
3d2cfdf1 339
9307c4c1 340static int monitor_disas_is_physical;
6a00d601 341static CPUState *monitor_disas_env;
9307c4c1
FB
342
343static int
a5f1b965
BS
344monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
345 struct disassemble_info *info)
9307c4c1
FB
346{
347 if (monitor_disas_is_physical) {
348 cpu_physical_memory_rw(memaddr, myaddr, length, 0);
349 } else {
6a00d601 350 cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
9307c4c1
FB
351 }
352 return 0;
353}
354
8b7968f7
SW
355static int GCC_FMT_ATTR(2, 3)
356monitor_fprintf(FILE *stream, const char *fmt, ...)
3d2cfdf1
FB
357{
358 va_list ap;
359 va_start(ap, fmt);
376253ec 360 monitor_vprintf((Monitor *)stream, fmt, ap);
3d2cfdf1
FB
361 va_end(ap);
362 return 0;
363}
364
376253ec 365void monitor_disas(Monitor *mon, CPUState *env,
6a00d601 366 target_ulong pc, int nb_insn, int is_physical, int flags)
9307c4c1 367{
9307c4c1
FB
368 int count, i;
369 struct disassemble_info disasm_info;
370 int (*print_insn)(bfd_vma pc, disassemble_info *info);
371
376253ec 372 INIT_DISASSEMBLE_INFO(disasm_info, (FILE *)mon, monitor_fprintf);
9307c4c1 373
6a00d601 374 monitor_disas_env = env;
9307c4c1
FB
375 monitor_disas_is_physical = is_physical;
376 disasm_info.read_memory_func = monitor_read_memory;
377
378 disasm_info.buffer_vma = pc;
379
380#ifdef TARGET_WORDS_BIGENDIAN
381 disasm_info.endian = BFD_ENDIAN_BIG;
382#else
383 disasm_info.endian = BFD_ENDIAN_LITTLE;
384#endif
385#if defined(TARGET_I386)
fa15e030
FB
386 if (flags == 2)
387 disasm_info.mach = bfd_mach_x86_64;
5fafdf24 388 else if (flags == 1)
9307c4c1 389 disasm_info.mach = bfd_mach_i386_i8086;
fa15e030
FB
390 else
391 disasm_info.mach = bfd_mach_i386_i386;
9307c4c1
FB
392 print_insn = print_insn_i386;
393#elif defined(TARGET_ARM)
394 print_insn = print_insn_arm;
cbd669da
TS
395#elif defined(TARGET_ALPHA)
396 print_insn = print_insn_alpha;
9307c4c1
FB
397#elif defined(TARGET_SPARC)
398 print_insn = print_insn_sparc;
682c4f15
BS
399#ifdef TARGET_SPARC64
400 disasm_info.mach = bfd_mach_sparc_v9b;
401#endif
9307c4c1 402#elif defined(TARGET_PPC)
a2458627
FB
403#ifdef TARGET_PPC64
404 disasm_info.mach = bfd_mach_ppc64;
405#else
406 disasm_info.mach = bfd_mach_ppc;
407#endif
9307c4c1 408 print_insn = print_insn_ppc;
e6e5906b
PB
409#elif defined(TARGET_M68K)
410 print_insn = print_insn_m68k;
6af0bf9c 411#elif defined(TARGET_MIPS)
76b3030c 412#ifdef TARGET_WORDS_BIGENDIAN
6af0bf9c 413 print_insn = print_insn_big_mips;
76b3030c
FB
414#else
415 print_insn = print_insn_little_mips;
416#endif
b4e1f077
MD
417#elif defined(TARGET_SH4)
418 disasm_info.mach = bfd_mach_sh4;
419 print_insn = print_insn_sh;
db500609
UH
420#elif defined(TARGET_S390X)
421 disasm_info.mach = bfd_mach_s390_64;
422 print_insn = print_insn_s390;
9307c4c1 423#else
376253ec
AL
424 monitor_printf(mon, "0x" TARGET_FMT_lx
425 ": Asm output not supported on this arch\n", pc);
9307c4c1
FB
426 return;
427#endif
428
429 for(i = 0; i < nb_insn; i++) {
376253ec 430 monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
9307c4c1 431 count = print_insn(pc, &disasm_info);
376253ec 432 monitor_printf(mon, "\n");
9307c4c1
FB
433 if (count < 0)
434 break;
435 pc += count;
436 }
437}
438#endif