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CommitLineData
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1/*
2 * DMA helper functions
3 *
4 * Copyright (c) 2009 Red Hat
5 *
6 * This work is licensed under the terms of the GNU General Public License
7 * (GNU GPL), version 2 or later.
8 */
9
10#include "dma.h"
59a703eb 11#include "block_int.h"
c57c4658 12#include "trace.h"
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13
14void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint)
15{
7267c094 16 qsg->sg = g_malloc(alloc_hint * sizeof(ScatterGatherEntry));
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17 qsg->nsg = 0;
18 qsg->nalloc = alloc_hint;
19 qsg->size = 0;
20}
21
d3231181 22void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len)
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23{
24 if (qsg->nsg == qsg->nalloc) {
25 qsg->nalloc = 2 * qsg->nalloc + 1;
7267c094 26 qsg->sg = g_realloc(qsg->sg, qsg->nalloc * sizeof(ScatterGatherEntry));
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27 }
28 qsg->sg[qsg->nsg].base = base;
29 qsg->sg[qsg->nsg].len = len;
30 qsg->size += len;
31 ++qsg->nsg;
32}
33
34void qemu_sglist_destroy(QEMUSGList *qsg)
35{
7267c094 36 g_free(qsg->sg);
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37}
38
59a703eb 39typedef struct {
37b7842c 40 BlockDriverAIOCB common;
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41 BlockDriverState *bs;
42 BlockDriverAIOCB *acb;
43 QEMUSGList *sg;
44 uint64_t sector_num;
bbca72c6 45 bool to_dev;
c3adb5b9 46 bool in_cancel;
59a703eb 47 int sg_cur_index;
d3231181 48 dma_addr_t sg_cur_byte;
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49 QEMUIOVector iov;
50 QEMUBH *bh;
cb144ccb 51 DMAIOFunc *io_func;
37b7842c 52} DMAAIOCB;
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53
54static void dma_bdrv_cb(void *opaque, int ret);
55
56static void reschedule_dma(void *opaque)
57{
37b7842c 58 DMAAIOCB *dbs = (DMAAIOCB *)opaque;
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59
60 qemu_bh_delete(dbs->bh);
61 dbs->bh = NULL;
c3adb5b9 62 dma_bdrv_cb(dbs, 0);
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63}
64
65static void continue_after_map_failure(void *opaque)
66{
37b7842c 67 DMAAIOCB *dbs = (DMAAIOCB *)opaque;
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68
69 dbs->bh = qemu_bh_new(reschedule_dma, dbs);
70 qemu_bh_schedule(dbs->bh);
71}
72
7403b14e 73static void dma_bdrv_unmap(DMAAIOCB *dbs)
59a703eb 74{
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75 int i;
76
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77 for (i = 0; i < dbs->iov.niov; ++i) {
78 cpu_physical_memory_unmap(dbs->iov.iov[i].iov_base,
bbca72c6 79 dbs->iov.iov[i].iov_len, !dbs->to_dev,
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80 dbs->iov.iov[i].iov_len);
81 }
c3adb5b9
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82 qemu_iovec_reset(&dbs->iov);
83}
84
85static void dma_complete(DMAAIOCB *dbs, int ret)
86{
c57c4658
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87 trace_dma_complete(dbs, ret, dbs->common.cb);
88
c3adb5b9
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89 dma_bdrv_unmap(dbs);
90 if (dbs->common.cb) {
91 dbs->common.cb(dbs->common.opaque, ret);
92 }
93 qemu_iovec_destroy(&dbs->iov);
94 if (dbs->bh) {
95 qemu_bh_delete(dbs->bh);
96 dbs->bh = NULL;
97 }
98 if (!dbs->in_cancel) {
99 /* Requests may complete while dma_aio_cancel is in progress. In
100 * this case, the AIOCB should not be released because it is still
101 * referenced by dma_aio_cancel. */
102 qemu_aio_release(dbs);
103 }
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104}
105
856ae5c3 106static void dma_bdrv_cb(void *opaque, int ret)
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107{
108 DMAAIOCB *dbs = (DMAAIOCB *)opaque;
c227f099 109 target_phys_addr_t cur_addr, cur_len;
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110 void *mem;
111
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112 trace_dma_bdrv_cb(dbs, ret);
113
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114 dbs->acb = NULL;
115 dbs->sector_num += dbs->iov.size / 512;
116 dma_bdrv_unmap(dbs);
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117
118 if (dbs->sg_cur_index == dbs->sg->nsg || ret < 0) {
c3adb5b9 119 dma_complete(dbs, ret);
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120 return;
121 }
122
123 while (dbs->sg_cur_index < dbs->sg->nsg) {
124 cur_addr = dbs->sg->sg[dbs->sg_cur_index].base + dbs->sg_cur_byte;
125 cur_len = dbs->sg->sg[dbs->sg_cur_index].len - dbs->sg_cur_byte;
bbca72c6 126 mem = cpu_physical_memory_map(cur_addr, &cur_len, !dbs->to_dev);
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127 if (!mem)
128 break;
129 qemu_iovec_add(&dbs->iov, mem, cur_len);
130 dbs->sg_cur_byte += cur_len;
131 if (dbs->sg_cur_byte == dbs->sg->sg[dbs->sg_cur_index].len) {
132 dbs->sg_cur_byte = 0;
133 ++dbs->sg_cur_index;
134 }
135 }
136
137 if (dbs->iov.size == 0) {
c57c4658 138 trace_dma_map_wait(dbs);
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139 cpu_register_map_client(dbs, continue_after_map_failure);
140 return;
141 }
142
cb144ccb
CH
143 dbs->acb = dbs->io_func(dbs->bs, dbs->sector_num, &dbs->iov,
144 dbs->iov.size / 512, dma_bdrv_cb, dbs);
7403b14e 145 if (!dbs->acb) {
c3adb5b9 146 dma_complete(dbs, -EIO);
7403b14e 147 }
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148}
149
c16b5a2c
CH
150static void dma_aio_cancel(BlockDriverAIOCB *acb)
151{
152 DMAAIOCB *dbs = container_of(acb, DMAAIOCB, common);
153
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154 trace_dma_aio_cancel(dbs);
155
c16b5a2c 156 if (dbs->acb) {
c3adb5b9
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157 BlockDriverAIOCB *acb = dbs->acb;
158 dbs->acb = NULL;
159 dbs->in_cancel = true;
160 bdrv_aio_cancel(acb);
161 dbs->in_cancel = false;
c16b5a2c 162 }
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163 dbs->common.cb = NULL;
164 dma_complete(dbs, 0);
c16b5a2c
CH
165}
166
167static AIOPool dma_aio_pool = {
168 .aiocb_size = sizeof(DMAAIOCB),
169 .cancel = dma_aio_cancel,
170};
171
cb144ccb 172BlockDriverAIOCB *dma_bdrv_io(
59a703eb 173 BlockDriverState *bs, QEMUSGList *sg, uint64_t sector_num,
cb144ccb 174 DMAIOFunc *io_func, BlockDriverCompletionFunc *cb,
bbca72c6 175 void *opaque, bool to_dev)
59a703eb 176{
cb144ccb 177 DMAAIOCB *dbs = qemu_aio_get(&dma_aio_pool, bs, cb, opaque);
59a703eb 178
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179 trace_dma_bdrv_io(dbs, bs, sector_num, to_dev);
180
37b7842c 181 dbs->acb = NULL;
59a703eb 182 dbs->bs = bs;
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183 dbs->sg = sg;
184 dbs->sector_num = sector_num;
185 dbs->sg_cur_index = 0;
186 dbs->sg_cur_byte = 0;
bbca72c6 187 dbs->to_dev = to_dev;
cb144ccb 188 dbs->io_func = io_func;
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189 dbs->bh = NULL;
190 qemu_iovec_init(&dbs->iov, sg->nsg);
191 dma_bdrv_cb(dbs, 0);
37b7842c 192 return &dbs->common;
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193}
194
195
196BlockDriverAIOCB *dma_bdrv_read(BlockDriverState *bs,
197 QEMUSGList *sg, uint64_t sector,
198 void (*cb)(void *opaque, int ret), void *opaque)
199{
bbca72c6 200 return dma_bdrv_io(bs, sg, sector, bdrv_aio_readv, cb, opaque, false);
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201}
202
203BlockDriverAIOCB *dma_bdrv_write(BlockDriverState *bs,
204 QEMUSGList *sg, uint64_t sector,
205 void (*cb)(void *opaque, int ret), void *opaque)
206{
bbca72c6 207 return dma_bdrv_io(bs, sg, sector, bdrv_aio_writev, cb, opaque, true);
59a703eb 208}