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1@c man begin SYNOPSIS
2QEMU / KVM CPU model configuration
3@c man end
4
5@c man begin DESCRIPTION
6
7@menu
8* recommendations_cpu_models_x86:: Recommendations for KVM CPU model configuration on x86 hosts
9* cpu_model_syntax_apps:: Syntax for configuring CPU models
10@end menu
11
12QEMU / KVM virtualization supports two ways to configure CPU models
13
14@table @option
15
16@item Host passthrough
17
18This passes the host CPU model features, model, stepping, exactly to the
19guest. Note that KVM may filter out some host CPU model features if they
20cannot be supported with virtualization. Live migration is unsafe when
21this mode is used as libvirt / QEMU cannot guarantee a stable CPU is
22exposed to the guest across hosts. This is the recommended CPU to use,
23provided live migration is not required.
24
25@item Named model
26
27QEMU comes with a number of predefined named CPU models, that typically
28refer to specific generations of hardware released by Intel and AMD.
29These allow the guest VMs to have a degree of isolation from the host CPU,
30allowing greater flexibility in live migrating between hosts with differing
31hardware.
32@end table
33
34In both cases, it is possible to optionally add or remove individual CPU
35features, to alter what is presented to the guest by default.
36
37Libvirt supports a third way to configure CPU models known as "Host model".
38This uses the QEMU "Named model" feature, automatically picking a CPU model
39that is similar the host CPU, and then adding extra features to approximate
40the host model as closely as possible. This does not guarantee the CPU family,
41stepping, etc will precisely match the host CPU, as they would with "Host
42passthrough", but gives much of the benefit of passthrough, while making
43live migration safe.
44
45@node recommendations_cpu_models_x86
46@subsection Recommendations for KVM CPU model configuration on x86 hosts
47
48The information that follows provides recommendations for configuring
49CPU models on x86 hosts. The goals are to maximise performance, while
50protecting guest OS against various CPU hardware flaws, and optionally
51enabling live migration between hosts with hetergeneous CPU models.
52
53@menu
54* preferred_cpu_models_intel_x86:: Preferred CPU models for Intel x86 hosts
55* important_cpu_features_intel_x86:: Important CPU features for Intel x86 hosts
56* preferred_cpu_models_amd_x86:: Preferred CPU models for AMD x86 hosts
57* important_cpu_features_amd_x86:: Important CPU features for AMD x86 hosts
58* default_cpu_models_x86:: Default x86 CPU models
59* other_non_recommended_cpu_models_x86:: Other non-recommended x86 CPUs
60@end menu
61
62@node preferred_cpu_models_intel_x86
63@subsubsection Preferred CPU models for Intel x86 hosts
64
65The following CPU models are preferred for use on Intel hosts. Administrators /
66applications are recommended to use the CPU model that matches the generation
67of the host CPUs in use. In a deployment with a mixture of host CPU models
68between machines, if live migration compatibility is required, use the newest
69CPU model that is compatible across all desired hosts.
70
71@table @option
72@item @code{Skylake-Server}
73@item @code{Skylake-Server-IBRS}
74
75Intel Xeon Processor (Skylake, 2016)
76
77
78@item @code{Skylake-Client}
79@item @code{Skylake-Client-IBRS}
80
81Intel Core Processor (Skylake, 2015)
82
83
84@item @code{Broadwell}
85@item @code{Broadwell-IBRS}
86@item @code{Broadwell-noTSX}
87@item @code{Broadwell-noTSX-IBRS}
88
89Intel Core Processor (Broadwell, 2014)
90
91
92@item @code{Haswell}
93@item @code{Haswell-IBRS}
94@item @code{Haswell-noTSX}
95@item @code{Haswell-noTSX-IBRS}
96
97Intel Core Processor (Haswell, 2013)
98
99
100@item @code{IvyBridge}
101@item @code{IvyBridge-IBRS}
102
103Intel Xeon E3-12xx v2 (Ivy Bridge, 2012)
104
105
106@item @code{SandyBridge}
107@item @code{SandyBridge-IBRS}
108
109Intel Xeon E312xx (Sandy Bridge, 2011)
110
111
112@item @code{Westmere}
113@item @code{Westmere-IBRS}
114
115Westmere E56xx/L56xx/X56xx (Nehalem-C, 2010)
116
117
118@item @code{Nehalem}
119@item @code{Nehalem-IBRS}
120
121Intel Core i7 9xx (Nehalem Class Core i7, 2008)
122
123
124@item @code{Penryn}
125
126Intel Core 2 Duo P9xxx (Penryn Class Core 2, 2007)
127
128
129@item @code{Conroe}
130
131Intel Celeron_4x0 (Conroe/Merom Class Core 2, 2006)
132
133@end table
134
135@node important_cpu_features_intel_x86
136@subsubsection Important CPU features for Intel x86 hosts
137
138The following are important CPU features that should be used on Intel x86
139hosts, when available in the host CPU. Some of them require explicit
140configuration to enable, as they are not included by default in some, or all,
141of the named CPU models listed above. In general all of these features are
142included if using "Host passthrough" or "Host model".
143
144
145@table @option
146
147@item @code{pcid}
148
149Recommended to mitigate the cost of the Meltdown (CVE-2017-5754) fix
150
151Included by default in Haswell, Broadwell & Skylake Intel CPU models.
152
153Should be explicitly turned on for Westmere, SandyBridge, and IvyBridge
154Intel CPU models. Note that some desktop/mobile Westmere CPUs cannot
155support this feature.
156
157
158@item @code{spec-ctrl}
159
160Required to enable the Spectre (CVE-2017-5753 and CVE-2017-5715) fix,
161in cases where retpolines are not sufficient.
162
163Included by default in Intel CPU models with -IBRS suffix.
164
165Must be explicitly turned on for Intel CPU models without -IBRS suffix.
166
167Requires the host CPU microcode to support this feature before it
168can be used for guest CPUs.
169
170
171@item @code{ssbd}
172
173Required to enable the CVE-2018-3639 fix
174
175Not included by default in any Intel CPU model.
176
177Must be explicitly turned on for all Intel CPU models.
178
179Requires the host CPU microcode to support this feature before it
180can be used for guest CPUs.
181
182
183@item @code{pdpe1gb}
184
185Recommended to allow guest OS to use 1GB size pages
186
187Not included by default in any Intel CPU model.
188
189Should be explicitly turned on for all Intel CPU models.
190
191Note that not all CPU hardware will support this feature.
192@end table
193
194
195@node preferred_cpu_models_amd_x86
196@subsubsection Preferred CPU models for AMD x86 hosts
197
198The following CPU models are preferred for use on Intel hosts. Administrators /
199applications are recommended to use the CPU model that matches the generation
200of the host CPUs in use. In a deployment with a mixture of host CPU models
201between machines, if live migration compatibility is required, use the newest
202CPU model that is compatible across all desired hosts.
203
204@table @option
205
206@item @code{EPYC}
207@item @code{EPYC-IBPB}
208
209AMD EPYC Processor (2017)
210
211
212@item @code{Opteron_G5}
213
214AMD Opteron 63xx class CPU (2012)
215
216
217@item @code{Opteron_G4}
218
219AMD Opteron 62xx class CPU (2011)
220
221
222@item @code{Opteron_G3}
223
224AMD Opteron 23xx (Gen 3 Class Opteron, 2009)
225
226
227@item @code{Opteron_G2}
228
229AMD Opteron 22xx (Gen 2 Class Opteron, 2006)
230
231
232@item @code{Opteron_G1}
233
234AMD Opteron 240 (Gen 1 Class Opteron, 2004)
235@end table
236
237@node important_cpu_features_amd_x86
238@subsubsection Important CPU features for AMD x86 hosts
239
240The following are important CPU features that should be used on AMD x86
241hosts, when available in the host CPU. Some of them require explicit
242configuration to enable, as they are not included by default in some, or all,
243of the named CPU models listed above. In general all of these features are
244included if using "Host passthrough" or "Host model".
245
246
247@table @option
248
249@item @code{ibpb}
250
251Required to enable the Spectre (CVE-2017-5753 and CVE-2017-5715) fix,
252in cases where retpolines are not sufficient.
253
254Included by default in AMD CPU models with -IBPB suffix.
255
256Must be explicitly turned on for AMD CPU models without -IBPB suffix.
257
258Requires the host CPU microcode to support this feature before it
259can be used for guest CPUs.
260
261
262@item @code{virt-ssbd}
263
264Required to enable the CVE-2018-3639 fix
265
266Not included by default in any AMD CPU model.
267
268Must be explicitly turned on for all AMD CPU models.
269
270This should be provided to guests, even if amd-ssbd is also
271provided, for maximum guest compatibility.
272
273Note for some QEMU / libvirt versions, this must be force enabled
274when when using "Host model", because this is a virtual feature
275that doesn't exist in the physical host CPUs.
276
277
278@item @code{amd-ssbd}
279
280Required to enable the CVE-2018-3639 fix
281
282Not included by default in any AMD CPU model.
283
284Must be explicitly turned on for all AMD CPU models.
285
286This provides higher performance than virt-ssbd so should be
287exposed to guests whenever available in the host. virt-ssbd
288should none the less also be exposed for maximum guest
289compatability as some kernels only know about virt-ssbd.
290
291
292@item @code{amd-no-ssb}
293
294Recommended to indicate the host is not vulnerable CVE-2018-3639
295
296Not included by default in any AMD CPU model.
297
298Future hardware genarations of CPU will not be vulnerable to
299CVE-2018-3639, and thus the guest should be told not to enable
300its mitigations, by exposing amd-no-ssb. This is mutually
301exclusive with virt-ssbd and amd-ssbd.
302
303
304@item @code{pdpe1gb}
305
306Recommended to allow guest OS to use 1GB size pages
307
308Not included by default in any AMD CPU model.
309
310Should be explicitly turned on for all AMD CPU models.
311
312Note that not all CPU hardware will support this feature.
313@end table
314
315
316@node default_cpu_models_x86
317@subsubsection Default x86 CPU models
318
319The default QEMU CPU models are designed such that they can run on all hosts.
320If an application does not wish to do perform any host compatibility checks
321before launching guests, the default is guaranteed to work.
322
323The default CPU models will, however, leave the guest OS vulnerable to various
324CPU hardware flaws, so their use is strongly discouraged. Applications should
325follow the earlier guidance to setup a better CPU configuration, with host
326passthrough recommended if live migration is not needed.
327
328@table @option
329@item @code{qemu32}
330@item @code{qemu64}
331
332QEMU Virtual CPU version 2.5+ (32 & 64 bit variants)
333
334qemu64 is used for x86_64 guests and qemu32 is used for i686 guests, when no
335-cpu argument is given to QEMU, or no <cpu> is provided in libvirt XML.
336@end table
337
338
339@node other_non_recommended_cpu_models_x86
340@subsubsection Other non-recommended x86 CPUs
341
342The following CPUs models are compatible with most AMD and Intel x86 hosts, but
343their usage is discouraged, as they expose a very limited featureset, which
344prevents guests having optimal performance.
345
346@table @option
347
348@item @code{kvm32}
349@item @code{kvm64}
350
351Common KVM processor (32 & 64 bit variants)
352
353Legacy models just for historical compatibility with ancient QEMU versions.
354
355
356@item @code{486}
357@item @code{athlon}
358@item @code{phenom}
359@item @code{coreduo}
360@item @code{core2duo}
361@item @code{n270}
362@item @code{pentium}
363@item @code{pentium2}
364@item @code{pentium3}
365
366Various very old x86 CPU models, mostly predating the introduction of
367hardware assisted virtualization, that should thus not be required for
368running virtual machines.
369@end table
370
371@node cpu_model_syntax_apps
372@subsection Syntax for configuring CPU models
373
374The example below illustrate the approach to configuring the various
375CPU models / features in QEMU and libvirt
376
377@menu
378* cpu_model_syntax_qemu:: QEMU command line
379* cpu_model_syntax_libvirt:: Libvirt guest XML
380@end menu
381
382@node cpu_model_syntax_qemu
383@subsubsection QEMU command line
384
385@table @option
386
387@item Host passthrough
388
389@example
390 $ qemu-system-x86_64 -cpu host
391@end example
392
393With feature customization:
394
395@example
396 $ qemu-system-x86_64 -cpu host,-vmx,...
397@end example
398
399@item Named CPU models
400
401@example
402 $ qemu-system-x86_64 -cpu Westmere
403@end example
404
405With feature customization:
406
407@example
408 $ qemu-system-x86_64 -cpu Westmere,+pcid,...
409@end example
410
411@end table
412
413@node cpu_model_syntax_libvirt
414@subsubsection Libvirt guest XML
415
416@table @option
417
418@item Host passthrough
419
420@example
421 <cpu mode='host-passthrough'/>
422@end example
423
424With feature customization:
425
426@example
427 <cpu mode='host-passthrough'>
428 <feature name="vmx" policy="disable"/>
429 ...
430 </cpu>
431@end example
432
433@item Host model
434
435@example
436 <cpu mode='host-model'/>
437@end example
438
439With feature customization:
440
441@example
442 <cpu mode='host-model'>
443 <feature name="vmx" policy="disable"/>
444 ...
445 </cpu>
446@end example
447
448@item Named model
449
450@example
451 <cpu mode='custom'>
452 <model name="Westmere"/>
453 </cpu>
454@end example
455
456With feature customization:
457
458@example
459 <cpu mode='custom'>
460 <model name="Westmere"/>
461 <feature name="pcid" policy="require"/>
462 ...
463 </cpu>
464@end example
465
466@end table
467
468@c man end
469
470@ignore
471
472@setfilename qemu-cpu-models
473@settitle QEMU / KVM CPU model configuration
474
475@c man begin SEEALSO
476The HTML documentation of QEMU for more precise information and Linux
477user mode emulator invocation.
478@c man end
479
480@c man begin AUTHOR
481Daniel P. Berrange
482@c man end
483
484@end ignore