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Commit | Line | Data |
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0791bc02 LV |
1 | Virtual System Controller |
2 | ========================= | |
3 | ||
4 | This device is a simple interface defined for the pure virtual machine with no | |
5 | hardware reference implementation to allow the guest kernel to send command | |
6 | to the host hypervisor. | |
7 | ||
8 | The specification can evolve, the current state is defined as below. | |
9 | ||
10 | This is a MMIO mapped device using 256 bytes. | |
11 | ||
12 | Two 32bit registers are defined: | |
13 | ||
14 | 1- the features register (read-only, address 0x00) | |
15 | ||
16 | This register allows the device to report features supported by the | |
17 | controller. | |
18 | The only feature supported for the moment is power control (0x01). | |
19 | ||
20 | 2- the command register (write-only, address 0x04) | |
21 | ||
22 | This register allows the kernel to send the commands to the hypervisor. | |
23 | The implemented commands are part of the power control feature and | |
24 | are reset (1), halt (2) and panic (3). | |
25 | A basic command, no-op (0), is always present and can be used to test the | |
26 | register access. This command has no effect. |