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b94d5230 DW |
1 | /* |
2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of version 2 of the GNU General Public License as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | */ | |
13 | #include <linux/list_sort.h> | |
14 | #include <linux/libnvdimm.h> | |
15 | #include <linux/module.h> | |
047fc8a1 | 16 | #include <linux/mutex.h> |
62232e45 | 17 | #include <linux/ndctl.h> |
37b137ff | 18 | #include <linux/sysfs.h> |
0caeef63 | 19 | #include <linux/delay.h> |
b94d5230 DW |
20 | #include <linux/list.h> |
21 | #include <linux/acpi.h> | |
eaf96153 | 22 | #include <linux/sort.h> |
047fc8a1 | 23 | #include <linux/io.h> |
1cf03c00 | 24 | #include <linux/nd.h> |
96601adb | 25 | #include <asm/cacheflush.h> |
b94d5230 DW |
26 | #include "nfit.h" |
27 | ||
047fc8a1 RZ |
28 | /* |
29 | * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is | |
30 | * irrelevant. | |
31 | */ | |
2f8e2c87 | 32 | #include <linux/io-64-nonatomic-hi-lo.h> |
047fc8a1 | 33 | |
4d88a97a DW |
34 | static bool force_enable_dimms; |
35 | module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR); | |
36 | MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status"); | |
37 | ||
1cf03c00 DW |
38 | static unsigned int scrub_timeout = NFIT_ARS_TIMEOUT; |
39 | module_param(scrub_timeout, uint, S_IRUGO|S_IWUSR); | |
40 | MODULE_PARM_DESC(scrub_timeout, "Initial scrub timeout in seconds"); | |
41 | ||
42 | /* after three payloads of overflow, it's dead jim */ | |
43 | static unsigned int scrub_overflow_abort = 3; | |
44 | module_param(scrub_overflow_abort, uint, S_IRUGO|S_IWUSR); | |
45 | MODULE_PARM_DESC(scrub_overflow_abort, | |
46 | "Number of times we overflow ARS results before abort"); | |
47 | ||
87554098 DW |
48 | static bool disable_vendor_specific; |
49 | module_param(disable_vendor_specific, bool, S_IRUGO); | |
50 | MODULE_PARM_DESC(disable_vendor_specific, | |
f2668fa7 | 51 | "Limit commands to the publicly specified set"); |
87554098 | 52 | |
095ab4b3 LK |
53 | static unsigned long override_dsm_mask; |
54 | module_param(override_dsm_mask, ulong, S_IRUGO); | |
55 | MODULE_PARM_DESC(override_dsm_mask, "Bitmask of allowed NVDIMM DSM functions"); | |
56 | ||
ba650cfc LK |
57 | static int default_dsm_family = -1; |
58 | module_param(default_dsm_family, int, S_IRUGO); | |
59 | MODULE_PARM_DESC(default_dsm_family, | |
60 | "Try this DSM type first when identifying NVDIMM family"); | |
61 | ||
6839a6d9 VV |
62 | LIST_HEAD(acpi_descs); |
63 | DEFINE_MUTEX(acpi_desc_lock); | |
64 | ||
7ae0fa43 DW |
65 | static struct workqueue_struct *nfit_wq; |
66 | ||
20985164 VV |
67 | struct nfit_table_prev { |
68 | struct list_head spas; | |
69 | struct list_head memdevs; | |
70 | struct list_head dcrs; | |
71 | struct list_head bdws; | |
72 | struct list_head idts; | |
73 | struct list_head flushes; | |
74 | }; | |
75 | ||
41c8bdb3 | 76 | static guid_t nfit_uuid[NFIT_UUID_MAX]; |
b94d5230 | 77 | |
41c8bdb3 | 78 | const guid_t *to_nfit_uuid(enum nfit_uuids id) |
b94d5230 | 79 | { |
41c8bdb3 | 80 | return &nfit_uuid[id]; |
b94d5230 | 81 | } |
6bc75619 | 82 | EXPORT_SYMBOL(to_nfit_uuid); |
b94d5230 | 83 | |
62232e45 DW |
84 | static struct acpi_nfit_desc *to_acpi_nfit_desc( |
85 | struct nvdimm_bus_descriptor *nd_desc) | |
86 | { | |
87 | return container_of(nd_desc, struct acpi_nfit_desc, nd_desc); | |
88 | } | |
89 | ||
90 | static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc) | |
91 | { | |
92 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
93 | ||
94 | /* | |
95 | * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct | |
96 | * acpi_device. | |
97 | */ | |
98 | if (!nd_desc->provider_name | |
99 | || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0) | |
100 | return NULL; | |
101 | ||
102 | return to_acpi_device(acpi_desc->dev); | |
103 | } | |
104 | ||
d6eb270c | 105 | static int xlat_bus_status(void *buf, unsigned int cmd, u32 status) |
aef25338 | 106 | { |
d4f32367 | 107 | struct nd_cmd_clear_error *clear_err; |
aef25338 | 108 | struct nd_cmd_ars_status *ars_status; |
aef25338 DW |
109 | u16 flags; |
110 | ||
111 | switch (cmd) { | |
112 | case ND_CMD_ARS_CAP: | |
11294d63 | 113 | if ((status & 0xffff) == NFIT_ARS_CAP_NONE) |
aef25338 DW |
114 | return -ENOTTY; |
115 | ||
116 | /* Command failed */ | |
11294d63 | 117 | if (status & 0xffff) |
aef25338 DW |
118 | return -EIO; |
119 | ||
120 | /* No supported scan types for this range */ | |
121 | flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE; | |
11294d63 | 122 | if ((status >> 16 & flags) == 0) |
aef25338 | 123 | return -ENOTTY; |
9a901f54 | 124 | return 0; |
aef25338 | 125 | case ND_CMD_ARS_START: |
aef25338 | 126 | /* ARS is in progress */ |
11294d63 | 127 | if ((status & 0xffff) == NFIT_ARS_START_BUSY) |
aef25338 DW |
128 | return -EBUSY; |
129 | ||
130 | /* Command failed */ | |
11294d63 | 131 | if (status & 0xffff) |
aef25338 | 132 | return -EIO; |
9a901f54 | 133 | return 0; |
aef25338 DW |
134 | case ND_CMD_ARS_STATUS: |
135 | ars_status = buf; | |
136 | /* Command failed */ | |
11294d63 | 137 | if (status & 0xffff) |
aef25338 DW |
138 | return -EIO; |
139 | /* Check extended status (Upper two bytes) */ | |
11294d63 | 140 | if (status == NFIT_ARS_STATUS_DONE) |
aef25338 DW |
141 | return 0; |
142 | ||
143 | /* ARS is in progress */ | |
11294d63 | 144 | if (status == NFIT_ARS_STATUS_BUSY) |
aef25338 DW |
145 | return -EBUSY; |
146 | ||
147 | /* No ARS performed for the current boot */ | |
11294d63 | 148 | if (status == NFIT_ARS_STATUS_NONE) |
aef25338 DW |
149 | return -EAGAIN; |
150 | ||
151 | /* | |
152 | * ARS interrupted, either we overflowed or some other | |
153 | * agent wants the scan to stop. If we didn't overflow | |
154 | * then just continue with the returned results. | |
155 | */ | |
11294d63 | 156 | if (status == NFIT_ARS_STATUS_INTR) { |
82aa37cf DW |
157 | if (ars_status->out_length >= 40 && (ars_status->flags |
158 | & NFIT_ARS_F_OVERFLOW)) | |
aef25338 DW |
159 | return -ENOSPC; |
160 | return 0; | |
161 | } | |
162 | ||
163 | /* Unknown status */ | |
11294d63 | 164 | if (status >> 16) |
aef25338 | 165 | return -EIO; |
9a901f54 | 166 | return 0; |
d4f32367 DW |
167 | case ND_CMD_CLEAR_ERROR: |
168 | clear_err = buf; | |
11294d63 | 169 | if (status & 0xffff) |
d4f32367 DW |
170 | return -EIO; |
171 | if (!clear_err->cleared) | |
172 | return -EIO; | |
173 | if (clear_err->length > clear_err->cleared) | |
174 | return clear_err->cleared; | |
9a901f54 | 175 | return 0; |
aef25338 DW |
176 | default: |
177 | break; | |
178 | } | |
179 | ||
11294d63 DW |
180 | /* all other non-zero status results in an error */ |
181 | if (status) | |
182 | return -EIO; | |
aef25338 DW |
183 | return 0; |
184 | } | |
185 | ||
4b27db7e DW |
186 | #define ACPI_LABELS_LOCKED 3 |
187 | ||
188 | static int xlat_nvdimm_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd, | |
189 | u32 status) | |
9d62ed96 | 190 | { |
4b27db7e DW |
191 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
192 | ||
9d62ed96 DW |
193 | switch (cmd) { |
194 | case ND_CMD_GET_CONFIG_SIZE: | |
4b27db7e DW |
195 | /* |
196 | * In the _LSI, _LSR, _LSW case the locked status is | |
197 | * communicated via the read/write commands | |
198 | */ | |
199 | if (nfit_mem->has_lsi) | |
200 | break; | |
201 | ||
9d62ed96 DW |
202 | if (status >> 16 & ND_CONFIG_LOCKED) |
203 | return -EACCES; | |
204 | break; | |
4b27db7e DW |
205 | case ND_CMD_GET_CONFIG_DATA: |
206 | if (nfit_mem->has_lsr && status == ACPI_LABELS_LOCKED) | |
207 | return -EACCES; | |
208 | break; | |
209 | case ND_CMD_SET_CONFIG_DATA: | |
210 | if (nfit_mem->has_lsw && status == ACPI_LABELS_LOCKED) | |
211 | return -EACCES; | |
212 | break; | |
9d62ed96 DW |
213 | default: |
214 | break; | |
215 | } | |
216 | ||
217 | /* all other non-zero status results in an error */ | |
218 | if (status) | |
219 | return -EIO; | |
220 | return 0; | |
221 | } | |
222 | ||
d6eb270c DW |
223 | static int xlat_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd, |
224 | u32 status) | |
225 | { | |
226 | if (!nvdimm) | |
227 | return xlat_bus_status(buf, cmd, status); | |
4b27db7e DW |
228 | return xlat_nvdimm_status(nvdimm, buf, cmd, status); |
229 | } | |
230 | ||
231 | /* convert _LS{I,R} packages to the buffer object acpi_nfit_ctl expects */ | |
232 | static union acpi_object *pkg_to_buf(union acpi_object *pkg) | |
233 | { | |
234 | int i; | |
235 | void *dst; | |
236 | size_t size = 0; | |
237 | union acpi_object *buf = NULL; | |
238 | ||
239 | if (pkg->type != ACPI_TYPE_PACKAGE) { | |
240 | WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n", | |
241 | pkg->type); | |
242 | goto err; | |
243 | } | |
244 | ||
245 | for (i = 0; i < pkg->package.count; i++) { | |
246 | union acpi_object *obj = &pkg->package.elements[i]; | |
247 | ||
248 | if (obj->type == ACPI_TYPE_INTEGER) | |
249 | size += 4; | |
250 | else if (obj->type == ACPI_TYPE_BUFFER) | |
251 | size += obj->buffer.length; | |
252 | else { | |
253 | WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n", | |
254 | obj->type); | |
255 | goto err; | |
256 | } | |
257 | } | |
258 | ||
259 | buf = ACPI_ALLOCATE(sizeof(*buf) + size); | |
260 | if (!buf) | |
261 | goto err; | |
262 | ||
263 | dst = buf + 1; | |
264 | buf->type = ACPI_TYPE_BUFFER; | |
265 | buf->buffer.length = size; | |
266 | buf->buffer.pointer = dst; | |
267 | for (i = 0; i < pkg->package.count; i++) { | |
268 | union acpi_object *obj = &pkg->package.elements[i]; | |
269 | ||
270 | if (obj->type == ACPI_TYPE_INTEGER) { | |
271 | memcpy(dst, &obj->integer.value, 4); | |
272 | dst += 4; | |
273 | } else if (obj->type == ACPI_TYPE_BUFFER) { | |
274 | memcpy(dst, obj->buffer.pointer, obj->buffer.length); | |
275 | dst += obj->buffer.length; | |
276 | } | |
277 | } | |
278 | err: | |
279 | ACPI_FREE(pkg); | |
280 | return buf; | |
281 | } | |
282 | ||
283 | static union acpi_object *int_to_buf(union acpi_object *integer) | |
284 | { | |
285 | union acpi_object *buf = ACPI_ALLOCATE(sizeof(*buf) + 4); | |
286 | void *dst = NULL; | |
287 | ||
288 | if (!buf) | |
289 | goto err; | |
290 | ||
291 | if (integer->type != ACPI_TYPE_INTEGER) { | |
292 | WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n", | |
293 | integer->type); | |
294 | goto err; | |
295 | } | |
296 | ||
297 | dst = buf + 1; | |
298 | buf->type = ACPI_TYPE_BUFFER; | |
299 | buf->buffer.length = 4; | |
300 | buf->buffer.pointer = dst; | |
301 | memcpy(dst, &integer->integer.value, 4); | |
302 | err: | |
303 | ACPI_FREE(integer); | |
304 | return buf; | |
305 | } | |
306 | ||
307 | static union acpi_object *acpi_label_write(acpi_handle handle, u32 offset, | |
308 | u32 len, void *data) | |
309 | { | |
310 | acpi_status rc; | |
311 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; | |
312 | struct acpi_object_list input = { | |
313 | .count = 3, | |
314 | .pointer = (union acpi_object []) { | |
315 | [0] = { | |
316 | .integer.type = ACPI_TYPE_INTEGER, | |
317 | .integer.value = offset, | |
318 | }, | |
319 | [1] = { | |
320 | .integer.type = ACPI_TYPE_INTEGER, | |
321 | .integer.value = len, | |
322 | }, | |
323 | [2] = { | |
324 | .buffer.type = ACPI_TYPE_BUFFER, | |
325 | .buffer.pointer = data, | |
326 | .buffer.length = len, | |
327 | }, | |
328 | }, | |
329 | }; | |
330 | ||
331 | rc = acpi_evaluate_object(handle, "_LSW", &input, &buf); | |
332 | if (ACPI_FAILURE(rc)) | |
333 | return NULL; | |
334 | return int_to_buf(buf.pointer); | |
335 | } | |
336 | ||
337 | static union acpi_object *acpi_label_read(acpi_handle handle, u32 offset, | |
338 | u32 len) | |
339 | { | |
340 | acpi_status rc; | |
341 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; | |
342 | struct acpi_object_list input = { | |
343 | .count = 2, | |
344 | .pointer = (union acpi_object []) { | |
345 | [0] = { | |
346 | .integer.type = ACPI_TYPE_INTEGER, | |
347 | .integer.value = offset, | |
348 | }, | |
349 | [1] = { | |
350 | .integer.type = ACPI_TYPE_INTEGER, | |
351 | .integer.value = len, | |
352 | }, | |
353 | }, | |
354 | }; | |
355 | ||
356 | rc = acpi_evaluate_object(handle, "_LSR", &input, &buf); | |
357 | if (ACPI_FAILURE(rc)) | |
358 | return NULL; | |
359 | return pkg_to_buf(buf.pointer); | |
360 | } | |
361 | ||
362 | static union acpi_object *acpi_label_info(acpi_handle handle) | |
363 | { | |
364 | acpi_status rc; | |
365 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; | |
366 | ||
367 | rc = acpi_evaluate_object(handle, "_LSI", NULL, &buf); | |
368 | if (ACPI_FAILURE(rc)) | |
369 | return NULL; | |
370 | return pkg_to_buf(buf.pointer); | |
d6eb270c DW |
371 | } |
372 | ||
11e14270 DW |
373 | static u8 nfit_dsm_revid(unsigned family, unsigned func) |
374 | { | |
375 | static const u8 revid_table[NVDIMM_FAMILY_MAX+1][32] = { | |
376 | [NVDIMM_FAMILY_INTEL] = { | |
377 | [NVDIMM_INTEL_GET_MODES] = 2, | |
378 | [NVDIMM_INTEL_GET_FWINFO] = 2, | |
379 | [NVDIMM_INTEL_START_FWUPDATE] = 2, | |
380 | [NVDIMM_INTEL_SEND_FWUPDATE] = 2, | |
381 | [NVDIMM_INTEL_FINISH_FWUPDATE] = 2, | |
382 | [NVDIMM_INTEL_QUERY_FWUPDATE] = 2, | |
383 | [NVDIMM_INTEL_SET_THRESHOLD] = 2, | |
384 | [NVDIMM_INTEL_INJECT_ERROR] = 2, | |
385 | }, | |
386 | }; | |
387 | u8 id; | |
388 | ||
389 | if (family > NVDIMM_FAMILY_MAX) | |
390 | return 0; | |
391 | if (func > 31) | |
392 | return 0; | |
393 | id = revid_table[family][func]; | |
394 | if (id == 0) | |
395 | return 1; /* default */ | |
396 | return id; | |
397 | } | |
398 | ||
a7de92da DW |
399 | int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm, |
400 | unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc) | |
b94d5230 | 401 | { |
62232e45 | 402 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); |
4b27db7e | 403 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
62232e45 | 404 | union acpi_object in_obj, in_buf, *out_obj; |
31eca76b | 405 | const struct nd_cmd_desc *desc = NULL; |
62232e45 | 406 | struct device *dev = acpi_desc->dev; |
31eca76b | 407 | struct nd_cmd_pkg *call_pkg = NULL; |
62232e45 | 408 | const char *cmd_name, *dimm_name; |
31eca76b | 409 | unsigned long cmd_mask, dsm_mask; |
11294d63 | 410 | u32 offset, fw_status = 0; |
62232e45 | 411 | acpi_handle handle; |
31eca76b | 412 | unsigned int func; |
41c8bdb3 | 413 | const guid_t *guid; |
62232e45 DW |
414 | int rc, i; |
415 | ||
31eca76b DW |
416 | func = cmd; |
417 | if (cmd == ND_CMD_CALL) { | |
418 | call_pkg = buf; | |
419 | func = call_pkg->nd_command; | |
9edcad53 MX |
420 | |
421 | for (i = 0; i < ARRAY_SIZE(call_pkg->nd_reserved2); i++) | |
422 | if (call_pkg->nd_reserved2[i]) | |
423 | return -EINVAL; | |
31eca76b DW |
424 | } |
425 | ||
62232e45 | 426 | if (nvdimm) { |
62232e45 DW |
427 | struct acpi_device *adev = nfit_mem->adev; |
428 | ||
429 | if (!adev) | |
430 | return -ENOTTY; | |
31eca76b DW |
431 | if (call_pkg && nfit_mem->family != call_pkg->nd_family) |
432 | return -ENOTTY; | |
433 | ||
047fc8a1 | 434 | dimm_name = nvdimm_name(nvdimm); |
62232e45 | 435 | cmd_name = nvdimm_cmd_name(cmd); |
e3654eca | 436 | cmd_mask = nvdimm_cmd_mask(nvdimm); |
62232e45 DW |
437 | dsm_mask = nfit_mem->dsm_mask; |
438 | desc = nd_cmd_dimm_desc(cmd); | |
41c8bdb3 | 439 | guid = to_nfit_uuid(nfit_mem->family); |
62232e45 DW |
440 | handle = adev->handle; |
441 | } else { | |
442 | struct acpi_device *adev = to_acpi_dev(acpi_desc); | |
443 | ||
444 | cmd_name = nvdimm_bus_cmd_name(cmd); | |
e3654eca | 445 | cmd_mask = nd_desc->cmd_mask; |
31eca76b | 446 | dsm_mask = cmd_mask; |
7db5bb33 JH |
447 | if (cmd == ND_CMD_CALL) |
448 | dsm_mask = nd_desc->bus_dsm_mask; | |
62232e45 | 449 | desc = nd_cmd_bus_desc(cmd); |
41c8bdb3 | 450 | guid = to_nfit_uuid(NFIT_DEV_BUS); |
62232e45 DW |
451 | handle = adev->handle; |
452 | dimm_name = "bus"; | |
453 | } | |
454 | ||
455 | if (!desc || (cmd && (desc->out_num + desc->in_num == 0))) | |
456 | return -ENOTTY; | |
457 | ||
31eca76b | 458 | if (!test_bit(cmd, &cmd_mask) || !test_bit(func, &dsm_mask)) |
62232e45 DW |
459 | return -ENOTTY; |
460 | ||
461 | in_obj.type = ACPI_TYPE_PACKAGE; | |
462 | in_obj.package.count = 1; | |
463 | in_obj.package.elements = &in_buf; | |
464 | in_buf.type = ACPI_TYPE_BUFFER; | |
465 | in_buf.buffer.pointer = buf; | |
466 | in_buf.buffer.length = 0; | |
467 | ||
468 | /* libnvdimm has already validated the input envelope */ | |
469 | for (i = 0; i < desc->in_num; i++) | |
470 | in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc, | |
471 | i, buf); | |
472 | ||
31eca76b DW |
473 | if (call_pkg) { |
474 | /* skip over package wrapper */ | |
475 | in_buf.buffer.pointer = (void *) &call_pkg->nd_payload; | |
476 | in_buf.buffer.length = call_pkg->nd_size_in; | |
477 | } | |
478 | ||
7699a6a3 DW |
479 | dev_dbg(dev, "%s:%s cmd: %d: func: %d input length: %d\n", |
480 | __func__, dimm_name, cmd, func, in_buf.buffer.length); | |
481 | print_hex_dump_debug("nvdimm in ", DUMP_PREFIX_OFFSET, 4, 4, | |
31eca76b DW |
482 | in_buf.buffer.pointer, |
483 | min_t(u32, 256, in_buf.buffer.length), true); | |
62232e45 | 484 | |
4b27db7e | 485 | /* call the BIOS, prefer the named methods over _DSM if available */ |
0e7f0741 | 486 | if (nvdimm && cmd == ND_CMD_GET_CONFIG_SIZE && nfit_mem->has_lsi) |
4b27db7e | 487 | out_obj = acpi_label_info(handle); |
0e7f0741 | 488 | else if (nvdimm && cmd == ND_CMD_GET_CONFIG_DATA && nfit_mem->has_lsr) { |
4b27db7e DW |
489 | struct nd_cmd_get_config_data_hdr *p = buf; |
490 | ||
491 | out_obj = acpi_label_read(handle, p->in_offset, p->in_length); | |
0e7f0741 DW |
492 | } else if (nvdimm && cmd == ND_CMD_SET_CONFIG_DATA |
493 | && nfit_mem->has_lsw) { | |
4b27db7e DW |
494 | struct nd_cmd_set_config_hdr *p = buf; |
495 | ||
496 | out_obj = acpi_label_write(handle, p->in_offset, p->in_length, | |
497 | p->in_buf); | |
11e14270 DW |
498 | } else { |
499 | u8 revid; | |
500 | ||
0e7f0741 | 501 | if (nvdimm) |
11e14270 DW |
502 | revid = nfit_dsm_revid(nfit_mem->family, func); |
503 | else | |
504 | revid = 1; | |
505 | out_obj = acpi_evaluate_dsm(handle, guid, revid, func, &in_obj); | |
506 | } | |
4b27db7e | 507 | |
62232e45 DW |
508 | if (!out_obj) { |
509 | dev_dbg(dev, "%s:%s _DSM failed cmd: %s\n", __func__, dimm_name, | |
510 | cmd_name); | |
511 | return -EINVAL; | |
512 | } | |
513 | ||
31eca76b DW |
514 | if (call_pkg) { |
515 | call_pkg->nd_fw_size = out_obj->buffer.length; | |
516 | memcpy(call_pkg->nd_payload + call_pkg->nd_size_in, | |
517 | out_obj->buffer.pointer, | |
518 | min(call_pkg->nd_fw_size, call_pkg->nd_size_out)); | |
519 | ||
520 | ACPI_FREE(out_obj); | |
521 | /* | |
522 | * Need to support FW function w/o known size in advance. | |
523 | * Caller can determine required size based upon nd_fw_size. | |
524 | * If we return an error (like elsewhere) then caller wouldn't | |
525 | * be able to rely upon data returned to make calculation. | |
526 | */ | |
527 | return 0; | |
528 | } | |
529 | ||
62232e45 DW |
530 | if (out_obj->package.type != ACPI_TYPE_BUFFER) { |
531 | dev_dbg(dev, "%s:%s unexpected output object type cmd: %s type: %d\n", | |
532 | __func__, dimm_name, cmd_name, out_obj->type); | |
533 | rc = -EINVAL; | |
534 | goto out; | |
535 | } | |
536 | ||
7699a6a3 DW |
537 | dev_dbg(dev, "%s:%s cmd: %s output length: %d\n", __func__, dimm_name, |
538 | cmd_name, out_obj->buffer.length); | |
539 | print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4, 4, | |
540 | out_obj->buffer.pointer, | |
541 | min_t(u32, 128, out_obj->buffer.length), true); | |
62232e45 DW |
542 | |
543 | for (i = 0, offset = 0; i < desc->out_num; i++) { | |
544 | u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf, | |
efda1b5d DW |
545 | (u32 *) out_obj->buffer.pointer, |
546 | out_obj->buffer.length - offset); | |
62232e45 DW |
547 | |
548 | if (offset + out_size > out_obj->buffer.length) { | |
549 | dev_dbg(dev, "%s:%s output object underflow cmd: %s field: %d\n", | |
550 | __func__, dimm_name, cmd_name, i); | |
551 | break; | |
552 | } | |
553 | ||
554 | if (in_buf.buffer.length + offset + out_size > buf_len) { | |
555 | dev_dbg(dev, "%s:%s output overrun cmd: %s field: %d\n", | |
556 | __func__, dimm_name, cmd_name, i); | |
557 | rc = -ENXIO; | |
558 | goto out; | |
559 | } | |
560 | memcpy(buf + in_buf.buffer.length + offset, | |
561 | out_obj->buffer.pointer + offset, out_size); | |
562 | offset += out_size; | |
563 | } | |
11294d63 DW |
564 | |
565 | /* | |
566 | * Set fw_status for all the commands with a known format to be | |
567 | * later interpreted by xlat_status(). | |
568 | */ | |
0e7f0741 DW |
569 | if (i >= 1 && ((!nvdimm && cmd >= ND_CMD_ARS_CAP |
570 | && cmd <= ND_CMD_CLEAR_ERROR) | |
571 | || (nvdimm && cmd >= ND_CMD_SMART | |
572 | && cmd <= ND_CMD_VENDOR))) | |
11294d63 DW |
573 | fw_status = *(u32 *) out_obj->buffer.pointer; |
574 | ||
62232e45 DW |
575 | if (offset + in_buf.buffer.length < buf_len) { |
576 | if (i >= 1) { | |
577 | /* | |
578 | * status valid, return the number of bytes left | |
579 | * unfilled in the output buffer | |
580 | */ | |
581 | rc = buf_len - offset - in_buf.buffer.length; | |
aef25338 | 582 | if (cmd_rc) |
d6eb270c DW |
583 | *cmd_rc = xlat_status(nvdimm, buf, cmd, |
584 | fw_status); | |
62232e45 DW |
585 | } else { |
586 | dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n", | |
587 | __func__, dimm_name, cmd_name, buf_len, | |
588 | offset); | |
589 | rc = -ENXIO; | |
590 | } | |
2eea6582 | 591 | } else { |
62232e45 | 592 | rc = 0; |
2eea6582 | 593 | if (cmd_rc) |
d6eb270c | 594 | *cmd_rc = xlat_status(nvdimm, buf, cmd, fw_status); |
2eea6582 | 595 | } |
62232e45 DW |
596 | |
597 | out: | |
598 | ACPI_FREE(out_obj); | |
599 | ||
600 | return rc; | |
b94d5230 | 601 | } |
a7de92da | 602 | EXPORT_SYMBOL_GPL(acpi_nfit_ctl); |
b94d5230 DW |
603 | |
604 | static const char *spa_type_name(u16 type) | |
605 | { | |
606 | static const char *to_name[] = { | |
607 | [NFIT_SPA_VOLATILE] = "volatile", | |
608 | [NFIT_SPA_PM] = "pmem", | |
609 | [NFIT_SPA_DCR] = "dimm-control-region", | |
610 | [NFIT_SPA_BDW] = "block-data-window", | |
611 | [NFIT_SPA_VDISK] = "volatile-disk", | |
612 | [NFIT_SPA_VCD] = "volatile-cd", | |
613 | [NFIT_SPA_PDISK] = "persistent-disk", | |
614 | [NFIT_SPA_PCD] = "persistent-cd", | |
615 | ||
616 | }; | |
617 | ||
618 | if (type > NFIT_SPA_PCD) | |
619 | return "unknown"; | |
620 | ||
621 | return to_name[type]; | |
622 | } | |
623 | ||
6839a6d9 | 624 | int nfit_spa_type(struct acpi_nfit_system_address *spa) |
b94d5230 DW |
625 | { |
626 | int i; | |
627 | ||
628 | for (i = 0; i < NFIT_UUID_MAX; i++) | |
41c8bdb3 | 629 | if (guid_equal(to_nfit_uuid(i), (guid_t *)&spa->range_guid)) |
b94d5230 DW |
630 | return i; |
631 | return -1; | |
632 | } | |
633 | ||
634 | static bool add_spa(struct acpi_nfit_desc *acpi_desc, | |
20985164 | 635 | struct nfit_table_prev *prev, |
b94d5230 DW |
636 | struct acpi_nfit_system_address *spa) |
637 | { | |
638 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
639 | struct nfit_spa *nfit_spa; |
640 | ||
31932041 DW |
641 | if (spa->header.length != sizeof(*spa)) |
642 | return false; | |
643 | ||
20985164 | 644 | list_for_each_entry(nfit_spa, &prev->spas, list) { |
31932041 | 645 | if (memcmp(nfit_spa->spa, spa, sizeof(*spa)) == 0) { |
20985164 VV |
646 | list_move_tail(&nfit_spa->list, &acpi_desc->spas); |
647 | return true; | |
648 | } | |
649 | } | |
b94d5230 | 650 | |
31932041 DW |
651 | nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa) + sizeof(*spa), |
652 | GFP_KERNEL); | |
b94d5230 DW |
653 | if (!nfit_spa) |
654 | return false; | |
655 | INIT_LIST_HEAD(&nfit_spa->list); | |
31932041 | 656 | memcpy(nfit_spa->spa, spa, sizeof(*spa)); |
b94d5230 DW |
657 | list_add_tail(&nfit_spa->list, &acpi_desc->spas); |
658 | dev_dbg(dev, "%s: spa index: %d type: %s\n", __func__, | |
659 | spa->range_index, | |
660 | spa_type_name(nfit_spa_type(spa))); | |
661 | return true; | |
662 | } | |
663 | ||
664 | static bool add_memdev(struct acpi_nfit_desc *acpi_desc, | |
20985164 | 665 | struct nfit_table_prev *prev, |
b94d5230 DW |
666 | struct acpi_nfit_memory_map *memdev) |
667 | { | |
668 | struct device *dev = acpi_desc->dev; | |
20985164 | 669 | struct nfit_memdev *nfit_memdev; |
b94d5230 | 670 | |
31932041 DW |
671 | if (memdev->header.length != sizeof(*memdev)) |
672 | return false; | |
673 | ||
20985164 | 674 | list_for_each_entry(nfit_memdev, &prev->memdevs, list) |
31932041 | 675 | if (memcmp(nfit_memdev->memdev, memdev, sizeof(*memdev)) == 0) { |
20985164 VV |
676 | list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
677 | return true; | |
678 | } | |
679 | ||
31932041 DW |
680 | nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev) + sizeof(*memdev), |
681 | GFP_KERNEL); | |
b94d5230 DW |
682 | if (!nfit_memdev) |
683 | return false; | |
684 | INIT_LIST_HEAD(&nfit_memdev->list); | |
31932041 | 685 | memcpy(nfit_memdev->memdev, memdev, sizeof(*memdev)); |
b94d5230 | 686 | list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
caa603aa | 687 | dev_dbg(dev, "%s: memdev handle: %#x spa: %d dcr: %d flags: %#x\n", |
b94d5230 | 688 | __func__, memdev->device_handle, memdev->range_index, |
caa603aa | 689 | memdev->region_index, memdev->flags); |
b94d5230 DW |
690 | return true; |
691 | } | |
692 | ||
31932041 DW |
693 | /* |
694 | * An implementation may provide a truncated control region if no block windows | |
695 | * are defined. | |
696 | */ | |
697 | static size_t sizeof_dcr(struct acpi_nfit_control_region *dcr) | |
698 | { | |
699 | if (dcr->header.length < offsetof(struct acpi_nfit_control_region, | |
700 | window_size)) | |
701 | return 0; | |
702 | if (dcr->windows) | |
703 | return sizeof(*dcr); | |
704 | return offsetof(struct acpi_nfit_control_region, window_size); | |
705 | } | |
706 | ||
b94d5230 | 707 | static bool add_dcr(struct acpi_nfit_desc *acpi_desc, |
20985164 | 708 | struct nfit_table_prev *prev, |
b94d5230 DW |
709 | struct acpi_nfit_control_region *dcr) |
710 | { | |
711 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
712 | struct nfit_dcr *nfit_dcr; |
713 | ||
31932041 DW |
714 | if (!sizeof_dcr(dcr)) |
715 | return false; | |
716 | ||
20985164 | 717 | list_for_each_entry(nfit_dcr, &prev->dcrs, list) |
31932041 | 718 | if (memcmp(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)) == 0) { |
20985164 VV |
719 | list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
720 | return true; | |
721 | } | |
b94d5230 | 722 | |
31932041 DW |
723 | nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr) + sizeof(*dcr), |
724 | GFP_KERNEL); | |
b94d5230 DW |
725 | if (!nfit_dcr) |
726 | return false; | |
727 | INIT_LIST_HEAD(&nfit_dcr->list); | |
31932041 | 728 | memcpy(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)); |
b94d5230 DW |
729 | list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
730 | dev_dbg(dev, "%s: dcr index: %d windows: %d\n", __func__, | |
731 | dcr->region_index, dcr->windows); | |
732 | return true; | |
733 | } | |
734 | ||
735 | static bool add_bdw(struct acpi_nfit_desc *acpi_desc, | |
20985164 | 736 | struct nfit_table_prev *prev, |
b94d5230 DW |
737 | struct acpi_nfit_data_region *bdw) |
738 | { | |
739 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
740 | struct nfit_bdw *nfit_bdw; |
741 | ||
31932041 DW |
742 | if (bdw->header.length != sizeof(*bdw)) |
743 | return false; | |
20985164 | 744 | list_for_each_entry(nfit_bdw, &prev->bdws, list) |
31932041 | 745 | if (memcmp(nfit_bdw->bdw, bdw, sizeof(*bdw)) == 0) { |
20985164 VV |
746 | list_move_tail(&nfit_bdw->list, &acpi_desc->bdws); |
747 | return true; | |
748 | } | |
b94d5230 | 749 | |
31932041 DW |
750 | nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw) + sizeof(*bdw), |
751 | GFP_KERNEL); | |
b94d5230 DW |
752 | if (!nfit_bdw) |
753 | return false; | |
754 | INIT_LIST_HEAD(&nfit_bdw->list); | |
31932041 | 755 | memcpy(nfit_bdw->bdw, bdw, sizeof(*bdw)); |
b94d5230 DW |
756 | list_add_tail(&nfit_bdw->list, &acpi_desc->bdws); |
757 | dev_dbg(dev, "%s: bdw dcr: %d windows: %d\n", __func__, | |
758 | bdw->region_index, bdw->windows); | |
759 | return true; | |
760 | } | |
761 | ||
31932041 DW |
762 | static size_t sizeof_idt(struct acpi_nfit_interleave *idt) |
763 | { | |
764 | if (idt->header.length < sizeof(*idt)) | |
765 | return 0; | |
766 | return sizeof(*idt) + sizeof(u32) * (idt->line_count - 1); | |
767 | } | |
768 | ||
047fc8a1 | 769 | static bool add_idt(struct acpi_nfit_desc *acpi_desc, |
20985164 | 770 | struct nfit_table_prev *prev, |
047fc8a1 RZ |
771 | struct acpi_nfit_interleave *idt) |
772 | { | |
773 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
774 | struct nfit_idt *nfit_idt; |
775 | ||
31932041 DW |
776 | if (!sizeof_idt(idt)) |
777 | return false; | |
778 | ||
779 | list_for_each_entry(nfit_idt, &prev->idts, list) { | |
780 | if (sizeof_idt(nfit_idt->idt) != sizeof_idt(idt)) | |
781 | continue; | |
782 | ||
783 | if (memcmp(nfit_idt->idt, idt, sizeof_idt(idt)) == 0) { | |
20985164 VV |
784 | list_move_tail(&nfit_idt->list, &acpi_desc->idts); |
785 | return true; | |
786 | } | |
31932041 | 787 | } |
047fc8a1 | 788 | |
31932041 DW |
789 | nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt) + sizeof_idt(idt), |
790 | GFP_KERNEL); | |
047fc8a1 RZ |
791 | if (!nfit_idt) |
792 | return false; | |
793 | INIT_LIST_HEAD(&nfit_idt->list); | |
31932041 | 794 | memcpy(nfit_idt->idt, idt, sizeof_idt(idt)); |
047fc8a1 RZ |
795 | list_add_tail(&nfit_idt->list, &acpi_desc->idts); |
796 | dev_dbg(dev, "%s: idt index: %d num_lines: %d\n", __func__, | |
797 | idt->interleave_index, idt->line_count); | |
798 | return true; | |
799 | } | |
800 | ||
31932041 DW |
801 | static size_t sizeof_flush(struct acpi_nfit_flush_address *flush) |
802 | { | |
803 | if (flush->header.length < sizeof(*flush)) | |
804 | return 0; | |
805 | return sizeof(*flush) + sizeof(u64) * (flush->hint_count - 1); | |
806 | } | |
807 | ||
c2ad2954 | 808 | static bool add_flush(struct acpi_nfit_desc *acpi_desc, |
20985164 | 809 | struct nfit_table_prev *prev, |
c2ad2954 RZ |
810 | struct acpi_nfit_flush_address *flush) |
811 | { | |
812 | struct device *dev = acpi_desc->dev; | |
20985164 | 813 | struct nfit_flush *nfit_flush; |
c2ad2954 | 814 | |
31932041 DW |
815 | if (!sizeof_flush(flush)) |
816 | return false; | |
817 | ||
818 | list_for_each_entry(nfit_flush, &prev->flushes, list) { | |
819 | if (sizeof_flush(nfit_flush->flush) != sizeof_flush(flush)) | |
820 | continue; | |
821 | ||
822 | if (memcmp(nfit_flush->flush, flush, | |
823 | sizeof_flush(flush)) == 0) { | |
20985164 VV |
824 | list_move_tail(&nfit_flush->list, &acpi_desc->flushes); |
825 | return true; | |
826 | } | |
31932041 | 827 | } |
20985164 | 828 | |
31932041 DW |
829 | nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush) |
830 | + sizeof_flush(flush), GFP_KERNEL); | |
c2ad2954 RZ |
831 | if (!nfit_flush) |
832 | return false; | |
833 | INIT_LIST_HEAD(&nfit_flush->list); | |
31932041 | 834 | memcpy(nfit_flush->flush, flush, sizeof_flush(flush)); |
c2ad2954 RZ |
835 | list_add_tail(&nfit_flush->list, &acpi_desc->flushes); |
836 | dev_dbg(dev, "%s: nfit_flush handle: %d hint_count: %d\n", __func__, | |
837 | flush->device_handle, flush->hint_count); | |
838 | return true; | |
839 | } | |
840 | ||
20985164 VV |
841 | static void *add_table(struct acpi_nfit_desc *acpi_desc, |
842 | struct nfit_table_prev *prev, void *table, const void *end) | |
b94d5230 DW |
843 | { |
844 | struct device *dev = acpi_desc->dev; | |
845 | struct acpi_nfit_header *hdr; | |
846 | void *err = ERR_PTR(-ENOMEM); | |
847 | ||
848 | if (table >= end) | |
849 | return NULL; | |
850 | ||
851 | hdr = table; | |
564d5011 VV |
852 | if (!hdr->length) { |
853 | dev_warn(dev, "found a zero length table '%d' parsing nfit\n", | |
854 | hdr->type); | |
855 | return NULL; | |
856 | } | |
857 | ||
b94d5230 DW |
858 | switch (hdr->type) { |
859 | case ACPI_NFIT_TYPE_SYSTEM_ADDRESS: | |
20985164 | 860 | if (!add_spa(acpi_desc, prev, table)) |
b94d5230 DW |
861 | return err; |
862 | break; | |
863 | case ACPI_NFIT_TYPE_MEMORY_MAP: | |
20985164 | 864 | if (!add_memdev(acpi_desc, prev, table)) |
b94d5230 DW |
865 | return err; |
866 | break; | |
867 | case ACPI_NFIT_TYPE_CONTROL_REGION: | |
20985164 | 868 | if (!add_dcr(acpi_desc, prev, table)) |
b94d5230 DW |
869 | return err; |
870 | break; | |
871 | case ACPI_NFIT_TYPE_DATA_REGION: | |
20985164 | 872 | if (!add_bdw(acpi_desc, prev, table)) |
b94d5230 DW |
873 | return err; |
874 | break; | |
b94d5230 | 875 | case ACPI_NFIT_TYPE_INTERLEAVE: |
20985164 | 876 | if (!add_idt(acpi_desc, prev, table)) |
047fc8a1 | 877 | return err; |
b94d5230 DW |
878 | break; |
879 | case ACPI_NFIT_TYPE_FLUSH_ADDRESS: | |
20985164 | 880 | if (!add_flush(acpi_desc, prev, table)) |
c2ad2954 | 881 | return err; |
b94d5230 DW |
882 | break; |
883 | case ACPI_NFIT_TYPE_SMBIOS: | |
884 | dev_dbg(dev, "%s: smbios\n", __func__); | |
885 | break; | |
886 | default: | |
887 | dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type); | |
888 | break; | |
889 | } | |
890 | ||
891 | return table + hdr->length; | |
892 | } | |
893 | ||
894 | static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc, | |
895 | struct nfit_mem *nfit_mem) | |
896 | { | |
897 | u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle; | |
898 | u16 dcr = nfit_mem->dcr->region_index; | |
899 | struct nfit_spa *nfit_spa; | |
900 | ||
901 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { | |
902 | u16 range_index = nfit_spa->spa->range_index; | |
903 | int type = nfit_spa_type(nfit_spa->spa); | |
904 | struct nfit_memdev *nfit_memdev; | |
905 | ||
906 | if (type != NFIT_SPA_BDW) | |
907 | continue; | |
908 | ||
909 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
910 | if (nfit_memdev->memdev->range_index != range_index) | |
911 | continue; | |
912 | if (nfit_memdev->memdev->device_handle != device_handle) | |
913 | continue; | |
914 | if (nfit_memdev->memdev->region_index != dcr) | |
915 | continue; | |
916 | ||
917 | nfit_mem->spa_bdw = nfit_spa->spa; | |
918 | return; | |
919 | } | |
920 | } | |
921 | ||
922 | dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n", | |
923 | nfit_mem->spa_dcr->range_index); | |
924 | nfit_mem->bdw = NULL; | |
925 | } | |
926 | ||
6697b2cf | 927 | static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc, |
b94d5230 DW |
928 | struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa) |
929 | { | |
930 | u16 dcr = __to_nfit_memdev(nfit_mem)->region_index; | |
047fc8a1 | 931 | struct nfit_memdev *nfit_memdev; |
b94d5230 | 932 | struct nfit_bdw *nfit_bdw; |
047fc8a1 RZ |
933 | struct nfit_idt *nfit_idt; |
934 | u16 idt_idx, range_index; | |
b94d5230 | 935 | |
b94d5230 DW |
936 | list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) { |
937 | if (nfit_bdw->bdw->region_index != dcr) | |
938 | continue; | |
939 | nfit_mem->bdw = nfit_bdw->bdw; | |
940 | break; | |
941 | } | |
942 | ||
943 | if (!nfit_mem->bdw) | |
6697b2cf | 944 | return; |
b94d5230 DW |
945 | |
946 | nfit_mem_find_spa_bdw(acpi_desc, nfit_mem); | |
047fc8a1 RZ |
947 | |
948 | if (!nfit_mem->spa_bdw) | |
6697b2cf | 949 | return; |
047fc8a1 RZ |
950 | |
951 | range_index = nfit_mem->spa_bdw->range_index; | |
952 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
953 | if (nfit_memdev->memdev->range_index != range_index || | |
954 | nfit_memdev->memdev->region_index != dcr) | |
955 | continue; | |
956 | nfit_mem->memdev_bdw = nfit_memdev->memdev; | |
957 | idt_idx = nfit_memdev->memdev->interleave_index; | |
958 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { | |
959 | if (nfit_idt->idt->interleave_index != idt_idx) | |
960 | continue; | |
961 | nfit_mem->idt_bdw = nfit_idt->idt; | |
962 | break; | |
963 | } | |
964 | break; | |
965 | } | |
b94d5230 DW |
966 | } |
967 | ||
1499934d | 968 | static int __nfit_mem_init(struct acpi_nfit_desc *acpi_desc, |
b94d5230 DW |
969 | struct acpi_nfit_system_address *spa) |
970 | { | |
971 | struct nfit_mem *nfit_mem, *found; | |
972 | struct nfit_memdev *nfit_memdev; | |
1499934d | 973 | int type = spa ? nfit_spa_type(spa) : 0; |
b94d5230 DW |
974 | |
975 | switch (type) { | |
976 | case NFIT_SPA_DCR: | |
977 | case NFIT_SPA_PM: | |
978 | break; | |
979 | default: | |
1499934d DW |
980 | if (spa) |
981 | return 0; | |
b94d5230 DW |
982 | } |
983 | ||
1499934d DW |
984 | /* |
985 | * This loop runs in two modes, when a dimm is mapped the loop | |
986 | * adds memdev associations to an existing dimm, or creates a | |
987 | * dimm. In the unmapped dimm case this loop sweeps for memdev | |
988 | * instances with an invalid / zero range_index and adds those | |
989 | * dimms without spa associations. | |
990 | */ | |
b94d5230 | 991 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
ad9ac5e1 | 992 | struct nfit_flush *nfit_flush; |
6697b2cf DW |
993 | struct nfit_dcr *nfit_dcr; |
994 | u32 device_handle; | |
995 | u16 dcr; | |
b94d5230 | 996 | |
1499934d DW |
997 | if (spa && nfit_memdev->memdev->range_index != spa->range_index) |
998 | continue; | |
999 | if (!spa && nfit_memdev->memdev->range_index) | |
b94d5230 DW |
1000 | continue; |
1001 | found = NULL; | |
1002 | dcr = nfit_memdev->memdev->region_index; | |
6697b2cf | 1003 | device_handle = nfit_memdev->memdev->device_handle; |
b94d5230 | 1004 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) |
6697b2cf DW |
1005 | if (__to_nfit_memdev(nfit_mem)->device_handle |
1006 | == device_handle) { | |
b94d5230 DW |
1007 | found = nfit_mem; |
1008 | break; | |
1009 | } | |
1010 | ||
1011 | if (found) | |
1012 | nfit_mem = found; | |
1013 | else { | |
1014 | nfit_mem = devm_kzalloc(acpi_desc->dev, | |
1015 | sizeof(*nfit_mem), GFP_KERNEL); | |
1016 | if (!nfit_mem) | |
1017 | return -ENOMEM; | |
1018 | INIT_LIST_HEAD(&nfit_mem->list); | |
8cc6ddfc | 1019 | nfit_mem->acpi_desc = acpi_desc; |
6697b2cf DW |
1020 | list_add(&nfit_mem->list, &acpi_desc->dimms); |
1021 | } | |
1022 | ||
1023 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { | |
1024 | if (nfit_dcr->dcr->region_index != dcr) | |
1025 | continue; | |
1026 | /* | |
1027 | * Record the control region for the dimm. For | |
1028 | * the ACPI 6.1 case, where there are separate | |
1029 | * control regions for the pmem vs blk | |
1030 | * interfaces, be sure to record the extended | |
1031 | * blk details. | |
1032 | */ | |
1033 | if (!nfit_mem->dcr) | |
1034 | nfit_mem->dcr = nfit_dcr->dcr; | |
1035 | else if (nfit_mem->dcr->windows == 0 | |
1036 | && nfit_dcr->dcr->windows) | |
1037 | nfit_mem->dcr = nfit_dcr->dcr; | |
1038 | break; | |
1039 | } | |
1040 | ||
ad9ac5e1 | 1041 | list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) { |
e5ae3b25 DW |
1042 | struct acpi_nfit_flush_address *flush; |
1043 | u16 i; | |
1044 | ||
ad9ac5e1 DW |
1045 | if (nfit_flush->flush->device_handle != device_handle) |
1046 | continue; | |
1047 | nfit_mem->nfit_flush = nfit_flush; | |
e5ae3b25 DW |
1048 | flush = nfit_flush->flush; |
1049 | nfit_mem->flush_wpq = devm_kzalloc(acpi_desc->dev, | |
1050 | flush->hint_count | |
1051 | * sizeof(struct resource), GFP_KERNEL); | |
1052 | if (!nfit_mem->flush_wpq) | |
1053 | return -ENOMEM; | |
1054 | for (i = 0; i < flush->hint_count; i++) { | |
1055 | struct resource *res = &nfit_mem->flush_wpq[i]; | |
1056 | ||
1057 | res->start = flush->hint_address[i]; | |
1058 | res->end = res->start + 8 - 1; | |
1059 | } | |
ad9ac5e1 DW |
1060 | break; |
1061 | } | |
1062 | ||
6697b2cf DW |
1063 | if (dcr && !nfit_mem->dcr) { |
1064 | dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n", | |
1065 | spa->range_index, dcr); | |
1066 | return -ENODEV; | |
b94d5230 DW |
1067 | } |
1068 | ||
1069 | if (type == NFIT_SPA_DCR) { | |
047fc8a1 RZ |
1070 | struct nfit_idt *nfit_idt; |
1071 | u16 idt_idx; | |
1072 | ||
b94d5230 DW |
1073 | /* multiple dimms may share a SPA when interleaved */ |
1074 | nfit_mem->spa_dcr = spa; | |
1075 | nfit_mem->memdev_dcr = nfit_memdev->memdev; | |
047fc8a1 RZ |
1076 | idt_idx = nfit_memdev->memdev->interleave_index; |
1077 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { | |
1078 | if (nfit_idt->idt->interleave_index != idt_idx) | |
1079 | continue; | |
1080 | nfit_mem->idt_dcr = nfit_idt->idt; | |
1081 | break; | |
1082 | } | |
6697b2cf | 1083 | nfit_mem_init_bdw(acpi_desc, nfit_mem, spa); |
1499934d | 1084 | } else if (type == NFIT_SPA_PM) { |
b94d5230 DW |
1085 | /* |
1086 | * A single dimm may belong to multiple SPA-PM | |
1087 | * ranges, record at least one in addition to | |
1088 | * any SPA-DCR range. | |
1089 | */ | |
1090 | nfit_mem->memdev_pmem = nfit_memdev->memdev; | |
1499934d DW |
1091 | } else |
1092 | nfit_mem->memdev_dcr = nfit_memdev->memdev; | |
b94d5230 DW |
1093 | } |
1094 | ||
1095 | return 0; | |
1096 | } | |
1097 | ||
1098 | static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b) | |
1099 | { | |
1100 | struct nfit_mem *a = container_of(_a, typeof(*a), list); | |
1101 | struct nfit_mem *b = container_of(_b, typeof(*b), list); | |
1102 | u32 handleA, handleB; | |
1103 | ||
1104 | handleA = __to_nfit_memdev(a)->device_handle; | |
1105 | handleB = __to_nfit_memdev(b)->device_handle; | |
1106 | if (handleA < handleB) | |
1107 | return -1; | |
1108 | else if (handleA > handleB) | |
1109 | return 1; | |
1110 | return 0; | |
1111 | } | |
1112 | ||
1113 | static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc) | |
1114 | { | |
1115 | struct nfit_spa *nfit_spa; | |
1499934d DW |
1116 | int rc; |
1117 | ||
b94d5230 DW |
1118 | |
1119 | /* | |
1120 | * For each SPA-DCR or SPA-PMEM address range find its | |
1121 | * corresponding MEMDEV(s). From each MEMDEV find the | |
1122 | * corresponding DCR. Then, if we're operating on a SPA-DCR, | |
1123 | * try to find a SPA-BDW and a corresponding BDW that references | |
1124 | * the DCR. Throw it all into an nfit_mem object. Note, that | |
1125 | * BDWs are optional. | |
1126 | */ | |
1127 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { | |
1499934d | 1128 | rc = __nfit_mem_init(acpi_desc, nfit_spa->spa); |
b94d5230 DW |
1129 | if (rc) |
1130 | return rc; | |
1131 | } | |
1132 | ||
1499934d DW |
1133 | /* |
1134 | * If a DIMM has failed to be mapped into SPA there will be no | |
1135 | * SPA entries above. Find and register all the unmapped DIMMs | |
1136 | * for reporting and recovery purposes. | |
1137 | */ | |
1138 | rc = __nfit_mem_init(acpi_desc, NULL); | |
1139 | if (rc) | |
1140 | return rc; | |
1141 | ||
b94d5230 DW |
1142 | list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp); |
1143 | ||
1144 | return 0; | |
1145 | } | |
1146 | ||
41f95db7 JH |
1147 | static ssize_t bus_dsm_mask_show(struct device *dev, |
1148 | struct device_attribute *attr, char *buf) | |
1149 | { | |
1150 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
1151 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
1152 | ||
1153 | return sprintf(buf, "%#lx\n", nd_desc->bus_dsm_mask); | |
1154 | } | |
1155 | static struct device_attribute dev_attr_bus_dsm_mask = | |
1156 | __ATTR(dsm_mask, 0444, bus_dsm_mask_show, NULL); | |
1157 | ||
45def22c DW |
1158 | static ssize_t revision_show(struct device *dev, |
1159 | struct device_attribute *attr, char *buf) | |
1160 | { | |
1161 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
1162 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
1163 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
1164 | ||
6b577c9d | 1165 | return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision); |
45def22c DW |
1166 | } |
1167 | static DEVICE_ATTR_RO(revision); | |
1168 | ||
9ffd6350 VV |
1169 | static ssize_t hw_error_scrub_show(struct device *dev, |
1170 | struct device_attribute *attr, char *buf) | |
1171 | { | |
1172 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
1173 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
1174 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
1175 | ||
1176 | return sprintf(buf, "%d\n", acpi_desc->scrub_mode); | |
1177 | } | |
1178 | ||
1179 | /* | |
1180 | * The 'hw_error_scrub' attribute can have the following values written to it: | |
1181 | * '0': Switch to the default mode where an exception will only insert | |
1182 | * the address of the memory error into the poison and badblocks lists. | |
1183 | * '1': Enable a full scrub to happen if an exception for a memory error is | |
1184 | * received. | |
1185 | */ | |
1186 | static ssize_t hw_error_scrub_store(struct device *dev, | |
1187 | struct device_attribute *attr, const char *buf, size_t size) | |
1188 | { | |
1189 | struct nvdimm_bus_descriptor *nd_desc; | |
1190 | ssize_t rc; | |
1191 | long val; | |
1192 | ||
1193 | rc = kstrtol(buf, 0, &val); | |
1194 | if (rc) | |
1195 | return rc; | |
1196 | ||
1197 | device_lock(dev); | |
1198 | nd_desc = dev_get_drvdata(dev); | |
1199 | if (nd_desc) { | |
1200 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
1201 | ||
1202 | switch (val) { | |
1203 | case HW_ERROR_SCRUB_ON: | |
1204 | acpi_desc->scrub_mode = HW_ERROR_SCRUB_ON; | |
1205 | break; | |
1206 | case HW_ERROR_SCRUB_OFF: | |
1207 | acpi_desc->scrub_mode = HW_ERROR_SCRUB_OFF; | |
1208 | break; | |
1209 | default: | |
1210 | rc = -EINVAL; | |
1211 | break; | |
1212 | } | |
1213 | } | |
1214 | device_unlock(dev); | |
1215 | if (rc) | |
1216 | return rc; | |
1217 | return size; | |
1218 | } | |
1219 | static DEVICE_ATTR_RW(hw_error_scrub); | |
1220 | ||
37b137ff VV |
1221 | /* |
1222 | * This shows the number of full Address Range Scrubs that have been | |
1223 | * completed since driver load time. Userspace can wait on this using | |
1224 | * select/poll etc. A '+' at the end indicates an ARS is in progress | |
1225 | */ | |
1226 | static ssize_t scrub_show(struct device *dev, | |
1227 | struct device_attribute *attr, char *buf) | |
1228 | { | |
1229 | struct nvdimm_bus_descriptor *nd_desc; | |
1230 | ssize_t rc = -ENXIO; | |
1231 | ||
1232 | device_lock(dev); | |
1233 | nd_desc = dev_get_drvdata(dev); | |
1234 | if (nd_desc) { | |
1235 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
1236 | ||
1237 | rc = sprintf(buf, "%d%s", acpi_desc->scrub_count, | |
1238 | (work_busy(&acpi_desc->work)) ? "+\n" : "\n"); | |
1239 | } | |
1240 | device_unlock(dev); | |
1241 | return rc; | |
1242 | } | |
1243 | ||
37b137ff VV |
1244 | static ssize_t scrub_store(struct device *dev, |
1245 | struct device_attribute *attr, const char *buf, size_t size) | |
1246 | { | |
1247 | struct nvdimm_bus_descriptor *nd_desc; | |
1248 | ssize_t rc; | |
1249 | long val; | |
1250 | ||
1251 | rc = kstrtol(buf, 0, &val); | |
1252 | if (rc) | |
1253 | return rc; | |
1254 | if (val != 1) | |
1255 | return -EINVAL; | |
1256 | ||
1257 | device_lock(dev); | |
1258 | nd_desc = dev_get_drvdata(dev); | |
1259 | if (nd_desc) { | |
1260 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
1261 | ||
80790039 | 1262 | rc = acpi_nfit_ars_rescan(acpi_desc, 0); |
37b137ff VV |
1263 | } |
1264 | device_unlock(dev); | |
1265 | if (rc) | |
1266 | return rc; | |
1267 | return size; | |
1268 | } | |
1269 | static DEVICE_ATTR_RW(scrub); | |
1270 | ||
1271 | static bool ars_supported(struct nvdimm_bus *nvdimm_bus) | |
1272 | { | |
1273 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
1274 | const unsigned long mask = 1 << ND_CMD_ARS_CAP | 1 << ND_CMD_ARS_START | |
1275 | | 1 << ND_CMD_ARS_STATUS; | |
1276 | ||
1277 | return (nd_desc->cmd_mask & mask) == mask; | |
1278 | } | |
1279 | ||
1280 | static umode_t nfit_visible(struct kobject *kobj, struct attribute *a, int n) | |
1281 | { | |
1282 | struct device *dev = container_of(kobj, struct device, kobj); | |
1283 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
1284 | ||
1285 | if (a == &dev_attr_scrub.attr && !ars_supported(nvdimm_bus)) | |
1286 | return 0; | |
1287 | return a->mode; | |
1288 | } | |
1289 | ||
45def22c DW |
1290 | static struct attribute *acpi_nfit_attributes[] = { |
1291 | &dev_attr_revision.attr, | |
37b137ff | 1292 | &dev_attr_scrub.attr, |
9ffd6350 | 1293 | &dev_attr_hw_error_scrub.attr, |
41f95db7 | 1294 | &dev_attr_bus_dsm_mask.attr, |
45def22c DW |
1295 | NULL, |
1296 | }; | |
1297 | ||
5e93746f | 1298 | static const struct attribute_group acpi_nfit_attribute_group = { |
45def22c DW |
1299 | .name = "nfit", |
1300 | .attrs = acpi_nfit_attributes, | |
37b137ff | 1301 | .is_visible = nfit_visible, |
45def22c DW |
1302 | }; |
1303 | ||
a61fe6f7 | 1304 | static const struct attribute_group *acpi_nfit_attribute_groups[] = { |
45def22c DW |
1305 | &nvdimm_bus_attribute_group, |
1306 | &acpi_nfit_attribute_group, | |
1307 | NULL, | |
1308 | }; | |
1309 | ||
e6dfb2de DW |
1310 | static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev) |
1311 | { | |
1312 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1313 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1314 | ||
1315 | return __to_nfit_memdev(nfit_mem); | |
1316 | } | |
1317 | ||
1318 | static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev) | |
1319 | { | |
1320 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1321 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1322 | ||
1323 | return nfit_mem->dcr; | |
1324 | } | |
1325 | ||
1326 | static ssize_t handle_show(struct device *dev, | |
1327 | struct device_attribute *attr, char *buf) | |
1328 | { | |
1329 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); | |
1330 | ||
1331 | return sprintf(buf, "%#x\n", memdev->device_handle); | |
1332 | } | |
1333 | static DEVICE_ATTR_RO(handle); | |
1334 | ||
1335 | static ssize_t phys_id_show(struct device *dev, | |
1336 | struct device_attribute *attr, char *buf) | |
1337 | { | |
1338 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); | |
1339 | ||
1340 | return sprintf(buf, "%#x\n", memdev->physical_id); | |
1341 | } | |
1342 | static DEVICE_ATTR_RO(phys_id); | |
1343 | ||
1344 | static ssize_t vendor_show(struct device *dev, | |
1345 | struct device_attribute *attr, char *buf) | |
1346 | { | |
1347 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1348 | ||
5ad9a7fd | 1349 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->vendor_id)); |
e6dfb2de DW |
1350 | } |
1351 | static DEVICE_ATTR_RO(vendor); | |
1352 | ||
1353 | static ssize_t rev_id_show(struct device *dev, | |
1354 | struct device_attribute *attr, char *buf) | |
1355 | { | |
1356 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1357 | ||
5ad9a7fd | 1358 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->revision_id)); |
e6dfb2de DW |
1359 | } |
1360 | static DEVICE_ATTR_RO(rev_id); | |
1361 | ||
1362 | static ssize_t device_show(struct device *dev, | |
1363 | struct device_attribute *attr, char *buf) | |
1364 | { | |
1365 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1366 | ||
5ad9a7fd | 1367 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->device_id)); |
e6dfb2de DW |
1368 | } |
1369 | static DEVICE_ATTR_RO(device); | |
1370 | ||
6ca72085 DW |
1371 | static ssize_t subsystem_vendor_show(struct device *dev, |
1372 | struct device_attribute *attr, char *buf) | |
1373 | { | |
1374 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1375 | ||
1376 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_vendor_id)); | |
1377 | } | |
1378 | static DEVICE_ATTR_RO(subsystem_vendor); | |
1379 | ||
1380 | static ssize_t subsystem_rev_id_show(struct device *dev, | |
1381 | struct device_attribute *attr, char *buf) | |
1382 | { | |
1383 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1384 | ||
1385 | return sprintf(buf, "0x%04x\n", | |
1386 | be16_to_cpu(dcr->subsystem_revision_id)); | |
1387 | } | |
1388 | static DEVICE_ATTR_RO(subsystem_rev_id); | |
1389 | ||
1390 | static ssize_t subsystem_device_show(struct device *dev, | |
1391 | struct device_attribute *attr, char *buf) | |
1392 | { | |
1393 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1394 | ||
1395 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_device_id)); | |
1396 | } | |
1397 | static DEVICE_ATTR_RO(subsystem_device); | |
1398 | ||
8cc6ddfc DW |
1399 | static int num_nvdimm_formats(struct nvdimm *nvdimm) |
1400 | { | |
1401 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1402 | int formats = 0; | |
1403 | ||
1404 | if (nfit_mem->memdev_pmem) | |
1405 | formats++; | |
1406 | if (nfit_mem->memdev_bdw) | |
1407 | formats++; | |
1408 | return formats; | |
1409 | } | |
1410 | ||
e6dfb2de DW |
1411 | static ssize_t format_show(struct device *dev, |
1412 | struct device_attribute *attr, char *buf) | |
1413 | { | |
1414 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1415 | ||
1bcbf42d | 1416 | return sprintf(buf, "0x%04x\n", le16_to_cpu(dcr->code)); |
e6dfb2de DW |
1417 | } |
1418 | static DEVICE_ATTR_RO(format); | |
1419 | ||
8cc6ddfc DW |
1420 | static ssize_t format1_show(struct device *dev, |
1421 | struct device_attribute *attr, char *buf) | |
1422 | { | |
1423 | u32 handle; | |
1424 | ssize_t rc = -ENXIO; | |
1425 | struct nfit_mem *nfit_mem; | |
1426 | struct nfit_memdev *nfit_memdev; | |
1427 | struct acpi_nfit_desc *acpi_desc; | |
1428 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1429 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1430 | ||
1431 | nfit_mem = nvdimm_provider_data(nvdimm); | |
1432 | acpi_desc = nfit_mem->acpi_desc; | |
1433 | handle = to_nfit_memdev(dev)->device_handle; | |
1434 | ||
1435 | /* assumes DIMMs have at most 2 published interface codes */ | |
1436 | mutex_lock(&acpi_desc->init_mutex); | |
1437 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
1438 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; | |
1439 | struct nfit_dcr *nfit_dcr; | |
1440 | ||
1441 | if (memdev->device_handle != handle) | |
1442 | continue; | |
1443 | ||
1444 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { | |
1445 | if (nfit_dcr->dcr->region_index != memdev->region_index) | |
1446 | continue; | |
1447 | if (nfit_dcr->dcr->code == dcr->code) | |
1448 | continue; | |
1bcbf42d DW |
1449 | rc = sprintf(buf, "0x%04x\n", |
1450 | le16_to_cpu(nfit_dcr->dcr->code)); | |
8cc6ddfc DW |
1451 | break; |
1452 | } | |
1453 | if (rc != ENXIO) | |
1454 | break; | |
1455 | } | |
1456 | mutex_unlock(&acpi_desc->init_mutex); | |
1457 | return rc; | |
1458 | } | |
1459 | static DEVICE_ATTR_RO(format1); | |
1460 | ||
1461 | static ssize_t formats_show(struct device *dev, | |
1462 | struct device_attribute *attr, char *buf) | |
1463 | { | |
1464 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1465 | ||
1466 | return sprintf(buf, "%d\n", num_nvdimm_formats(nvdimm)); | |
1467 | } | |
1468 | static DEVICE_ATTR_RO(formats); | |
1469 | ||
e6dfb2de DW |
1470 | static ssize_t serial_show(struct device *dev, |
1471 | struct device_attribute *attr, char *buf) | |
1472 | { | |
1473 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1474 | ||
5ad9a7fd | 1475 | return sprintf(buf, "0x%08x\n", be32_to_cpu(dcr->serial_number)); |
e6dfb2de DW |
1476 | } |
1477 | static DEVICE_ATTR_RO(serial); | |
1478 | ||
a94e3fbe DW |
1479 | static ssize_t family_show(struct device *dev, |
1480 | struct device_attribute *attr, char *buf) | |
1481 | { | |
1482 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1483 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1484 | ||
1485 | if (nfit_mem->family < 0) | |
1486 | return -ENXIO; | |
1487 | return sprintf(buf, "%d\n", nfit_mem->family); | |
1488 | } | |
1489 | static DEVICE_ATTR_RO(family); | |
1490 | ||
1491 | static ssize_t dsm_mask_show(struct device *dev, | |
1492 | struct device_attribute *attr, char *buf) | |
1493 | { | |
1494 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1495 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1496 | ||
1497 | if (nfit_mem->family < 0) | |
1498 | return -ENXIO; | |
1499 | return sprintf(buf, "%#lx\n", nfit_mem->dsm_mask); | |
1500 | } | |
1501 | static DEVICE_ATTR_RO(dsm_mask); | |
1502 | ||
58138820 DW |
1503 | static ssize_t flags_show(struct device *dev, |
1504 | struct device_attribute *attr, char *buf) | |
1505 | { | |
1506 | u16 flags = to_nfit_memdev(dev)->flags; | |
1507 | ||
ffab9385 | 1508 | return sprintf(buf, "%s%s%s%s%s%s%s\n", |
402bae59 TK |
1509 | flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "", |
1510 | flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "", | |
1511 | flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "", | |
ca321d1c | 1512 | flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "", |
ffab9385 DW |
1513 | flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : "", |
1514 | flags & ACPI_NFIT_MEM_MAP_FAILED ? "map_fail " : "", | |
1515 | flags & ACPI_NFIT_MEM_HEALTH_ENABLED ? "smart_notify " : ""); | |
58138820 DW |
1516 | } |
1517 | static DEVICE_ATTR_RO(flags); | |
1518 | ||
38a879ba TK |
1519 | static ssize_t id_show(struct device *dev, |
1520 | struct device_attribute *attr, char *buf) | |
1521 | { | |
1522 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1523 | ||
1524 | if (dcr->valid_fields & ACPI_NFIT_CONTROL_MFG_INFO_VALID) | |
1525 | return sprintf(buf, "%04x-%02x-%04x-%08x\n", | |
1526 | be16_to_cpu(dcr->vendor_id), | |
1527 | dcr->manufacturing_location, | |
1528 | be16_to_cpu(dcr->manufacturing_date), | |
1529 | be32_to_cpu(dcr->serial_number)); | |
1530 | else | |
1531 | return sprintf(buf, "%04x-%08x\n", | |
1532 | be16_to_cpu(dcr->vendor_id), | |
1533 | be32_to_cpu(dcr->serial_number)); | |
1534 | } | |
1535 | static DEVICE_ATTR_RO(id); | |
1536 | ||
e6dfb2de DW |
1537 | static struct attribute *acpi_nfit_dimm_attributes[] = { |
1538 | &dev_attr_handle.attr, | |
1539 | &dev_attr_phys_id.attr, | |
1540 | &dev_attr_vendor.attr, | |
1541 | &dev_attr_device.attr, | |
6ca72085 DW |
1542 | &dev_attr_rev_id.attr, |
1543 | &dev_attr_subsystem_vendor.attr, | |
1544 | &dev_attr_subsystem_device.attr, | |
1545 | &dev_attr_subsystem_rev_id.attr, | |
e6dfb2de | 1546 | &dev_attr_format.attr, |
8cc6ddfc DW |
1547 | &dev_attr_formats.attr, |
1548 | &dev_attr_format1.attr, | |
e6dfb2de | 1549 | &dev_attr_serial.attr, |
58138820 | 1550 | &dev_attr_flags.attr, |
38a879ba | 1551 | &dev_attr_id.attr, |
a94e3fbe DW |
1552 | &dev_attr_family.attr, |
1553 | &dev_attr_dsm_mask.attr, | |
e6dfb2de DW |
1554 | NULL, |
1555 | }; | |
1556 | ||
1557 | static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj, | |
1558 | struct attribute *a, int n) | |
1559 | { | |
1560 | struct device *dev = container_of(kobj, struct device, kobj); | |
8cc6ddfc | 1561 | struct nvdimm *nvdimm = to_nvdimm(dev); |
e6dfb2de | 1562 | |
1499934d DW |
1563 | if (!to_nfit_dcr(dev)) { |
1564 | /* Without a dcr only the memdev attributes can be surfaced */ | |
1565 | if (a == &dev_attr_handle.attr || a == &dev_attr_phys_id.attr | |
1566 | || a == &dev_attr_flags.attr | |
1567 | || a == &dev_attr_family.attr | |
1568 | || a == &dev_attr_dsm_mask.attr) | |
1569 | return a->mode; | |
8cc6ddfc | 1570 | return 0; |
1499934d DW |
1571 | } |
1572 | ||
8cc6ddfc | 1573 | if (a == &dev_attr_format1.attr && num_nvdimm_formats(nvdimm) <= 1) |
e6dfb2de | 1574 | return 0; |
8cc6ddfc | 1575 | return a->mode; |
e6dfb2de DW |
1576 | } |
1577 | ||
5e93746f | 1578 | static const struct attribute_group acpi_nfit_dimm_attribute_group = { |
e6dfb2de DW |
1579 | .name = "nfit", |
1580 | .attrs = acpi_nfit_dimm_attributes, | |
1581 | .is_visible = acpi_nfit_dimm_attr_visible, | |
1582 | }; | |
1583 | ||
1584 | static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = { | |
62232e45 | 1585 | &nvdimm_attribute_group, |
4d88a97a | 1586 | &nd_device_attribute_group, |
e6dfb2de DW |
1587 | &acpi_nfit_dimm_attribute_group, |
1588 | NULL, | |
1589 | }; | |
1590 | ||
1591 | static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc, | |
1592 | u32 device_handle) | |
1593 | { | |
1594 | struct nfit_mem *nfit_mem; | |
1595 | ||
1596 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) | |
1597 | if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle) | |
1598 | return nfit_mem->nvdimm; | |
1599 | ||
1600 | return NULL; | |
1601 | } | |
1602 | ||
231bf117 | 1603 | void __acpi_nvdimm_notify(struct device *dev, u32 event) |
ba9c8dd3 DW |
1604 | { |
1605 | struct nfit_mem *nfit_mem; | |
1606 | struct acpi_nfit_desc *acpi_desc; | |
1607 | ||
1608 | dev_dbg(dev->parent, "%s: %s: event: %d\n", dev_name(dev), __func__, | |
1609 | event); | |
1610 | ||
1611 | if (event != NFIT_NOTIFY_DIMM_HEALTH) { | |
1612 | dev_dbg(dev->parent, "%s: unknown event: %d\n", dev_name(dev), | |
1613 | event); | |
1614 | return; | |
1615 | } | |
1616 | ||
1617 | acpi_desc = dev_get_drvdata(dev->parent); | |
1618 | if (!acpi_desc) | |
1619 | return; | |
1620 | ||
1621 | /* | |
1622 | * If we successfully retrieved acpi_desc, then we know nfit_mem data | |
1623 | * is still valid. | |
1624 | */ | |
1625 | nfit_mem = dev_get_drvdata(dev); | |
1626 | if (nfit_mem && nfit_mem->flags_attr) | |
1627 | sysfs_notify_dirent(nfit_mem->flags_attr); | |
1628 | } | |
231bf117 | 1629 | EXPORT_SYMBOL_GPL(__acpi_nvdimm_notify); |
ba9c8dd3 DW |
1630 | |
1631 | static void acpi_nvdimm_notify(acpi_handle handle, u32 event, void *data) | |
1632 | { | |
1633 | struct acpi_device *adev = data; | |
1634 | struct device *dev = &adev->dev; | |
1635 | ||
1636 | device_lock(dev->parent); | |
1637 | __acpi_nvdimm_notify(dev, event); | |
1638 | device_unlock(dev->parent); | |
1639 | } | |
1640 | ||
62232e45 DW |
1641 | static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc, |
1642 | struct nfit_mem *nfit_mem, u32 device_handle) | |
1643 | { | |
1644 | struct acpi_device *adev, *adev_dimm; | |
1645 | struct device *dev = acpi_desc->dev; | |
4b27db7e | 1646 | union acpi_object *obj; |
31eca76b | 1647 | unsigned long dsm_mask; |
41c8bdb3 | 1648 | const guid_t *guid; |
60e95f43 | 1649 | int i; |
ba650cfc | 1650 | int family = -1; |
62232e45 | 1651 | |
e3654eca DW |
1652 | /* nfit test assumes 1:1 relationship between commands and dsms */ |
1653 | nfit_mem->dsm_mask = acpi_desc->dimm_cmd_force_en; | |
31eca76b | 1654 | nfit_mem->family = NVDIMM_FAMILY_INTEL; |
62232e45 DW |
1655 | adev = to_acpi_dev(acpi_desc); |
1656 | if (!adev) | |
1657 | return 0; | |
1658 | ||
1659 | adev_dimm = acpi_find_child_device(adev, device_handle, false); | |
1660 | nfit_mem->adev = adev_dimm; | |
1661 | if (!adev_dimm) { | |
1662 | dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n", | |
1663 | device_handle); | |
4d88a97a | 1664 | return force_enable_dimms ? 0 : -ENODEV; |
62232e45 DW |
1665 | } |
1666 | ||
ba9c8dd3 DW |
1667 | if (ACPI_FAILURE(acpi_install_notify_handler(adev_dimm->handle, |
1668 | ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify, adev_dimm))) { | |
1669 | dev_err(dev, "%s: notification registration failed\n", | |
1670 | dev_name(&adev_dimm->dev)); | |
1671 | return -ENXIO; | |
1672 | } | |
1673 | ||
31eca76b | 1674 | /* |
e02fb726 | 1675 | * Until standardization materializes we need to consider 4 |
a7225598 | 1676 | * different command sets. Note, that checking for function0 (bit0) |
41c8bdb3 | 1677 | * tells us if any commands are reachable through this GUID. |
31eca76b | 1678 | */ |
11e14270 | 1679 | for (i = 0; i <= NVDIMM_FAMILY_MAX; i++) |
a7225598 | 1680 | if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1)) |
ba650cfc LK |
1681 | if (family < 0 || i == default_dsm_family) |
1682 | family = i; | |
31eca76b DW |
1683 | |
1684 | /* limit the supported commands to those that are publicly documented */ | |
ba650cfc | 1685 | nfit_mem->family = family; |
095ab4b3 LK |
1686 | if (override_dsm_mask && !disable_vendor_specific) |
1687 | dsm_mask = override_dsm_mask; | |
1688 | else if (nfit_mem->family == NVDIMM_FAMILY_INTEL) { | |
11e14270 | 1689 | dsm_mask = NVDIMM_INTEL_CMDMASK; |
87554098 DW |
1690 | if (disable_vendor_specific) |
1691 | dsm_mask &= ~(1 << ND_CMD_VENDOR); | |
e02fb726 | 1692 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE1) { |
31eca76b | 1693 | dsm_mask = 0x1c3c76; |
e02fb726 | 1694 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE2) { |
31eca76b | 1695 | dsm_mask = 0x1fe; |
87554098 DW |
1696 | if (disable_vendor_specific) |
1697 | dsm_mask &= ~(1 << 8); | |
e02fb726 | 1698 | } else if (nfit_mem->family == NVDIMM_FAMILY_MSFT) { |
1699 | dsm_mask = 0xffffffff; | |
87554098 | 1700 | } else { |
a7225598 | 1701 | dev_dbg(dev, "unknown dimm command family\n"); |
31eca76b | 1702 | nfit_mem->family = -1; |
a7225598 DW |
1703 | /* DSMs are optional, continue loading the driver... */ |
1704 | return 0; | |
31eca76b DW |
1705 | } |
1706 | ||
41c8bdb3 | 1707 | guid = to_nfit_uuid(nfit_mem->family); |
31eca76b | 1708 | for_each_set_bit(i, &dsm_mask, BITS_PER_LONG) |
11e14270 DW |
1709 | if (acpi_check_dsm(adev_dimm->handle, guid, |
1710 | nfit_dsm_revid(nfit_mem->family, i), | |
1711 | 1ULL << i)) | |
62232e45 DW |
1712 | set_bit(i, &nfit_mem->dsm_mask); |
1713 | ||
4b27db7e DW |
1714 | obj = acpi_label_info(adev_dimm->handle); |
1715 | if (obj) { | |
1716 | ACPI_FREE(obj); | |
1717 | nfit_mem->has_lsi = 1; | |
1718 | dev_dbg(dev, "%s: has _LSI\n", dev_name(&adev_dimm->dev)); | |
1719 | } | |
1720 | ||
1721 | obj = acpi_label_read(adev_dimm->handle, 0, 0); | |
1722 | if (obj) { | |
1723 | ACPI_FREE(obj); | |
1724 | nfit_mem->has_lsr = 1; | |
1725 | dev_dbg(dev, "%s: has _LSR\n", dev_name(&adev_dimm->dev)); | |
1726 | } | |
1727 | ||
1728 | obj = acpi_label_write(adev_dimm->handle, 0, 0, NULL); | |
1729 | if (obj) { | |
1730 | ACPI_FREE(obj); | |
1731 | nfit_mem->has_lsw = 1; | |
1732 | dev_dbg(dev, "%s: has _LSW\n", dev_name(&adev_dimm->dev)); | |
1733 | } | |
1734 | ||
60e95f43 | 1735 | return 0; |
62232e45 DW |
1736 | } |
1737 | ||
ba9c8dd3 DW |
1738 | static void shutdown_dimm_notify(void *data) |
1739 | { | |
1740 | struct acpi_nfit_desc *acpi_desc = data; | |
1741 | struct nfit_mem *nfit_mem; | |
1742 | ||
1743 | mutex_lock(&acpi_desc->init_mutex); | |
1744 | /* | |
1745 | * Clear out the nfit_mem->flags_attr and shut down dimm event | |
1746 | * notifications. | |
1747 | */ | |
1748 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { | |
231bf117 DW |
1749 | struct acpi_device *adev_dimm = nfit_mem->adev; |
1750 | ||
ba9c8dd3 DW |
1751 | if (nfit_mem->flags_attr) { |
1752 | sysfs_put(nfit_mem->flags_attr); | |
1753 | nfit_mem->flags_attr = NULL; | |
1754 | } | |
231bf117 DW |
1755 | if (adev_dimm) |
1756 | acpi_remove_notify_handler(adev_dimm->handle, | |
1757 | ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify); | |
ba9c8dd3 DW |
1758 | } |
1759 | mutex_unlock(&acpi_desc->init_mutex); | |
1760 | } | |
1761 | ||
e6dfb2de DW |
1762 | static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc) |
1763 | { | |
1764 | struct nfit_mem *nfit_mem; | |
ba9c8dd3 DW |
1765 | int dimm_count = 0, rc; |
1766 | struct nvdimm *nvdimm; | |
e6dfb2de DW |
1767 | |
1768 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { | |
e5ae3b25 | 1769 | struct acpi_nfit_flush_address *flush; |
31eca76b | 1770 | unsigned long flags = 0, cmd_mask; |
caa603aa | 1771 | struct nfit_memdev *nfit_memdev; |
e6dfb2de | 1772 | u32 device_handle; |
58138820 | 1773 | u16 mem_flags; |
e6dfb2de DW |
1774 | |
1775 | device_handle = __to_nfit_memdev(nfit_mem)->device_handle; | |
1776 | nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle); | |
1777 | if (nvdimm) { | |
20985164 | 1778 | dimm_count++; |
e6dfb2de DW |
1779 | continue; |
1780 | } | |
1781 | ||
1782 | if (nfit_mem->bdw && nfit_mem->memdev_pmem) | |
8f078b38 | 1783 | set_bit(NDD_ALIASING, &flags); |
e6dfb2de | 1784 | |
caa603aa DW |
1785 | /* collate flags across all memdevs for this dimm */ |
1786 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
1787 | struct acpi_nfit_memory_map *dimm_memdev; | |
1788 | ||
1789 | dimm_memdev = __to_nfit_memdev(nfit_mem); | |
1790 | if (dimm_memdev->device_handle | |
1791 | != nfit_memdev->memdev->device_handle) | |
1792 | continue; | |
1793 | dimm_memdev->flags |= nfit_memdev->memdev->flags; | |
1794 | } | |
1795 | ||
58138820 | 1796 | mem_flags = __to_nfit_memdev(nfit_mem)->flags; |
ca321d1c | 1797 | if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED) |
8f078b38 | 1798 | set_bit(NDD_UNARMED, &flags); |
58138820 | 1799 | |
62232e45 DW |
1800 | rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle); |
1801 | if (rc) | |
1802 | continue; | |
1803 | ||
e3654eca | 1804 | /* |
31eca76b DW |
1805 | * TODO: provide translation for non-NVDIMM_FAMILY_INTEL |
1806 | * devices (i.e. from nd_cmd to acpi_dsm) to standardize the | |
1807 | * userspace interface. | |
e3654eca | 1808 | */ |
31eca76b | 1809 | cmd_mask = 1UL << ND_CMD_CALL; |
b9b1504d DW |
1810 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) { |
1811 | /* | |
1812 | * These commands have a 1:1 correspondence | |
1813 | * between DSM payload and libnvdimm ioctl | |
1814 | * payload format. | |
1815 | */ | |
1816 | cmd_mask |= nfit_mem->dsm_mask & NVDIMM_STANDARD_CMDMASK; | |
1817 | } | |
31eca76b | 1818 | |
4b27db7e DW |
1819 | if (nfit_mem->has_lsi) |
1820 | set_bit(ND_CMD_GET_CONFIG_SIZE, &cmd_mask); | |
1821 | if (nfit_mem->has_lsr) | |
1822 | set_bit(ND_CMD_GET_CONFIG_DATA, &cmd_mask); | |
1823 | if (nfit_mem->has_lsw) | |
1824 | set_bit(ND_CMD_SET_CONFIG_DATA, &cmd_mask); | |
1825 | ||
e5ae3b25 DW |
1826 | flush = nfit_mem->nfit_flush ? nfit_mem->nfit_flush->flush |
1827 | : NULL; | |
e6dfb2de | 1828 | nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem, |
62232e45 | 1829 | acpi_nfit_dimm_attribute_groups, |
e5ae3b25 DW |
1830 | flags, cmd_mask, flush ? flush->hint_count : 0, |
1831 | nfit_mem->flush_wpq); | |
e6dfb2de DW |
1832 | if (!nvdimm) |
1833 | return -ENOMEM; | |
1834 | ||
1835 | nfit_mem->nvdimm = nvdimm; | |
4d88a97a | 1836 | dimm_count++; |
58138820 DW |
1837 | |
1838 | if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0) | |
1839 | continue; | |
1840 | ||
1499934d | 1841 | dev_info(acpi_desc->dev, "%s flags:%s%s%s%s%s\n", |
58138820 | 1842 | nvdimm_name(nvdimm), |
402bae59 TK |
1843 | mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "", |
1844 | mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"", | |
1845 | mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "", | |
1499934d DW |
1846 | mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : "", |
1847 | mem_flags & ACPI_NFIT_MEM_MAP_FAILED ? " map_fail" : ""); | |
58138820 | 1848 | |
e6dfb2de DW |
1849 | } |
1850 | ||
ba9c8dd3 DW |
1851 | rc = nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count); |
1852 | if (rc) | |
1853 | return rc; | |
1854 | ||
1855 | /* | |
1856 | * Now that dimms are successfully registered, and async registration | |
1857 | * is flushed, attempt to enable event notification. | |
1858 | */ | |
1859 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { | |
1860 | struct kernfs_node *nfit_kernfs; | |
1861 | ||
1862 | nvdimm = nfit_mem->nvdimm; | |
23fbd7c7 TK |
1863 | if (!nvdimm) |
1864 | continue; | |
1865 | ||
ba9c8dd3 DW |
1866 | nfit_kernfs = sysfs_get_dirent(nvdimm_kobj(nvdimm)->sd, "nfit"); |
1867 | if (nfit_kernfs) | |
1868 | nfit_mem->flags_attr = sysfs_get_dirent(nfit_kernfs, | |
1869 | "flags"); | |
1870 | sysfs_put(nfit_kernfs); | |
1871 | if (!nfit_mem->flags_attr) | |
1872 | dev_warn(acpi_desc->dev, "%s: notifications disabled\n", | |
1873 | nvdimm_name(nvdimm)); | |
1874 | } | |
1875 | ||
1876 | return devm_add_action_or_reset(acpi_desc->dev, shutdown_dimm_notify, | |
1877 | acpi_desc); | |
e6dfb2de DW |
1878 | } |
1879 | ||
7db5bb33 JH |
1880 | /* |
1881 | * These constants are private because there are no kernel consumers of | |
1882 | * these commands. | |
1883 | */ | |
1884 | enum nfit_aux_cmds { | |
1885 | NFIT_CMD_TRANSLATE_SPA = 5, | |
1886 | NFIT_CMD_ARS_INJECT_SET = 7, | |
1887 | NFIT_CMD_ARS_INJECT_CLEAR = 8, | |
1888 | NFIT_CMD_ARS_INJECT_GET = 9, | |
1889 | }; | |
1890 | ||
62232e45 DW |
1891 | static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc) |
1892 | { | |
1893 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
41c8bdb3 | 1894 | const guid_t *guid = to_nfit_uuid(NFIT_DEV_BUS); |
62232e45 | 1895 | struct acpi_device *adev; |
7db5bb33 | 1896 | unsigned long dsm_mask; |
62232e45 DW |
1897 | int i; |
1898 | ||
e3654eca | 1899 | nd_desc->cmd_mask = acpi_desc->bus_cmd_force_en; |
b37b3fd3 | 1900 | nd_desc->bus_dsm_mask = acpi_desc->bus_nfit_cmd_force_en; |
62232e45 DW |
1901 | adev = to_acpi_dev(acpi_desc); |
1902 | if (!adev) | |
1903 | return; | |
1904 | ||
d4f32367 | 1905 | for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++) |
94116f81 | 1906 | if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i)) |
e3654eca | 1907 | set_bit(i, &nd_desc->cmd_mask); |
37d74841 | 1908 | set_bit(ND_CMD_CALL, &nd_desc->cmd_mask); |
7db5bb33 JH |
1909 | |
1910 | dsm_mask = | |
1911 | (1 << ND_CMD_ARS_CAP) | | |
1912 | (1 << ND_CMD_ARS_START) | | |
1913 | (1 << ND_CMD_ARS_STATUS) | | |
1914 | (1 << ND_CMD_CLEAR_ERROR) | | |
1915 | (1 << NFIT_CMD_TRANSLATE_SPA) | | |
1916 | (1 << NFIT_CMD_ARS_INJECT_SET) | | |
1917 | (1 << NFIT_CMD_ARS_INJECT_CLEAR) | | |
1918 | (1 << NFIT_CMD_ARS_INJECT_GET); | |
1919 | for_each_set_bit(i, &dsm_mask, BITS_PER_LONG) | |
1920 | if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i)) | |
1921 | set_bit(i, &nd_desc->bus_dsm_mask); | |
62232e45 DW |
1922 | } |
1923 | ||
1f7df6f8 DW |
1924 | static ssize_t range_index_show(struct device *dev, |
1925 | struct device_attribute *attr, char *buf) | |
1926 | { | |
1927 | struct nd_region *nd_region = to_nd_region(dev); | |
1928 | struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region); | |
1929 | ||
1930 | return sprintf(buf, "%d\n", nfit_spa->spa->range_index); | |
1931 | } | |
1932 | static DEVICE_ATTR_RO(range_index); | |
1933 | ||
a15797f4 DW |
1934 | static ssize_t ecc_unit_size_show(struct device *dev, |
1935 | struct device_attribute *attr, char *buf) | |
1936 | { | |
1937 | struct nd_region *nd_region = to_nd_region(dev); | |
1938 | struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region); | |
1939 | ||
1940 | return sprintf(buf, "%d\n", nfit_spa->clear_err_unit); | |
1941 | } | |
1942 | static DEVICE_ATTR_RO(ecc_unit_size); | |
1943 | ||
1f7df6f8 DW |
1944 | static struct attribute *acpi_nfit_region_attributes[] = { |
1945 | &dev_attr_range_index.attr, | |
a15797f4 | 1946 | &dev_attr_ecc_unit_size.attr, |
1f7df6f8 DW |
1947 | NULL, |
1948 | }; | |
1949 | ||
5e93746f | 1950 | static const struct attribute_group acpi_nfit_region_attribute_group = { |
1f7df6f8 DW |
1951 | .name = "nfit", |
1952 | .attrs = acpi_nfit_region_attributes, | |
1953 | }; | |
1954 | ||
1955 | static const struct attribute_group *acpi_nfit_region_attribute_groups[] = { | |
1956 | &nd_region_attribute_group, | |
1957 | &nd_mapping_attribute_group, | |
3d88002e | 1958 | &nd_device_attribute_group, |
74ae66c3 | 1959 | &nd_numa_attribute_group, |
1f7df6f8 DW |
1960 | &acpi_nfit_region_attribute_group, |
1961 | NULL, | |
1962 | }; | |
1963 | ||
eaf96153 DW |
1964 | /* enough info to uniquely specify an interleave set */ |
1965 | struct nfit_set_info { | |
1966 | struct nfit_set_info_map { | |
1967 | u64 region_offset; | |
1968 | u32 serial_number; | |
1969 | u32 pad; | |
1970 | } mapping[0]; | |
1971 | }; | |
1972 | ||
c12c48ce DW |
1973 | struct nfit_set_info2 { |
1974 | struct nfit_set_info_map2 { | |
1975 | u64 region_offset; | |
1976 | u32 serial_number; | |
1977 | u16 vendor_id; | |
1978 | u16 manufacturing_date; | |
1979 | u8 manufacturing_location; | |
1980 | u8 reserved[31]; | |
1981 | } mapping[0]; | |
1982 | }; | |
1983 | ||
eaf96153 DW |
1984 | static size_t sizeof_nfit_set_info(int num_mappings) |
1985 | { | |
1986 | return sizeof(struct nfit_set_info) | |
1987 | + num_mappings * sizeof(struct nfit_set_info_map); | |
1988 | } | |
1989 | ||
c12c48ce DW |
1990 | static size_t sizeof_nfit_set_info2(int num_mappings) |
1991 | { | |
1992 | return sizeof(struct nfit_set_info2) | |
1993 | + num_mappings * sizeof(struct nfit_set_info_map2); | |
1994 | } | |
1995 | ||
86ef58a4 | 1996 | static int cmp_map_compat(const void *m0, const void *m1) |
eaf96153 DW |
1997 | { |
1998 | const struct nfit_set_info_map *map0 = m0; | |
1999 | const struct nfit_set_info_map *map1 = m1; | |
2000 | ||
2001 | return memcmp(&map0->region_offset, &map1->region_offset, | |
2002 | sizeof(u64)); | |
2003 | } | |
2004 | ||
86ef58a4 DW |
2005 | static int cmp_map(const void *m0, const void *m1) |
2006 | { | |
2007 | const struct nfit_set_info_map *map0 = m0; | |
2008 | const struct nfit_set_info_map *map1 = m1; | |
2009 | ||
b03b99a3 DW |
2010 | if (map0->region_offset < map1->region_offset) |
2011 | return -1; | |
2012 | else if (map0->region_offset > map1->region_offset) | |
2013 | return 1; | |
2014 | return 0; | |
86ef58a4 DW |
2015 | } |
2016 | ||
c12c48ce DW |
2017 | static int cmp_map2(const void *m0, const void *m1) |
2018 | { | |
2019 | const struct nfit_set_info_map2 *map0 = m0; | |
2020 | const struct nfit_set_info_map2 *map1 = m1; | |
2021 | ||
2022 | if (map0->region_offset < map1->region_offset) | |
2023 | return -1; | |
2024 | else if (map0->region_offset > map1->region_offset) | |
2025 | return 1; | |
2026 | return 0; | |
2027 | } | |
2028 | ||
eaf96153 DW |
2029 | /* Retrieve the nth entry referencing this spa */ |
2030 | static struct acpi_nfit_memory_map *memdev_from_spa( | |
2031 | struct acpi_nfit_desc *acpi_desc, u16 range_index, int n) | |
2032 | { | |
2033 | struct nfit_memdev *nfit_memdev; | |
2034 | ||
2035 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) | |
2036 | if (nfit_memdev->memdev->range_index == range_index) | |
2037 | if (n-- == 0) | |
2038 | return nfit_memdev->memdev; | |
2039 | return NULL; | |
2040 | } | |
2041 | ||
2042 | static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc, | |
2043 | struct nd_region_desc *ndr_desc, | |
2044 | struct acpi_nfit_system_address *spa) | |
2045 | { | |
eaf96153 DW |
2046 | struct device *dev = acpi_desc->dev; |
2047 | struct nd_interleave_set *nd_set; | |
2048 | u16 nr = ndr_desc->num_mappings; | |
c12c48ce | 2049 | struct nfit_set_info2 *info2; |
eaf96153 | 2050 | struct nfit_set_info *info; |
8f2bc243 | 2051 | int i; |
eaf96153 | 2052 | |
faec6f8a DW |
2053 | nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL); |
2054 | if (!nd_set) | |
2055 | return -ENOMEM; | |
2056 | ndr_desc->nd_set = nd_set; | |
2057 | guid_copy(&nd_set->type_guid, (guid_t *) spa->range_guid); | |
2058 | ||
eaf96153 DW |
2059 | info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL); |
2060 | if (!info) | |
2061 | return -ENOMEM; | |
c12c48ce DW |
2062 | |
2063 | info2 = devm_kzalloc(dev, sizeof_nfit_set_info2(nr), GFP_KERNEL); | |
2064 | if (!info2) | |
2065 | return -ENOMEM; | |
2066 | ||
eaf96153 | 2067 | for (i = 0; i < nr; i++) { |
44c462eb | 2068 | struct nd_mapping_desc *mapping = &ndr_desc->mapping[i]; |
eaf96153 | 2069 | struct nfit_set_info_map *map = &info->mapping[i]; |
c12c48ce | 2070 | struct nfit_set_info_map2 *map2 = &info2->mapping[i]; |
44c462eb | 2071 | struct nvdimm *nvdimm = mapping->nvdimm; |
eaf96153 DW |
2072 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
2073 | struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc, | |
2074 | spa->range_index, i); | |
dcb79b15 | 2075 | struct acpi_nfit_control_region *dcr = nfit_mem->dcr; |
eaf96153 DW |
2076 | |
2077 | if (!memdev || !nfit_mem->dcr) { | |
2078 | dev_err(dev, "%s: failed to find DCR\n", __func__); | |
2079 | return -ENODEV; | |
2080 | } | |
2081 | ||
2082 | map->region_offset = memdev->region_offset; | |
dcb79b15 | 2083 | map->serial_number = dcr->serial_number; |
c12c48ce DW |
2084 | |
2085 | map2->region_offset = memdev->region_offset; | |
dcb79b15 DW |
2086 | map2->serial_number = dcr->serial_number; |
2087 | map2->vendor_id = dcr->vendor_id; | |
2088 | map2->manufacturing_date = dcr->manufacturing_date; | |
2089 | map2->manufacturing_location = dcr->manufacturing_location; | |
eaf96153 DW |
2090 | } |
2091 | ||
c12c48ce | 2092 | /* v1.1 namespaces */ |
eaf96153 DW |
2093 | sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map), |
2094 | cmp_map, NULL); | |
c12c48ce DW |
2095 | nd_set->cookie1 = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0); |
2096 | ||
2097 | /* v1.2 namespaces */ | |
2098 | sort(&info2->mapping[0], nr, sizeof(struct nfit_set_info_map2), | |
2099 | cmp_map2, NULL); | |
2100 | nd_set->cookie2 = nd_fletcher64(info2, sizeof_nfit_set_info2(nr), 0); | |
86ef58a4 | 2101 | |
c12c48ce | 2102 | /* support v1.1 namespaces created with the wrong sort order */ |
86ef58a4 DW |
2103 | sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map), |
2104 | cmp_map_compat, NULL); | |
2105 | nd_set->altcookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0); | |
2106 | ||
401c0a19 DW |
2107 | /* record the result of the sort for the mapping position */ |
2108 | for (i = 0; i < nr; i++) { | |
2109 | struct nfit_set_info_map2 *map2 = &info2->mapping[i]; | |
2110 | int j; | |
2111 | ||
2112 | for (j = 0; j < nr; j++) { | |
2113 | struct nd_mapping_desc *mapping = &ndr_desc->mapping[j]; | |
2114 | struct nvdimm *nvdimm = mapping->nvdimm; | |
2115 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
dcb79b15 | 2116 | struct acpi_nfit_control_region *dcr = nfit_mem->dcr; |
401c0a19 | 2117 | |
dcb79b15 DW |
2118 | if (map2->serial_number == dcr->serial_number && |
2119 | map2->vendor_id == dcr->vendor_id && | |
2120 | map2->manufacturing_date == dcr->manufacturing_date && | |
401c0a19 | 2121 | map2->manufacturing_location |
dcb79b15 | 2122 | == dcr->manufacturing_location) { |
401c0a19 DW |
2123 | mapping->position = i; |
2124 | break; | |
2125 | } | |
2126 | } | |
2127 | } | |
2128 | ||
eaf96153 DW |
2129 | ndr_desc->nd_set = nd_set; |
2130 | devm_kfree(dev, info); | |
c12c48ce | 2131 | devm_kfree(dev, info2); |
eaf96153 DW |
2132 | |
2133 | return 0; | |
2134 | } | |
2135 | ||
047fc8a1 RZ |
2136 | static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio) |
2137 | { | |
2138 | struct acpi_nfit_interleave *idt = mmio->idt; | |
2139 | u32 sub_line_offset, line_index, line_offset; | |
2140 | u64 line_no, table_skip_count, table_offset; | |
2141 | ||
2142 | line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset); | |
2143 | table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index); | |
2144 | line_offset = idt->line_offset[line_index] | |
2145 | * mmio->line_size; | |
2146 | table_offset = table_skip_count * mmio->table_size; | |
2147 | ||
2148 | return mmio->base_offset + line_offset + table_offset + sub_line_offset; | |
2149 | } | |
2150 | ||
de4a196c | 2151 | static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw) |
047fc8a1 RZ |
2152 | { |
2153 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; | |
2154 | u64 offset = nfit_blk->stat_offset + mmio->size * bw; | |
68202c9f | 2155 | const u32 STATUS_MASK = 0x80000037; |
047fc8a1 RZ |
2156 | |
2157 | if (mmio->num_lines) | |
2158 | offset = to_interleave_offset(offset, mmio); | |
2159 | ||
68202c9f | 2160 | return readl(mmio->addr.base + offset) & STATUS_MASK; |
047fc8a1 RZ |
2161 | } |
2162 | ||
2163 | static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw, | |
2164 | resource_size_t dpa, unsigned int len, unsigned int write) | |
2165 | { | |
2166 | u64 cmd, offset; | |
2167 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; | |
2168 | ||
2169 | enum { | |
2170 | BCW_OFFSET_MASK = (1ULL << 48)-1, | |
2171 | BCW_LEN_SHIFT = 48, | |
2172 | BCW_LEN_MASK = (1ULL << 8) - 1, | |
2173 | BCW_CMD_SHIFT = 56, | |
2174 | }; | |
2175 | ||
2176 | cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK; | |
2177 | len = len >> L1_CACHE_SHIFT; | |
2178 | cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT; | |
2179 | cmd |= ((u64) write) << BCW_CMD_SHIFT; | |
2180 | ||
2181 | offset = nfit_blk->cmd_offset + mmio->size * bw; | |
2182 | if (mmio->num_lines) | |
2183 | offset = to_interleave_offset(offset, mmio); | |
2184 | ||
67a3e8fe | 2185 | writeq(cmd, mmio->addr.base + offset); |
f284a4f2 | 2186 | nvdimm_flush(nfit_blk->nd_region); |
f0f2c072 | 2187 | |
aef25338 | 2188 | if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH) |
67a3e8fe | 2189 | readq(mmio->addr.base + offset); |
047fc8a1 RZ |
2190 | } |
2191 | ||
2192 | static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk, | |
2193 | resource_size_t dpa, void *iobuf, size_t len, int rw, | |
2194 | unsigned int lane) | |
2195 | { | |
2196 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; | |
2197 | unsigned int copied = 0; | |
2198 | u64 base_offset; | |
2199 | int rc; | |
2200 | ||
2201 | base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES | |
2202 | + lane * mmio->size; | |
047fc8a1 RZ |
2203 | write_blk_ctl(nfit_blk, lane, dpa, len, rw); |
2204 | while (len) { | |
2205 | unsigned int c; | |
2206 | u64 offset; | |
2207 | ||
2208 | if (mmio->num_lines) { | |
2209 | u32 line_offset; | |
2210 | ||
2211 | offset = to_interleave_offset(base_offset + copied, | |
2212 | mmio); | |
2213 | div_u64_rem(offset, mmio->line_size, &line_offset); | |
2214 | c = min_t(size_t, len, mmio->line_size - line_offset); | |
2215 | } else { | |
2216 | offset = base_offset + nfit_blk->bdw_offset; | |
2217 | c = len; | |
2218 | } | |
2219 | ||
2220 | if (rw) | |
0aed55af | 2221 | memcpy_flushcache(mmio->addr.aperture + offset, iobuf + copied, c); |
67a3e8fe | 2222 | else { |
aef25338 | 2223 | if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH) |
5deb67f7 | 2224 | arch_invalidate_pmem((void __force *) |
67a3e8fe RZ |
2225 | mmio->addr.aperture + offset, c); |
2226 | ||
6abccd1b | 2227 | memcpy(iobuf + copied, mmio->addr.aperture + offset, c); |
67a3e8fe | 2228 | } |
047fc8a1 RZ |
2229 | |
2230 | copied += c; | |
2231 | len -= c; | |
2232 | } | |
c2ad2954 RZ |
2233 | |
2234 | if (rw) | |
f284a4f2 | 2235 | nvdimm_flush(nfit_blk->nd_region); |
c2ad2954 | 2236 | |
047fc8a1 RZ |
2237 | rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0; |
2238 | return rc; | |
2239 | } | |
2240 | ||
2241 | static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr, | |
2242 | resource_size_t dpa, void *iobuf, u64 len, int rw) | |
2243 | { | |
2244 | struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr); | |
2245 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; | |
2246 | struct nd_region *nd_region = nfit_blk->nd_region; | |
2247 | unsigned int lane, copied = 0; | |
2248 | int rc = 0; | |
2249 | ||
2250 | lane = nd_region_acquire_lane(nd_region); | |
2251 | while (len) { | |
2252 | u64 c = min(len, mmio->size); | |
2253 | ||
2254 | rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied, | |
2255 | iobuf + copied, c, rw, lane); | |
2256 | if (rc) | |
2257 | break; | |
2258 | ||
2259 | copied += c; | |
2260 | len -= c; | |
2261 | } | |
2262 | nd_region_release_lane(nd_region, lane); | |
2263 | ||
2264 | return rc; | |
2265 | } | |
2266 | ||
047fc8a1 RZ |
2267 | static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio, |
2268 | struct acpi_nfit_interleave *idt, u16 interleave_ways) | |
2269 | { | |
2270 | if (idt) { | |
2271 | mmio->num_lines = idt->line_count; | |
2272 | mmio->line_size = idt->line_size; | |
2273 | if (interleave_ways == 0) | |
2274 | return -ENXIO; | |
2275 | mmio->table_size = mmio->num_lines * interleave_ways | |
2276 | * mmio->line_size; | |
2277 | } | |
2278 | ||
2279 | return 0; | |
2280 | } | |
2281 | ||
f0f2c072 RZ |
2282 | static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc, |
2283 | struct nvdimm *nvdimm, struct nfit_blk *nfit_blk) | |
2284 | { | |
2285 | struct nd_cmd_dimm_flags flags; | |
2286 | int rc; | |
2287 | ||
2288 | memset(&flags, 0, sizeof(flags)); | |
2289 | rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags, | |
aef25338 | 2290 | sizeof(flags), NULL); |
f0f2c072 RZ |
2291 | |
2292 | if (rc >= 0 && flags.status == 0) | |
2293 | nfit_blk->dimm_flags = flags.flags; | |
2294 | else if (rc == -ENOTTY) { | |
2295 | /* fall back to a conservative default */ | |
aef25338 | 2296 | nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH; |
f0f2c072 RZ |
2297 | rc = 0; |
2298 | } else | |
2299 | rc = -ENXIO; | |
2300 | ||
2301 | return rc; | |
2302 | } | |
2303 | ||
047fc8a1 RZ |
2304 | static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus, |
2305 | struct device *dev) | |
2306 | { | |
2307 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
047fc8a1 RZ |
2308 | struct nd_blk_region *ndbr = to_nd_blk_region(dev); |
2309 | struct nfit_blk_mmio *mmio; | |
2310 | struct nfit_blk *nfit_blk; | |
2311 | struct nfit_mem *nfit_mem; | |
2312 | struct nvdimm *nvdimm; | |
2313 | int rc; | |
2314 | ||
2315 | nvdimm = nd_blk_region_to_dimm(ndbr); | |
2316 | nfit_mem = nvdimm_provider_data(nvdimm); | |
2317 | if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) { | |
2318 | dev_dbg(dev, "%s: missing%s%s%s\n", __func__, | |
2319 | nfit_mem ? "" : " nfit_mem", | |
193ccca4 DW |
2320 | (nfit_mem && nfit_mem->dcr) ? "" : " dcr", |
2321 | (nfit_mem && nfit_mem->bdw) ? "" : " bdw"); | |
047fc8a1 RZ |
2322 | return -ENXIO; |
2323 | } | |
2324 | ||
2325 | nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL); | |
2326 | if (!nfit_blk) | |
2327 | return -ENOMEM; | |
2328 | nd_blk_region_set_provider_data(ndbr, nfit_blk); | |
2329 | nfit_blk->nd_region = to_nd_region(dev); | |
2330 | ||
2331 | /* map block aperture memory */ | |
2332 | nfit_blk->bdw_offset = nfit_mem->bdw->offset; | |
2333 | mmio = &nfit_blk->mmio[BDW]; | |
29b9aa0a | 2334 | mmio->addr.base = devm_nvdimm_memremap(dev, nfit_mem->spa_bdw->address, |
ca6a4657 | 2335 | nfit_mem->spa_bdw->length, nd_blk_memremap_flags(ndbr)); |
67a3e8fe | 2336 | if (!mmio->addr.base) { |
047fc8a1 RZ |
2337 | dev_dbg(dev, "%s: %s failed to map bdw\n", __func__, |
2338 | nvdimm_name(nvdimm)); | |
2339 | return -ENOMEM; | |
2340 | } | |
2341 | mmio->size = nfit_mem->bdw->size; | |
2342 | mmio->base_offset = nfit_mem->memdev_bdw->region_offset; | |
2343 | mmio->idt = nfit_mem->idt_bdw; | |
2344 | mmio->spa = nfit_mem->spa_bdw; | |
2345 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw, | |
2346 | nfit_mem->memdev_bdw->interleave_ways); | |
2347 | if (rc) { | |
2348 | dev_dbg(dev, "%s: %s failed to init bdw interleave\n", | |
2349 | __func__, nvdimm_name(nvdimm)); | |
2350 | return rc; | |
2351 | } | |
2352 | ||
2353 | /* map block control memory */ | |
2354 | nfit_blk->cmd_offset = nfit_mem->dcr->command_offset; | |
2355 | nfit_blk->stat_offset = nfit_mem->dcr->status_offset; | |
2356 | mmio = &nfit_blk->mmio[DCR]; | |
29b9aa0a DW |
2357 | mmio->addr.base = devm_nvdimm_ioremap(dev, nfit_mem->spa_dcr->address, |
2358 | nfit_mem->spa_dcr->length); | |
67a3e8fe | 2359 | if (!mmio->addr.base) { |
047fc8a1 RZ |
2360 | dev_dbg(dev, "%s: %s failed to map dcr\n", __func__, |
2361 | nvdimm_name(nvdimm)); | |
2362 | return -ENOMEM; | |
2363 | } | |
2364 | mmio->size = nfit_mem->dcr->window_size; | |
2365 | mmio->base_offset = nfit_mem->memdev_dcr->region_offset; | |
2366 | mmio->idt = nfit_mem->idt_dcr; | |
2367 | mmio->spa = nfit_mem->spa_dcr; | |
2368 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr, | |
2369 | nfit_mem->memdev_dcr->interleave_ways); | |
2370 | if (rc) { | |
2371 | dev_dbg(dev, "%s: %s failed to init dcr interleave\n", | |
2372 | __func__, nvdimm_name(nvdimm)); | |
2373 | return rc; | |
2374 | } | |
2375 | ||
f0f2c072 RZ |
2376 | rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk); |
2377 | if (rc < 0) { | |
2378 | dev_dbg(dev, "%s: %s failed get DIMM flags\n", | |
2379 | __func__, nvdimm_name(nvdimm)); | |
2380 | return rc; | |
2381 | } | |
2382 | ||
f284a4f2 | 2383 | if (nvdimm_has_flush(nfit_blk->nd_region) < 0) |
c2ad2954 RZ |
2384 | dev_warn(dev, "unable to guarantee persistence of writes\n"); |
2385 | ||
047fc8a1 RZ |
2386 | if (mmio->line_size == 0) |
2387 | return 0; | |
2388 | ||
2389 | if ((u32) nfit_blk->cmd_offset % mmio->line_size | |
2390 | + 8 > mmio->line_size) { | |
2391 | dev_dbg(dev, "cmd_offset crosses interleave boundary\n"); | |
2392 | return -ENXIO; | |
2393 | } else if ((u32) nfit_blk->stat_offset % mmio->line_size | |
2394 | + 8 > mmio->line_size) { | |
2395 | dev_dbg(dev, "stat_offset crosses interleave boundary\n"); | |
2396 | return -ENXIO; | |
2397 | } | |
2398 | ||
2399 | return 0; | |
2400 | } | |
2401 | ||
aef25338 | 2402 | static int ars_get_cap(struct acpi_nfit_desc *acpi_desc, |
1cf03c00 | 2403 | struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa) |
0caeef63 | 2404 | { |
aef25338 | 2405 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
1cf03c00 | 2406 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
aef25338 DW |
2407 | int cmd_rc, rc; |
2408 | ||
1cf03c00 DW |
2409 | cmd->address = spa->address; |
2410 | cmd->length = spa->length; | |
aef25338 DW |
2411 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd, |
2412 | sizeof(*cmd), &cmd_rc); | |
2413 | if (rc < 0) | |
2414 | return rc; | |
1cf03c00 | 2415 | return cmd_rc; |
0caeef63 VV |
2416 | } |
2417 | ||
1cf03c00 | 2418 | static int ars_start(struct acpi_nfit_desc *acpi_desc, struct nfit_spa *nfit_spa) |
0caeef63 VV |
2419 | { |
2420 | int rc; | |
1cf03c00 DW |
2421 | int cmd_rc; |
2422 | struct nd_cmd_ars_start ars_start; | |
2423 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
2424 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
0caeef63 | 2425 | |
1cf03c00 DW |
2426 | memset(&ars_start, 0, sizeof(ars_start)); |
2427 | ars_start.address = spa->address; | |
2428 | ars_start.length = spa->length; | |
80790039 | 2429 | ars_start.flags = acpi_desc->ars_start_flags; |
1cf03c00 DW |
2430 | if (nfit_spa_type(spa) == NFIT_SPA_PM) |
2431 | ars_start.type = ND_ARS_PERSISTENT; | |
2432 | else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) | |
2433 | ars_start.type = ND_ARS_VOLATILE; | |
2434 | else | |
2435 | return -ENOTTY; | |
aef25338 | 2436 | |
1cf03c00 DW |
2437 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
2438 | sizeof(ars_start), &cmd_rc); | |
aef25338 | 2439 | |
1cf03c00 DW |
2440 | if (rc < 0) |
2441 | return rc; | |
2442 | return cmd_rc; | |
0caeef63 VV |
2443 | } |
2444 | ||
1cf03c00 | 2445 | static int ars_continue(struct acpi_nfit_desc *acpi_desc) |
0caeef63 | 2446 | { |
aef25338 | 2447 | int rc, cmd_rc; |
1cf03c00 DW |
2448 | struct nd_cmd_ars_start ars_start; |
2449 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
2450 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; | |
2451 | ||
2452 | memset(&ars_start, 0, sizeof(ars_start)); | |
2453 | ars_start.address = ars_status->restart_address; | |
2454 | ars_start.length = ars_status->restart_length; | |
2455 | ars_start.type = ars_status->type; | |
80790039 | 2456 | ars_start.flags = acpi_desc->ars_start_flags; |
1cf03c00 DW |
2457 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
2458 | sizeof(ars_start), &cmd_rc); | |
2459 | if (rc < 0) | |
2460 | return rc; | |
2461 | return cmd_rc; | |
2462 | } | |
0caeef63 | 2463 | |
1cf03c00 DW |
2464 | static int ars_get_status(struct acpi_nfit_desc *acpi_desc) |
2465 | { | |
2466 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
2467 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; | |
2468 | int rc, cmd_rc; | |
aef25338 | 2469 | |
1cf03c00 DW |
2470 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status, |
2471 | acpi_desc->ars_status_size, &cmd_rc); | |
2472 | if (rc < 0) | |
2473 | return rc; | |
2474 | return cmd_rc; | |
0caeef63 VV |
2475 | } |
2476 | ||
82aa37cf | 2477 | static int ars_status_process_records(struct acpi_nfit_desc *acpi_desc, |
1cf03c00 | 2478 | struct nd_cmd_ars_status *ars_status) |
0caeef63 | 2479 | { |
82aa37cf | 2480 | struct nvdimm_bus *nvdimm_bus = acpi_desc->nvdimm_bus; |
0caeef63 VV |
2481 | int rc; |
2482 | u32 i; | |
2483 | ||
82aa37cf DW |
2484 | /* |
2485 | * First record starts at 44 byte offset from the start of the | |
2486 | * payload. | |
2487 | */ | |
2488 | if (ars_status->out_length < 44) | |
2489 | return 0; | |
0caeef63 | 2490 | for (i = 0; i < ars_status->num_records; i++) { |
82aa37cf DW |
2491 | /* only process full records */ |
2492 | if (ars_status->out_length | |
2493 | < 44 + sizeof(struct nd_ars_record) * (i + 1)) | |
2494 | break; | |
aa9ad44a | 2495 | rc = nvdimm_bus_add_badrange(nvdimm_bus, |
0caeef63 VV |
2496 | ars_status->records[i].err_address, |
2497 | ars_status->records[i].length); | |
2498 | if (rc) | |
2499 | return rc; | |
2500 | } | |
82aa37cf DW |
2501 | if (i < ars_status->num_records) |
2502 | dev_warn(acpi_desc->dev, "detected truncated ars results\n"); | |
0caeef63 VV |
2503 | |
2504 | return 0; | |
2505 | } | |
2506 | ||
af1996ef TK |
2507 | static void acpi_nfit_remove_resource(void *data) |
2508 | { | |
2509 | struct resource *res = data; | |
2510 | ||
2511 | remove_resource(res); | |
2512 | } | |
2513 | ||
2514 | static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc, | |
2515 | struct nd_region_desc *ndr_desc) | |
2516 | { | |
2517 | struct resource *res, *nd_res = ndr_desc->res; | |
2518 | int is_pmem, ret; | |
2519 | ||
2520 | /* No operation if the region is already registered as PMEM */ | |
2521 | is_pmem = region_intersects(nd_res->start, resource_size(nd_res), | |
2522 | IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY); | |
2523 | if (is_pmem == REGION_INTERSECTS) | |
2524 | return 0; | |
2525 | ||
2526 | res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL); | |
2527 | if (!res) | |
2528 | return -ENOMEM; | |
2529 | ||
2530 | res->name = "Persistent Memory"; | |
2531 | res->start = nd_res->start; | |
2532 | res->end = nd_res->end; | |
2533 | res->flags = IORESOURCE_MEM; | |
2534 | res->desc = IORES_DESC_PERSISTENT_MEMORY; | |
2535 | ||
2536 | ret = insert_resource(&iomem_resource, res); | |
2537 | if (ret) | |
2538 | return ret; | |
2539 | ||
d932dd2c SV |
2540 | ret = devm_add_action_or_reset(acpi_desc->dev, |
2541 | acpi_nfit_remove_resource, | |
2542 | res); | |
2543 | if (ret) | |
af1996ef | 2544 | return ret; |
af1996ef TK |
2545 | |
2546 | return 0; | |
2547 | } | |
2548 | ||
1f7df6f8 | 2549 | static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc, |
44c462eb | 2550 | struct nd_mapping_desc *mapping, struct nd_region_desc *ndr_desc, |
1f7df6f8 | 2551 | struct acpi_nfit_memory_map *memdev, |
1cf03c00 | 2552 | struct nfit_spa *nfit_spa) |
1f7df6f8 DW |
2553 | { |
2554 | struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, | |
2555 | memdev->device_handle); | |
1cf03c00 | 2556 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
047fc8a1 | 2557 | struct nd_blk_region_desc *ndbr_desc; |
1f7df6f8 | 2558 | struct nfit_mem *nfit_mem; |
faec6f8a | 2559 | int blk_valid = 0, rc; |
1f7df6f8 DW |
2560 | |
2561 | if (!nvdimm) { | |
2562 | dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n", | |
2563 | spa->range_index, memdev->device_handle); | |
2564 | return -ENODEV; | |
2565 | } | |
2566 | ||
44c462eb | 2567 | mapping->nvdimm = nvdimm; |
1f7df6f8 DW |
2568 | switch (nfit_spa_type(spa)) { |
2569 | case NFIT_SPA_PM: | |
2570 | case NFIT_SPA_VOLATILE: | |
44c462eb DW |
2571 | mapping->start = memdev->address; |
2572 | mapping->size = memdev->region_size; | |
1f7df6f8 DW |
2573 | break; |
2574 | case NFIT_SPA_DCR: | |
2575 | nfit_mem = nvdimm_provider_data(nvdimm); | |
2576 | if (!nfit_mem || !nfit_mem->bdw) { | |
2577 | dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n", | |
2578 | spa->range_index, nvdimm_name(nvdimm)); | |
2579 | } else { | |
44c462eb DW |
2580 | mapping->size = nfit_mem->bdw->capacity; |
2581 | mapping->start = nfit_mem->bdw->start_address; | |
5212e11f | 2582 | ndr_desc->num_lanes = nfit_mem->bdw->windows; |
1f7df6f8 DW |
2583 | blk_valid = 1; |
2584 | } | |
2585 | ||
44c462eb | 2586 | ndr_desc->mapping = mapping; |
1f7df6f8 | 2587 | ndr_desc->num_mappings = blk_valid; |
047fc8a1 RZ |
2588 | ndbr_desc = to_blk_region_desc(ndr_desc); |
2589 | ndbr_desc->enable = acpi_nfit_blk_region_enable; | |
6bc75619 | 2590 | ndbr_desc->do_io = acpi_desc->blk_do_io; |
faec6f8a DW |
2591 | rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa); |
2592 | if (rc) | |
2593 | return rc; | |
1cf03c00 DW |
2594 | nfit_spa->nd_region = nvdimm_blk_region_create(acpi_desc->nvdimm_bus, |
2595 | ndr_desc); | |
2596 | if (!nfit_spa->nd_region) | |
1f7df6f8 DW |
2597 | return -ENOMEM; |
2598 | break; | |
2599 | } | |
2600 | ||
2601 | return 0; | |
2602 | } | |
2603 | ||
c2f32acd LCY |
2604 | static bool nfit_spa_is_virtual(struct acpi_nfit_system_address *spa) |
2605 | { | |
2606 | return (nfit_spa_type(spa) == NFIT_SPA_VDISK || | |
2607 | nfit_spa_type(spa) == NFIT_SPA_VCD || | |
2608 | nfit_spa_type(spa) == NFIT_SPA_PDISK || | |
2609 | nfit_spa_type(spa) == NFIT_SPA_PCD); | |
2610 | } | |
2611 | ||
c9e582aa DW |
2612 | static bool nfit_spa_is_volatile(struct acpi_nfit_system_address *spa) |
2613 | { | |
2614 | return (nfit_spa_type(spa) == NFIT_SPA_VDISK || | |
2615 | nfit_spa_type(spa) == NFIT_SPA_VCD || | |
2616 | nfit_spa_type(spa) == NFIT_SPA_VOLATILE); | |
2617 | } | |
2618 | ||
1f7df6f8 DW |
2619 | static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc, |
2620 | struct nfit_spa *nfit_spa) | |
2621 | { | |
44c462eb | 2622 | static struct nd_mapping_desc mappings[ND_MAX_MAPPINGS]; |
1f7df6f8 | 2623 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
047fc8a1 RZ |
2624 | struct nd_blk_region_desc ndbr_desc; |
2625 | struct nd_region_desc *ndr_desc; | |
1f7df6f8 | 2626 | struct nfit_memdev *nfit_memdev; |
1f7df6f8 DW |
2627 | struct nvdimm_bus *nvdimm_bus; |
2628 | struct resource res; | |
eaf96153 | 2629 | int count = 0, rc; |
1f7df6f8 | 2630 | |
1cf03c00 | 2631 | if (nfit_spa->nd_region) |
20985164 VV |
2632 | return 0; |
2633 | ||
c2f32acd | 2634 | if (spa->range_index == 0 && !nfit_spa_is_virtual(spa)) { |
1f7df6f8 DW |
2635 | dev_dbg(acpi_desc->dev, "%s: detected invalid spa index\n", |
2636 | __func__); | |
2637 | return 0; | |
2638 | } | |
2639 | ||
2640 | memset(&res, 0, sizeof(res)); | |
44c462eb | 2641 | memset(&mappings, 0, sizeof(mappings)); |
047fc8a1 | 2642 | memset(&ndbr_desc, 0, sizeof(ndbr_desc)); |
1f7df6f8 DW |
2643 | res.start = spa->address; |
2644 | res.end = res.start + spa->length - 1; | |
047fc8a1 RZ |
2645 | ndr_desc = &ndbr_desc.ndr_desc; |
2646 | ndr_desc->res = &res; | |
2647 | ndr_desc->provider_data = nfit_spa; | |
2648 | ndr_desc->attr_groups = acpi_nfit_region_attribute_groups; | |
41d7a6d6 TK |
2649 | if (spa->flags & ACPI_NFIT_PROXIMITY_VALID) |
2650 | ndr_desc->numa_node = acpi_map_pxm_to_online_node( | |
2651 | spa->proximity_domain); | |
2652 | else | |
2653 | ndr_desc->numa_node = NUMA_NO_NODE; | |
2654 | ||
1f7df6f8 DW |
2655 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
2656 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; | |
44c462eb | 2657 | struct nd_mapping_desc *mapping; |
1f7df6f8 DW |
2658 | |
2659 | if (memdev->range_index != spa->range_index) | |
2660 | continue; | |
2661 | if (count >= ND_MAX_MAPPINGS) { | |
2662 | dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n", | |
2663 | spa->range_index, ND_MAX_MAPPINGS); | |
2664 | return -ENXIO; | |
2665 | } | |
44c462eb DW |
2666 | mapping = &mappings[count++]; |
2667 | rc = acpi_nfit_init_mapping(acpi_desc, mapping, ndr_desc, | |
1cf03c00 | 2668 | memdev, nfit_spa); |
1f7df6f8 | 2669 | if (rc) |
1cf03c00 | 2670 | goto out; |
1f7df6f8 DW |
2671 | } |
2672 | ||
44c462eb | 2673 | ndr_desc->mapping = mappings; |
047fc8a1 RZ |
2674 | ndr_desc->num_mappings = count; |
2675 | rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa); | |
eaf96153 | 2676 | if (rc) |
1cf03c00 | 2677 | goto out; |
eaf96153 | 2678 | |
1f7df6f8 DW |
2679 | nvdimm_bus = acpi_desc->nvdimm_bus; |
2680 | if (nfit_spa_type(spa) == NFIT_SPA_PM) { | |
af1996ef | 2681 | rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc); |
48901165 | 2682 | if (rc) { |
af1996ef TK |
2683 | dev_warn(acpi_desc->dev, |
2684 | "failed to insert pmem resource to iomem: %d\n", | |
2685 | rc); | |
48901165 | 2686 | goto out; |
0caeef63 | 2687 | } |
48901165 | 2688 | |
1cf03c00 DW |
2689 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, |
2690 | ndr_desc); | |
2691 | if (!nfit_spa->nd_region) | |
2692 | rc = -ENOMEM; | |
c9e582aa | 2693 | } else if (nfit_spa_is_volatile(spa)) { |
1cf03c00 DW |
2694 | nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus, |
2695 | ndr_desc); | |
2696 | if (!nfit_spa->nd_region) | |
2697 | rc = -ENOMEM; | |
c2f32acd LCY |
2698 | } else if (nfit_spa_is_virtual(spa)) { |
2699 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, | |
2700 | ndr_desc); | |
2701 | if (!nfit_spa->nd_region) | |
2702 | rc = -ENOMEM; | |
1f7df6f8 | 2703 | } |
20985164 | 2704 | |
1cf03c00 DW |
2705 | out: |
2706 | if (rc) | |
2707 | dev_err(acpi_desc->dev, "failed to register spa range %d\n", | |
2708 | nfit_spa->spa->range_index); | |
2709 | return rc; | |
2710 | } | |
2711 | ||
2712 | static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc, | |
2713 | u32 max_ars) | |
2714 | { | |
2715 | struct device *dev = acpi_desc->dev; | |
2716 | struct nd_cmd_ars_status *ars_status; | |
2717 | ||
2718 | if (acpi_desc->ars_status && acpi_desc->ars_status_size >= max_ars) { | |
2719 | memset(acpi_desc->ars_status, 0, acpi_desc->ars_status_size); | |
2720 | return 0; | |
2721 | } | |
2722 | ||
2723 | if (acpi_desc->ars_status) | |
2724 | devm_kfree(dev, acpi_desc->ars_status); | |
2725 | acpi_desc->ars_status = NULL; | |
2726 | ars_status = devm_kzalloc(dev, max_ars, GFP_KERNEL); | |
2727 | if (!ars_status) | |
2728 | return -ENOMEM; | |
2729 | acpi_desc->ars_status = ars_status; | |
2730 | acpi_desc->ars_status_size = max_ars; | |
1f7df6f8 DW |
2731 | return 0; |
2732 | } | |
2733 | ||
1cf03c00 DW |
2734 | static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc, |
2735 | struct nfit_spa *nfit_spa) | |
2736 | { | |
2737 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
2738 | int rc; | |
2739 | ||
2740 | if (!nfit_spa->max_ars) { | |
2741 | struct nd_cmd_ars_cap ars_cap; | |
2742 | ||
2743 | memset(&ars_cap, 0, sizeof(ars_cap)); | |
2744 | rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa); | |
2745 | if (rc < 0) | |
2746 | return rc; | |
2747 | nfit_spa->max_ars = ars_cap.max_ars_out; | |
2748 | nfit_spa->clear_err_unit = ars_cap.clear_err_unit; | |
2749 | /* check that the supported scrub types match the spa type */ | |
2750 | if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE && | |
2751 | ((ars_cap.status >> 16) & ND_ARS_VOLATILE) == 0) | |
2752 | return -ENOTTY; | |
2753 | else if (nfit_spa_type(spa) == NFIT_SPA_PM && | |
2754 | ((ars_cap.status >> 16) & ND_ARS_PERSISTENT) == 0) | |
2755 | return -ENOTTY; | |
2756 | } | |
2757 | ||
2758 | if (ars_status_alloc(acpi_desc, nfit_spa->max_ars)) | |
2759 | return -ENOMEM; | |
2760 | ||
2761 | rc = ars_get_status(acpi_desc); | |
2762 | if (rc < 0 && rc != -ENOSPC) | |
2763 | return rc; | |
2764 | ||
82aa37cf | 2765 | if (ars_status_process_records(acpi_desc, acpi_desc->ars_status)) |
1cf03c00 DW |
2766 | return -ENOMEM; |
2767 | ||
2768 | return 0; | |
2769 | } | |
2770 | ||
2771 | static void acpi_nfit_async_scrub(struct acpi_nfit_desc *acpi_desc, | |
2772 | struct nfit_spa *nfit_spa) | |
2773 | { | |
2774 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
2775 | unsigned int overflow_retry = scrub_overflow_abort; | |
2776 | u64 init_ars_start = 0, init_ars_len = 0; | |
2777 | struct device *dev = acpi_desc->dev; | |
2778 | unsigned int tmo = scrub_timeout; | |
2779 | int rc; | |
2780 | ||
37b137ff | 2781 | if (!nfit_spa->ars_required || !nfit_spa->nd_region) |
1cf03c00 DW |
2782 | return; |
2783 | ||
2784 | rc = ars_start(acpi_desc, nfit_spa); | |
2785 | /* | |
2786 | * If we timed out the initial scan we'll still be busy here, | |
2787 | * and will wait another timeout before giving up permanently. | |
2788 | */ | |
2789 | if (rc < 0 && rc != -EBUSY) | |
2790 | return; | |
2791 | ||
2792 | do { | |
2793 | u64 ars_start, ars_len; | |
2794 | ||
2795 | if (acpi_desc->cancel) | |
2796 | break; | |
2797 | rc = acpi_nfit_query_poison(acpi_desc, nfit_spa); | |
2798 | if (rc == -ENOTTY) | |
2799 | break; | |
2800 | if (rc == -EBUSY && !tmo) { | |
2801 | dev_warn(dev, "range %d ars timeout, aborting\n", | |
2802 | spa->range_index); | |
2803 | break; | |
2804 | } | |
2805 | ||
2806 | if (rc == -EBUSY) { | |
2807 | /* | |
2808 | * Note, entries may be appended to the list | |
2809 | * while the lock is dropped, but the workqueue | |
2810 | * being active prevents entries being deleted / | |
2811 | * freed. | |
2812 | */ | |
2813 | mutex_unlock(&acpi_desc->init_mutex); | |
2814 | ssleep(1); | |
2815 | tmo--; | |
2816 | mutex_lock(&acpi_desc->init_mutex); | |
2817 | continue; | |
2818 | } | |
2819 | ||
2820 | /* we got some results, but there are more pending... */ | |
2821 | if (rc == -ENOSPC && overflow_retry--) { | |
2822 | if (!init_ars_len) { | |
2823 | init_ars_len = acpi_desc->ars_status->length; | |
2824 | init_ars_start = acpi_desc->ars_status->address; | |
2825 | } | |
2826 | rc = ars_continue(acpi_desc); | |
2827 | } | |
2828 | ||
2829 | if (rc < 0) { | |
2830 | dev_warn(dev, "range %d ars continuation failed\n", | |
2831 | spa->range_index); | |
2832 | break; | |
2833 | } | |
2834 | ||
2835 | if (init_ars_len) { | |
2836 | ars_start = init_ars_start; | |
2837 | ars_len = init_ars_len; | |
2838 | } else { | |
2839 | ars_start = acpi_desc->ars_status->address; | |
2840 | ars_len = acpi_desc->ars_status->length; | |
2841 | } | |
2842 | dev_dbg(dev, "spa range: %d ars from %#llx + %#llx complete\n", | |
2843 | spa->range_index, ars_start, ars_len); | |
2844 | /* notify the region about new poison entries */ | |
2845 | nvdimm_region_notify(nfit_spa->nd_region, | |
2846 | NVDIMM_REVALIDATE_POISON); | |
2847 | break; | |
2848 | } while (1); | |
2849 | } | |
2850 | ||
2851 | static void acpi_nfit_scrub(struct work_struct *work) | |
1f7df6f8 | 2852 | { |
1cf03c00 DW |
2853 | struct device *dev; |
2854 | u64 init_scrub_length = 0; | |
1f7df6f8 | 2855 | struct nfit_spa *nfit_spa; |
1cf03c00 DW |
2856 | u64 init_scrub_address = 0; |
2857 | bool init_ars_done = false; | |
2858 | struct acpi_nfit_desc *acpi_desc; | |
2859 | unsigned int tmo = scrub_timeout; | |
2860 | unsigned int overflow_retry = scrub_overflow_abort; | |
2861 | ||
2862 | acpi_desc = container_of(work, typeof(*acpi_desc), work); | |
2863 | dev = acpi_desc->dev; | |
1f7df6f8 | 2864 | |
1cf03c00 DW |
2865 | /* |
2866 | * We scrub in 2 phases. The first phase waits for any platform | |
2867 | * firmware initiated scrubs to complete and then we go search for the | |
2868 | * affected spa regions to mark them scanned. In the second phase we | |
2869 | * initiate a directed scrub for every range that was not scrubbed in | |
37b137ff VV |
2870 | * phase 1. If we're called for a 'rescan', we harmlessly pass through |
2871 | * the first phase, but really only care about running phase 2, where | |
2872 | * regions can be notified of new poison. | |
1cf03c00 DW |
2873 | */ |
2874 | ||
2875 | /* process platform firmware initiated scrubs */ | |
2876 | retry: | |
2877 | mutex_lock(&acpi_desc->init_mutex); | |
1f7df6f8 | 2878 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
1cf03c00 DW |
2879 | struct nd_cmd_ars_status *ars_status; |
2880 | struct acpi_nfit_system_address *spa; | |
2881 | u64 ars_start, ars_len; | |
2882 | int rc; | |
1f7df6f8 | 2883 | |
1cf03c00 DW |
2884 | if (acpi_desc->cancel) |
2885 | break; | |
2886 | ||
2887 | if (nfit_spa->nd_region) | |
2888 | continue; | |
2889 | ||
2890 | if (init_ars_done) { | |
2891 | /* | |
2892 | * No need to re-query, we're now just | |
2893 | * reconciling all the ranges covered by the | |
2894 | * initial scrub | |
2895 | */ | |
2896 | rc = 0; | |
2897 | } else | |
2898 | rc = acpi_nfit_query_poison(acpi_desc, nfit_spa); | |
2899 | ||
2900 | if (rc == -ENOTTY) { | |
2901 | /* no ars capability, just register spa and move on */ | |
2902 | acpi_nfit_register_region(acpi_desc, nfit_spa); | |
2903 | continue; | |
2904 | } | |
2905 | ||
2906 | if (rc == -EBUSY && !tmo) { | |
2907 | /* fallthrough to directed scrub in phase 2 */ | |
2908 | dev_warn(dev, "timeout awaiting ars results, continuing...\n"); | |
2909 | break; | |
2910 | } else if (rc == -EBUSY) { | |
2911 | mutex_unlock(&acpi_desc->init_mutex); | |
2912 | ssleep(1); | |
2913 | tmo--; | |
2914 | goto retry; | |
2915 | } | |
2916 | ||
2917 | /* we got some results, but there are more pending... */ | |
2918 | if (rc == -ENOSPC && overflow_retry--) { | |
2919 | ars_status = acpi_desc->ars_status; | |
2920 | /* | |
2921 | * Record the original scrub range, so that we | |
2922 | * can recall all the ranges impacted by the | |
2923 | * initial scrub. | |
2924 | */ | |
2925 | if (!init_scrub_length) { | |
2926 | init_scrub_length = ars_status->length; | |
2927 | init_scrub_address = ars_status->address; | |
2928 | } | |
2929 | rc = ars_continue(acpi_desc); | |
2930 | if (rc == 0) { | |
2931 | mutex_unlock(&acpi_desc->init_mutex); | |
2932 | goto retry; | |
2933 | } | |
2934 | } | |
2935 | ||
2936 | if (rc < 0) { | |
2937 | /* | |
2938 | * Initial scrub failed, we'll give it one more | |
2939 | * try below... | |
2940 | */ | |
2941 | break; | |
2942 | } | |
2943 | ||
2944 | /* We got some final results, record completed ranges */ | |
2945 | ars_status = acpi_desc->ars_status; | |
2946 | if (init_scrub_length) { | |
2947 | ars_start = init_scrub_address; | |
2948 | ars_len = ars_start + init_scrub_length; | |
2949 | } else { | |
2950 | ars_start = ars_status->address; | |
2951 | ars_len = ars_status->length; | |
2952 | } | |
2953 | spa = nfit_spa->spa; | |
2954 | ||
2955 | if (!init_ars_done) { | |
2956 | init_ars_done = true; | |
2957 | dev_dbg(dev, "init scrub %#llx + %#llx complete\n", | |
2958 | ars_start, ars_len); | |
2959 | } | |
2960 | if (ars_start <= spa->address && ars_start + ars_len | |
2961 | >= spa->address + spa->length) | |
2962 | acpi_nfit_register_region(acpi_desc, nfit_spa); | |
1f7df6f8 | 2963 | } |
1cf03c00 DW |
2964 | |
2965 | /* | |
2966 | * For all the ranges not covered by an initial scrub we still | |
2967 | * want to see if there are errors, but it's ok to discover them | |
2968 | * asynchronously. | |
2969 | */ | |
2970 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { | |
2971 | /* | |
2972 | * Flag all the ranges that still need scrubbing, but | |
2973 | * register them now to make data available. | |
2974 | */ | |
37b137ff VV |
2975 | if (!nfit_spa->nd_region) { |
2976 | nfit_spa->ars_required = 1; | |
1cf03c00 | 2977 | acpi_nfit_register_region(acpi_desc, nfit_spa); |
37b137ff | 2978 | } |
1cf03c00 | 2979 | } |
9ccaed4b | 2980 | acpi_desc->init_complete = 1; |
1cf03c00 DW |
2981 | |
2982 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) | |
2983 | acpi_nfit_async_scrub(acpi_desc, nfit_spa); | |
37b137ff | 2984 | acpi_desc->scrub_count++; |
80790039 | 2985 | acpi_desc->ars_start_flags = 0; |
37b137ff VV |
2986 | if (acpi_desc->scrub_count_state) |
2987 | sysfs_notify_dirent(acpi_desc->scrub_count_state); | |
1cf03c00 DW |
2988 | mutex_unlock(&acpi_desc->init_mutex); |
2989 | } | |
2990 | ||
2991 | static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc) | |
2992 | { | |
2993 | struct nfit_spa *nfit_spa; | |
2994 | int rc; | |
2995 | ||
2996 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) | |
2997 | if (nfit_spa_type(nfit_spa->spa) == NFIT_SPA_DCR) { | |
2998 | /* BLK regions don't need to wait for ars results */ | |
2999 | rc = acpi_nfit_register_region(acpi_desc, nfit_spa); | |
3000 | if (rc) | |
3001 | return rc; | |
3002 | } | |
3003 | ||
80790039 | 3004 | acpi_desc->ars_start_flags = 0; |
fbabd829 DW |
3005 | if (!acpi_desc->cancel) |
3006 | queue_work(nfit_wq, &acpi_desc->work); | |
1f7df6f8 DW |
3007 | return 0; |
3008 | } | |
3009 | ||
20985164 VV |
3010 | static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc, |
3011 | struct nfit_table_prev *prev) | |
3012 | { | |
3013 | struct device *dev = acpi_desc->dev; | |
3014 | ||
3015 | if (!list_empty(&prev->spas) || | |
3016 | !list_empty(&prev->memdevs) || | |
3017 | !list_empty(&prev->dcrs) || | |
3018 | !list_empty(&prev->bdws) || | |
3019 | !list_empty(&prev->idts) || | |
3020 | !list_empty(&prev->flushes)) { | |
3021 | dev_err(dev, "new nfit deletes entries (unsupported)\n"); | |
3022 | return -ENXIO; | |
3023 | } | |
3024 | return 0; | |
3025 | } | |
3026 | ||
37b137ff VV |
3027 | static int acpi_nfit_desc_init_scrub_attr(struct acpi_nfit_desc *acpi_desc) |
3028 | { | |
3029 | struct device *dev = acpi_desc->dev; | |
3030 | struct kernfs_node *nfit; | |
3031 | struct device *bus_dev; | |
3032 | ||
3033 | if (!ars_supported(acpi_desc->nvdimm_bus)) | |
3034 | return 0; | |
3035 | ||
3036 | bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus); | |
3037 | nfit = sysfs_get_dirent(bus_dev->kobj.sd, "nfit"); | |
3038 | if (!nfit) { | |
3039 | dev_err(dev, "sysfs_get_dirent 'nfit' failed\n"); | |
3040 | return -ENODEV; | |
3041 | } | |
3042 | acpi_desc->scrub_count_state = sysfs_get_dirent(nfit, "scrub"); | |
3043 | sysfs_put(nfit); | |
3044 | if (!acpi_desc->scrub_count_state) { | |
3045 | dev_err(dev, "sysfs_get_dirent 'scrub' failed\n"); | |
3046 | return -ENODEV; | |
3047 | } | |
3048 | ||
3049 | return 0; | |
3050 | } | |
3051 | ||
fbabd829 | 3052 | static void acpi_nfit_unregister(void *data) |
58cd71b4 DW |
3053 | { |
3054 | struct acpi_nfit_desc *acpi_desc = data; | |
3055 | ||
58cd71b4 | 3056 | nvdimm_bus_unregister(acpi_desc->nvdimm_bus); |
58cd71b4 DW |
3057 | } |
3058 | ||
e7a11b44 | 3059 | int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *data, acpi_size sz) |
b94d5230 DW |
3060 | { |
3061 | struct device *dev = acpi_desc->dev; | |
20985164 | 3062 | struct nfit_table_prev prev; |
b94d5230 | 3063 | const void *end; |
1f7df6f8 | 3064 | int rc; |
b94d5230 | 3065 | |
58cd71b4 | 3066 | if (!acpi_desc->nvdimm_bus) { |
37b137ff VV |
3067 | acpi_nfit_init_dsms(acpi_desc); |
3068 | ||
58cd71b4 DW |
3069 | acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, |
3070 | &acpi_desc->nd_desc); | |
3071 | if (!acpi_desc->nvdimm_bus) | |
3072 | return -ENOMEM; | |
37b137ff | 3073 | |
fbabd829 | 3074 | rc = devm_add_action_or_reset(dev, acpi_nfit_unregister, |
58cd71b4 DW |
3075 | acpi_desc); |
3076 | if (rc) | |
3077 | return rc; | |
37b137ff VV |
3078 | |
3079 | rc = acpi_nfit_desc_init_scrub_attr(acpi_desc); | |
3080 | if (rc) | |
3081 | return rc; | |
6839a6d9 VV |
3082 | |
3083 | /* register this acpi_desc for mce notifications */ | |
3084 | mutex_lock(&acpi_desc_lock); | |
3085 | list_add_tail(&acpi_desc->list, &acpi_descs); | |
3086 | mutex_unlock(&acpi_desc_lock); | |
58cd71b4 DW |
3087 | } |
3088 | ||
20985164 VV |
3089 | mutex_lock(&acpi_desc->init_mutex); |
3090 | ||
3091 | INIT_LIST_HEAD(&prev.spas); | |
3092 | INIT_LIST_HEAD(&prev.memdevs); | |
3093 | INIT_LIST_HEAD(&prev.dcrs); | |
3094 | INIT_LIST_HEAD(&prev.bdws); | |
3095 | INIT_LIST_HEAD(&prev.idts); | |
3096 | INIT_LIST_HEAD(&prev.flushes); | |
3097 | ||
3098 | list_cut_position(&prev.spas, &acpi_desc->spas, | |
3099 | acpi_desc->spas.prev); | |
3100 | list_cut_position(&prev.memdevs, &acpi_desc->memdevs, | |
3101 | acpi_desc->memdevs.prev); | |
3102 | list_cut_position(&prev.dcrs, &acpi_desc->dcrs, | |
3103 | acpi_desc->dcrs.prev); | |
3104 | list_cut_position(&prev.bdws, &acpi_desc->bdws, | |
3105 | acpi_desc->bdws.prev); | |
3106 | list_cut_position(&prev.idts, &acpi_desc->idts, | |
3107 | acpi_desc->idts.prev); | |
3108 | list_cut_position(&prev.flushes, &acpi_desc->flushes, | |
3109 | acpi_desc->flushes.prev); | |
b94d5230 | 3110 | |
b94d5230 | 3111 | end = data + sz; |
b94d5230 | 3112 | while (!IS_ERR_OR_NULL(data)) |
20985164 | 3113 | data = add_table(acpi_desc, &prev, data, end); |
b94d5230 DW |
3114 | |
3115 | if (IS_ERR(data)) { | |
3116 | dev_dbg(dev, "%s: nfit table parsing error: %ld\n", __func__, | |
3117 | PTR_ERR(data)); | |
20985164 VV |
3118 | rc = PTR_ERR(data); |
3119 | goto out_unlock; | |
b94d5230 DW |
3120 | } |
3121 | ||
20985164 VV |
3122 | rc = acpi_nfit_check_deletions(acpi_desc, &prev); |
3123 | if (rc) | |
3124 | goto out_unlock; | |
3125 | ||
81ed4e36 DW |
3126 | rc = nfit_mem_init(acpi_desc); |
3127 | if (rc) | |
20985164 | 3128 | goto out_unlock; |
62232e45 | 3129 | |
1f7df6f8 DW |
3130 | rc = acpi_nfit_register_dimms(acpi_desc); |
3131 | if (rc) | |
20985164 VV |
3132 | goto out_unlock; |
3133 | ||
3134 | rc = acpi_nfit_register_regions(acpi_desc); | |
1f7df6f8 | 3135 | |
20985164 VV |
3136 | out_unlock: |
3137 | mutex_unlock(&acpi_desc->init_mutex); | |
3138 | return rc; | |
b94d5230 | 3139 | } |
6bc75619 | 3140 | EXPORT_SYMBOL_GPL(acpi_nfit_init); |
b94d5230 | 3141 | |
7ae0fa43 DW |
3142 | struct acpi_nfit_flush_work { |
3143 | struct work_struct work; | |
3144 | struct completion cmp; | |
3145 | }; | |
3146 | ||
3147 | static void flush_probe(struct work_struct *work) | |
3148 | { | |
3149 | struct acpi_nfit_flush_work *flush; | |
3150 | ||
3151 | flush = container_of(work, typeof(*flush), work); | |
3152 | complete(&flush->cmp); | |
3153 | } | |
3154 | ||
3155 | static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc) | |
3156 | { | |
3157 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); | |
3158 | struct device *dev = acpi_desc->dev; | |
3159 | struct acpi_nfit_flush_work flush; | |
e471486c | 3160 | int rc; |
7ae0fa43 DW |
3161 | |
3162 | /* bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */ | |
3163 | device_lock(dev); | |
3164 | device_unlock(dev); | |
3165 | ||
9ccaed4b DW |
3166 | /* bounce the init_mutex to make init_complete valid */ |
3167 | mutex_lock(&acpi_desc->init_mutex); | |
fbabd829 DW |
3168 | if (acpi_desc->cancel || acpi_desc->init_complete) { |
3169 | mutex_unlock(&acpi_desc->init_mutex); | |
9ccaed4b | 3170 | return 0; |
fbabd829 | 3171 | } |
9ccaed4b | 3172 | |
7ae0fa43 DW |
3173 | /* |
3174 | * Scrub work could take 10s of seconds, userspace may give up so we | |
3175 | * need to be interruptible while waiting. | |
3176 | */ | |
3177 | INIT_WORK_ONSTACK(&flush.work, flush_probe); | |
1c322ac0 | 3178 | init_completion(&flush.cmp); |
7ae0fa43 | 3179 | queue_work(nfit_wq, &flush.work); |
fbabd829 | 3180 | mutex_unlock(&acpi_desc->init_mutex); |
e471486c DW |
3181 | |
3182 | rc = wait_for_completion_interruptible(&flush.cmp); | |
3183 | cancel_work_sync(&flush.work); | |
3184 | return rc; | |
7ae0fa43 DW |
3185 | } |
3186 | ||
87bf572e DW |
3187 | static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc, |
3188 | struct nvdimm *nvdimm, unsigned int cmd) | |
3189 | { | |
3190 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); | |
3191 | ||
3192 | if (nvdimm) | |
3193 | return 0; | |
3194 | if (cmd != ND_CMD_ARS_START) | |
3195 | return 0; | |
3196 | ||
3197 | /* | |
3198 | * The kernel and userspace may race to initiate a scrub, but | |
3199 | * the scrub thread is prepared to lose that initial race. It | |
3200 | * just needs guarantees that any ars it initiates are not | |
3201 | * interrupted by any intervening start reqeusts from userspace. | |
3202 | */ | |
3203 | if (work_busy(&acpi_desc->work)) | |
3204 | return -EBUSY; | |
3205 | ||
3206 | return 0; | |
3207 | } | |
3208 | ||
80790039 | 3209 | int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc, u8 flags) |
37b137ff VV |
3210 | { |
3211 | struct device *dev = acpi_desc->dev; | |
3212 | struct nfit_spa *nfit_spa; | |
3213 | ||
3214 | if (work_busy(&acpi_desc->work)) | |
3215 | return -EBUSY; | |
3216 | ||
fbabd829 DW |
3217 | mutex_lock(&acpi_desc->init_mutex); |
3218 | if (acpi_desc->cancel) { | |
3219 | mutex_unlock(&acpi_desc->init_mutex); | |
37b137ff | 3220 | return 0; |
fbabd829 | 3221 | } |
37b137ff | 3222 | |
37b137ff VV |
3223 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
3224 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
3225 | ||
3226 | if (nfit_spa_type(spa) != NFIT_SPA_PM) | |
3227 | continue; | |
3228 | ||
3229 | nfit_spa->ars_required = 1; | |
3230 | } | |
80790039 | 3231 | acpi_desc->ars_start_flags = flags; |
37b137ff VV |
3232 | queue_work(nfit_wq, &acpi_desc->work); |
3233 | dev_dbg(dev, "%s: ars_scan triggered\n", __func__); | |
3234 | mutex_unlock(&acpi_desc->init_mutex); | |
3235 | ||
3236 | return 0; | |
3237 | } | |
3238 | ||
a61fe6f7 | 3239 | void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev) |
b94d5230 DW |
3240 | { |
3241 | struct nvdimm_bus_descriptor *nd_desc; | |
b94d5230 DW |
3242 | |
3243 | dev_set_drvdata(dev, acpi_desc); | |
3244 | acpi_desc->dev = dev; | |
6bc75619 | 3245 | acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io; |
b94d5230 DW |
3246 | nd_desc = &acpi_desc->nd_desc; |
3247 | nd_desc->provider_name = "ACPI.NFIT"; | |
bc9775d8 | 3248 | nd_desc->module = THIS_MODULE; |
b94d5230 | 3249 | nd_desc->ndctl = acpi_nfit_ctl; |
7ae0fa43 | 3250 | nd_desc->flush_probe = acpi_nfit_flush_probe; |
87bf572e | 3251 | nd_desc->clear_to_send = acpi_nfit_clear_to_send; |
45def22c | 3252 | nd_desc->attr_groups = acpi_nfit_attribute_groups; |
b94d5230 | 3253 | |
20985164 VV |
3254 | INIT_LIST_HEAD(&acpi_desc->spas); |
3255 | INIT_LIST_HEAD(&acpi_desc->dcrs); | |
3256 | INIT_LIST_HEAD(&acpi_desc->bdws); | |
3257 | INIT_LIST_HEAD(&acpi_desc->idts); | |
3258 | INIT_LIST_HEAD(&acpi_desc->flushes); | |
3259 | INIT_LIST_HEAD(&acpi_desc->memdevs); | |
3260 | INIT_LIST_HEAD(&acpi_desc->dimms); | |
6839a6d9 | 3261 | INIT_LIST_HEAD(&acpi_desc->list); |
20985164 | 3262 | mutex_init(&acpi_desc->init_mutex); |
1cf03c00 | 3263 | INIT_WORK(&acpi_desc->work, acpi_nfit_scrub); |
20985164 | 3264 | } |
a61fe6f7 | 3265 | EXPORT_SYMBOL_GPL(acpi_nfit_desc_init); |
20985164 | 3266 | |
3c87f372 DW |
3267 | static void acpi_nfit_put_table(void *table) |
3268 | { | |
3269 | acpi_put_table(table); | |
3270 | } | |
3271 | ||
fbabd829 DW |
3272 | void acpi_nfit_shutdown(void *data) |
3273 | { | |
3274 | struct acpi_nfit_desc *acpi_desc = data; | |
3275 | struct device *bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus); | |
3276 | ||
3277 | /* | |
3278 | * Destruct under acpi_desc_lock so that nfit_handle_mce does not | |
3279 | * race teardown | |
3280 | */ | |
3281 | mutex_lock(&acpi_desc_lock); | |
3282 | list_del(&acpi_desc->list); | |
3283 | mutex_unlock(&acpi_desc_lock); | |
3284 | ||
3285 | mutex_lock(&acpi_desc->init_mutex); | |
3286 | acpi_desc->cancel = 1; | |
3287 | mutex_unlock(&acpi_desc->init_mutex); | |
3288 | ||
3289 | /* | |
3290 | * Bounce the nvdimm bus lock to make sure any in-flight | |
3291 | * acpi_nfit_ars_rescan() submissions have had a chance to | |
3292 | * either submit or see ->cancel set. | |
3293 | */ | |
3294 | device_lock(bus_dev); | |
3295 | device_unlock(bus_dev); | |
3296 | ||
3297 | flush_workqueue(nfit_wq); | |
3298 | } | |
3299 | EXPORT_SYMBOL_GPL(acpi_nfit_shutdown); | |
3300 | ||
20985164 VV |
3301 | static int acpi_nfit_add(struct acpi_device *adev) |
3302 | { | |
3303 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; | |
3304 | struct acpi_nfit_desc *acpi_desc; | |
3305 | struct device *dev = &adev->dev; | |
3306 | struct acpi_table_header *tbl; | |
3307 | acpi_status status = AE_OK; | |
3308 | acpi_size sz; | |
31932041 | 3309 | int rc = 0; |
20985164 | 3310 | |
6b11d1d6 | 3311 | status = acpi_get_table(ACPI_SIG_NFIT, 0, &tbl); |
20985164 VV |
3312 | if (ACPI_FAILURE(status)) { |
3313 | /* This is ok, we could have an nvdimm hotplugged later */ | |
3314 | dev_dbg(dev, "failed to find NFIT at startup\n"); | |
3315 | return 0; | |
3316 | } | |
3c87f372 DW |
3317 | |
3318 | rc = devm_add_action_or_reset(dev, acpi_nfit_put_table, tbl); | |
3319 | if (rc) | |
3320 | return rc; | |
6b11d1d6 | 3321 | sz = tbl->length; |
20985164 | 3322 | |
a61fe6f7 DW |
3323 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
3324 | if (!acpi_desc) | |
3325 | return -ENOMEM; | |
3326 | acpi_nfit_desc_init(acpi_desc, &adev->dev); | |
20985164 | 3327 | |
e7a11b44 | 3328 | /* Save the acpi header for exporting the revision via sysfs */ |
6b577c9d | 3329 | acpi_desc->acpi_header = *tbl; |
20985164 VV |
3330 | |
3331 | /* Evaluate _FIT and override with that if present */ | |
3332 | status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf); | |
3333 | if (ACPI_SUCCESS(status) && buf.length > 0) { | |
e7a11b44 DW |
3334 | union acpi_object *obj = buf.pointer; |
3335 | ||
3336 | if (obj->type == ACPI_TYPE_BUFFER) | |
3337 | rc = acpi_nfit_init(acpi_desc, obj->buffer.pointer, | |
3338 | obj->buffer.length); | |
3339 | else | |
6b577c9d LK |
3340 | dev_dbg(dev, "%s invalid type %d, ignoring _FIT\n", |
3341 | __func__, (int) obj->type); | |
31932041 DW |
3342 | kfree(buf.pointer); |
3343 | } else | |
e7a11b44 DW |
3344 | /* skip over the lead-in header table */ |
3345 | rc = acpi_nfit_init(acpi_desc, (void *) tbl | |
3346 | + sizeof(struct acpi_table_nfit), | |
3347 | sz - sizeof(struct acpi_table_nfit)); | |
fbabd829 DW |
3348 | |
3349 | if (rc) | |
3350 | return rc; | |
3351 | return devm_add_action_or_reset(dev, acpi_nfit_shutdown, acpi_desc); | |
b94d5230 DW |
3352 | } |
3353 | ||
3354 | static int acpi_nfit_remove(struct acpi_device *adev) | |
3355 | { | |
fbabd829 | 3356 | /* see acpi_nfit_unregister */ |
b94d5230 DW |
3357 | return 0; |
3358 | } | |
3359 | ||
56b47fe6 | 3360 | static void acpi_nfit_update_notify(struct device *dev, acpi_handle handle) |
20985164 | 3361 | { |
c14a868a | 3362 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev); |
20985164 | 3363 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
e7a11b44 | 3364 | union acpi_object *obj; |
20985164 VV |
3365 | acpi_status status; |
3366 | int ret; | |
3367 | ||
20985164 VV |
3368 | if (!dev->driver) { |
3369 | /* dev->driver may be null if we're being removed */ | |
3370 | dev_dbg(dev, "%s: no driver found for dev\n", __func__); | |
c14a868a | 3371 | return; |
20985164 VV |
3372 | } |
3373 | ||
3374 | if (!acpi_desc) { | |
a61fe6f7 DW |
3375 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
3376 | if (!acpi_desc) | |
c14a868a DW |
3377 | return; |
3378 | acpi_nfit_desc_init(acpi_desc, dev); | |
7ae0fa43 DW |
3379 | } else { |
3380 | /* | |
3381 | * Finish previous registration before considering new | |
3382 | * regions. | |
3383 | */ | |
3384 | flush_workqueue(nfit_wq); | |
20985164 VV |
3385 | } |
3386 | ||
3387 | /* Evaluate _FIT */ | |
c14a868a | 3388 | status = acpi_evaluate_object(handle, "_FIT", NULL, &buf); |
20985164 VV |
3389 | if (ACPI_FAILURE(status)) { |
3390 | dev_err(dev, "failed to evaluate _FIT\n"); | |
c14a868a | 3391 | return; |
20985164 VV |
3392 | } |
3393 | ||
6b577c9d LK |
3394 | obj = buf.pointer; |
3395 | if (obj->type == ACPI_TYPE_BUFFER) { | |
e7a11b44 DW |
3396 | ret = acpi_nfit_init(acpi_desc, obj->buffer.pointer, |
3397 | obj->buffer.length); | |
31932041 | 3398 | if (ret) |
6b577c9d | 3399 | dev_err(dev, "failed to merge updated NFIT\n"); |
31932041 | 3400 | } else |
6b577c9d | 3401 | dev_err(dev, "Invalid _FIT\n"); |
20985164 | 3402 | kfree(buf.pointer); |
c14a868a | 3403 | } |
56b47fe6 TK |
3404 | |
3405 | static void acpi_nfit_uc_error_notify(struct device *dev, acpi_handle handle) | |
3406 | { | |
3407 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev); | |
80790039 TK |
3408 | u8 flags = (acpi_desc->scrub_mode == HW_ERROR_SCRUB_ON) ? |
3409 | 0 : ND_ARS_RETURN_PREV_DATA; | |
56b47fe6 | 3410 | |
80790039 | 3411 | acpi_nfit_ars_rescan(acpi_desc, flags); |
56b47fe6 TK |
3412 | } |
3413 | ||
3414 | void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event) | |
3415 | { | |
3416 | dev_dbg(dev, "%s: event: 0x%x\n", __func__, event); | |
3417 | ||
3418 | switch (event) { | |
3419 | case NFIT_NOTIFY_UPDATE: | |
3420 | return acpi_nfit_update_notify(dev, handle); | |
3421 | case NFIT_NOTIFY_UC_MEMORY_ERROR: | |
3422 | return acpi_nfit_uc_error_notify(dev, handle); | |
3423 | default: | |
3424 | return; | |
3425 | } | |
3426 | } | |
c14a868a | 3427 | EXPORT_SYMBOL_GPL(__acpi_nfit_notify); |
20985164 | 3428 | |
c14a868a DW |
3429 | static void acpi_nfit_notify(struct acpi_device *adev, u32 event) |
3430 | { | |
3431 | device_lock(&adev->dev); | |
3432 | __acpi_nfit_notify(&adev->dev, adev->handle, event); | |
3433 | device_unlock(&adev->dev); | |
20985164 VV |
3434 | } |
3435 | ||
b94d5230 DW |
3436 | static const struct acpi_device_id acpi_nfit_ids[] = { |
3437 | { "ACPI0012", 0 }, | |
3438 | { "", 0 }, | |
3439 | }; | |
3440 | MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids); | |
3441 | ||
3442 | static struct acpi_driver acpi_nfit_driver = { | |
3443 | .name = KBUILD_MODNAME, | |
3444 | .ids = acpi_nfit_ids, | |
3445 | .ops = { | |
3446 | .add = acpi_nfit_add, | |
3447 | .remove = acpi_nfit_remove, | |
20985164 | 3448 | .notify = acpi_nfit_notify, |
b94d5230 DW |
3449 | }, |
3450 | }; | |
3451 | ||
3452 | static __init int nfit_init(void) | |
3453 | { | |
7e700d2c PB |
3454 | int ret; |
3455 | ||
b94d5230 DW |
3456 | BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40); |
3457 | BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56); | |
3458 | BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48); | |
3459 | BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20); | |
3460 | BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9); | |
3461 | BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80); | |
3462 | BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40); | |
3463 | ||
41c8bdb3 AS |
3464 | guid_parse(UUID_VOLATILE_MEMORY, &nfit_uuid[NFIT_SPA_VOLATILE]); |
3465 | guid_parse(UUID_PERSISTENT_MEMORY, &nfit_uuid[NFIT_SPA_PM]); | |
3466 | guid_parse(UUID_CONTROL_REGION, &nfit_uuid[NFIT_SPA_DCR]); | |
3467 | guid_parse(UUID_DATA_REGION, &nfit_uuid[NFIT_SPA_BDW]); | |
3468 | guid_parse(UUID_VOLATILE_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_VDISK]); | |
3469 | guid_parse(UUID_VOLATILE_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_VCD]); | |
3470 | guid_parse(UUID_PERSISTENT_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_PDISK]); | |
3471 | guid_parse(UUID_PERSISTENT_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_PCD]); | |
3472 | guid_parse(UUID_NFIT_BUS, &nfit_uuid[NFIT_DEV_BUS]); | |
3473 | guid_parse(UUID_NFIT_DIMM, &nfit_uuid[NFIT_DEV_DIMM]); | |
3474 | guid_parse(UUID_NFIT_DIMM_N_HPE1, &nfit_uuid[NFIT_DEV_DIMM_N_HPE1]); | |
3475 | guid_parse(UUID_NFIT_DIMM_N_HPE2, &nfit_uuid[NFIT_DEV_DIMM_N_HPE2]); | |
3476 | guid_parse(UUID_NFIT_DIMM_N_MSFT, &nfit_uuid[NFIT_DEV_DIMM_N_MSFT]); | |
b94d5230 | 3477 | |
7ae0fa43 DW |
3478 | nfit_wq = create_singlethread_workqueue("nfit"); |
3479 | if (!nfit_wq) | |
3480 | return -ENOMEM; | |
3481 | ||
6839a6d9 | 3482 | nfit_mce_register(); |
7e700d2c PB |
3483 | ret = acpi_bus_register_driver(&acpi_nfit_driver); |
3484 | if (ret) { | |
3485 | nfit_mce_unregister(); | |
3486 | destroy_workqueue(nfit_wq); | |
3487 | } | |
3488 | ||
3489 | return ret; | |
6839a6d9 | 3490 | |
b94d5230 DW |
3491 | } |
3492 | ||
3493 | static __exit void nfit_exit(void) | |
3494 | { | |
6839a6d9 | 3495 | nfit_mce_unregister(); |
b94d5230 | 3496 | acpi_bus_unregister_driver(&acpi_nfit_driver); |
7ae0fa43 | 3497 | destroy_workqueue(nfit_wq); |
6839a6d9 | 3498 | WARN_ON(!list_empty(&acpi_descs)); |
b94d5230 DW |
3499 | } |
3500 | ||
3501 | module_init(nfit_init); | |
3502 | module_exit(nfit_exit); | |
3503 | MODULE_LICENSE("GPL v2"); | |
3504 | MODULE_AUTHOR("Intel Corporation"); |