]>
Commit | Line | Data |
---|---|---|
b94d5230 DW |
1 | /* |
2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of version 2 of the GNU General Public License as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | */ | |
13 | #include <linux/list_sort.h> | |
14 | #include <linux/libnvdimm.h> | |
15 | #include <linux/module.h> | |
047fc8a1 | 16 | #include <linux/mutex.h> |
62232e45 | 17 | #include <linux/ndctl.h> |
37b137ff | 18 | #include <linux/sysfs.h> |
0caeef63 | 19 | #include <linux/delay.h> |
b94d5230 DW |
20 | #include <linux/list.h> |
21 | #include <linux/acpi.h> | |
eaf96153 | 22 | #include <linux/sort.h> |
047fc8a1 | 23 | #include <linux/io.h> |
1cf03c00 | 24 | #include <linux/nd.h> |
96601adb | 25 | #include <asm/cacheflush.h> |
b94d5230 DW |
26 | #include "nfit.h" |
27 | ||
047fc8a1 RZ |
28 | /* |
29 | * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is | |
30 | * irrelevant. | |
31 | */ | |
2f8e2c87 | 32 | #include <linux/io-64-nonatomic-hi-lo.h> |
047fc8a1 | 33 | |
4d88a97a DW |
34 | static bool force_enable_dimms; |
35 | module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR); | |
36 | MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status"); | |
37 | ||
1cf03c00 DW |
38 | static unsigned int scrub_timeout = NFIT_ARS_TIMEOUT; |
39 | module_param(scrub_timeout, uint, S_IRUGO|S_IWUSR); | |
40 | MODULE_PARM_DESC(scrub_timeout, "Initial scrub timeout in seconds"); | |
41 | ||
42 | /* after three payloads of overflow, it's dead jim */ | |
43 | static unsigned int scrub_overflow_abort = 3; | |
44 | module_param(scrub_overflow_abort, uint, S_IRUGO|S_IWUSR); | |
45 | MODULE_PARM_DESC(scrub_overflow_abort, | |
46 | "Number of times we overflow ARS results before abort"); | |
47 | ||
87554098 DW |
48 | static bool disable_vendor_specific; |
49 | module_param(disable_vendor_specific, bool, S_IRUGO); | |
50 | MODULE_PARM_DESC(disable_vendor_specific, | |
f2668fa7 | 51 | "Limit commands to the publicly specified set"); |
87554098 | 52 | |
095ab4b3 LK |
53 | static unsigned long override_dsm_mask; |
54 | module_param(override_dsm_mask, ulong, S_IRUGO); | |
55 | MODULE_PARM_DESC(override_dsm_mask, "Bitmask of allowed NVDIMM DSM functions"); | |
56 | ||
ba650cfc LK |
57 | static int default_dsm_family = -1; |
58 | module_param(default_dsm_family, int, S_IRUGO); | |
59 | MODULE_PARM_DESC(default_dsm_family, | |
60 | "Try this DSM type first when identifying NVDIMM family"); | |
61 | ||
6839a6d9 VV |
62 | LIST_HEAD(acpi_descs); |
63 | DEFINE_MUTEX(acpi_desc_lock); | |
64 | ||
7ae0fa43 DW |
65 | static struct workqueue_struct *nfit_wq; |
66 | ||
20985164 VV |
67 | struct nfit_table_prev { |
68 | struct list_head spas; | |
69 | struct list_head memdevs; | |
70 | struct list_head dcrs; | |
71 | struct list_head bdws; | |
72 | struct list_head idts; | |
73 | struct list_head flushes; | |
74 | }; | |
75 | ||
41c8bdb3 | 76 | static guid_t nfit_uuid[NFIT_UUID_MAX]; |
b94d5230 | 77 | |
41c8bdb3 | 78 | const guid_t *to_nfit_uuid(enum nfit_uuids id) |
b94d5230 | 79 | { |
41c8bdb3 | 80 | return &nfit_uuid[id]; |
b94d5230 | 81 | } |
6bc75619 | 82 | EXPORT_SYMBOL(to_nfit_uuid); |
b94d5230 | 83 | |
62232e45 DW |
84 | static struct acpi_nfit_desc *to_acpi_nfit_desc( |
85 | struct nvdimm_bus_descriptor *nd_desc) | |
86 | { | |
87 | return container_of(nd_desc, struct acpi_nfit_desc, nd_desc); | |
88 | } | |
89 | ||
90 | static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc) | |
91 | { | |
92 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
93 | ||
94 | /* | |
95 | * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct | |
96 | * acpi_device. | |
97 | */ | |
98 | if (!nd_desc->provider_name | |
99 | || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0) | |
100 | return NULL; | |
101 | ||
102 | return to_acpi_device(acpi_desc->dev); | |
103 | } | |
104 | ||
d6eb270c | 105 | static int xlat_bus_status(void *buf, unsigned int cmd, u32 status) |
aef25338 | 106 | { |
d4f32367 | 107 | struct nd_cmd_clear_error *clear_err; |
aef25338 | 108 | struct nd_cmd_ars_status *ars_status; |
aef25338 DW |
109 | u16 flags; |
110 | ||
111 | switch (cmd) { | |
112 | case ND_CMD_ARS_CAP: | |
11294d63 | 113 | if ((status & 0xffff) == NFIT_ARS_CAP_NONE) |
aef25338 DW |
114 | return -ENOTTY; |
115 | ||
116 | /* Command failed */ | |
11294d63 | 117 | if (status & 0xffff) |
aef25338 DW |
118 | return -EIO; |
119 | ||
120 | /* No supported scan types for this range */ | |
121 | flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE; | |
11294d63 | 122 | if ((status >> 16 & flags) == 0) |
aef25338 | 123 | return -ENOTTY; |
9a901f54 | 124 | return 0; |
aef25338 | 125 | case ND_CMD_ARS_START: |
aef25338 | 126 | /* ARS is in progress */ |
11294d63 | 127 | if ((status & 0xffff) == NFIT_ARS_START_BUSY) |
aef25338 DW |
128 | return -EBUSY; |
129 | ||
130 | /* Command failed */ | |
11294d63 | 131 | if (status & 0xffff) |
aef25338 | 132 | return -EIO; |
9a901f54 | 133 | return 0; |
aef25338 DW |
134 | case ND_CMD_ARS_STATUS: |
135 | ars_status = buf; | |
136 | /* Command failed */ | |
11294d63 | 137 | if (status & 0xffff) |
aef25338 DW |
138 | return -EIO; |
139 | /* Check extended status (Upper two bytes) */ | |
11294d63 | 140 | if (status == NFIT_ARS_STATUS_DONE) |
aef25338 DW |
141 | return 0; |
142 | ||
143 | /* ARS is in progress */ | |
11294d63 | 144 | if (status == NFIT_ARS_STATUS_BUSY) |
aef25338 DW |
145 | return -EBUSY; |
146 | ||
147 | /* No ARS performed for the current boot */ | |
11294d63 | 148 | if (status == NFIT_ARS_STATUS_NONE) |
aef25338 DW |
149 | return -EAGAIN; |
150 | ||
151 | /* | |
152 | * ARS interrupted, either we overflowed or some other | |
153 | * agent wants the scan to stop. If we didn't overflow | |
154 | * then just continue with the returned results. | |
155 | */ | |
11294d63 | 156 | if (status == NFIT_ARS_STATUS_INTR) { |
82aa37cf DW |
157 | if (ars_status->out_length >= 40 && (ars_status->flags |
158 | & NFIT_ARS_F_OVERFLOW)) | |
aef25338 DW |
159 | return -ENOSPC; |
160 | return 0; | |
161 | } | |
162 | ||
163 | /* Unknown status */ | |
11294d63 | 164 | if (status >> 16) |
aef25338 | 165 | return -EIO; |
9a901f54 | 166 | return 0; |
d4f32367 DW |
167 | case ND_CMD_CLEAR_ERROR: |
168 | clear_err = buf; | |
11294d63 | 169 | if (status & 0xffff) |
d4f32367 DW |
170 | return -EIO; |
171 | if (!clear_err->cleared) | |
172 | return -EIO; | |
173 | if (clear_err->length > clear_err->cleared) | |
174 | return clear_err->cleared; | |
9a901f54 | 175 | return 0; |
aef25338 DW |
176 | default: |
177 | break; | |
178 | } | |
179 | ||
11294d63 DW |
180 | /* all other non-zero status results in an error */ |
181 | if (status) | |
182 | return -EIO; | |
aef25338 DW |
183 | return 0; |
184 | } | |
185 | ||
9d62ed96 DW |
186 | static int xlat_nvdimm_status(void *buf, unsigned int cmd, u32 status) |
187 | { | |
188 | switch (cmd) { | |
189 | case ND_CMD_GET_CONFIG_SIZE: | |
190 | if (status >> 16 & ND_CONFIG_LOCKED) | |
191 | return -EACCES; | |
192 | break; | |
193 | default: | |
194 | break; | |
195 | } | |
196 | ||
197 | /* all other non-zero status results in an error */ | |
198 | if (status) | |
199 | return -EIO; | |
200 | return 0; | |
201 | } | |
202 | ||
d6eb270c DW |
203 | static int xlat_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd, |
204 | u32 status) | |
205 | { | |
206 | if (!nvdimm) | |
207 | return xlat_bus_status(buf, cmd, status); | |
9d62ed96 | 208 | return xlat_nvdimm_status(buf, cmd, status); |
d6eb270c DW |
209 | } |
210 | ||
a7de92da DW |
211 | int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm, |
212 | unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc) | |
b94d5230 | 213 | { |
62232e45 | 214 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); |
62232e45 | 215 | union acpi_object in_obj, in_buf, *out_obj; |
31eca76b | 216 | const struct nd_cmd_desc *desc = NULL; |
62232e45 | 217 | struct device *dev = acpi_desc->dev; |
31eca76b | 218 | struct nd_cmd_pkg *call_pkg = NULL; |
62232e45 | 219 | const char *cmd_name, *dimm_name; |
31eca76b | 220 | unsigned long cmd_mask, dsm_mask; |
11294d63 | 221 | u32 offset, fw_status = 0; |
62232e45 | 222 | acpi_handle handle; |
31eca76b | 223 | unsigned int func; |
41c8bdb3 | 224 | const guid_t *guid; |
62232e45 DW |
225 | int rc, i; |
226 | ||
31eca76b DW |
227 | func = cmd; |
228 | if (cmd == ND_CMD_CALL) { | |
229 | call_pkg = buf; | |
230 | func = call_pkg->nd_command; | |
231 | } | |
232 | ||
62232e45 DW |
233 | if (nvdimm) { |
234 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
235 | struct acpi_device *adev = nfit_mem->adev; | |
236 | ||
237 | if (!adev) | |
238 | return -ENOTTY; | |
31eca76b DW |
239 | if (call_pkg && nfit_mem->family != call_pkg->nd_family) |
240 | return -ENOTTY; | |
241 | ||
047fc8a1 | 242 | dimm_name = nvdimm_name(nvdimm); |
62232e45 | 243 | cmd_name = nvdimm_cmd_name(cmd); |
e3654eca | 244 | cmd_mask = nvdimm_cmd_mask(nvdimm); |
62232e45 DW |
245 | dsm_mask = nfit_mem->dsm_mask; |
246 | desc = nd_cmd_dimm_desc(cmd); | |
41c8bdb3 | 247 | guid = to_nfit_uuid(nfit_mem->family); |
62232e45 DW |
248 | handle = adev->handle; |
249 | } else { | |
250 | struct acpi_device *adev = to_acpi_dev(acpi_desc); | |
251 | ||
252 | cmd_name = nvdimm_bus_cmd_name(cmd); | |
e3654eca | 253 | cmd_mask = nd_desc->cmd_mask; |
31eca76b | 254 | dsm_mask = cmd_mask; |
7db5bb33 JH |
255 | if (cmd == ND_CMD_CALL) |
256 | dsm_mask = nd_desc->bus_dsm_mask; | |
62232e45 | 257 | desc = nd_cmd_bus_desc(cmd); |
41c8bdb3 | 258 | guid = to_nfit_uuid(NFIT_DEV_BUS); |
62232e45 DW |
259 | handle = adev->handle; |
260 | dimm_name = "bus"; | |
261 | } | |
262 | ||
263 | if (!desc || (cmd && (desc->out_num + desc->in_num == 0))) | |
264 | return -ENOTTY; | |
265 | ||
31eca76b | 266 | if (!test_bit(cmd, &cmd_mask) || !test_bit(func, &dsm_mask)) |
62232e45 DW |
267 | return -ENOTTY; |
268 | ||
269 | in_obj.type = ACPI_TYPE_PACKAGE; | |
270 | in_obj.package.count = 1; | |
271 | in_obj.package.elements = &in_buf; | |
272 | in_buf.type = ACPI_TYPE_BUFFER; | |
273 | in_buf.buffer.pointer = buf; | |
274 | in_buf.buffer.length = 0; | |
275 | ||
276 | /* libnvdimm has already validated the input envelope */ | |
277 | for (i = 0; i < desc->in_num; i++) | |
278 | in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc, | |
279 | i, buf); | |
280 | ||
31eca76b DW |
281 | if (call_pkg) { |
282 | /* skip over package wrapper */ | |
283 | in_buf.buffer.pointer = (void *) &call_pkg->nd_payload; | |
284 | in_buf.buffer.length = call_pkg->nd_size_in; | |
285 | } | |
286 | ||
7699a6a3 DW |
287 | dev_dbg(dev, "%s:%s cmd: %d: func: %d input length: %d\n", |
288 | __func__, dimm_name, cmd, func, in_buf.buffer.length); | |
289 | print_hex_dump_debug("nvdimm in ", DUMP_PREFIX_OFFSET, 4, 4, | |
31eca76b DW |
290 | in_buf.buffer.pointer, |
291 | min_t(u32, 256, in_buf.buffer.length), true); | |
62232e45 | 292 | |
94116f81 | 293 | out_obj = acpi_evaluate_dsm(handle, guid, 1, func, &in_obj); |
62232e45 DW |
294 | if (!out_obj) { |
295 | dev_dbg(dev, "%s:%s _DSM failed cmd: %s\n", __func__, dimm_name, | |
296 | cmd_name); | |
297 | return -EINVAL; | |
298 | } | |
299 | ||
31eca76b DW |
300 | if (call_pkg) { |
301 | call_pkg->nd_fw_size = out_obj->buffer.length; | |
302 | memcpy(call_pkg->nd_payload + call_pkg->nd_size_in, | |
303 | out_obj->buffer.pointer, | |
304 | min(call_pkg->nd_fw_size, call_pkg->nd_size_out)); | |
305 | ||
306 | ACPI_FREE(out_obj); | |
307 | /* | |
308 | * Need to support FW function w/o known size in advance. | |
309 | * Caller can determine required size based upon nd_fw_size. | |
310 | * If we return an error (like elsewhere) then caller wouldn't | |
311 | * be able to rely upon data returned to make calculation. | |
312 | */ | |
313 | return 0; | |
314 | } | |
315 | ||
62232e45 DW |
316 | if (out_obj->package.type != ACPI_TYPE_BUFFER) { |
317 | dev_dbg(dev, "%s:%s unexpected output object type cmd: %s type: %d\n", | |
318 | __func__, dimm_name, cmd_name, out_obj->type); | |
319 | rc = -EINVAL; | |
320 | goto out; | |
321 | } | |
322 | ||
7699a6a3 DW |
323 | dev_dbg(dev, "%s:%s cmd: %s output length: %d\n", __func__, dimm_name, |
324 | cmd_name, out_obj->buffer.length); | |
325 | print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4, 4, | |
326 | out_obj->buffer.pointer, | |
327 | min_t(u32, 128, out_obj->buffer.length), true); | |
62232e45 DW |
328 | |
329 | for (i = 0, offset = 0; i < desc->out_num; i++) { | |
330 | u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf, | |
efda1b5d DW |
331 | (u32 *) out_obj->buffer.pointer, |
332 | out_obj->buffer.length - offset); | |
62232e45 DW |
333 | |
334 | if (offset + out_size > out_obj->buffer.length) { | |
335 | dev_dbg(dev, "%s:%s output object underflow cmd: %s field: %d\n", | |
336 | __func__, dimm_name, cmd_name, i); | |
337 | break; | |
338 | } | |
339 | ||
340 | if (in_buf.buffer.length + offset + out_size > buf_len) { | |
341 | dev_dbg(dev, "%s:%s output overrun cmd: %s field: %d\n", | |
342 | __func__, dimm_name, cmd_name, i); | |
343 | rc = -ENXIO; | |
344 | goto out; | |
345 | } | |
346 | memcpy(buf + in_buf.buffer.length + offset, | |
347 | out_obj->buffer.pointer + offset, out_size); | |
348 | offset += out_size; | |
349 | } | |
11294d63 DW |
350 | |
351 | /* | |
352 | * Set fw_status for all the commands with a known format to be | |
353 | * later interpreted by xlat_status(). | |
354 | */ | |
355 | if (i >= 1 && ((cmd >= ND_CMD_ARS_CAP && cmd <= ND_CMD_CLEAR_ERROR) | |
356 | || (cmd >= ND_CMD_SMART && cmd <= ND_CMD_VENDOR))) | |
357 | fw_status = *(u32 *) out_obj->buffer.pointer; | |
358 | ||
62232e45 DW |
359 | if (offset + in_buf.buffer.length < buf_len) { |
360 | if (i >= 1) { | |
361 | /* | |
362 | * status valid, return the number of bytes left | |
363 | * unfilled in the output buffer | |
364 | */ | |
365 | rc = buf_len - offset - in_buf.buffer.length; | |
aef25338 | 366 | if (cmd_rc) |
d6eb270c DW |
367 | *cmd_rc = xlat_status(nvdimm, buf, cmd, |
368 | fw_status); | |
62232e45 DW |
369 | } else { |
370 | dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n", | |
371 | __func__, dimm_name, cmd_name, buf_len, | |
372 | offset); | |
373 | rc = -ENXIO; | |
374 | } | |
2eea6582 | 375 | } else { |
62232e45 | 376 | rc = 0; |
2eea6582 | 377 | if (cmd_rc) |
d6eb270c | 378 | *cmd_rc = xlat_status(nvdimm, buf, cmd, fw_status); |
2eea6582 | 379 | } |
62232e45 DW |
380 | |
381 | out: | |
382 | ACPI_FREE(out_obj); | |
383 | ||
384 | return rc; | |
b94d5230 | 385 | } |
a7de92da | 386 | EXPORT_SYMBOL_GPL(acpi_nfit_ctl); |
b94d5230 DW |
387 | |
388 | static const char *spa_type_name(u16 type) | |
389 | { | |
390 | static const char *to_name[] = { | |
391 | [NFIT_SPA_VOLATILE] = "volatile", | |
392 | [NFIT_SPA_PM] = "pmem", | |
393 | [NFIT_SPA_DCR] = "dimm-control-region", | |
394 | [NFIT_SPA_BDW] = "block-data-window", | |
395 | [NFIT_SPA_VDISK] = "volatile-disk", | |
396 | [NFIT_SPA_VCD] = "volatile-cd", | |
397 | [NFIT_SPA_PDISK] = "persistent-disk", | |
398 | [NFIT_SPA_PCD] = "persistent-cd", | |
399 | ||
400 | }; | |
401 | ||
402 | if (type > NFIT_SPA_PCD) | |
403 | return "unknown"; | |
404 | ||
405 | return to_name[type]; | |
406 | } | |
407 | ||
6839a6d9 | 408 | int nfit_spa_type(struct acpi_nfit_system_address *spa) |
b94d5230 DW |
409 | { |
410 | int i; | |
411 | ||
412 | for (i = 0; i < NFIT_UUID_MAX; i++) | |
41c8bdb3 | 413 | if (guid_equal(to_nfit_uuid(i), (guid_t *)&spa->range_guid)) |
b94d5230 DW |
414 | return i; |
415 | return -1; | |
416 | } | |
417 | ||
418 | static bool add_spa(struct acpi_nfit_desc *acpi_desc, | |
20985164 | 419 | struct nfit_table_prev *prev, |
b94d5230 DW |
420 | struct acpi_nfit_system_address *spa) |
421 | { | |
422 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
423 | struct nfit_spa *nfit_spa; |
424 | ||
31932041 DW |
425 | if (spa->header.length != sizeof(*spa)) |
426 | return false; | |
427 | ||
20985164 | 428 | list_for_each_entry(nfit_spa, &prev->spas, list) { |
31932041 | 429 | if (memcmp(nfit_spa->spa, spa, sizeof(*spa)) == 0) { |
20985164 VV |
430 | list_move_tail(&nfit_spa->list, &acpi_desc->spas); |
431 | return true; | |
432 | } | |
433 | } | |
b94d5230 | 434 | |
31932041 DW |
435 | nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa) + sizeof(*spa), |
436 | GFP_KERNEL); | |
b94d5230 DW |
437 | if (!nfit_spa) |
438 | return false; | |
439 | INIT_LIST_HEAD(&nfit_spa->list); | |
31932041 | 440 | memcpy(nfit_spa->spa, spa, sizeof(*spa)); |
b94d5230 DW |
441 | list_add_tail(&nfit_spa->list, &acpi_desc->spas); |
442 | dev_dbg(dev, "%s: spa index: %d type: %s\n", __func__, | |
443 | spa->range_index, | |
444 | spa_type_name(nfit_spa_type(spa))); | |
445 | return true; | |
446 | } | |
447 | ||
448 | static bool add_memdev(struct acpi_nfit_desc *acpi_desc, | |
20985164 | 449 | struct nfit_table_prev *prev, |
b94d5230 DW |
450 | struct acpi_nfit_memory_map *memdev) |
451 | { | |
452 | struct device *dev = acpi_desc->dev; | |
20985164 | 453 | struct nfit_memdev *nfit_memdev; |
b94d5230 | 454 | |
31932041 DW |
455 | if (memdev->header.length != sizeof(*memdev)) |
456 | return false; | |
457 | ||
20985164 | 458 | list_for_each_entry(nfit_memdev, &prev->memdevs, list) |
31932041 | 459 | if (memcmp(nfit_memdev->memdev, memdev, sizeof(*memdev)) == 0) { |
20985164 VV |
460 | list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
461 | return true; | |
462 | } | |
463 | ||
31932041 DW |
464 | nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev) + sizeof(*memdev), |
465 | GFP_KERNEL); | |
b94d5230 DW |
466 | if (!nfit_memdev) |
467 | return false; | |
468 | INIT_LIST_HEAD(&nfit_memdev->list); | |
31932041 | 469 | memcpy(nfit_memdev->memdev, memdev, sizeof(*memdev)); |
b94d5230 | 470 | list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
caa603aa | 471 | dev_dbg(dev, "%s: memdev handle: %#x spa: %d dcr: %d flags: %#x\n", |
b94d5230 | 472 | __func__, memdev->device_handle, memdev->range_index, |
caa603aa | 473 | memdev->region_index, memdev->flags); |
b94d5230 DW |
474 | return true; |
475 | } | |
476 | ||
31932041 DW |
477 | /* |
478 | * An implementation may provide a truncated control region if no block windows | |
479 | * are defined. | |
480 | */ | |
481 | static size_t sizeof_dcr(struct acpi_nfit_control_region *dcr) | |
482 | { | |
483 | if (dcr->header.length < offsetof(struct acpi_nfit_control_region, | |
484 | window_size)) | |
485 | return 0; | |
486 | if (dcr->windows) | |
487 | return sizeof(*dcr); | |
488 | return offsetof(struct acpi_nfit_control_region, window_size); | |
489 | } | |
490 | ||
b94d5230 | 491 | static bool add_dcr(struct acpi_nfit_desc *acpi_desc, |
20985164 | 492 | struct nfit_table_prev *prev, |
b94d5230 DW |
493 | struct acpi_nfit_control_region *dcr) |
494 | { | |
495 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
496 | struct nfit_dcr *nfit_dcr; |
497 | ||
31932041 DW |
498 | if (!sizeof_dcr(dcr)) |
499 | return false; | |
500 | ||
20985164 | 501 | list_for_each_entry(nfit_dcr, &prev->dcrs, list) |
31932041 | 502 | if (memcmp(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)) == 0) { |
20985164 VV |
503 | list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
504 | return true; | |
505 | } | |
b94d5230 | 506 | |
31932041 DW |
507 | nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr) + sizeof(*dcr), |
508 | GFP_KERNEL); | |
b94d5230 DW |
509 | if (!nfit_dcr) |
510 | return false; | |
511 | INIT_LIST_HEAD(&nfit_dcr->list); | |
31932041 | 512 | memcpy(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)); |
b94d5230 DW |
513 | list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
514 | dev_dbg(dev, "%s: dcr index: %d windows: %d\n", __func__, | |
515 | dcr->region_index, dcr->windows); | |
516 | return true; | |
517 | } | |
518 | ||
519 | static bool add_bdw(struct acpi_nfit_desc *acpi_desc, | |
20985164 | 520 | struct nfit_table_prev *prev, |
b94d5230 DW |
521 | struct acpi_nfit_data_region *bdw) |
522 | { | |
523 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
524 | struct nfit_bdw *nfit_bdw; |
525 | ||
31932041 DW |
526 | if (bdw->header.length != sizeof(*bdw)) |
527 | return false; | |
20985164 | 528 | list_for_each_entry(nfit_bdw, &prev->bdws, list) |
31932041 | 529 | if (memcmp(nfit_bdw->bdw, bdw, sizeof(*bdw)) == 0) { |
20985164 VV |
530 | list_move_tail(&nfit_bdw->list, &acpi_desc->bdws); |
531 | return true; | |
532 | } | |
b94d5230 | 533 | |
31932041 DW |
534 | nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw) + sizeof(*bdw), |
535 | GFP_KERNEL); | |
b94d5230 DW |
536 | if (!nfit_bdw) |
537 | return false; | |
538 | INIT_LIST_HEAD(&nfit_bdw->list); | |
31932041 | 539 | memcpy(nfit_bdw->bdw, bdw, sizeof(*bdw)); |
b94d5230 DW |
540 | list_add_tail(&nfit_bdw->list, &acpi_desc->bdws); |
541 | dev_dbg(dev, "%s: bdw dcr: %d windows: %d\n", __func__, | |
542 | bdw->region_index, bdw->windows); | |
543 | return true; | |
544 | } | |
545 | ||
31932041 DW |
546 | static size_t sizeof_idt(struct acpi_nfit_interleave *idt) |
547 | { | |
548 | if (idt->header.length < sizeof(*idt)) | |
549 | return 0; | |
550 | return sizeof(*idt) + sizeof(u32) * (idt->line_count - 1); | |
551 | } | |
552 | ||
047fc8a1 | 553 | static bool add_idt(struct acpi_nfit_desc *acpi_desc, |
20985164 | 554 | struct nfit_table_prev *prev, |
047fc8a1 RZ |
555 | struct acpi_nfit_interleave *idt) |
556 | { | |
557 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
558 | struct nfit_idt *nfit_idt; |
559 | ||
31932041 DW |
560 | if (!sizeof_idt(idt)) |
561 | return false; | |
562 | ||
563 | list_for_each_entry(nfit_idt, &prev->idts, list) { | |
564 | if (sizeof_idt(nfit_idt->idt) != sizeof_idt(idt)) | |
565 | continue; | |
566 | ||
567 | if (memcmp(nfit_idt->idt, idt, sizeof_idt(idt)) == 0) { | |
20985164 VV |
568 | list_move_tail(&nfit_idt->list, &acpi_desc->idts); |
569 | return true; | |
570 | } | |
31932041 | 571 | } |
047fc8a1 | 572 | |
31932041 DW |
573 | nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt) + sizeof_idt(idt), |
574 | GFP_KERNEL); | |
047fc8a1 RZ |
575 | if (!nfit_idt) |
576 | return false; | |
577 | INIT_LIST_HEAD(&nfit_idt->list); | |
31932041 | 578 | memcpy(nfit_idt->idt, idt, sizeof_idt(idt)); |
047fc8a1 RZ |
579 | list_add_tail(&nfit_idt->list, &acpi_desc->idts); |
580 | dev_dbg(dev, "%s: idt index: %d num_lines: %d\n", __func__, | |
581 | idt->interleave_index, idt->line_count); | |
582 | return true; | |
583 | } | |
584 | ||
31932041 DW |
585 | static size_t sizeof_flush(struct acpi_nfit_flush_address *flush) |
586 | { | |
587 | if (flush->header.length < sizeof(*flush)) | |
588 | return 0; | |
589 | return sizeof(*flush) + sizeof(u64) * (flush->hint_count - 1); | |
590 | } | |
591 | ||
c2ad2954 | 592 | static bool add_flush(struct acpi_nfit_desc *acpi_desc, |
20985164 | 593 | struct nfit_table_prev *prev, |
c2ad2954 RZ |
594 | struct acpi_nfit_flush_address *flush) |
595 | { | |
596 | struct device *dev = acpi_desc->dev; | |
20985164 | 597 | struct nfit_flush *nfit_flush; |
c2ad2954 | 598 | |
31932041 DW |
599 | if (!sizeof_flush(flush)) |
600 | return false; | |
601 | ||
602 | list_for_each_entry(nfit_flush, &prev->flushes, list) { | |
603 | if (sizeof_flush(nfit_flush->flush) != sizeof_flush(flush)) | |
604 | continue; | |
605 | ||
606 | if (memcmp(nfit_flush->flush, flush, | |
607 | sizeof_flush(flush)) == 0) { | |
20985164 VV |
608 | list_move_tail(&nfit_flush->list, &acpi_desc->flushes); |
609 | return true; | |
610 | } | |
31932041 | 611 | } |
20985164 | 612 | |
31932041 DW |
613 | nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush) |
614 | + sizeof_flush(flush), GFP_KERNEL); | |
c2ad2954 RZ |
615 | if (!nfit_flush) |
616 | return false; | |
617 | INIT_LIST_HEAD(&nfit_flush->list); | |
31932041 | 618 | memcpy(nfit_flush->flush, flush, sizeof_flush(flush)); |
c2ad2954 RZ |
619 | list_add_tail(&nfit_flush->list, &acpi_desc->flushes); |
620 | dev_dbg(dev, "%s: nfit_flush handle: %d hint_count: %d\n", __func__, | |
621 | flush->device_handle, flush->hint_count); | |
622 | return true; | |
623 | } | |
624 | ||
20985164 VV |
625 | static void *add_table(struct acpi_nfit_desc *acpi_desc, |
626 | struct nfit_table_prev *prev, void *table, const void *end) | |
b94d5230 DW |
627 | { |
628 | struct device *dev = acpi_desc->dev; | |
629 | struct acpi_nfit_header *hdr; | |
630 | void *err = ERR_PTR(-ENOMEM); | |
631 | ||
632 | if (table >= end) | |
633 | return NULL; | |
634 | ||
635 | hdr = table; | |
564d5011 VV |
636 | if (!hdr->length) { |
637 | dev_warn(dev, "found a zero length table '%d' parsing nfit\n", | |
638 | hdr->type); | |
639 | return NULL; | |
640 | } | |
641 | ||
b94d5230 DW |
642 | switch (hdr->type) { |
643 | case ACPI_NFIT_TYPE_SYSTEM_ADDRESS: | |
20985164 | 644 | if (!add_spa(acpi_desc, prev, table)) |
b94d5230 DW |
645 | return err; |
646 | break; | |
647 | case ACPI_NFIT_TYPE_MEMORY_MAP: | |
20985164 | 648 | if (!add_memdev(acpi_desc, prev, table)) |
b94d5230 DW |
649 | return err; |
650 | break; | |
651 | case ACPI_NFIT_TYPE_CONTROL_REGION: | |
20985164 | 652 | if (!add_dcr(acpi_desc, prev, table)) |
b94d5230 DW |
653 | return err; |
654 | break; | |
655 | case ACPI_NFIT_TYPE_DATA_REGION: | |
20985164 | 656 | if (!add_bdw(acpi_desc, prev, table)) |
b94d5230 DW |
657 | return err; |
658 | break; | |
b94d5230 | 659 | case ACPI_NFIT_TYPE_INTERLEAVE: |
20985164 | 660 | if (!add_idt(acpi_desc, prev, table)) |
047fc8a1 | 661 | return err; |
b94d5230 DW |
662 | break; |
663 | case ACPI_NFIT_TYPE_FLUSH_ADDRESS: | |
20985164 | 664 | if (!add_flush(acpi_desc, prev, table)) |
c2ad2954 | 665 | return err; |
b94d5230 DW |
666 | break; |
667 | case ACPI_NFIT_TYPE_SMBIOS: | |
668 | dev_dbg(dev, "%s: smbios\n", __func__); | |
669 | break; | |
670 | default: | |
671 | dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type); | |
672 | break; | |
673 | } | |
674 | ||
675 | return table + hdr->length; | |
676 | } | |
677 | ||
678 | static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc, | |
679 | struct nfit_mem *nfit_mem) | |
680 | { | |
681 | u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle; | |
682 | u16 dcr = nfit_mem->dcr->region_index; | |
683 | struct nfit_spa *nfit_spa; | |
684 | ||
685 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { | |
686 | u16 range_index = nfit_spa->spa->range_index; | |
687 | int type = nfit_spa_type(nfit_spa->spa); | |
688 | struct nfit_memdev *nfit_memdev; | |
689 | ||
690 | if (type != NFIT_SPA_BDW) | |
691 | continue; | |
692 | ||
693 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
694 | if (nfit_memdev->memdev->range_index != range_index) | |
695 | continue; | |
696 | if (nfit_memdev->memdev->device_handle != device_handle) | |
697 | continue; | |
698 | if (nfit_memdev->memdev->region_index != dcr) | |
699 | continue; | |
700 | ||
701 | nfit_mem->spa_bdw = nfit_spa->spa; | |
702 | return; | |
703 | } | |
704 | } | |
705 | ||
706 | dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n", | |
707 | nfit_mem->spa_dcr->range_index); | |
708 | nfit_mem->bdw = NULL; | |
709 | } | |
710 | ||
6697b2cf | 711 | static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc, |
b94d5230 DW |
712 | struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa) |
713 | { | |
714 | u16 dcr = __to_nfit_memdev(nfit_mem)->region_index; | |
047fc8a1 | 715 | struct nfit_memdev *nfit_memdev; |
b94d5230 | 716 | struct nfit_bdw *nfit_bdw; |
047fc8a1 RZ |
717 | struct nfit_idt *nfit_idt; |
718 | u16 idt_idx, range_index; | |
b94d5230 | 719 | |
b94d5230 DW |
720 | list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) { |
721 | if (nfit_bdw->bdw->region_index != dcr) | |
722 | continue; | |
723 | nfit_mem->bdw = nfit_bdw->bdw; | |
724 | break; | |
725 | } | |
726 | ||
727 | if (!nfit_mem->bdw) | |
6697b2cf | 728 | return; |
b94d5230 DW |
729 | |
730 | nfit_mem_find_spa_bdw(acpi_desc, nfit_mem); | |
047fc8a1 RZ |
731 | |
732 | if (!nfit_mem->spa_bdw) | |
6697b2cf | 733 | return; |
047fc8a1 RZ |
734 | |
735 | range_index = nfit_mem->spa_bdw->range_index; | |
736 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
737 | if (nfit_memdev->memdev->range_index != range_index || | |
738 | nfit_memdev->memdev->region_index != dcr) | |
739 | continue; | |
740 | nfit_mem->memdev_bdw = nfit_memdev->memdev; | |
741 | idt_idx = nfit_memdev->memdev->interleave_index; | |
742 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { | |
743 | if (nfit_idt->idt->interleave_index != idt_idx) | |
744 | continue; | |
745 | nfit_mem->idt_bdw = nfit_idt->idt; | |
746 | break; | |
747 | } | |
748 | break; | |
749 | } | |
b94d5230 DW |
750 | } |
751 | ||
1499934d | 752 | static int __nfit_mem_init(struct acpi_nfit_desc *acpi_desc, |
b94d5230 DW |
753 | struct acpi_nfit_system_address *spa) |
754 | { | |
755 | struct nfit_mem *nfit_mem, *found; | |
756 | struct nfit_memdev *nfit_memdev; | |
1499934d | 757 | int type = spa ? nfit_spa_type(spa) : 0; |
b94d5230 DW |
758 | |
759 | switch (type) { | |
760 | case NFIT_SPA_DCR: | |
761 | case NFIT_SPA_PM: | |
762 | break; | |
763 | default: | |
1499934d DW |
764 | if (spa) |
765 | return 0; | |
b94d5230 DW |
766 | } |
767 | ||
1499934d DW |
768 | /* |
769 | * This loop runs in two modes, when a dimm is mapped the loop | |
770 | * adds memdev associations to an existing dimm, or creates a | |
771 | * dimm. In the unmapped dimm case this loop sweeps for memdev | |
772 | * instances with an invalid / zero range_index and adds those | |
773 | * dimms without spa associations. | |
774 | */ | |
b94d5230 | 775 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
ad9ac5e1 | 776 | struct nfit_flush *nfit_flush; |
6697b2cf DW |
777 | struct nfit_dcr *nfit_dcr; |
778 | u32 device_handle; | |
779 | u16 dcr; | |
b94d5230 | 780 | |
1499934d DW |
781 | if (spa && nfit_memdev->memdev->range_index != spa->range_index) |
782 | continue; | |
783 | if (!spa && nfit_memdev->memdev->range_index) | |
b94d5230 DW |
784 | continue; |
785 | found = NULL; | |
786 | dcr = nfit_memdev->memdev->region_index; | |
6697b2cf | 787 | device_handle = nfit_memdev->memdev->device_handle; |
b94d5230 | 788 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) |
6697b2cf DW |
789 | if (__to_nfit_memdev(nfit_mem)->device_handle |
790 | == device_handle) { | |
b94d5230 DW |
791 | found = nfit_mem; |
792 | break; | |
793 | } | |
794 | ||
795 | if (found) | |
796 | nfit_mem = found; | |
797 | else { | |
798 | nfit_mem = devm_kzalloc(acpi_desc->dev, | |
799 | sizeof(*nfit_mem), GFP_KERNEL); | |
800 | if (!nfit_mem) | |
801 | return -ENOMEM; | |
802 | INIT_LIST_HEAD(&nfit_mem->list); | |
8cc6ddfc | 803 | nfit_mem->acpi_desc = acpi_desc; |
6697b2cf DW |
804 | list_add(&nfit_mem->list, &acpi_desc->dimms); |
805 | } | |
806 | ||
807 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { | |
808 | if (nfit_dcr->dcr->region_index != dcr) | |
809 | continue; | |
810 | /* | |
811 | * Record the control region for the dimm. For | |
812 | * the ACPI 6.1 case, where there are separate | |
813 | * control regions for the pmem vs blk | |
814 | * interfaces, be sure to record the extended | |
815 | * blk details. | |
816 | */ | |
817 | if (!nfit_mem->dcr) | |
818 | nfit_mem->dcr = nfit_dcr->dcr; | |
819 | else if (nfit_mem->dcr->windows == 0 | |
820 | && nfit_dcr->dcr->windows) | |
821 | nfit_mem->dcr = nfit_dcr->dcr; | |
822 | break; | |
823 | } | |
824 | ||
ad9ac5e1 | 825 | list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) { |
e5ae3b25 DW |
826 | struct acpi_nfit_flush_address *flush; |
827 | u16 i; | |
828 | ||
ad9ac5e1 DW |
829 | if (nfit_flush->flush->device_handle != device_handle) |
830 | continue; | |
831 | nfit_mem->nfit_flush = nfit_flush; | |
e5ae3b25 DW |
832 | flush = nfit_flush->flush; |
833 | nfit_mem->flush_wpq = devm_kzalloc(acpi_desc->dev, | |
834 | flush->hint_count | |
835 | * sizeof(struct resource), GFP_KERNEL); | |
836 | if (!nfit_mem->flush_wpq) | |
837 | return -ENOMEM; | |
838 | for (i = 0; i < flush->hint_count; i++) { | |
839 | struct resource *res = &nfit_mem->flush_wpq[i]; | |
840 | ||
841 | res->start = flush->hint_address[i]; | |
842 | res->end = res->start + 8 - 1; | |
843 | } | |
ad9ac5e1 DW |
844 | break; |
845 | } | |
846 | ||
6697b2cf DW |
847 | if (dcr && !nfit_mem->dcr) { |
848 | dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n", | |
849 | spa->range_index, dcr); | |
850 | return -ENODEV; | |
b94d5230 DW |
851 | } |
852 | ||
853 | if (type == NFIT_SPA_DCR) { | |
047fc8a1 RZ |
854 | struct nfit_idt *nfit_idt; |
855 | u16 idt_idx; | |
856 | ||
b94d5230 DW |
857 | /* multiple dimms may share a SPA when interleaved */ |
858 | nfit_mem->spa_dcr = spa; | |
859 | nfit_mem->memdev_dcr = nfit_memdev->memdev; | |
047fc8a1 RZ |
860 | idt_idx = nfit_memdev->memdev->interleave_index; |
861 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { | |
862 | if (nfit_idt->idt->interleave_index != idt_idx) | |
863 | continue; | |
864 | nfit_mem->idt_dcr = nfit_idt->idt; | |
865 | break; | |
866 | } | |
6697b2cf | 867 | nfit_mem_init_bdw(acpi_desc, nfit_mem, spa); |
1499934d | 868 | } else if (type == NFIT_SPA_PM) { |
b94d5230 DW |
869 | /* |
870 | * A single dimm may belong to multiple SPA-PM | |
871 | * ranges, record at least one in addition to | |
872 | * any SPA-DCR range. | |
873 | */ | |
874 | nfit_mem->memdev_pmem = nfit_memdev->memdev; | |
1499934d DW |
875 | } else |
876 | nfit_mem->memdev_dcr = nfit_memdev->memdev; | |
b94d5230 DW |
877 | } |
878 | ||
879 | return 0; | |
880 | } | |
881 | ||
882 | static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b) | |
883 | { | |
884 | struct nfit_mem *a = container_of(_a, typeof(*a), list); | |
885 | struct nfit_mem *b = container_of(_b, typeof(*b), list); | |
886 | u32 handleA, handleB; | |
887 | ||
888 | handleA = __to_nfit_memdev(a)->device_handle; | |
889 | handleB = __to_nfit_memdev(b)->device_handle; | |
890 | if (handleA < handleB) | |
891 | return -1; | |
892 | else if (handleA > handleB) | |
893 | return 1; | |
894 | return 0; | |
895 | } | |
896 | ||
897 | static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc) | |
898 | { | |
899 | struct nfit_spa *nfit_spa; | |
1499934d DW |
900 | int rc; |
901 | ||
b94d5230 DW |
902 | |
903 | /* | |
904 | * For each SPA-DCR or SPA-PMEM address range find its | |
905 | * corresponding MEMDEV(s). From each MEMDEV find the | |
906 | * corresponding DCR. Then, if we're operating on a SPA-DCR, | |
907 | * try to find a SPA-BDW and a corresponding BDW that references | |
908 | * the DCR. Throw it all into an nfit_mem object. Note, that | |
909 | * BDWs are optional. | |
910 | */ | |
911 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { | |
1499934d | 912 | rc = __nfit_mem_init(acpi_desc, nfit_spa->spa); |
b94d5230 DW |
913 | if (rc) |
914 | return rc; | |
915 | } | |
916 | ||
1499934d DW |
917 | /* |
918 | * If a DIMM has failed to be mapped into SPA there will be no | |
919 | * SPA entries above. Find and register all the unmapped DIMMs | |
920 | * for reporting and recovery purposes. | |
921 | */ | |
922 | rc = __nfit_mem_init(acpi_desc, NULL); | |
923 | if (rc) | |
924 | return rc; | |
925 | ||
b94d5230 DW |
926 | list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp); |
927 | ||
928 | return 0; | |
929 | } | |
930 | ||
41f95db7 JH |
931 | static ssize_t bus_dsm_mask_show(struct device *dev, |
932 | struct device_attribute *attr, char *buf) | |
933 | { | |
934 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
935 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
936 | ||
937 | return sprintf(buf, "%#lx\n", nd_desc->bus_dsm_mask); | |
938 | } | |
939 | static struct device_attribute dev_attr_bus_dsm_mask = | |
940 | __ATTR(dsm_mask, 0444, bus_dsm_mask_show, NULL); | |
941 | ||
45def22c DW |
942 | static ssize_t revision_show(struct device *dev, |
943 | struct device_attribute *attr, char *buf) | |
944 | { | |
945 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
946 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
947 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
948 | ||
6b577c9d | 949 | return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision); |
45def22c DW |
950 | } |
951 | static DEVICE_ATTR_RO(revision); | |
952 | ||
9ffd6350 VV |
953 | static ssize_t hw_error_scrub_show(struct device *dev, |
954 | struct device_attribute *attr, char *buf) | |
955 | { | |
956 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
957 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
958 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
959 | ||
960 | return sprintf(buf, "%d\n", acpi_desc->scrub_mode); | |
961 | } | |
962 | ||
963 | /* | |
964 | * The 'hw_error_scrub' attribute can have the following values written to it: | |
965 | * '0': Switch to the default mode where an exception will only insert | |
966 | * the address of the memory error into the poison and badblocks lists. | |
967 | * '1': Enable a full scrub to happen if an exception for a memory error is | |
968 | * received. | |
969 | */ | |
970 | static ssize_t hw_error_scrub_store(struct device *dev, | |
971 | struct device_attribute *attr, const char *buf, size_t size) | |
972 | { | |
973 | struct nvdimm_bus_descriptor *nd_desc; | |
974 | ssize_t rc; | |
975 | long val; | |
976 | ||
977 | rc = kstrtol(buf, 0, &val); | |
978 | if (rc) | |
979 | return rc; | |
980 | ||
981 | device_lock(dev); | |
982 | nd_desc = dev_get_drvdata(dev); | |
983 | if (nd_desc) { | |
984 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
985 | ||
986 | switch (val) { | |
987 | case HW_ERROR_SCRUB_ON: | |
988 | acpi_desc->scrub_mode = HW_ERROR_SCRUB_ON; | |
989 | break; | |
990 | case HW_ERROR_SCRUB_OFF: | |
991 | acpi_desc->scrub_mode = HW_ERROR_SCRUB_OFF; | |
992 | break; | |
993 | default: | |
994 | rc = -EINVAL; | |
995 | break; | |
996 | } | |
997 | } | |
998 | device_unlock(dev); | |
999 | if (rc) | |
1000 | return rc; | |
1001 | return size; | |
1002 | } | |
1003 | static DEVICE_ATTR_RW(hw_error_scrub); | |
1004 | ||
37b137ff VV |
1005 | /* |
1006 | * This shows the number of full Address Range Scrubs that have been | |
1007 | * completed since driver load time. Userspace can wait on this using | |
1008 | * select/poll etc. A '+' at the end indicates an ARS is in progress | |
1009 | */ | |
1010 | static ssize_t scrub_show(struct device *dev, | |
1011 | struct device_attribute *attr, char *buf) | |
1012 | { | |
1013 | struct nvdimm_bus_descriptor *nd_desc; | |
1014 | ssize_t rc = -ENXIO; | |
1015 | ||
1016 | device_lock(dev); | |
1017 | nd_desc = dev_get_drvdata(dev); | |
1018 | if (nd_desc) { | |
1019 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
1020 | ||
1021 | rc = sprintf(buf, "%d%s", acpi_desc->scrub_count, | |
1022 | (work_busy(&acpi_desc->work)) ? "+\n" : "\n"); | |
1023 | } | |
1024 | device_unlock(dev); | |
1025 | return rc; | |
1026 | } | |
1027 | ||
37b137ff VV |
1028 | static ssize_t scrub_store(struct device *dev, |
1029 | struct device_attribute *attr, const char *buf, size_t size) | |
1030 | { | |
1031 | struct nvdimm_bus_descriptor *nd_desc; | |
1032 | ssize_t rc; | |
1033 | long val; | |
1034 | ||
1035 | rc = kstrtol(buf, 0, &val); | |
1036 | if (rc) | |
1037 | return rc; | |
1038 | if (val != 1) | |
1039 | return -EINVAL; | |
1040 | ||
1041 | device_lock(dev); | |
1042 | nd_desc = dev_get_drvdata(dev); | |
1043 | if (nd_desc) { | |
1044 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
1045 | ||
80790039 | 1046 | rc = acpi_nfit_ars_rescan(acpi_desc, 0); |
37b137ff VV |
1047 | } |
1048 | device_unlock(dev); | |
1049 | if (rc) | |
1050 | return rc; | |
1051 | return size; | |
1052 | } | |
1053 | static DEVICE_ATTR_RW(scrub); | |
1054 | ||
1055 | static bool ars_supported(struct nvdimm_bus *nvdimm_bus) | |
1056 | { | |
1057 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
1058 | const unsigned long mask = 1 << ND_CMD_ARS_CAP | 1 << ND_CMD_ARS_START | |
1059 | | 1 << ND_CMD_ARS_STATUS; | |
1060 | ||
1061 | return (nd_desc->cmd_mask & mask) == mask; | |
1062 | } | |
1063 | ||
1064 | static umode_t nfit_visible(struct kobject *kobj, struct attribute *a, int n) | |
1065 | { | |
1066 | struct device *dev = container_of(kobj, struct device, kobj); | |
1067 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
1068 | ||
1069 | if (a == &dev_attr_scrub.attr && !ars_supported(nvdimm_bus)) | |
1070 | return 0; | |
1071 | return a->mode; | |
1072 | } | |
1073 | ||
45def22c DW |
1074 | static struct attribute *acpi_nfit_attributes[] = { |
1075 | &dev_attr_revision.attr, | |
37b137ff | 1076 | &dev_attr_scrub.attr, |
9ffd6350 | 1077 | &dev_attr_hw_error_scrub.attr, |
41f95db7 | 1078 | &dev_attr_bus_dsm_mask.attr, |
45def22c DW |
1079 | NULL, |
1080 | }; | |
1081 | ||
5e93746f | 1082 | static const struct attribute_group acpi_nfit_attribute_group = { |
45def22c DW |
1083 | .name = "nfit", |
1084 | .attrs = acpi_nfit_attributes, | |
37b137ff | 1085 | .is_visible = nfit_visible, |
45def22c DW |
1086 | }; |
1087 | ||
a61fe6f7 | 1088 | static const struct attribute_group *acpi_nfit_attribute_groups[] = { |
45def22c DW |
1089 | &nvdimm_bus_attribute_group, |
1090 | &acpi_nfit_attribute_group, | |
1091 | NULL, | |
1092 | }; | |
1093 | ||
e6dfb2de DW |
1094 | static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev) |
1095 | { | |
1096 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1097 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1098 | ||
1099 | return __to_nfit_memdev(nfit_mem); | |
1100 | } | |
1101 | ||
1102 | static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev) | |
1103 | { | |
1104 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1105 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1106 | ||
1107 | return nfit_mem->dcr; | |
1108 | } | |
1109 | ||
1110 | static ssize_t handle_show(struct device *dev, | |
1111 | struct device_attribute *attr, char *buf) | |
1112 | { | |
1113 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); | |
1114 | ||
1115 | return sprintf(buf, "%#x\n", memdev->device_handle); | |
1116 | } | |
1117 | static DEVICE_ATTR_RO(handle); | |
1118 | ||
1119 | static ssize_t phys_id_show(struct device *dev, | |
1120 | struct device_attribute *attr, char *buf) | |
1121 | { | |
1122 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); | |
1123 | ||
1124 | return sprintf(buf, "%#x\n", memdev->physical_id); | |
1125 | } | |
1126 | static DEVICE_ATTR_RO(phys_id); | |
1127 | ||
1128 | static ssize_t vendor_show(struct device *dev, | |
1129 | struct device_attribute *attr, char *buf) | |
1130 | { | |
1131 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1132 | ||
5ad9a7fd | 1133 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->vendor_id)); |
e6dfb2de DW |
1134 | } |
1135 | static DEVICE_ATTR_RO(vendor); | |
1136 | ||
1137 | static ssize_t rev_id_show(struct device *dev, | |
1138 | struct device_attribute *attr, char *buf) | |
1139 | { | |
1140 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1141 | ||
5ad9a7fd | 1142 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->revision_id)); |
e6dfb2de DW |
1143 | } |
1144 | static DEVICE_ATTR_RO(rev_id); | |
1145 | ||
1146 | static ssize_t device_show(struct device *dev, | |
1147 | struct device_attribute *attr, char *buf) | |
1148 | { | |
1149 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1150 | ||
5ad9a7fd | 1151 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->device_id)); |
e6dfb2de DW |
1152 | } |
1153 | static DEVICE_ATTR_RO(device); | |
1154 | ||
6ca72085 DW |
1155 | static ssize_t subsystem_vendor_show(struct device *dev, |
1156 | struct device_attribute *attr, char *buf) | |
1157 | { | |
1158 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1159 | ||
1160 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_vendor_id)); | |
1161 | } | |
1162 | static DEVICE_ATTR_RO(subsystem_vendor); | |
1163 | ||
1164 | static ssize_t subsystem_rev_id_show(struct device *dev, | |
1165 | struct device_attribute *attr, char *buf) | |
1166 | { | |
1167 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1168 | ||
1169 | return sprintf(buf, "0x%04x\n", | |
1170 | be16_to_cpu(dcr->subsystem_revision_id)); | |
1171 | } | |
1172 | static DEVICE_ATTR_RO(subsystem_rev_id); | |
1173 | ||
1174 | static ssize_t subsystem_device_show(struct device *dev, | |
1175 | struct device_attribute *attr, char *buf) | |
1176 | { | |
1177 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1178 | ||
1179 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_device_id)); | |
1180 | } | |
1181 | static DEVICE_ATTR_RO(subsystem_device); | |
1182 | ||
8cc6ddfc DW |
1183 | static int num_nvdimm_formats(struct nvdimm *nvdimm) |
1184 | { | |
1185 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1186 | int formats = 0; | |
1187 | ||
1188 | if (nfit_mem->memdev_pmem) | |
1189 | formats++; | |
1190 | if (nfit_mem->memdev_bdw) | |
1191 | formats++; | |
1192 | return formats; | |
1193 | } | |
1194 | ||
e6dfb2de DW |
1195 | static ssize_t format_show(struct device *dev, |
1196 | struct device_attribute *attr, char *buf) | |
1197 | { | |
1198 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1199 | ||
1bcbf42d | 1200 | return sprintf(buf, "0x%04x\n", le16_to_cpu(dcr->code)); |
e6dfb2de DW |
1201 | } |
1202 | static DEVICE_ATTR_RO(format); | |
1203 | ||
8cc6ddfc DW |
1204 | static ssize_t format1_show(struct device *dev, |
1205 | struct device_attribute *attr, char *buf) | |
1206 | { | |
1207 | u32 handle; | |
1208 | ssize_t rc = -ENXIO; | |
1209 | struct nfit_mem *nfit_mem; | |
1210 | struct nfit_memdev *nfit_memdev; | |
1211 | struct acpi_nfit_desc *acpi_desc; | |
1212 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1213 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1214 | ||
1215 | nfit_mem = nvdimm_provider_data(nvdimm); | |
1216 | acpi_desc = nfit_mem->acpi_desc; | |
1217 | handle = to_nfit_memdev(dev)->device_handle; | |
1218 | ||
1219 | /* assumes DIMMs have at most 2 published interface codes */ | |
1220 | mutex_lock(&acpi_desc->init_mutex); | |
1221 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
1222 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; | |
1223 | struct nfit_dcr *nfit_dcr; | |
1224 | ||
1225 | if (memdev->device_handle != handle) | |
1226 | continue; | |
1227 | ||
1228 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { | |
1229 | if (nfit_dcr->dcr->region_index != memdev->region_index) | |
1230 | continue; | |
1231 | if (nfit_dcr->dcr->code == dcr->code) | |
1232 | continue; | |
1bcbf42d DW |
1233 | rc = sprintf(buf, "0x%04x\n", |
1234 | le16_to_cpu(nfit_dcr->dcr->code)); | |
8cc6ddfc DW |
1235 | break; |
1236 | } | |
1237 | if (rc != ENXIO) | |
1238 | break; | |
1239 | } | |
1240 | mutex_unlock(&acpi_desc->init_mutex); | |
1241 | return rc; | |
1242 | } | |
1243 | static DEVICE_ATTR_RO(format1); | |
1244 | ||
1245 | static ssize_t formats_show(struct device *dev, | |
1246 | struct device_attribute *attr, char *buf) | |
1247 | { | |
1248 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1249 | ||
1250 | return sprintf(buf, "%d\n", num_nvdimm_formats(nvdimm)); | |
1251 | } | |
1252 | static DEVICE_ATTR_RO(formats); | |
1253 | ||
e6dfb2de DW |
1254 | static ssize_t serial_show(struct device *dev, |
1255 | struct device_attribute *attr, char *buf) | |
1256 | { | |
1257 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1258 | ||
5ad9a7fd | 1259 | return sprintf(buf, "0x%08x\n", be32_to_cpu(dcr->serial_number)); |
e6dfb2de DW |
1260 | } |
1261 | static DEVICE_ATTR_RO(serial); | |
1262 | ||
a94e3fbe DW |
1263 | static ssize_t family_show(struct device *dev, |
1264 | struct device_attribute *attr, char *buf) | |
1265 | { | |
1266 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1267 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1268 | ||
1269 | if (nfit_mem->family < 0) | |
1270 | return -ENXIO; | |
1271 | return sprintf(buf, "%d\n", nfit_mem->family); | |
1272 | } | |
1273 | static DEVICE_ATTR_RO(family); | |
1274 | ||
1275 | static ssize_t dsm_mask_show(struct device *dev, | |
1276 | struct device_attribute *attr, char *buf) | |
1277 | { | |
1278 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1279 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1280 | ||
1281 | if (nfit_mem->family < 0) | |
1282 | return -ENXIO; | |
1283 | return sprintf(buf, "%#lx\n", nfit_mem->dsm_mask); | |
1284 | } | |
1285 | static DEVICE_ATTR_RO(dsm_mask); | |
1286 | ||
58138820 DW |
1287 | static ssize_t flags_show(struct device *dev, |
1288 | struct device_attribute *attr, char *buf) | |
1289 | { | |
1290 | u16 flags = to_nfit_memdev(dev)->flags; | |
1291 | ||
ffab9385 | 1292 | return sprintf(buf, "%s%s%s%s%s%s%s\n", |
402bae59 TK |
1293 | flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "", |
1294 | flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "", | |
1295 | flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "", | |
ca321d1c | 1296 | flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "", |
ffab9385 DW |
1297 | flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : "", |
1298 | flags & ACPI_NFIT_MEM_MAP_FAILED ? "map_fail " : "", | |
1299 | flags & ACPI_NFIT_MEM_HEALTH_ENABLED ? "smart_notify " : ""); | |
58138820 DW |
1300 | } |
1301 | static DEVICE_ATTR_RO(flags); | |
1302 | ||
38a879ba TK |
1303 | static ssize_t id_show(struct device *dev, |
1304 | struct device_attribute *attr, char *buf) | |
1305 | { | |
1306 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1307 | ||
1308 | if (dcr->valid_fields & ACPI_NFIT_CONTROL_MFG_INFO_VALID) | |
1309 | return sprintf(buf, "%04x-%02x-%04x-%08x\n", | |
1310 | be16_to_cpu(dcr->vendor_id), | |
1311 | dcr->manufacturing_location, | |
1312 | be16_to_cpu(dcr->manufacturing_date), | |
1313 | be32_to_cpu(dcr->serial_number)); | |
1314 | else | |
1315 | return sprintf(buf, "%04x-%08x\n", | |
1316 | be16_to_cpu(dcr->vendor_id), | |
1317 | be32_to_cpu(dcr->serial_number)); | |
1318 | } | |
1319 | static DEVICE_ATTR_RO(id); | |
1320 | ||
e6dfb2de DW |
1321 | static struct attribute *acpi_nfit_dimm_attributes[] = { |
1322 | &dev_attr_handle.attr, | |
1323 | &dev_attr_phys_id.attr, | |
1324 | &dev_attr_vendor.attr, | |
1325 | &dev_attr_device.attr, | |
6ca72085 DW |
1326 | &dev_attr_rev_id.attr, |
1327 | &dev_attr_subsystem_vendor.attr, | |
1328 | &dev_attr_subsystem_device.attr, | |
1329 | &dev_attr_subsystem_rev_id.attr, | |
e6dfb2de | 1330 | &dev_attr_format.attr, |
8cc6ddfc DW |
1331 | &dev_attr_formats.attr, |
1332 | &dev_attr_format1.attr, | |
e6dfb2de | 1333 | &dev_attr_serial.attr, |
58138820 | 1334 | &dev_attr_flags.attr, |
38a879ba | 1335 | &dev_attr_id.attr, |
a94e3fbe DW |
1336 | &dev_attr_family.attr, |
1337 | &dev_attr_dsm_mask.attr, | |
e6dfb2de DW |
1338 | NULL, |
1339 | }; | |
1340 | ||
1341 | static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj, | |
1342 | struct attribute *a, int n) | |
1343 | { | |
1344 | struct device *dev = container_of(kobj, struct device, kobj); | |
8cc6ddfc | 1345 | struct nvdimm *nvdimm = to_nvdimm(dev); |
e6dfb2de | 1346 | |
1499934d DW |
1347 | if (!to_nfit_dcr(dev)) { |
1348 | /* Without a dcr only the memdev attributes can be surfaced */ | |
1349 | if (a == &dev_attr_handle.attr || a == &dev_attr_phys_id.attr | |
1350 | || a == &dev_attr_flags.attr | |
1351 | || a == &dev_attr_family.attr | |
1352 | || a == &dev_attr_dsm_mask.attr) | |
1353 | return a->mode; | |
8cc6ddfc | 1354 | return 0; |
1499934d DW |
1355 | } |
1356 | ||
8cc6ddfc | 1357 | if (a == &dev_attr_format1.attr && num_nvdimm_formats(nvdimm) <= 1) |
e6dfb2de | 1358 | return 0; |
8cc6ddfc | 1359 | return a->mode; |
e6dfb2de DW |
1360 | } |
1361 | ||
5e93746f | 1362 | static const struct attribute_group acpi_nfit_dimm_attribute_group = { |
e6dfb2de DW |
1363 | .name = "nfit", |
1364 | .attrs = acpi_nfit_dimm_attributes, | |
1365 | .is_visible = acpi_nfit_dimm_attr_visible, | |
1366 | }; | |
1367 | ||
1368 | static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = { | |
62232e45 | 1369 | &nvdimm_attribute_group, |
4d88a97a | 1370 | &nd_device_attribute_group, |
e6dfb2de DW |
1371 | &acpi_nfit_dimm_attribute_group, |
1372 | NULL, | |
1373 | }; | |
1374 | ||
1375 | static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc, | |
1376 | u32 device_handle) | |
1377 | { | |
1378 | struct nfit_mem *nfit_mem; | |
1379 | ||
1380 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) | |
1381 | if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle) | |
1382 | return nfit_mem->nvdimm; | |
1383 | ||
1384 | return NULL; | |
1385 | } | |
1386 | ||
231bf117 | 1387 | void __acpi_nvdimm_notify(struct device *dev, u32 event) |
ba9c8dd3 DW |
1388 | { |
1389 | struct nfit_mem *nfit_mem; | |
1390 | struct acpi_nfit_desc *acpi_desc; | |
1391 | ||
1392 | dev_dbg(dev->parent, "%s: %s: event: %d\n", dev_name(dev), __func__, | |
1393 | event); | |
1394 | ||
1395 | if (event != NFIT_NOTIFY_DIMM_HEALTH) { | |
1396 | dev_dbg(dev->parent, "%s: unknown event: %d\n", dev_name(dev), | |
1397 | event); | |
1398 | return; | |
1399 | } | |
1400 | ||
1401 | acpi_desc = dev_get_drvdata(dev->parent); | |
1402 | if (!acpi_desc) | |
1403 | return; | |
1404 | ||
1405 | /* | |
1406 | * If we successfully retrieved acpi_desc, then we know nfit_mem data | |
1407 | * is still valid. | |
1408 | */ | |
1409 | nfit_mem = dev_get_drvdata(dev); | |
1410 | if (nfit_mem && nfit_mem->flags_attr) | |
1411 | sysfs_notify_dirent(nfit_mem->flags_attr); | |
1412 | } | |
231bf117 | 1413 | EXPORT_SYMBOL_GPL(__acpi_nvdimm_notify); |
ba9c8dd3 DW |
1414 | |
1415 | static void acpi_nvdimm_notify(acpi_handle handle, u32 event, void *data) | |
1416 | { | |
1417 | struct acpi_device *adev = data; | |
1418 | struct device *dev = &adev->dev; | |
1419 | ||
1420 | device_lock(dev->parent); | |
1421 | __acpi_nvdimm_notify(dev, event); | |
1422 | device_unlock(dev->parent); | |
1423 | } | |
1424 | ||
62232e45 DW |
1425 | static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc, |
1426 | struct nfit_mem *nfit_mem, u32 device_handle) | |
1427 | { | |
1428 | struct acpi_device *adev, *adev_dimm; | |
1429 | struct device *dev = acpi_desc->dev; | |
31eca76b | 1430 | unsigned long dsm_mask; |
41c8bdb3 | 1431 | const guid_t *guid; |
60e95f43 | 1432 | int i; |
ba650cfc | 1433 | int family = -1; |
62232e45 | 1434 | |
e3654eca DW |
1435 | /* nfit test assumes 1:1 relationship between commands and dsms */ |
1436 | nfit_mem->dsm_mask = acpi_desc->dimm_cmd_force_en; | |
31eca76b | 1437 | nfit_mem->family = NVDIMM_FAMILY_INTEL; |
62232e45 DW |
1438 | adev = to_acpi_dev(acpi_desc); |
1439 | if (!adev) | |
1440 | return 0; | |
1441 | ||
1442 | adev_dimm = acpi_find_child_device(adev, device_handle, false); | |
1443 | nfit_mem->adev = adev_dimm; | |
1444 | if (!adev_dimm) { | |
1445 | dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n", | |
1446 | device_handle); | |
4d88a97a | 1447 | return force_enable_dimms ? 0 : -ENODEV; |
62232e45 DW |
1448 | } |
1449 | ||
ba9c8dd3 DW |
1450 | if (ACPI_FAILURE(acpi_install_notify_handler(adev_dimm->handle, |
1451 | ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify, adev_dimm))) { | |
1452 | dev_err(dev, "%s: notification registration failed\n", | |
1453 | dev_name(&adev_dimm->dev)); | |
1454 | return -ENXIO; | |
1455 | } | |
1456 | ||
31eca76b | 1457 | /* |
e02fb726 | 1458 | * Until standardization materializes we need to consider 4 |
a7225598 | 1459 | * different command sets. Note, that checking for function0 (bit0) |
41c8bdb3 | 1460 | * tells us if any commands are reachable through this GUID. |
31eca76b | 1461 | */ |
e02fb726 | 1462 | for (i = NVDIMM_FAMILY_INTEL; i <= NVDIMM_FAMILY_MSFT; i++) |
a7225598 | 1463 | if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1)) |
ba650cfc LK |
1464 | if (family < 0 || i == default_dsm_family) |
1465 | family = i; | |
31eca76b DW |
1466 | |
1467 | /* limit the supported commands to those that are publicly documented */ | |
ba650cfc | 1468 | nfit_mem->family = family; |
095ab4b3 LK |
1469 | if (override_dsm_mask && !disable_vendor_specific) |
1470 | dsm_mask = override_dsm_mask; | |
1471 | else if (nfit_mem->family == NVDIMM_FAMILY_INTEL) { | |
31eca76b | 1472 | dsm_mask = 0x3fe; |
87554098 DW |
1473 | if (disable_vendor_specific) |
1474 | dsm_mask &= ~(1 << ND_CMD_VENDOR); | |
e02fb726 | 1475 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE1) { |
31eca76b | 1476 | dsm_mask = 0x1c3c76; |
e02fb726 | 1477 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE2) { |
31eca76b | 1478 | dsm_mask = 0x1fe; |
87554098 DW |
1479 | if (disable_vendor_specific) |
1480 | dsm_mask &= ~(1 << 8); | |
e02fb726 | 1481 | } else if (nfit_mem->family == NVDIMM_FAMILY_MSFT) { |
1482 | dsm_mask = 0xffffffff; | |
87554098 | 1483 | } else { |
a7225598 | 1484 | dev_dbg(dev, "unknown dimm command family\n"); |
31eca76b | 1485 | nfit_mem->family = -1; |
a7225598 DW |
1486 | /* DSMs are optional, continue loading the driver... */ |
1487 | return 0; | |
31eca76b DW |
1488 | } |
1489 | ||
41c8bdb3 | 1490 | guid = to_nfit_uuid(nfit_mem->family); |
31eca76b | 1491 | for_each_set_bit(i, &dsm_mask, BITS_PER_LONG) |
94116f81 | 1492 | if (acpi_check_dsm(adev_dimm->handle, guid, 1, 1ULL << i)) |
62232e45 DW |
1493 | set_bit(i, &nfit_mem->dsm_mask); |
1494 | ||
60e95f43 | 1495 | return 0; |
62232e45 DW |
1496 | } |
1497 | ||
ba9c8dd3 DW |
1498 | static void shutdown_dimm_notify(void *data) |
1499 | { | |
1500 | struct acpi_nfit_desc *acpi_desc = data; | |
1501 | struct nfit_mem *nfit_mem; | |
1502 | ||
1503 | mutex_lock(&acpi_desc->init_mutex); | |
1504 | /* | |
1505 | * Clear out the nfit_mem->flags_attr and shut down dimm event | |
1506 | * notifications. | |
1507 | */ | |
1508 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { | |
231bf117 DW |
1509 | struct acpi_device *adev_dimm = nfit_mem->adev; |
1510 | ||
ba9c8dd3 DW |
1511 | if (nfit_mem->flags_attr) { |
1512 | sysfs_put(nfit_mem->flags_attr); | |
1513 | nfit_mem->flags_attr = NULL; | |
1514 | } | |
231bf117 DW |
1515 | if (adev_dimm) |
1516 | acpi_remove_notify_handler(adev_dimm->handle, | |
1517 | ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify); | |
ba9c8dd3 DW |
1518 | } |
1519 | mutex_unlock(&acpi_desc->init_mutex); | |
1520 | } | |
1521 | ||
e6dfb2de DW |
1522 | static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc) |
1523 | { | |
1524 | struct nfit_mem *nfit_mem; | |
ba9c8dd3 DW |
1525 | int dimm_count = 0, rc; |
1526 | struct nvdimm *nvdimm; | |
e6dfb2de DW |
1527 | |
1528 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { | |
e5ae3b25 | 1529 | struct acpi_nfit_flush_address *flush; |
31eca76b | 1530 | unsigned long flags = 0, cmd_mask; |
caa603aa | 1531 | struct nfit_memdev *nfit_memdev; |
e6dfb2de | 1532 | u32 device_handle; |
58138820 | 1533 | u16 mem_flags; |
e6dfb2de DW |
1534 | |
1535 | device_handle = __to_nfit_memdev(nfit_mem)->device_handle; | |
1536 | nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle); | |
1537 | if (nvdimm) { | |
20985164 | 1538 | dimm_count++; |
e6dfb2de DW |
1539 | continue; |
1540 | } | |
1541 | ||
1542 | if (nfit_mem->bdw && nfit_mem->memdev_pmem) | |
8f078b38 | 1543 | set_bit(NDD_ALIASING, &flags); |
e6dfb2de | 1544 | |
caa603aa DW |
1545 | /* collate flags across all memdevs for this dimm */ |
1546 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
1547 | struct acpi_nfit_memory_map *dimm_memdev; | |
1548 | ||
1549 | dimm_memdev = __to_nfit_memdev(nfit_mem); | |
1550 | if (dimm_memdev->device_handle | |
1551 | != nfit_memdev->memdev->device_handle) | |
1552 | continue; | |
1553 | dimm_memdev->flags |= nfit_memdev->memdev->flags; | |
1554 | } | |
1555 | ||
58138820 | 1556 | mem_flags = __to_nfit_memdev(nfit_mem)->flags; |
ca321d1c | 1557 | if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED) |
8f078b38 | 1558 | set_bit(NDD_UNARMED, &flags); |
58138820 | 1559 | |
62232e45 DW |
1560 | rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle); |
1561 | if (rc) | |
1562 | continue; | |
1563 | ||
e3654eca | 1564 | /* |
31eca76b DW |
1565 | * TODO: provide translation for non-NVDIMM_FAMILY_INTEL |
1566 | * devices (i.e. from nd_cmd to acpi_dsm) to standardize the | |
1567 | * userspace interface. | |
e3654eca | 1568 | */ |
31eca76b DW |
1569 | cmd_mask = 1UL << ND_CMD_CALL; |
1570 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) | |
1571 | cmd_mask |= nfit_mem->dsm_mask; | |
1572 | ||
e5ae3b25 DW |
1573 | flush = nfit_mem->nfit_flush ? nfit_mem->nfit_flush->flush |
1574 | : NULL; | |
e6dfb2de | 1575 | nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem, |
62232e45 | 1576 | acpi_nfit_dimm_attribute_groups, |
e5ae3b25 DW |
1577 | flags, cmd_mask, flush ? flush->hint_count : 0, |
1578 | nfit_mem->flush_wpq); | |
e6dfb2de DW |
1579 | if (!nvdimm) |
1580 | return -ENOMEM; | |
1581 | ||
1582 | nfit_mem->nvdimm = nvdimm; | |
4d88a97a | 1583 | dimm_count++; |
58138820 DW |
1584 | |
1585 | if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0) | |
1586 | continue; | |
1587 | ||
1499934d | 1588 | dev_info(acpi_desc->dev, "%s flags:%s%s%s%s%s\n", |
58138820 | 1589 | nvdimm_name(nvdimm), |
402bae59 TK |
1590 | mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "", |
1591 | mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"", | |
1592 | mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "", | |
1499934d DW |
1593 | mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : "", |
1594 | mem_flags & ACPI_NFIT_MEM_MAP_FAILED ? " map_fail" : ""); | |
58138820 | 1595 | |
e6dfb2de DW |
1596 | } |
1597 | ||
ba9c8dd3 DW |
1598 | rc = nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count); |
1599 | if (rc) | |
1600 | return rc; | |
1601 | ||
1602 | /* | |
1603 | * Now that dimms are successfully registered, and async registration | |
1604 | * is flushed, attempt to enable event notification. | |
1605 | */ | |
1606 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { | |
1607 | struct kernfs_node *nfit_kernfs; | |
1608 | ||
1609 | nvdimm = nfit_mem->nvdimm; | |
1610 | nfit_kernfs = sysfs_get_dirent(nvdimm_kobj(nvdimm)->sd, "nfit"); | |
1611 | if (nfit_kernfs) | |
1612 | nfit_mem->flags_attr = sysfs_get_dirent(nfit_kernfs, | |
1613 | "flags"); | |
1614 | sysfs_put(nfit_kernfs); | |
1615 | if (!nfit_mem->flags_attr) | |
1616 | dev_warn(acpi_desc->dev, "%s: notifications disabled\n", | |
1617 | nvdimm_name(nvdimm)); | |
1618 | } | |
1619 | ||
1620 | return devm_add_action_or_reset(acpi_desc->dev, shutdown_dimm_notify, | |
1621 | acpi_desc); | |
e6dfb2de DW |
1622 | } |
1623 | ||
7db5bb33 JH |
1624 | /* |
1625 | * These constants are private because there are no kernel consumers of | |
1626 | * these commands. | |
1627 | */ | |
1628 | enum nfit_aux_cmds { | |
1629 | NFIT_CMD_TRANSLATE_SPA = 5, | |
1630 | NFIT_CMD_ARS_INJECT_SET = 7, | |
1631 | NFIT_CMD_ARS_INJECT_CLEAR = 8, | |
1632 | NFIT_CMD_ARS_INJECT_GET = 9, | |
1633 | }; | |
1634 | ||
62232e45 DW |
1635 | static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc) |
1636 | { | |
1637 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
41c8bdb3 | 1638 | const guid_t *guid = to_nfit_uuid(NFIT_DEV_BUS); |
62232e45 | 1639 | struct acpi_device *adev; |
7db5bb33 | 1640 | unsigned long dsm_mask; |
62232e45 DW |
1641 | int i; |
1642 | ||
e3654eca | 1643 | nd_desc->cmd_mask = acpi_desc->bus_cmd_force_en; |
62232e45 DW |
1644 | adev = to_acpi_dev(acpi_desc); |
1645 | if (!adev) | |
1646 | return; | |
1647 | ||
d4f32367 | 1648 | for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++) |
94116f81 | 1649 | if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i)) |
e3654eca | 1650 | set_bit(i, &nd_desc->cmd_mask); |
37d74841 | 1651 | set_bit(ND_CMD_CALL, &nd_desc->cmd_mask); |
7db5bb33 JH |
1652 | |
1653 | dsm_mask = | |
1654 | (1 << ND_CMD_ARS_CAP) | | |
1655 | (1 << ND_CMD_ARS_START) | | |
1656 | (1 << ND_CMD_ARS_STATUS) | | |
1657 | (1 << ND_CMD_CLEAR_ERROR) | | |
1658 | (1 << NFIT_CMD_TRANSLATE_SPA) | | |
1659 | (1 << NFIT_CMD_ARS_INJECT_SET) | | |
1660 | (1 << NFIT_CMD_ARS_INJECT_CLEAR) | | |
1661 | (1 << NFIT_CMD_ARS_INJECT_GET); | |
1662 | for_each_set_bit(i, &dsm_mask, BITS_PER_LONG) | |
1663 | if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i)) | |
1664 | set_bit(i, &nd_desc->bus_dsm_mask); | |
62232e45 DW |
1665 | } |
1666 | ||
1f7df6f8 DW |
1667 | static ssize_t range_index_show(struct device *dev, |
1668 | struct device_attribute *attr, char *buf) | |
1669 | { | |
1670 | struct nd_region *nd_region = to_nd_region(dev); | |
1671 | struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region); | |
1672 | ||
1673 | return sprintf(buf, "%d\n", nfit_spa->spa->range_index); | |
1674 | } | |
1675 | static DEVICE_ATTR_RO(range_index); | |
1676 | ||
1677 | static struct attribute *acpi_nfit_region_attributes[] = { | |
1678 | &dev_attr_range_index.attr, | |
1679 | NULL, | |
1680 | }; | |
1681 | ||
5e93746f | 1682 | static const struct attribute_group acpi_nfit_region_attribute_group = { |
1f7df6f8 DW |
1683 | .name = "nfit", |
1684 | .attrs = acpi_nfit_region_attributes, | |
1685 | }; | |
1686 | ||
1687 | static const struct attribute_group *acpi_nfit_region_attribute_groups[] = { | |
1688 | &nd_region_attribute_group, | |
1689 | &nd_mapping_attribute_group, | |
3d88002e | 1690 | &nd_device_attribute_group, |
74ae66c3 | 1691 | &nd_numa_attribute_group, |
1f7df6f8 DW |
1692 | &acpi_nfit_region_attribute_group, |
1693 | NULL, | |
1694 | }; | |
1695 | ||
eaf96153 DW |
1696 | /* enough info to uniquely specify an interleave set */ |
1697 | struct nfit_set_info { | |
1698 | struct nfit_set_info_map { | |
1699 | u64 region_offset; | |
1700 | u32 serial_number; | |
1701 | u32 pad; | |
1702 | } mapping[0]; | |
1703 | }; | |
1704 | ||
c12c48ce DW |
1705 | struct nfit_set_info2 { |
1706 | struct nfit_set_info_map2 { | |
1707 | u64 region_offset; | |
1708 | u32 serial_number; | |
1709 | u16 vendor_id; | |
1710 | u16 manufacturing_date; | |
1711 | u8 manufacturing_location; | |
1712 | u8 reserved[31]; | |
1713 | } mapping[0]; | |
1714 | }; | |
1715 | ||
eaf96153 DW |
1716 | static size_t sizeof_nfit_set_info(int num_mappings) |
1717 | { | |
1718 | return sizeof(struct nfit_set_info) | |
1719 | + num_mappings * sizeof(struct nfit_set_info_map); | |
1720 | } | |
1721 | ||
c12c48ce DW |
1722 | static size_t sizeof_nfit_set_info2(int num_mappings) |
1723 | { | |
1724 | return sizeof(struct nfit_set_info2) | |
1725 | + num_mappings * sizeof(struct nfit_set_info_map2); | |
1726 | } | |
1727 | ||
86ef58a4 | 1728 | static int cmp_map_compat(const void *m0, const void *m1) |
eaf96153 DW |
1729 | { |
1730 | const struct nfit_set_info_map *map0 = m0; | |
1731 | const struct nfit_set_info_map *map1 = m1; | |
1732 | ||
1733 | return memcmp(&map0->region_offset, &map1->region_offset, | |
1734 | sizeof(u64)); | |
1735 | } | |
1736 | ||
86ef58a4 DW |
1737 | static int cmp_map(const void *m0, const void *m1) |
1738 | { | |
1739 | const struct nfit_set_info_map *map0 = m0; | |
1740 | const struct nfit_set_info_map *map1 = m1; | |
1741 | ||
b03b99a3 DW |
1742 | if (map0->region_offset < map1->region_offset) |
1743 | return -1; | |
1744 | else if (map0->region_offset > map1->region_offset) | |
1745 | return 1; | |
1746 | return 0; | |
86ef58a4 DW |
1747 | } |
1748 | ||
c12c48ce DW |
1749 | static int cmp_map2(const void *m0, const void *m1) |
1750 | { | |
1751 | const struct nfit_set_info_map2 *map0 = m0; | |
1752 | const struct nfit_set_info_map2 *map1 = m1; | |
1753 | ||
1754 | if (map0->region_offset < map1->region_offset) | |
1755 | return -1; | |
1756 | else if (map0->region_offset > map1->region_offset) | |
1757 | return 1; | |
1758 | return 0; | |
1759 | } | |
1760 | ||
eaf96153 DW |
1761 | /* Retrieve the nth entry referencing this spa */ |
1762 | static struct acpi_nfit_memory_map *memdev_from_spa( | |
1763 | struct acpi_nfit_desc *acpi_desc, u16 range_index, int n) | |
1764 | { | |
1765 | struct nfit_memdev *nfit_memdev; | |
1766 | ||
1767 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) | |
1768 | if (nfit_memdev->memdev->range_index == range_index) | |
1769 | if (n-- == 0) | |
1770 | return nfit_memdev->memdev; | |
1771 | return NULL; | |
1772 | } | |
1773 | ||
1774 | static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc, | |
1775 | struct nd_region_desc *ndr_desc, | |
1776 | struct acpi_nfit_system_address *spa) | |
1777 | { | |
eaf96153 DW |
1778 | struct device *dev = acpi_desc->dev; |
1779 | struct nd_interleave_set *nd_set; | |
1780 | u16 nr = ndr_desc->num_mappings; | |
c12c48ce | 1781 | struct nfit_set_info2 *info2; |
eaf96153 | 1782 | struct nfit_set_info *info; |
8f2bc243 | 1783 | int i; |
eaf96153 | 1784 | |
faec6f8a DW |
1785 | nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL); |
1786 | if (!nd_set) | |
1787 | return -ENOMEM; | |
1788 | ndr_desc->nd_set = nd_set; | |
1789 | guid_copy(&nd_set->type_guid, (guid_t *) spa->range_guid); | |
1790 | ||
eaf96153 DW |
1791 | info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL); |
1792 | if (!info) | |
1793 | return -ENOMEM; | |
c12c48ce DW |
1794 | |
1795 | info2 = devm_kzalloc(dev, sizeof_nfit_set_info2(nr), GFP_KERNEL); | |
1796 | if (!info2) | |
1797 | return -ENOMEM; | |
1798 | ||
eaf96153 | 1799 | for (i = 0; i < nr; i++) { |
44c462eb | 1800 | struct nd_mapping_desc *mapping = &ndr_desc->mapping[i]; |
eaf96153 | 1801 | struct nfit_set_info_map *map = &info->mapping[i]; |
c12c48ce | 1802 | struct nfit_set_info_map2 *map2 = &info2->mapping[i]; |
44c462eb | 1803 | struct nvdimm *nvdimm = mapping->nvdimm; |
eaf96153 DW |
1804 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
1805 | struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc, | |
1806 | spa->range_index, i); | |
1807 | ||
1808 | if (!memdev || !nfit_mem->dcr) { | |
1809 | dev_err(dev, "%s: failed to find DCR\n", __func__); | |
1810 | return -ENODEV; | |
1811 | } | |
1812 | ||
1813 | map->region_offset = memdev->region_offset; | |
1814 | map->serial_number = nfit_mem->dcr->serial_number; | |
c12c48ce DW |
1815 | |
1816 | map2->region_offset = memdev->region_offset; | |
1817 | map2->serial_number = nfit_mem->dcr->serial_number; | |
1818 | map2->vendor_id = nfit_mem->dcr->vendor_id; | |
1819 | map2->manufacturing_date = nfit_mem->dcr->manufacturing_date; | |
1820 | map2->manufacturing_location = nfit_mem->dcr->manufacturing_location; | |
eaf96153 DW |
1821 | } |
1822 | ||
c12c48ce | 1823 | /* v1.1 namespaces */ |
eaf96153 DW |
1824 | sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map), |
1825 | cmp_map, NULL); | |
c12c48ce DW |
1826 | nd_set->cookie1 = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0); |
1827 | ||
1828 | /* v1.2 namespaces */ | |
1829 | sort(&info2->mapping[0], nr, sizeof(struct nfit_set_info_map2), | |
1830 | cmp_map2, NULL); | |
1831 | nd_set->cookie2 = nd_fletcher64(info2, sizeof_nfit_set_info2(nr), 0); | |
86ef58a4 | 1832 | |
c12c48ce | 1833 | /* support v1.1 namespaces created with the wrong sort order */ |
86ef58a4 DW |
1834 | sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map), |
1835 | cmp_map_compat, NULL); | |
1836 | nd_set->altcookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0); | |
1837 | ||
401c0a19 DW |
1838 | /* record the result of the sort for the mapping position */ |
1839 | for (i = 0; i < nr; i++) { | |
1840 | struct nfit_set_info_map2 *map2 = &info2->mapping[i]; | |
1841 | int j; | |
1842 | ||
1843 | for (j = 0; j < nr; j++) { | |
1844 | struct nd_mapping_desc *mapping = &ndr_desc->mapping[j]; | |
1845 | struct nvdimm *nvdimm = mapping->nvdimm; | |
1846 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1847 | ||
1848 | if (map2->serial_number | |
1849 | == nfit_mem->dcr->serial_number && | |
1850 | map2->vendor_id | |
1851 | == nfit_mem->dcr->vendor_id && | |
1852 | map2->manufacturing_date | |
1853 | == nfit_mem->dcr->manufacturing_date && | |
1854 | map2->manufacturing_location | |
1855 | == nfit_mem->dcr->manufacturing_location) { | |
1856 | mapping->position = i; | |
1857 | break; | |
1858 | } | |
1859 | } | |
1860 | } | |
1861 | ||
eaf96153 DW |
1862 | ndr_desc->nd_set = nd_set; |
1863 | devm_kfree(dev, info); | |
c12c48ce | 1864 | devm_kfree(dev, info2); |
eaf96153 DW |
1865 | |
1866 | return 0; | |
1867 | } | |
1868 | ||
047fc8a1 RZ |
1869 | static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio) |
1870 | { | |
1871 | struct acpi_nfit_interleave *idt = mmio->idt; | |
1872 | u32 sub_line_offset, line_index, line_offset; | |
1873 | u64 line_no, table_skip_count, table_offset; | |
1874 | ||
1875 | line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset); | |
1876 | table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index); | |
1877 | line_offset = idt->line_offset[line_index] | |
1878 | * mmio->line_size; | |
1879 | table_offset = table_skip_count * mmio->table_size; | |
1880 | ||
1881 | return mmio->base_offset + line_offset + table_offset + sub_line_offset; | |
1882 | } | |
1883 | ||
de4a196c | 1884 | static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw) |
047fc8a1 RZ |
1885 | { |
1886 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; | |
1887 | u64 offset = nfit_blk->stat_offset + mmio->size * bw; | |
68202c9f | 1888 | const u32 STATUS_MASK = 0x80000037; |
047fc8a1 RZ |
1889 | |
1890 | if (mmio->num_lines) | |
1891 | offset = to_interleave_offset(offset, mmio); | |
1892 | ||
68202c9f | 1893 | return readl(mmio->addr.base + offset) & STATUS_MASK; |
047fc8a1 RZ |
1894 | } |
1895 | ||
1896 | static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw, | |
1897 | resource_size_t dpa, unsigned int len, unsigned int write) | |
1898 | { | |
1899 | u64 cmd, offset; | |
1900 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; | |
1901 | ||
1902 | enum { | |
1903 | BCW_OFFSET_MASK = (1ULL << 48)-1, | |
1904 | BCW_LEN_SHIFT = 48, | |
1905 | BCW_LEN_MASK = (1ULL << 8) - 1, | |
1906 | BCW_CMD_SHIFT = 56, | |
1907 | }; | |
1908 | ||
1909 | cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK; | |
1910 | len = len >> L1_CACHE_SHIFT; | |
1911 | cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT; | |
1912 | cmd |= ((u64) write) << BCW_CMD_SHIFT; | |
1913 | ||
1914 | offset = nfit_blk->cmd_offset + mmio->size * bw; | |
1915 | if (mmio->num_lines) | |
1916 | offset = to_interleave_offset(offset, mmio); | |
1917 | ||
67a3e8fe | 1918 | writeq(cmd, mmio->addr.base + offset); |
f284a4f2 | 1919 | nvdimm_flush(nfit_blk->nd_region); |
f0f2c072 | 1920 | |
aef25338 | 1921 | if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH) |
67a3e8fe | 1922 | readq(mmio->addr.base + offset); |
047fc8a1 RZ |
1923 | } |
1924 | ||
1925 | static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk, | |
1926 | resource_size_t dpa, void *iobuf, size_t len, int rw, | |
1927 | unsigned int lane) | |
1928 | { | |
1929 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; | |
1930 | unsigned int copied = 0; | |
1931 | u64 base_offset; | |
1932 | int rc; | |
1933 | ||
1934 | base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES | |
1935 | + lane * mmio->size; | |
047fc8a1 RZ |
1936 | write_blk_ctl(nfit_blk, lane, dpa, len, rw); |
1937 | while (len) { | |
1938 | unsigned int c; | |
1939 | u64 offset; | |
1940 | ||
1941 | if (mmio->num_lines) { | |
1942 | u32 line_offset; | |
1943 | ||
1944 | offset = to_interleave_offset(base_offset + copied, | |
1945 | mmio); | |
1946 | div_u64_rem(offset, mmio->line_size, &line_offset); | |
1947 | c = min_t(size_t, len, mmio->line_size - line_offset); | |
1948 | } else { | |
1949 | offset = base_offset + nfit_blk->bdw_offset; | |
1950 | c = len; | |
1951 | } | |
1952 | ||
1953 | if (rw) | |
0aed55af | 1954 | memcpy_flushcache(mmio->addr.aperture + offset, iobuf + copied, c); |
67a3e8fe | 1955 | else { |
aef25338 | 1956 | if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH) |
67a3e8fe RZ |
1957 | mmio_flush_range((void __force *) |
1958 | mmio->addr.aperture + offset, c); | |
1959 | ||
6abccd1b | 1960 | memcpy(iobuf + copied, mmio->addr.aperture + offset, c); |
67a3e8fe | 1961 | } |
047fc8a1 RZ |
1962 | |
1963 | copied += c; | |
1964 | len -= c; | |
1965 | } | |
c2ad2954 RZ |
1966 | |
1967 | if (rw) | |
f284a4f2 | 1968 | nvdimm_flush(nfit_blk->nd_region); |
c2ad2954 | 1969 | |
047fc8a1 RZ |
1970 | rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0; |
1971 | return rc; | |
1972 | } | |
1973 | ||
1974 | static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr, | |
1975 | resource_size_t dpa, void *iobuf, u64 len, int rw) | |
1976 | { | |
1977 | struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr); | |
1978 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; | |
1979 | struct nd_region *nd_region = nfit_blk->nd_region; | |
1980 | unsigned int lane, copied = 0; | |
1981 | int rc = 0; | |
1982 | ||
1983 | lane = nd_region_acquire_lane(nd_region); | |
1984 | while (len) { | |
1985 | u64 c = min(len, mmio->size); | |
1986 | ||
1987 | rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied, | |
1988 | iobuf + copied, c, rw, lane); | |
1989 | if (rc) | |
1990 | break; | |
1991 | ||
1992 | copied += c; | |
1993 | len -= c; | |
1994 | } | |
1995 | nd_region_release_lane(nd_region, lane); | |
1996 | ||
1997 | return rc; | |
1998 | } | |
1999 | ||
047fc8a1 RZ |
2000 | static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio, |
2001 | struct acpi_nfit_interleave *idt, u16 interleave_ways) | |
2002 | { | |
2003 | if (idt) { | |
2004 | mmio->num_lines = idt->line_count; | |
2005 | mmio->line_size = idt->line_size; | |
2006 | if (interleave_ways == 0) | |
2007 | return -ENXIO; | |
2008 | mmio->table_size = mmio->num_lines * interleave_ways | |
2009 | * mmio->line_size; | |
2010 | } | |
2011 | ||
2012 | return 0; | |
2013 | } | |
2014 | ||
f0f2c072 RZ |
2015 | static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc, |
2016 | struct nvdimm *nvdimm, struct nfit_blk *nfit_blk) | |
2017 | { | |
2018 | struct nd_cmd_dimm_flags flags; | |
2019 | int rc; | |
2020 | ||
2021 | memset(&flags, 0, sizeof(flags)); | |
2022 | rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags, | |
aef25338 | 2023 | sizeof(flags), NULL); |
f0f2c072 RZ |
2024 | |
2025 | if (rc >= 0 && flags.status == 0) | |
2026 | nfit_blk->dimm_flags = flags.flags; | |
2027 | else if (rc == -ENOTTY) { | |
2028 | /* fall back to a conservative default */ | |
aef25338 | 2029 | nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH; |
f0f2c072 RZ |
2030 | rc = 0; |
2031 | } else | |
2032 | rc = -ENXIO; | |
2033 | ||
2034 | return rc; | |
2035 | } | |
2036 | ||
047fc8a1 RZ |
2037 | static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus, |
2038 | struct device *dev) | |
2039 | { | |
2040 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
047fc8a1 RZ |
2041 | struct nd_blk_region *ndbr = to_nd_blk_region(dev); |
2042 | struct nfit_blk_mmio *mmio; | |
2043 | struct nfit_blk *nfit_blk; | |
2044 | struct nfit_mem *nfit_mem; | |
2045 | struct nvdimm *nvdimm; | |
2046 | int rc; | |
2047 | ||
2048 | nvdimm = nd_blk_region_to_dimm(ndbr); | |
2049 | nfit_mem = nvdimm_provider_data(nvdimm); | |
2050 | if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) { | |
2051 | dev_dbg(dev, "%s: missing%s%s%s\n", __func__, | |
2052 | nfit_mem ? "" : " nfit_mem", | |
193ccca4 DW |
2053 | (nfit_mem && nfit_mem->dcr) ? "" : " dcr", |
2054 | (nfit_mem && nfit_mem->bdw) ? "" : " bdw"); | |
047fc8a1 RZ |
2055 | return -ENXIO; |
2056 | } | |
2057 | ||
2058 | nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL); | |
2059 | if (!nfit_blk) | |
2060 | return -ENOMEM; | |
2061 | nd_blk_region_set_provider_data(ndbr, nfit_blk); | |
2062 | nfit_blk->nd_region = to_nd_region(dev); | |
2063 | ||
2064 | /* map block aperture memory */ | |
2065 | nfit_blk->bdw_offset = nfit_mem->bdw->offset; | |
2066 | mmio = &nfit_blk->mmio[BDW]; | |
29b9aa0a | 2067 | mmio->addr.base = devm_nvdimm_memremap(dev, nfit_mem->spa_bdw->address, |
ca6a4657 | 2068 | nfit_mem->spa_bdw->length, nd_blk_memremap_flags(ndbr)); |
67a3e8fe | 2069 | if (!mmio->addr.base) { |
047fc8a1 RZ |
2070 | dev_dbg(dev, "%s: %s failed to map bdw\n", __func__, |
2071 | nvdimm_name(nvdimm)); | |
2072 | return -ENOMEM; | |
2073 | } | |
2074 | mmio->size = nfit_mem->bdw->size; | |
2075 | mmio->base_offset = nfit_mem->memdev_bdw->region_offset; | |
2076 | mmio->idt = nfit_mem->idt_bdw; | |
2077 | mmio->spa = nfit_mem->spa_bdw; | |
2078 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw, | |
2079 | nfit_mem->memdev_bdw->interleave_ways); | |
2080 | if (rc) { | |
2081 | dev_dbg(dev, "%s: %s failed to init bdw interleave\n", | |
2082 | __func__, nvdimm_name(nvdimm)); | |
2083 | return rc; | |
2084 | } | |
2085 | ||
2086 | /* map block control memory */ | |
2087 | nfit_blk->cmd_offset = nfit_mem->dcr->command_offset; | |
2088 | nfit_blk->stat_offset = nfit_mem->dcr->status_offset; | |
2089 | mmio = &nfit_blk->mmio[DCR]; | |
29b9aa0a DW |
2090 | mmio->addr.base = devm_nvdimm_ioremap(dev, nfit_mem->spa_dcr->address, |
2091 | nfit_mem->spa_dcr->length); | |
67a3e8fe | 2092 | if (!mmio->addr.base) { |
047fc8a1 RZ |
2093 | dev_dbg(dev, "%s: %s failed to map dcr\n", __func__, |
2094 | nvdimm_name(nvdimm)); | |
2095 | return -ENOMEM; | |
2096 | } | |
2097 | mmio->size = nfit_mem->dcr->window_size; | |
2098 | mmio->base_offset = nfit_mem->memdev_dcr->region_offset; | |
2099 | mmio->idt = nfit_mem->idt_dcr; | |
2100 | mmio->spa = nfit_mem->spa_dcr; | |
2101 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr, | |
2102 | nfit_mem->memdev_dcr->interleave_ways); | |
2103 | if (rc) { | |
2104 | dev_dbg(dev, "%s: %s failed to init dcr interleave\n", | |
2105 | __func__, nvdimm_name(nvdimm)); | |
2106 | return rc; | |
2107 | } | |
2108 | ||
f0f2c072 RZ |
2109 | rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk); |
2110 | if (rc < 0) { | |
2111 | dev_dbg(dev, "%s: %s failed get DIMM flags\n", | |
2112 | __func__, nvdimm_name(nvdimm)); | |
2113 | return rc; | |
2114 | } | |
2115 | ||
f284a4f2 | 2116 | if (nvdimm_has_flush(nfit_blk->nd_region) < 0) |
c2ad2954 RZ |
2117 | dev_warn(dev, "unable to guarantee persistence of writes\n"); |
2118 | ||
047fc8a1 RZ |
2119 | if (mmio->line_size == 0) |
2120 | return 0; | |
2121 | ||
2122 | if ((u32) nfit_blk->cmd_offset % mmio->line_size | |
2123 | + 8 > mmio->line_size) { | |
2124 | dev_dbg(dev, "cmd_offset crosses interleave boundary\n"); | |
2125 | return -ENXIO; | |
2126 | } else if ((u32) nfit_blk->stat_offset % mmio->line_size | |
2127 | + 8 > mmio->line_size) { | |
2128 | dev_dbg(dev, "stat_offset crosses interleave boundary\n"); | |
2129 | return -ENXIO; | |
2130 | } | |
2131 | ||
2132 | return 0; | |
2133 | } | |
2134 | ||
aef25338 | 2135 | static int ars_get_cap(struct acpi_nfit_desc *acpi_desc, |
1cf03c00 | 2136 | struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa) |
0caeef63 | 2137 | { |
aef25338 | 2138 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
1cf03c00 | 2139 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
aef25338 DW |
2140 | int cmd_rc, rc; |
2141 | ||
1cf03c00 DW |
2142 | cmd->address = spa->address; |
2143 | cmd->length = spa->length; | |
aef25338 DW |
2144 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd, |
2145 | sizeof(*cmd), &cmd_rc); | |
2146 | if (rc < 0) | |
2147 | return rc; | |
1cf03c00 | 2148 | return cmd_rc; |
0caeef63 VV |
2149 | } |
2150 | ||
1cf03c00 | 2151 | static int ars_start(struct acpi_nfit_desc *acpi_desc, struct nfit_spa *nfit_spa) |
0caeef63 VV |
2152 | { |
2153 | int rc; | |
1cf03c00 DW |
2154 | int cmd_rc; |
2155 | struct nd_cmd_ars_start ars_start; | |
2156 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
2157 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
0caeef63 | 2158 | |
1cf03c00 DW |
2159 | memset(&ars_start, 0, sizeof(ars_start)); |
2160 | ars_start.address = spa->address; | |
2161 | ars_start.length = spa->length; | |
80790039 | 2162 | ars_start.flags = acpi_desc->ars_start_flags; |
1cf03c00 DW |
2163 | if (nfit_spa_type(spa) == NFIT_SPA_PM) |
2164 | ars_start.type = ND_ARS_PERSISTENT; | |
2165 | else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) | |
2166 | ars_start.type = ND_ARS_VOLATILE; | |
2167 | else | |
2168 | return -ENOTTY; | |
aef25338 | 2169 | |
1cf03c00 DW |
2170 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
2171 | sizeof(ars_start), &cmd_rc); | |
aef25338 | 2172 | |
1cf03c00 DW |
2173 | if (rc < 0) |
2174 | return rc; | |
2175 | return cmd_rc; | |
0caeef63 VV |
2176 | } |
2177 | ||
1cf03c00 | 2178 | static int ars_continue(struct acpi_nfit_desc *acpi_desc) |
0caeef63 | 2179 | { |
aef25338 | 2180 | int rc, cmd_rc; |
1cf03c00 DW |
2181 | struct nd_cmd_ars_start ars_start; |
2182 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
2183 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; | |
2184 | ||
2185 | memset(&ars_start, 0, sizeof(ars_start)); | |
2186 | ars_start.address = ars_status->restart_address; | |
2187 | ars_start.length = ars_status->restart_length; | |
2188 | ars_start.type = ars_status->type; | |
80790039 | 2189 | ars_start.flags = acpi_desc->ars_start_flags; |
1cf03c00 DW |
2190 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
2191 | sizeof(ars_start), &cmd_rc); | |
2192 | if (rc < 0) | |
2193 | return rc; | |
2194 | return cmd_rc; | |
2195 | } | |
0caeef63 | 2196 | |
1cf03c00 DW |
2197 | static int ars_get_status(struct acpi_nfit_desc *acpi_desc) |
2198 | { | |
2199 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
2200 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; | |
2201 | int rc, cmd_rc; | |
aef25338 | 2202 | |
1cf03c00 DW |
2203 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status, |
2204 | acpi_desc->ars_status_size, &cmd_rc); | |
2205 | if (rc < 0) | |
2206 | return rc; | |
2207 | return cmd_rc; | |
0caeef63 VV |
2208 | } |
2209 | ||
82aa37cf | 2210 | static int ars_status_process_records(struct acpi_nfit_desc *acpi_desc, |
1cf03c00 | 2211 | struct nd_cmd_ars_status *ars_status) |
0caeef63 | 2212 | { |
82aa37cf | 2213 | struct nvdimm_bus *nvdimm_bus = acpi_desc->nvdimm_bus; |
0caeef63 VV |
2214 | int rc; |
2215 | u32 i; | |
2216 | ||
82aa37cf DW |
2217 | /* |
2218 | * First record starts at 44 byte offset from the start of the | |
2219 | * payload. | |
2220 | */ | |
2221 | if (ars_status->out_length < 44) | |
2222 | return 0; | |
0caeef63 | 2223 | for (i = 0; i < ars_status->num_records; i++) { |
82aa37cf DW |
2224 | /* only process full records */ |
2225 | if (ars_status->out_length | |
2226 | < 44 + sizeof(struct nd_ars_record) * (i + 1)) | |
2227 | break; | |
0caeef63 VV |
2228 | rc = nvdimm_bus_add_poison(nvdimm_bus, |
2229 | ars_status->records[i].err_address, | |
2230 | ars_status->records[i].length); | |
2231 | if (rc) | |
2232 | return rc; | |
2233 | } | |
82aa37cf DW |
2234 | if (i < ars_status->num_records) |
2235 | dev_warn(acpi_desc->dev, "detected truncated ars results\n"); | |
0caeef63 VV |
2236 | |
2237 | return 0; | |
2238 | } | |
2239 | ||
af1996ef TK |
2240 | static void acpi_nfit_remove_resource(void *data) |
2241 | { | |
2242 | struct resource *res = data; | |
2243 | ||
2244 | remove_resource(res); | |
2245 | } | |
2246 | ||
2247 | static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc, | |
2248 | struct nd_region_desc *ndr_desc) | |
2249 | { | |
2250 | struct resource *res, *nd_res = ndr_desc->res; | |
2251 | int is_pmem, ret; | |
2252 | ||
2253 | /* No operation if the region is already registered as PMEM */ | |
2254 | is_pmem = region_intersects(nd_res->start, resource_size(nd_res), | |
2255 | IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY); | |
2256 | if (is_pmem == REGION_INTERSECTS) | |
2257 | return 0; | |
2258 | ||
2259 | res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL); | |
2260 | if (!res) | |
2261 | return -ENOMEM; | |
2262 | ||
2263 | res->name = "Persistent Memory"; | |
2264 | res->start = nd_res->start; | |
2265 | res->end = nd_res->end; | |
2266 | res->flags = IORESOURCE_MEM; | |
2267 | res->desc = IORES_DESC_PERSISTENT_MEMORY; | |
2268 | ||
2269 | ret = insert_resource(&iomem_resource, res); | |
2270 | if (ret) | |
2271 | return ret; | |
2272 | ||
d932dd2c SV |
2273 | ret = devm_add_action_or_reset(acpi_desc->dev, |
2274 | acpi_nfit_remove_resource, | |
2275 | res); | |
2276 | if (ret) | |
af1996ef | 2277 | return ret; |
af1996ef TK |
2278 | |
2279 | return 0; | |
2280 | } | |
2281 | ||
1f7df6f8 | 2282 | static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc, |
44c462eb | 2283 | struct nd_mapping_desc *mapping, struct nd_region_desc *ndr_desc, |
1f7df6f8 | 2284 | struct acpi_nfit_memory_map *memdev, |
1cf03c00 | 2285 | struct nfit_spa *nfit_spa) |
1f7df6f8 DW |
2286 | { |
2287 | struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, | |
2288 | memdev->device_handle); | |
1cf03c00 | 2289 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
047fc8a1 | 2290 | struct nd_blk_region_desc *ndbr_desc; |
1f7df6f8 | 2291 | struct nfit_mem *nfit_mem; |
faec6f8a | 2292 | int blk_valid = 0, rc; |
1f7df6f8 DW |
2293 | |
2294 | if (!nvdimm) { | |
2295 | dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n", | |
2296 | spa->range_index, memdev->device_handle); | |
2297 | return -ENODEV; | |
2298 | } | |
2299 | ||
44c462eb | 2300 | mapping->nvdimm = nvdimm; |
1f7df6f8 DW |
2301 | switch (nfit_spa_type(spa)) { |
2302 | case NFIT_SPA_PM: | |
2303 | case NFIT_SPA_VOLATILE: | |
44c462eb DW |
2304 | mapping->start = memdev->address; |
2305 | mapping->size = memdev->region_size; | |
1f7df6f8 DW |
2306 | break; |
2307 | case NFIT_SPA_DCR: | |
2308 | nfit_mem = nvdimm_provider_data(nvdimm); | |
2309 | if (!nfit_mem || !nfit_mem->bdw) { | |
2310 | dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n", | |
2311 | spa->range_index, nvdimm_name(nvdimm)); | |
2312 | } else { | |
44c462eb DW |
2313 | mapping->size = nfit_mem->bdw->capacity; |
2314 | mapping->start = nfit_mem->bdw->start_address; | |
5212e11f | 2315 | ndr_desc->num_lanes = nfit_mem->bdw->windows; |
1f7df6f8 DW |
2316 | blk_valid = 1; |
2317 | } | |
2318 | ||
44c462eb | 2319 | ndr_desc->mapping = mapping; |
1f7df6f8 | 2320 | ndr_desc->num_mappings = blk_valid; |
047fc8a1 RZ |
2321 | ndbr_desc = to_blk_region_desc(ndr_desc); |
2322 | ndbr_desc->enable = acpi_nfit_blk_region_enable; | |
6bc75619 | 2323 | ndbr_desc->do_io = acpi_desc->blk_do_io; |
faec6f8a DW |
2324 | rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa); |
2325 | if (rc) | |
2326 | return rc; | |
1cf03c00 DW |
2327 | nfit_spa->nd_region = nvdimm_blk_region_create(acpi_desc->nvdimm_bus, |
2328 | ndr_desc); | |
2329 | if (!nfit_spa->nd_region) | |
1f7df6f8 DW |
2330 | return -ENOMEM; |
2331 | break; | |
2332 | } | |
2333 | ||
2334 | return 0; | |
2335 | } | |
2336 | ||
c2f32acd LCY |
2337 | static bool nfit_spa_is_virtual(struct acpi_nfit_system_address *spa) |
2338 | { | |
2339 | return (nfit_spa_type(spa) == NFIT_SPA_VDISK || | |
2340 | nfit_spa_type(spa) == NFIT_SPA_VCD || | |
2341 | nfit_spa_type(spa) == NFIT_SPA_PDISK || | |
2342 | nfit_spa_type(spa) == NFIT_SPA_PCD); | |
2343 | } | |
2344 | ||
c9e582aa DW |
2345 | static bool nfit_spa_is_volatile(struct acpi_nfit_system_address *spa) |
2346 | { | |
2347 | return (nfit_spa_type(spa) == NFIT_SPA_VDISK || | |
2348 | nfit_spa_type(spa) == NFIT_SPA_VCD || | |
2349 | nfit_spa_type(spa) == NFIT_SPA_VOLATILE); | |
2350 | } | |
2351 | ||
1f7df6f8 DW |
2352 | static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc, |
2353 | struct nfit_spa *nfit_spa) | |
2354 | { | |
44c462eb | 2355 | static struct nd_mapping_desc mappings[ND_MAX_MAPPINGS]; |
1f7df6f8 | 2356 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
047fc8a1 RZ |
2357 | struct nd_blk_region_desc ndbr_desc; |
2358 | struct nd_region_desc *ndr_desc; | |
1f7df6f8 | 2359 | struct nfit_memdev *nfit_memdev; |
1f7df6f8 DW |
2360 | struct nvdimm_bus *nvdimm_bus; |
2361 | struct resource res; | |
eaf96153 | 2362 | int count = 0, rc; |
1f7df6f8 | 2363 | |
1cf03c00 | 2364 | if (nfit_spa->nd_region) |
20985164 VV |
2365 | return 0; |
2366 | ||
c2f32acd | 2367 | if (spa->range_index == 0 && !nfit_spa_is_virtual(spa)) { |
1f7df6f8 DW |
2368 | dev_dbg(acpi_desc->dev, "%s: detected invalid spa index\n", |
2369 | __func__); | |
2370 | return 0; | |
2371 | } | |
2372 | ||
2373 | memset(&res, 0, sizeof(res)); | |
44c462eb | 2374 | memset(&mappings, 0, sizeof(mappings)); |
047fc8a1 | 2375 | memset(&ndbr_desc, 0, sizeof(ndbr_desc)); |
1f7df6f8 DW |
2376 | res.start = spa->address; |
2377 | res.end = res.start + spa->length - 1; | |
047fc8a1 RZ |
2378 | ndr_desc = &ndbr_desc.ndr_desc; |
2379 | ndr_desc->res = &res; | |
2380 | ndr_desc->provider_data = nfit_spa; | |
2381 | ndr_desc->attr_groups = acpi_nfit_region_attribute_groups; | |
41d7a6d6 TK |
2382 | if (spa->flags & ACPI_NFIT_PROXIMITY_VALID) |
2383 | ndr_desc->numa_node = acpi_map_pxm_to_online_node( | |
2384 | spa->proximity_domain); | |
2385 | else | |
2386 | ndr_desc->numa_node = NUMA_NO_NODE; | |
2387 | ||
1f7df6f8 DW |
2388 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
2389 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; | |
44c462eb | 2390 | struct nd_mapping_desc *mapping; |
1f7df6f8 DW |
2391 | |
2392 | if (memdev->range_index != spa->range_index) | |
2393 | continue; | |
2394 | if (count >= ND_MAX_MAPPINGS) { | |
2395 | dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n", | |
2396 | spa->range_index, ND_MAX_MAPPINGS); | |
2397 | return -ENXIO; | |
2398 | } | |
44c462eb DW |
2399 | mapping = &mappings[count++]; |
2400 | rc = acpi_nfit_init_mapping(acpi_desc, mapping, ndr_desc, | |
1cf03c00 | 2401 | memdev, nfit_spa); |
1f7df6f8 | 2402 | if (rc) |
1cf03c00 | 2403 | goto out; |
1f7df6f8 DW |
2404 | } |
2405 | ||
44c462eb | 2406 | ndr_desc->mapping = mappings; |
047fc8a1 RZ |
2407 | ndr_desc->num_mappings = count; |
2408 | rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa); | |
eaf96153 | 2409 | if (rc) |
1cf03c00 | 2410 | goto out; |
eaf96153 | 2411 | |
1f7df6f8 DW |
2412 | nvdimm_bus = acpi_desc->nvdimm_bus; |
2413 | if (nfit_spa_type(spa) == NFIT_SPA_PM) { | |
af1996ef | 2414 | rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc); |
48901165 | 2415 | if (rc) { |
af1996ef TK |
2416 | dev_warn(acpi_desc->dev, |
2417 | "failed to insert pmem resource to iomem: %d\n", | |
2418 | rc); | |
48901165 | 2419 | goto out; |
0caeef63 | 2420 | } |
48901165 | 2421 | |
1cf03c00 DW |
2422 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, |
2423 | ndr_desc); | |
2424 | if (!nfit_spa->nd_region) | |
2425 | rc = -ENOMEM; | |
c9e582aa | 2426 | } else if (nfit_spa_is_volatile(spa)) { |
1cf03c00 DW |
2427 | nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus, |
2428 | ndr_desc); | |
2429 | if (!nfit_spa->nd_region) | |
2430 | rc = -ENOMEM; | |
c2f32acd LCY |
2431 | } else if (nfit_spa_is_virtual(spa)) { |
2432 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, | |
2433 | ndr_desc); | |
2434 | if (!nfit_spa->nd_region) | |
2435 | rc = -ENOMEM; | |
1f7df6f8 | 2436 | } |
20985164 | 2437 | |
1cf03c00 DW |
2438 | out: |
2439 | if (rc) | |
2440 | dev_err(acpi_desc->dev, "failed to register spa range %d\n", | |
2441 | nfit_spa->spa->range_index); | |
2442 | return rc; | |
2443 | } | |
2444 | ||
2445 | static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc, | |
2446 | u32 max_ars) | |
2447 | { | |
2448 | struct device *dev = acpi_desc->dev; | |
2449 | struct nd_cmd_ars_status *ars_status; | |
2450 | ||
2451 | if (acpi_desc->ars_status && acpi_desc->ars_status_size >= max_ars) { | |
2452 | memset(acpi_desc->ars_status, 0, acpi_desc->ars_status_size); | |
2453 | return 0; | |
2454 | } | |
2455 | ||
2456 | if (acpi_desc->ars_status) | |
2457 | devm_kfree(dev, acpi_desc->ars_status); | |
2458 | acpi_desc->ars_status = NULL; | |
2459 | ars_status = devm_kzalloc(dev, max_ars, GFP_KERNEL); | |
2460 | if (!ars_status) | |
2461 | return -ENOMEM; | |
2462 | acpi_desc->ars_status = ars_status; | |
2463 | acpi_desc->ars_status_size = max_ars; | |
1f7df6f8 DW |
2464 | return 0; |
2465 | } | |
2466 | ||
1cf03c00 DW |
2467 | static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc, |
2468 | struct nfit_spa *nfit_spa) | |
2469 | { | |
2470 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
2471 | int rc; | |
2472 | ||
2473 | if (!nfit_spa->max_ars) { | |
2474 | struct nd_cmd_ars_cap ars_cap; | |
2475 | ||
2476 | memset(&ars_cap, 0, sizeof(ars_cap)); | |
2477 | rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa); | |
2478 | if (rc < 0) | |
2479 | return rc; | |
2480 | nfit_spa->max_ars = ars_cap.max_ars_out; | |
2481 | nfit_spa->clear_err_unit = ars_cap.clear_err_unit; | |
2482 | /* check that the supported scrub types match the spa type */ | |
2483 | if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE && | |
2484 | ((ars_cap.status >> 16) & ND_ARS_VOLATILE) == 0) | |
2485 | return -ENOTTY; | |
2486 | else if (nfit_spa_type(spa) == NFIT_SPA_PM && | |
2487 | ((ars_cap.status >> 16) & ND_ARS_PERSISTENT) == 0) | |
2488 | return -ENOTTY; | |
2489 | } | |
2490 | ||
2491 | if (ars_status_alloc(acpi_desc, nfit_spa->max_ars)) | |
2492 | return -ENOMEM; | |
2493 | ||
2494 | rc = ars_get_status(acpi_desc); | |
2495 | if (rc < 0 && rc != -ENOSPC) | |
2496 | return rc; | |
2497 | ||
82aa37cf | 2498 | if (ars_status_process_records(acpi_desc, acpi_desc->ars_status)) |
1cf03c00 DW |
2499 | return -ENOMEM; |
2500 | ||
2501 | return 0; | |
2502 | } | |
2503 | ||
2504 | static void acpi_nfit_async_scrub(struct acpi_nfit_desc *acpi_desc, | |
2505 | struct nfit_spa *nfit_spa) | |
2506 | { | |
2507 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
2508 | unsigned int overflow_retry = scrub_overflow_abort; | |
2509 | u64 init_ars_start = 0, init_ars_len = 0; | |
2510 | struct device *dev = acpi_desc->dev; | |
2511 | unsigned int tmo = scrub_timeout; | |
2512 | int rc; | |
2513 | ||
37b137ff | 2514 | if (!nfit_spa->ars_required || !nfit_spa->nd_region) |
1cf03c00 DW |
2515 | return; |
2516 | ||
2517 | rc = ars_start(acpi_desc, nfit_spa); | |
2518 | /* | |
2519 | * If we timed out the initial scan we'll still be busy here, | |
2520 | * and will wait another timeout before giving up permanently. | |
2521 | */ | |
2522 | if (rc < 0 && rc != -EBUSY) | |
2523 | return; | |
2524 | ||
2525 | do { | |
2526 | u64 ars_start, ars_len; | |
2527 | ||
2528 | if (acpi_desc->cancel) | |
2529 | break; | |
2530 | rc = acpi_nfit_query_poison(acpi_desc, nfit_spa); | |
2531 | if (rc == -ENOTTY) | |
2532 | break; | |
2533 | if (rc == -EBUSY && !tmo) { | |
2534 | dev_warn(dev, "range %d ars timeout, aborting\n", | |
2535 | spa->range_index); | |
2536 | break; | |
2537 | } | |
2538 | ||
2539 | if (rc == -EBUSY) { | |
2540 | /* | |
2541 | * Note, entries may be appended to the list | |
2542 | * while the lock is dropped, but the workqueue | |
2543 | * being active prevents entries being deleted / | |
2544 | * freed. | |
2545 | */ | |
2546 | mutex_unlock(&acpi_desc->init_mutex); | |
2547 | ssleep(1); | |
2548 | tmo--; | |
2549 | mutex_lock(&acpi_desc->init_mutex); | |
2550 | continue; | |
2551 | } | |
2552 | ||
2553 | /* we got some results, but there are more pending... */ | |
2554 | if (rc == -ENOSPC && overflow_retry--) { | |
2555 | if (!init_ars_len) { | |
2556 | init_ars_len = acpi_desc->ars_status->length; | |
2557 | init_ars_start = acpi_desc->ars_status->address; | |
2558 | } | |
2559 | rc = ars_continue(acpi_desc); | |
2560 | } | |
2561 | ||
2562 | if (rc < 0) { | |
2563 | dev_warn(dev, "range %d ars continuation failed\n", | |
2564 | spa->range_index); | |
2565 | break; | |
2566 | } | |
2567 | ||
2568 | if (init_ars_len) { | |
2569 | ars_start = init_ars_start; | |
2570 | ars_len = init_ars_len; | |
2571 | } else { | |
2572 | ars_start = acpi_desc->ars_status->address; | |
2573 | ars_len = acpi_desc->ars_status->length; | |
2574 | } | |
2575 | dev_dbg(dev, "spa range: %d ars from %#llx + %#llx complete\n", | |
2576 | spa->range_index, ars_start, ars_len); | |
2577 | /* notify the region about new poison entries */ | |
2578 | nvdimm_region_notify(nfit_spa->nd_region, | |
2579 | NVDIMM_REVALIDATE_POISON); | |
2580 | break; | |
2581 | } while (1); | |
2582 | } | |
2583 | ||
2584 | static void acpi_nfit_scrub(struct work_struct *work) | |
1f7df6f8 | 2585 | { |
1cf03c00 DW |
2586 | struct device *dev; |
2587 | u64 init_scrub_length = 0; | |
1f7df6f8 | 2588 | struct nfit_spa *nfit_spa; |
1cf03c00 DW |
2589 | u64 init_scrub_address = 0; |
2590 | bool init_ars_done = false; | |
2591 | struct acpi_nfit_desc *acpi_desc; | |
2592 | unsigned int tmo = scrub_timeout; | |
2593 | unsigned int overflow_retry = scrub_overflow_abort; | |
2594 | ||
2595 | acpi_desc = container_of(work, typeof(*acpi_desc), work); | |
2596 | dev = acpi_desc->dev; | |
1f7df6f8 | 2597 | |
1cf03c00 DW |
2598 | /* |
2599 | * We scrub in 2 phases. The first phase waits for any platform | |
2600 | * firmware initiated scrubs to complete and then we go search for the | |
2601 | * affected spa regions to mark them scanned. In the second phase we | |
2602 | * initiate a directed scrub for every range that was not scrubbed in | |
37b137ff VV |
2603 | * phase 1. If we're called for a 'rescan', we harmlessly pass through |
2604 | * the first phase, but really only care about running phase 2, where | |
2605 | * regions can be notified of new poison. | |
1cf03c00 DW |
2606 | */ |
2607 | ||
2608 | /* process platform firmware initiated scrubs */ | |
2609 | retry: | |
2610 | mutex_lock(&acpi_desc->init_mutex); | |
1f7df6f8 | 2611 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
1cf03c00 DW |
2612 | struct nd_cmd_ars_status *ars_status; |
2613 | struct acpi_nfit_system_address *spa; | |
2614 | u64 ars_start, ars_len; | |
2615 | int rc; | |
1f7df6f8 | 2616 | |
1cf03c00 DW |
2617 | if (acpi_desc->cancel) |
2618 | break; | |
2619 | ||
2620 | if (nfit_spa->nd_region) | |
2621 | continue; | |
2622 | ||
2623 | if (init_ars_done) { | |
2624 | /* | |
2625 | * No need to re-query, we're now just | |
2626 | * reconciling all the ranges covered by the | |
2627 | * initial scrub | |
2628 | */ | |
2629 | rc = 0; | |
2630 | } else | |
2631 | rc = acpi_nfit_query_poison(acpi_desc, nfit_spa); | |
2632 | ||
2633 | if (rc == -ENOTTY) { | |
2634 | /* no ars capability, just register spa and move on */ | |
2635 | acpi_nfit_register_region(acpi_desc, nfit_spa); | |
2636 | continue; | |
2637 | } | |
2638 | ||
2639 | if (rc == -EBUSY && !tmo) { | |
2640 | /* fallthrough to directed scrub in phase 2 */ | |
2641 | dev_warn(dev, "timeout awaiting ars results, continuing...\n"); | |
2642 | break; | |
2643 | } else if (rc == -EBUSY) { | |
2644 | mutex_unlock(&acpi_desc->init_mutex); | |
2645 | ssleep(1); | |
2646 | tmo--; | |
2647 | goto retry; | |
2648 | } | |
2649 | ||
2650 | /* we got some results, but there are more pending... */ | |
2651 | if (rc == -ENOSPC && overflow_retry--) { | |
2652 | ars_status = acpi_desc->ars_status; | |
2653 | /* | |
2654 | * Record the original scrub range, so that we | |
2655 | * can recall all the ranges impacted by the | |
2656 | * initial scrub. | |
2657 | */ | |
2658 | if (!init_scrub_length) { | |
2659 | init_scrub_length = ars_status->length; | |
2660 | init_scrub_address = ars_status->address; | |
2661 | } | |
2662 | rc = ars_continue(acpi_desc); | |
2663 | if (rc == 0) { | |
2664 | mutex_unlock(&acpi_desc->init_mutex); | |
2665 | goto retry; | |
2666 | } | |
2667 | } | |
2668 | ||
2669 | if (rc < 0) { | |
2670 | /* | |
2671 | * Initial scrub failed, we'll give it one more | |
2672 | * try below... | |
2673 | */ | |
2674 | break; | |
2675 | } | |
2676 | ||
2677 | /* We got some final results, record completed ranges */ | |
2678 | ars_status = acpi_desc->ars_status; | |
2679 | if (init_scrub_length) { | |
2680 | ars_start = init_scrub_address; | |
2681 | ars_len = ars_start + init_scrub_length; | |
2682 | } else { | |
2683 | ars_start = ars_status->address; | |
2684 | ars_len = ars_status->length; | |
2685 | } | |
2686 | spa = nfit_spa->spa; | |
2687 | ||
2688 | if (!init_ars_done) { | |
2689 | init_ars_done = true; | |
2690 | dev_dbg(dev, "init scrub %#llx + %#llx complete\n", | |
2691 | ars_start, ars_len); | |
2692 | } | |
2693 | if (ars_start <= spa->address && ars_start + ars_len | |
2694 | >= spa->address + spa->length) | |
2695 | acpi_nfit_register_region(acpi_desc, nfit_spa); | |
1f7df6f8 | 2696 | } |
1cf03c00 DW |
2697 | |
2698 | /* | |
2699 | * For all the ranges not covered by an initial scrub we still | |
2700 | * want to see if there are errors, but it's ok to discover them | |
2701 | * asynchronously. | |
2702 | */ | |
2703 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { | |
2704 | /* | |
2705 | * Flag all the ranges that still need scrubbing, but | |
2706 | * register them now to make data available. | |
2707 | */ | |
37b137ff VV |
2708 | if (!nfit_spa->nd_region) { |
2709 | nfit_spa->ars_required = 1; | |
1cf03c00 | 2710 | acpi_nfit_register_region(acpi_desc, nfit_spa); |
37b137ff | 2711 | } |
1cf03c00 | 2712 | } |
9ccaed4b | 2713 | acpi_desc->init_complete = 1; |
1cf03c00 DW |
2714 | |
2715 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) | |
2716 | acpi_nfit_async_scrub(acpi_desc, nfit_spa); | |
37b137ff | 2717 | acpi_desc->scrub_count++; |
80790039 | 2718 | acpi_desc->ars_start_flags = 0; |
37b137ff VV |
2719 | if (acpi_desc->scrub_count_state) |
2720 | sysfs_notify_dirent(acpi_desc->scrub_count_state); | |
1cf03c00 DW |
2721 | mutex_unlock(&acpi_desc->init_mutex); |
2722 | } | |
2723 | ||
2724 | static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc) | |
2725 | { | |
2726 | struct nfit_spa *nfit_spa; | |
2727 | int rc; | |
2728 | ||
2729 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) | |
2730 | if (nfit_spa_type(nfit_spa->spa) == NFIT_SPA_DCR) { | |
2731 | /* BLK regions don't need to wait for ars results */ | |
2732 | rc = acpi_nfit_register_region(acpi_desc, nfit_spa); | |
2733 | if (rc) | |
2734 | return rc; | |
2735 | } | |
2736 | ||
80790039 | 2737 | acpi_desc->ars_start_flags = 0; |
fbabd829 DW |
2738 | if (!acpi_desc->cancel) |
2739 | queue_work(nfit_wq, &acpi_desc->work); | |
1f7df6f8 DW |
2740 | return 0; |
2741 | } | |
2742 | ||
20985164 VV |
2743 | static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc, |
2744 | struct nfit_table_prev *prev) | |
2745 | { | |
2746 | struct device *dev = acpi_desc->dev; | |
2747 | ||
2748 | if (!list_empty(&prev->spas) || | |
2749 | !list_empty(&prev->memdevs) || | |
2750 | !list_empty(&prev->dcrs) || | |
2751 | !list_empty(&prev->bdws) || | |
2752 | !list_empty(&prev->idts) || | |
2753 | !list_empty(&prev->flushes)) { | |
2754 | dev_err(dev, "new nfit deletes entries (unsupported)\n"); | |
2755 | return -ENXIO; | |
2756 | } | |
2757 | return 0; | |
2758 | } | |
2759 | ||
37b137ff VV |
2760 | static int acpi_nfit_desc_init_scrub_attr(struct acpi_nfit_desc *acpi_desc) |
2761 | { | |
2762 | struct device *dev = acpi_desc->dev; | |
2763 | struct kernfs_node *nfit; | |
2764 | struct device *bus_dev; | |
2765 | ||
2766 | if (!ars_supported(acpi_desc->nvdimm_bus)) | |
2767 | return 0; | |
2768 | ||
2769 | bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus); | |
2770 | nfit = sysfs_get_dirent(bus_dev->kobj.sd, "nfit"); | |
2771 | if (!nfit) { | |
2772 | dev_err(dev, "sysfs_get_dirent 'nfit' failed\n"); | |
2773 | return -ENODEV; | |
2774 | } | |
2775 | acpi_desc->scrub_count_state = sysfs_get_dirent(nfit, "scrub"); | |
2776 | sysfs_put(nfit); | |
2777 | if (!acpi_desc->scrub_count_state) { | |
2778 | dev_err(dev, "sysfs_get_dirent 'scrub' failed\n"); | |
2779 | return -ENODEV; | |
2780 | } | |
2781 | ||
2782 | return 0; | |
2783 | } | |
2784 | ||
fbabd829 | 2785 | static void acpi_nfit_unregister(void *data) |
58cd71b4 DW |
2786 | { |
2787 | struct acpi_nfit_desc *acpi_desc = data; | |
2788 | ||
58cd71b4 | 2789 | nvdimm_bus_unregister(acpi_desc->nvdimm_bus); |
58cd71b4 DW |
2790 | } |
2791 | ||
e7a11b44 | 2792 | int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *data, acpi_size sz) |
b94d5230 DW |
2793 | { |
2794 | struct device *dev = acpi_desc->dev; | |
20985164 | 2795 | struct nfit_table_prev prev; |
b94d5230 | 2796 | const void *end; |
1f7df6f8 | 2797 | int rc; |
b94d5230 | 2798 | |
58cd71b4 | 2799 | if (!acpi_desc->nvdimm_bus) { |
37b137ff VV |
2800 | acpi_nfit_init_dsms(acpi_desc); |
2801 | ||
58cd71b4 DW |
2802 | acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, |
2803 | &acpi_desc->nd_desc); | |
2804 | if (!acpi_desc->nvdimm_bus) | |
2805 | return -ENOMEM; | |
37b137ff | 2806 | |
fbabd829 | 2807 | rc = devm_add_action_or_reset(dev, acpi_nfit_unregister, |
58cd71b4 DW |
2808 | acpi_desc); |
2809 | if (rc) | |
2810 | return rc; | |
37b137ff VV |
2811 | |
2812 | rc = acpi_nfit_desc_init_scrub_attr(acpi_desc); | |
2813 | if (rc) | |
2814 | return rc; | |
6839a6d9 VV |
2815 | |
2816 | /* register this acpi_desc for mce notifications */ | |
2817 | mutex_lock(&acpi_desc_lock); | |
2818 | list_add_tail(&acpi_desc->list, &acpi_descs); | |
2819 | mutex_unlock(&acpi_desc_lock); | |
58cd71b4 DW |
2820 | } |
2821 | ||
20985164 VV |
2822 | mutex_lock(&acpi_desc->init_mutex); |
2823 | ||
2824 | INIT_LIST_HEAD(&prev.spas); | |
2825 | INIT_LIST_HEAD(&prev.memdevs); | |
2826 | INIT_LIST_HEAD(&prev.dcrs); | |
2827 | INIT_LIST_HEAD(&prev.bdws); | |
2828 | INIT_LIST_HEAD(&prev.idts); | |
2829 | INIT_LIST_HEAD(&prev.flushes); | |
2830 | ||
2831 | list_cut_position(&prev.spas, &acpi_desc->spas, | |
2832 | acpi_desc->spas.prev); | |
2833 | list_cut_position(&prev.memdevs, &acpi_desc->memdevs, | |
2834 | acpi_desc->memdevs.prev); | |
2835 | list_cut_position(&prev.dcrs, &acpi_desc->dcrs, | |
2836 | acpi_desc->dcrs.prev); | |
2837 | list_cut_position(&prev.bdws, &acpi_desc->bdws, | |
2838 | acpi_desc->bdws.prev); | |
2839 | list_cut_position(&prev.idts, &acpi_desc->idts, | |
2840 | acpi_desc->idts.prev); | |
2841 | list_cut_position(&prev.flushes, &acpi_desc->flushes, | |
2842 | acpi_desc->flushes.prev); | |
b94d5230 | 2843 | |
b94d5230 | 2844 | end = data + sz; |
b94d5230 | 2845 | while (!IS_ERR_OR_NULL(data)) |
20985164 | 2846 | data = add_table(acpi_desc, &prev, data, end); |
b94d5230 DW |
2847 | |
2848 | if (IS_ERR(data)) { | |
2849 | dev_dbg(dev, "%s: nfit table parsing error: %ld\n", __func__, | |
2850 | PTR_ERR(data)); | |
20985164 VV |
2851 | rc = PTR_ERR(data); |
2852 | goto out_unlock; | |
b94d5230 DW |
2853 | } |
2854 | ||
20985164 VV |
2855 | rc = acpi_nfit_check_deletions(acpi_desc, &prev); |
2856 | if (rc) | |
2857 | goto out_unlock; | |
2858 | ||
81ed4e36 DW |
2859 | rc = nfit_mem_init(acpi_desc); |
2860 | if (rc) | |
20985164 | 2861 | goto out_unlock; |
62232e45 | 2862 | |
1f7df6f8 DW |
2863 | rc = acpi_nfit_register_dimms(acpi_desc); |
2864 | if (rc) | |
20985164 VV |
2865 | goto out_unlock; |
2866 | ||
2867 | rc = acpi_nfit_register_regions(acpi_desc); | |
1f7df6f8 | 2868 | |
20985164 VV |
2869 | out_unlock: |
2870 | mutex_unlock(&acpi_desc->init_mutex); | |
2871 | return rc; | |
b94d5230 | 2872 | } |
6bc75619 | 2873 | EXPORT_SYMBOL_GPL(acpi_nfit_init); |
b94d5230 | 2874 | |
7ae0fa43 DW |
2875 | struct acpi_nfit_flush_work { |
2876 | struct work_struct work; | |
2877 | struct completion cmp; | |
2878 | }; | |
2879 | ||
2880 | static void flush_probe(struct work_struct *work) | |
2881 | { | |
2882 | struct acpi_nfit_flush_work *flush; | |
2883 | ||
2884 | flush = container_of(work, typeof(*flush), work); | |
2885 | complete(&flush->cmp); | |
2886 | } | |
2887 | ||
2888 | static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc) | |
2889 | { | |
2890 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); | |
2891 | struct device *dev = acpi_desc->dev; | |
2892 | struct acpi_nfit_flush_work flush; | |
e471486c | 2893 | int rc; |
7ae0fa43 DW |
2894 | |
2895 | /* bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */ | |
2896 | device_lock(dev); | |
2897 | device_unlock(dev); | |
2898 | ||
9ccaed4b DW |
2899 | /* bounce the init_mutex to make init_complete valid */ |
2900 | mutex_lock(&acpi_desc->init_mutex); | |
fbabd829 DW |
2901 | if (acpi_desc->cancel || acpi_desc->init_complete) { |
2902 | mutex_unlock(&acpi_desc->init_mutex); | |
9ccaed4b | 2903 | return 0; |
fbabd829 | 2904 | } |
9ccaed4b | 2905 | |
7ae0fa43 DW |
2906 | /* |
2907 | * Scrub work could take 10s of seconds, userspace may give up so we | |
2908 | * need to be interruptible while waiting. | |
2909 | */ | |
2910 | INIT_WORK_ONSTACK(&flush.work, flush_probe); | |
2911 | COMPLETION_INITIALIZER_ONSTACK(flush.cmp); | |
2912 | queue_work(nfit_wq, &flush.work); | |
fbabd829 | 2913 | mutex_unlock(&acpi_desc->init_mutex); |
e471486c DW |
2914 | |
2915 | rc = wait_for_completion_interruptible(&flush.cmp); | |
2916 | cancel_work_sync(&flush.work); | |
2917 | return rc; | |
7ae0fa43 DW |
2918 | } |
2919 | ||
87bf572e DW |
2920 | static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc, |
2921 | struct nvdimm *nvdimm, unsigned int cmd) | |
2922 | { | |
2923 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); | |
2924 | ||
2925 | if (nvdimm) | |
2926 | return 0; | |
2927 | if (cmd != ND_CMD_ARS_START) | |
2928 | return 0; | |
2929 | ||
2930 | /* | |
2931 | * The kernel and userspace may race to initiate a scrub, but | |
2932 | * the scrub thread is prepared to lose that initial race. It | |
2933 | * just needs guarantees that any ars it initiates are not | |
2934 | * interrupted by any intervening start reqeusts from userspace. | |
2935 | */ | |
2936 | if (work_busy(&acpi_desc->work)) | |
2937 | return -EBUSY; | |
2938 | ||
2939 | return 0; | |
2940 | } | |
2941 | ||
80790039 | 2942 | int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc, u8 flags) |
37b137ff VV |
2943 | { |
2944 | struct device *dev = acpi_desc->dev; | |
2945 | struct nfit_spa *nfit_spa; | |
2946 | ||
2947 | if (work_busy(&acpi_desc->work)) | |
2948 | return -EBUSY; | |
2949 | ||
fbabd829 DW |
2950 | mutex_lock(&acpi_desc->init_mutex); |
2951 | if (acpi_desc->cancel) { | |
2952 | mutex_unlock(&acpi_desc->init_mutex); | |
37b137ff | 2953 | return 0; |
fbabd829 | 2954 | } |
37b137ff | 2955 | |
37b137ff VV |
2956 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
2957 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
2958 | ||
2959 | if (nfit_spa_type(spa) != NFIT_SPA_PM) | |
2960 | continue; | |
2961 | ||
2962 | nfit_spa->ars_required = 1; | |
2963 | } | |
80790039 | 2964 | acpi_desc->ars_start_flags = flags; |
37b137ff VV |
2965 | queue_work(nfit_wq, &acpi_desc->work); |
2966 | dev_dbg(dev, "%s: ars_scan triggered\n", __func__); | |
2967 | mutex_unlock(&acpi_desc->init_mutex); | |
2968 | ||
2969 | return 0; | |
2970 | } | |
2971 | ||
a61fe6f7 | 2972 | void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev) |
b94d5230 DW |
2973 | { |
2974 | struct nvdimm_bus_descriptor *nd_desc; | |
b94d5230 DW |
2975 | |
2976 | dev_set_drvdata(dev, acpi_desc); | |
2977 | acpi_desc->dev = dev; | |
6bc75619 | 2978 | acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io; |
b94d5230 DW |
2979 | nd_desc = &acpi_desc->nd_desc; |
2980 | nd_desc->provider_name = "ACPI.NFIT"; | |
bc9775d8 | 2981 | nd_desc->module = THIS_MODULE; |
b94d5230 | 2982 | nd_desc->ndctl = acpi_nfit_ctl; |
7ae0fa43 | 2983 | nd_desc->flush_probe = acpi_nfit_flush_probe; |
87bf572e | 2984 | nd_desc->clear_to_send = acpi_nfit_clear_to_send; |
45def22c | 2985 | nd_desc->attr_groups = acpi_nfit_attribute_groups; |
b94d5230 | 2986 | |
20985164 VV |
2987 | INIT_LIST_HEAD(&acpi_desc->spas); |
2988 | INIT_LIST_HEAD(&acpi_desc->dcrs); | |
2989 | INIT_LIST_HEAD(&acpi_desc->bdws); | |
2990 | INIT_LIST_HEAD(&acpi_desc->idts); | |
2991 | INIT_LIST_HEAD(&acpi_desc->flushes); | |
2992 | INIT_LIST_HEAD(&acpi_desc->memdevs); | |
2993 | INIT_LIST_HEAD(&acpi_desc->dimms); | |
6839a6d9 | 2994 | INIT_LIST_HEAD(&acpi_desc->list); |
20985164 | 2995 | mutex_init(&acpi_desc->init_mutex); |
1cf03c00 | 2996 | INIT_WORK(&acpi_desc->work, acpi_nfit_scrub); |
20985164 | 2997 | } |
a61fe6f7 | 2998 | EXPORT_SYMBOL_GPL(acpi_nfit_desc_init); |
20985164 | 2999 | |
3c87f372 DW |
3000 | static void acpi_nfit_put_table(void *table) |
3001 | { | |
3002 | acpi_put_table(table); | |
3003 | } | |
3004 | ||
fbabd829 DW |
3005 | void acpi_nfit_shutdown(void *data) |
3006 | { | |
3007 | struct acpi_nfit_desc *acpi_desc = data; | |
3008 | struct device *bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus); | |
3009 | ||
3010 | /* | |
3011 | * Destruct under acpi_desc_lock so that nfit_handle_mce does not | |
3012 | * race teardown | |
3013 | */ | |
3014 | mutex_lock(&acpi_desc_lock); | |
3015 | list_del(&acpi_desc->list); | |
3016 | mutex_unlock(&acpi_desc_lock); | |
3017 | ||
3018 | mutex_lock(&acpi_desc->init_mutex); | |
3019 | acpi_desc->cancel = 1; | |
3020 | mutex_unlock(&acpi_desc->init_mutex); | |
3021 | ||
3022 | /* | |
3023 | * Bounce the nvdimm bus lock to make sure any in-flight | |
3024 | * acpi_nfit_ars_rescan() submissions have had a chance to | |
3025 | * either submit or see ->cancel set. | |
3026 | */ | |
3027 | device_lock(bus_dev); | |
3028 | device_unlock(bus_dev); | |
3029 | ||
3030 | flush_workqueue(nfit_wq); | |
3031 | } | |
3032 | EXPORT_SYMBOL_GPL(acpi_nfit_shutdown); | |
3033 | ||
20985164 VV |
3034 | static int acpi_nfit_add(struct acpi_device *adev) |
3035 | { | |
3036 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; | |
3037 | struct acpi_nfit_desc *acpi_desc; | |
3038 | struct device *dev = &adev->dev; | |
3039 | struct acpi_table_header *tbl; | |
3040 | acpi_status status = AE_OK; | |
3041 | acpi_size sz; | |
31932041 | 3042 | int rc = 0; |
20985164 | 3043 | |
6b11d1d6 | 3044 | status = acpi_get_table(ACPI_SIG_NFIT, 0, &tbl); |
20985164 VV |
3045 | if (ACPI_FAILURE(status)) { |
3046 | /* This is ok, we could have an nvdimm hotplugged later */ | |
3047 | dev_dbg(dev, "failed to find NFIT at startup\n"); | |
3048 | return 0; | |
3049 | } | |
3c87f372 DW |
3050 | |
3051 | rc = devm_add_action_or_reset(dev, acpi_nfit_put_table, tbl); | |
3052 | if (rc) | |
3053 | return rc; | |
6b11d1d6 | 3054 | sz = tbl->length; |
20985164 | 3055 | |
a61fe6f7 DW |
3056 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
3057 | if (!acpi_desc) | |
3058 | return -ENOMEM; | |
3059 | acpi_nfit_desc_init(acpi_desc, &adev->dev); | |
20985164 | 3060 | |
e7a11b44 | 3061 | /* Save the acpi header for exporting the revision via sysfs */ |
6b577c9d | 3062 | acpi_desc->acpi_header = *tbl; |
20985164 VV |
3063 | |
3064 | /* Evaluate _FIT and override with that if present */ | |
3065 | status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf); | |
3066 | if (ACPI_SUCCESS(status) && buf.length > 0) { | |
e7a11b44 DW |
3067 | union acpi_object *obj = buf.pointer; |
3068 | ||
3069 | if (obj->type == ACPI_TYPE_BUFFER) | |
3070 | rc = acpi_nfit_init(acpi_desc, obj->buffer.pointer, | |
3071 | obj->buffer.length); | |
3072 | else | |
6b577c9d LK |
3073 | dev_dbg(dev, "%s invalid type %d, ignoring _FIT\n", |
3074 | __func__, (int) obj->type); | |
31932041 DW |
3075 | kfree(buf.pointer); |
3076 | } else | |
e7a11b44 DW |
3077 | /* skip over the lead-in header table */ |
3078 | rc = acpi_nfit_init(acpi_desc, (void *) tbl | |
3079 | + sizeof(struct acpi_table_nfit), | |
3080 | sz - sizeof(struct acpi_table_nfit)); | |
fbabd829 DW |
3081 | |
3082 | if (rc) | |
3083 | return rc; | |
3084 | return devm_add_action_or_reset(dev, acpi_nfit_shutdown, acpi_desc); | |
b94d5230 DW |
3085 | } |
3086 | ||
3087 | static int acpi_nfit_remove(struct acpi_device *adev) | |
3088 | { | |
fbabd829 | 3089 | /* see acpi_nfit_unregister */ |
b94d5230 DW |
3090 | return 0; |
3091 | } | |
3092 | ||
56b47fe6 | 3093 | static void acpi_nfit_update_notify(struct device *dev, acpi_handle handle) |
20985164 | 3094 | { |
c14a868a | 3095 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev); |
20985164 | 3096 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
e7a11b44 | 3097 | union acpi_object *obj; |
20985164 VV |
3098 | acpi_status status; |
3099 | int ret; | |
3100 | ||
20985164 VV |
3101 | if (!dev->driver) { |
3102 | /* dev->driver may be null if we're being removed */ | |
3103 | dev_dbg(dev, "%s: no driver found for dev\n", __func__); | |
c14a868a | 3104 | return; |
20985164 VV |
3105 | } |
3106 | ||
3107 | if (!acpi_desc) { | |
a61fe6f7 DW |
3108 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
3109 | if (!acpi_desc) | |
c14a868a DW |
3110 | return; |
3111 | acpi_nfit_desc_init(acpi_desc, dev); | |
7ae0fa43 DW |
3112 | } else { |
3113 | /* | |
3114 | * Finish previous registration before considering new | |
3115 | * regions. | |
3116 | */ | |
3117 | flush_workqueue(nfit_wq); | |
20985164 VV |
3118 | } |
3119 | ||
3120 | /* Evaluate _FIT */ | |
c14a868a | 3121 | status = acpi_evaluate_object(handle, "_FIT", NULL, &buf); |
20985164 VV |
3122 | if (ACPI_FAILURE(status)) { |
3123 | dev_err(dev, "failed to evaluate _FIT\n"); | |
c14a868a | 3124 | return; |
20985164 VV |
3125 | } |
3126 | ||
6b577c9d LK |
3127 | obj = buf.pointer; |
3128 | if (obj->type == ACPI_TYPE_BUFFER) { | |
e7a11b44 DW |
3129 | ret = acpi_nfit_init(acpi_desc, obj->buffer.pointer, |
3130 | obj->buffer.length); | |
31932041 | 3131 | if (ret) |
6b577c9d | 3132 | dev_err(dev, "failed to merge updated NFIT\n"); |
31932041 | 3133 | } else |
6b577c9d | 3134 | dev_err(dev, "Invalid _FIT\n"); |
20985164 | 3135 | kfree(buf.pointer); |
c14a868a | 3136 | } |
56b47fe6 TK |
3137 | |
3138 | static void acpi_nfit_uc_error_notify(struct device *dev, acpi_handle handle) | |
3139 | { | |
3140 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev); | |
80790039 TK |
3141 | u8 flags = (acpi_desc->scrub_mode == HW_ERROR_SCRUB_ON) ? |
3142 | 0 : ND_ARS_RETURN_PREV_DATA; | |
56b47fe6 | 3143 | |
80790039 | 3144 | acpi_nfit_ars_rescan(acpi_desc, flags); |
56b47fe6 TK |
3145 | } |
3146 | ||
3147 | void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event) | |
3148 | { | |
3149 | dev_dbg(dev, "%s: event: 0x%x\n", __func__, event); | |
3150 | ||
3151 | switch (event) { | |
3152 | case NFIT_NOTIFY_UPDATE: | |
3153 | return acpi_nfit_update_notify(dev, handle); | |
3154 | case NFIT_NOTIFY_UC_MEMORY_ERROR: | |
3155 | return acpi_nfit_uc_error_notify(dev, handle); | |
3156 | default: | |
3157 | return; | |
3158 | } | |
3159 | } | |
c14a868a | 3160 | EXPORT_SYMBOL_GPL(__acpi_nfit_notify); |
20985164 | 3161 | |
c14a868a DW |
3162 | static void acpi_nfit_notify(struct acpi_device *adev, u32 event) |
3163 | { | |
3164 | device_lock(&adev->dev); | |
3165 | __acpi_nfit_notify(&adev->dev, adev->handle, event); | |
3166 | device_unlock(&adev->dev); | |
20985164 VV |
3167 | } |
3168 | ||
b94d5230 DW |
3169 | static const struct acpi_device_id acpi_nfit_ids[] = { |
3170 | { "ACPI0012", 0 }, | |
3171 | { "", 0 }, | |
3172 | }; | |
3173 | MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids); | |
3174 | ||
3175 | static struct acpi_driver acpi_nfit_driver = { | |
3176 | .name = KBUILD_MODNAME, | |
3177 | .ids = acpi_nfit_ids, | |
3178 | .ops = { | |
3179 | .add = acpi_nfit_add, | |
3180 | .remove = acpi_nfit_remove, | |
20985164 | 3181 | .notify = acpi_nfit_notify, |
b94d5230 DW |
3182 | }, |
3183 | }; | |
3184 | ||
3185 | static __init int nfit_init(void) | |
3186 | { | |
7e700d2c PB |
3187 | int ret; |
3188 | ||
b94d5230 DW |
3189 | BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40); |
3190 | BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56); | |
3191 | BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48); | |
3192 | BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20); | |
3193 | BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9); | |
3194 | BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80); | |
3195 | BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40); | |
3196 | ||
41c8bdb3 AS |
3197 | guid_parse(UUID_VOLATILE_MEMORY, &nfit_uuid[NFIT_SPA_VOLATILE]); |
3198 | guid_parse(UUID_PERSISTENT_MEMORY, &nfit_uuid[NFIT_SPA_PM]); | |
3199 | guid_parse(UUID_CONTROL_REGION, &nfit_uuid[NFIT_SPA_DCR]); | |
3200 | guid_parse(UUID_DATA_REGION, &nfit_uuid[NFIT_SPA_BDW]); | |
3201 | guid_parse(UUID_VOLATILE_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_VDISK]); | |
3202 | guid_parse(UUID_VOLATILE_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_VCD]); | |
3203 | guid_parse(UUID_PERSISTENT_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_PDISK]); | |
3204 | guid_parse(UUID_PERSISTENT_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_PCD]); | |
3205 | guid_parse(UUID_NFIT_BUS, &nfit_uuid[NFIT_DEV_BUS]); | |
3206 | guid_parse(UUID_NFIT_DIMM, &nfit_uuid[NFIT_DEV_DIMM]); | |
3207 | guid_parse(UUID_NFIT_DIMM_N_HPE1, &nfit_uuid[NFIT_DEV_DIMM_N_HPE1]); | |
3208 | guid_parse(UUID_NFIT_DIMM_N_HPE2, &nfit_uuid[NFIT_DEV_DIMM_N_HPE2]); | |
3209 | guid_parse(UUID_NFIT_DIMM_N_MSFT, &nfit_uuid[NFIT_DEV_DIMM_N_MSFT]); | |
b94d5230 | 3210 | |
7ae0fa43 DW |
3211 | nfit_wq = create_singlethread_workqueue("nfit"); |
3212 | if (!nfit_wq) | |
3213 | return -ENOMEM; | |
3214 | ||
6839a6d9 | 3215 | nfit_mce_register(); |
7e700d2c PB |
3216 | ret = acpi_bus_register_driver(&acpi_nfit_driver); |
3217 | if (ret) { | |
3218 | nfit_mce_unregister(); | |
3219 | destroy_workqueue(nfit_wq); | |
3220 | } | |
3221 | ||
3222 | return ret; | |
6839a6d9 | 3223 | |
b94d5230 DW |
3224 | } |
3225 | ||
3226 | static __exit void nfit_exit(void) | |
3227 | { | |
6839a6d9 | 3228 | nfit_mce_unregister(); |
b94d5230 | 3229 | acpi_bus_unregister_driver(&acpi_nfit_driver); |
7ae0fa43 | 3230 | destroy_workqueue(nfit_wq); |
6839a6d9 | 3231 | WARN_ON(!list_empty(&acpi_descs)); |
b94d5230 DW |
3232 | } |
3233 | ||
3234 | module_init(nfit_init); | |
3235 | module_exit(nfit_exit); | |
3236 | MODULE_LICENSE("GPL v2"); | |
3237 | MODULE_AUTHOR("Intel Corporation"); |