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tools/testing/nvdimm: add manufacturing_{date|location} dimm properties
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CommitLineData
b94d5230
DW
1/*
2 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of version 2 of the GNU General Public License as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
12 */
13#include <linux/list_sort.h>
14#include <linux/libnvdimm.h>
15#include <linux/module.h>
047fc8a1 16#include <linux/mutex.h>
62232e45 17#include <linux/ndctl.h>
0caeef63 18#include <linux/delay.h>
b94d5230
DW
19#include <linux/list.h>
20#include <linux/acpi.h>
eaf96153 21#include <linux/sort.h>
c2ad2954 22#include <linux/pmem.h>
047fc8a1 23#include <linux/io.h>
1cf03c00 24#include <linux/nd.h>
96601adb 25#include <asm/cacheflush.h>
b94d5230
DW
26#include "nfit.h"
27
047fc8a1
RZ
28/*
29 * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
30 * irrelevant.
31 */
2f8e2c87 32#include <linux/io-64-nonatomic-hi-lo.h>
047fc8a1 33
4d88a97a
DW
34static bool force_enable_dimms;
35module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR);
36MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status");
37
1cf03c00
DW
38static unsigned int scrub_timeout = NFIT_ARS_TIMEOUT;
39module_param(scrub_timeout, uint, S_IRUGO|S_IWUSR);
40MODULE_PARM_DESC(scrub_timeout, "Initial scrub timeout in seconds");
41
42/* after three payloads of overflow, it's dead jim */
43static unsigned int scrub_overflow_abort = 3;
44module_param(scrub_overflow_abort, uint, S_IRUGO|S_IWUSR);
45MODULE_PARM_DESC(scrub_overflow_abort,
46 "Number of times we overflow ARS results before abort");
47
87554098
DW
48static bool disable_vendor_specific;
49module_param(disable_vendor_specific, bool, S_IRUGO);
50MODULE_PARM_DESC(disable_vendor_specific,
51 "Limit commands to the publicly specified set\n");
52
7ae0fa43
DW
53static struct workqueue_struct *nfit_wq;
54
20985164
VV
55struct nfit_table_prev {
56 struct list_head spas;
57 struct list_head memdevs;
58 struct list_head dcrs;
59 struct list_head bdws;
60 struct list_head idts;
61 struct list_head flushes;
62};
63
b94d5230
DW
64static u8 nfit_uuid[NFIT_UUID_MAX][16];
65
6bc75619 66const u8 *to_nfit_uuid(enum nfit_uuids id)
b94d5230
DW
67{
68 return nfit_uuid[id];
69}
6bc75619 70EXPORT_SYMBOL(to_nfit_uuid);
b94d5230 71
62232e45
DW
72static struct acpi_nfit_desc *to_acpi_nfit_desc(
73 struct nvdimm_bus_descriptor *nd_desc)
74{
75 return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
76}
77
78static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc)
79{
80 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
81
82 /*
83 * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct
84 * acpi_device.
85 */
86 if (!nd_desc->provider_name
87 || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0)
88 return NULL;
89
90 return to_acpi_device(acpi_desc->dev);
91}
92
aef25338
DW
93static int xlat_status(void *buf, unsigned int cmd)
94{
d4f32367 95 struct nd_cmd_clear_error *clear_err;
aef25338
DW
96 struct nd_cmd_ars_status *ars_status;
97 struct nd_cmd_ars_start *ars_start;
98 struct nd_cmd_ars_cap *ars_cap;
99 u16 flags;
100
101 switch (cmd) {
102 case ND_CMD_ARS_CAP:
103 ars_cap = buf;
104 if ((ars_cap->status & 0xffff) == NFIT_ARS_CAP_NONE)
105 return -ENOTTY;
106
107 /* Command failed */
108 if (ars_cap->status & 0xffff)
109 return -EIO;
110
111 /* No supported scan types for this range */
112 flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE;
113 if ((ars_cap->status >> 16 & flags) == 0)
114 return -ENOTTY;
115 break;
116 case ND_CMD_ARS_START:
117 ars_start = buf;
118 /* ARS is in progress */
119 if ((ars_start->status & 0xffff) == NFIT_ARS_START_BUSY)
120 return -EBUSY;
121
122 /* Command failed */
123 if (ars_start->status & 0xffff)
124 return -EIO;
125 break;
126 case ND_CMD_ARS_STATUS:
127 ars_status = buf;
128 /* Command failed */
129 if (ars_status->status & 0xffff)
130 return -EIO;
131 /* Check extended status (Upper two bytes) */
132 if (ars_status->status == NFIT_ARS_STATUS_DONE)
133 return 0;
134
135 /* ARS is in progress */
136 if (ars_status->status == NFIT_ARS_STATUS_BUSY)
137 return -EBUSY;
138
139 /* No ARS performed for the current boot */
140 if (ars_status->status == NFIT_ARS_STATUS_NONE)
141 return -EAGAIN;
142
143 /*
144 * ARS interrupted, either we overflowed or some other
145 * agent wants the scan to stop. If we didn't overflow
146 * then just continue with the returned results.
147 */
148 if (ars_status->status == NFIT_ARS_STATUS_INTR) {
149 if (ars_status->flags & NFIT_ARS_F_OVERFLOW)
150 return -ENOSPC;
151 return 0;
152 }
153
154 /* Unknown status */
155 if (ars_status->status >> 16)
156 return -EIO;
157 break;
d4f32367
DW
158 case ND_CMD_CLEAR_ERROR:
159 clear_err = buf;
160 if (clear_err->status & 0xffff)
161 return -EIO;
162 if (!clear_err->cleared)
163 return -EIO;
164 if (clear_err->length > clear_err->cleared)
165 return clear_err->cleared;
166 break;
aef25338
DW
167 default:
168 break;
169 }
170
171 return 0;
172}
173
b94d5230
DW
174static int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc,
175 struct nvdimm *nvdimm, unsigned int cmd, void *buf,
aef25338 176 unsigned int buf_len, int *cmd_rc)
b94d5230 177{
62232e45 178 struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
62232e45 179 union acpi_object in_obj, in_buf, *out_obj;
31eca76b 180 const struct nd_cmd_desc *desc = NULL;
62232e45 181 struct device *dev = acpi_desc->dev;
31eca76b 182 struct nd_cmd_pkg *call_pkg = NULL;
62232e45 183 const char *cmd_name, *dimm_name;
31eca76b 184 unsigned long cmd_mask, dsm_mask;
62232e45 185 acpi_handle handle;
31eca76b 186 unsigned int func;
62232e45
DW
187 const u8 *uuid;
188 u32 offset;
189 int rc, i;
190
31eca76b
DW
191 func = cmd;
192 if (cmd == ND_CMD_CALL) {
193 call_pkg = buf;
194 func = call_pkg->nd_command;
195 }
196
62232e45
DW
197 if (nvdimm) {
198 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
199 struct acpi_device *adev = nfit_mem->adev;
200
201 if (!adev)
202 return -ENOTTY;
31eca76b
DW
203 if (call_pkg && nfit_mem->family != call_pkg->nd_family)
204 return -ENOTTY;
205
047fc8a1 206 dimm_name = nvdimm_name(nvdimm);
62232e45 207 cmd_name = nvdimm_cmd_name(cmd);
e3654eca 208 cmd_mask = nvdimm_cmd_mask(nvdimm);
62232e45
DW
209 dsm_mask = nfit_mem->dsm_mask;
210 desc = nd_cmd_dimm_desc(cmd);
31eca76b 211 uuid = to_nfit_uuid(nfit_mem->family);
62232e45
DW
212 handle = adev->handle;
213 } else {
214 struct acpi_device *adev = to_acpi_dev(acpi_desc);
215
216 cmd_name = nvdimm_bus_cmd_name(cmd);
e3654eca 217 cmd_mask = nd_desc->cmd_mask;
31eca76b 218 dsm_mask = cmd_mask;
62232e45
DW
219 desc = nd_cmd_bus_desc(cmd);
220 uuid = to_nfit_uuid(NFIT_DEV_BUS);
221 handle = adev->handle;
222 dimm_name = "bus";
223 }
224
225 if (!desc || (cmd && (desc->out_num + desc->in_num == 0)))
226 return -ENOTTY;
227
31eca76b 228 if (!test_bit(cmd, &cmd_mask) || !test_bit(func, &dsm_mask))
62232e45
DW
229 return -ENOTTY;
230
231 in_obj.type = ACPI_TYPE_PACKAGE;
232 in_obj.package.count = 1;
233 in_obj.package.elements = &in_buf;
234 in_buf.type = ACPI_TYPE_BUFFER;
235 in_buf.buffer.pointer = buf;
236 in_buf.buffer.length = 0;
237
238 /* libnvdimm has already validated the input envelope */
239 for (i = 0; i < desc->in_num; i++)
240 in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc,
241 i, buf);
242
31eca76b
DW
243 if (call_pkg) {
244 /* skip over package wrapper */
245 in_buf.buffer.pointer = (void *) &call_pkg->nd_payload;
246 in_buf.buffer.length = call_pkg->nd_size_in;
247 }
248
62232e45 249 if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) {
31eca76b
DW
250 dev_dbg(dev, "%s:%s cmd: %d: func: %d input length: %d\n",
251 __func__, dimm_name, cmd, func,
252 in_buf.buffer.length);
253 print_hex_dump_debug("nvdimm in ", DUMP_PREFIX_OFFSET, 4, 4,
254 in_buf.buffer.pointer,
255 min_t(u32, 256, in_buf.buffer.length), true);
62232e45
DW
256 }
257
31eca76b 258 out_obj = acpi_evaluate_dsm(handle, uuid, 1, func, &in_obj);
62232e45
DW
259 if (!out_obj) {
260 dev_dbg(dev, "%s:%s _DSM failed cmd: %s\n", __func__, dimm_name,
261 cmd_name);
262 return -EINVAL;
263 }
264
31eca76b
DW
265 if (call_pkg) {
266 call_pkg->nd_fw_size = out_obj->buffer.length;
267 memcpy(call_pkg->nd_payload + call_pkg->nd_size_in,
268 out_obj->buffer.pointer,
269 min(call_pkg->nd_fw_size, call_pkg->nd_size_out));
270
271 ACPI_FREE(out_obj);
272 /*
273 * Need to support FW function w/o known size in advance.
274 * Caller can determine required size based upon nd_fw_size.
275 * If we return an error (like elsewhere) then caller wouldn't
276 * be able to rely upon data returned to make calculation.
277 */
278 return 0;
279 }
280
62232e45
DW
281 if (out_obj->package.type != ACPI_TYPE_BUFFER) {
282 dev_dbg(dev, "%s:%s unexpected output object type cmd: %s type: %d\n",
283 __func__, dimm_name, cmd_name, out_obj->type);
284 rc = -EINVAL;
285 goto out;
286 }
287
288 if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) {
289 dev_dbg(dev, "%s:%s cmd: %s output length: %d\n", __func__,
290 dimm_name, cmd_name, out_obj->buffer.length);
291 print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4,
292 4, out_obj->buffer.pointer, min_t(u32, 128,
293 out_obj->buffer.length), true);
294 }
295
296 for (i = 0, offset = 0; i < desc->out_num; i++) {
297 u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf,
298 (u32 *) out_obj->buffer.pointer);
299
300 if (offset + out_size > out_obj->buffer.length) {
301 dev_dbg(dev, "%s:%s output object underflow cmd: %s field: %d\n",
302 __func__, dimm_name, cmd_name, i);
303 break;
304 }
305
306 if (in_buf.buffer.length + offset + out_size > buf_len) {
307 dev_dbg(dev, "%s:%s output overrun cmd: %s field: %d\n",
308 __func__, dimm_name, cmd_name, i);
309 rc = -ENXIO;
310 goto out;
311 }
312 memcpy(buf + in_buf.buffer.length + offset,
313 out_obj->buffer.pointer + offset, out_size);
314 offset += out_size;
315 }
316 if (offset + in_buf.buffer.length < buf_len) {
317 if (i >= 1) {
318 /*
319 * status valid, return the number of bytes left
320 * unfilled in the output buffer
321 */
322 rc = buf_len - offset - in_buf.buffer.length;
aef25338
DW
323 if (cmd_rc)
324 *cmd_rc = xlat_status(buf, cmd);
62232e45
DW
325 } else {
326 dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n",
327 __func__, dimm_name, cmd_name, buf_len,
328 offset);
329 rc = -ENXIO;
330 }
2eea6582 331 } else {
62232e45 332 rc = 0;
2eea6582
DW
333 if (cmd_rc)
334 *cmd_rc = xlat_status(buf, cmd);
335 }
62232e45
DW
336
337 out:
338 ACPI_FREE(out_obj);
339
340 return rc;
b94d5230
DW
341}
342
343static const char *spa_type_name(u16 type)
344{
345 static const char *to_name[] = {
346 [NFIT_SPA_VOLATILE] = "volatile",
347 [NFIT_SPA_PM] = "pmem",
348 [NFIT_SPA_DCR] = "dimm-control-region",
349 [NFIT_SPA_BDW] = "block-data-window",
350 [NFIT_SPA_VDISK] = "volatile-disk",
351 [NFIT_SPA_VCD] = "volatile-cd",
352 [NFIT_SPA_PDISK] = "persistent-disk",
353 [NFIT_SPA_PCD] = "persistent-cd",
354
355 };
356
357 if (type > NFIT_SPA_PCD)
358 return "unknown";
359
360 return to_name[type];
361}
362
363static int nfit_spa_type(struct acpi_nfit_system_address *spa)
364{
365 int i;
366
367 for (i = 0; i < NFIT_UUID_MAX; i++)
368 if (memcmp(to_nfit_uuid(i), spa->range_guid, 16) == 0)
369 return i;
370 return -1;
371}
372
373static bool add_spa(struct acpi_nfit_desc *acpi_desc,
20985164 374 struct nfit_table_prev *prev,
b94d5230
DW
375 struct acpi_nfit_system_address *spa)
376{
826c416f 377 size_t length = min_t(size_t, sizeof(*spa), spa->header.length);
b94d5230 378 struct device *dev = acpi_desc->dev;
20985164
VV
379 struct nfit_spa *nfit_spa;
380
381 list_for_each_entry(nfit_spa, &prev->spas, list) {
826c416f 382 if (memcmp(nfit_spa->spa, spa, length) == 0) {
20985164
VV
383 list_move_tail(&nfit_spa->list, &acpi_desc->spas);
384 return true;
385 }
386 }
b94d5230 387
20985164 388 nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa), GFP_KERNEL);
b94d5230
DW
389 if (!nfit_spa)
390 return false;
391 INIT_LIST_HEAD(&nfit_spa->list);
392 nfit_spa->spa = spa;
393 list_add_tail(&nfit_spa->list, &acpi_desc->spas);
394 dev_dbg(dev, "%s: spa index: %d type: %s\n", __func__,
395 spa->range_index,
396 spa_type_name(nfit_spa_type(spa)));
397 return true;
398}
399
400static bool add_memdev(struct acpi_nfit_desc *acpi_desc,
20985164 401 struct nfit_table_prev *prev,
b94d5230
DW
402 struct acpi_nfit_memory_map *memdev)
403{
826c416f 404 size_t length = min_t(size_t, sizeof(*memdev), memdev->header.length);
b94d5230 405 struct device *dev = acpi_desc->dev;
20985164 406 struct nfit_memdev *nfit_memdev;
b94d5230 407
20985164 408 list_for_each_entry(nfit_memdev, &prev->memdevs, list)
826c416f 409 if (memcmp(nfit_memdev->memdev, memdev, length) == 0) {
20985164
VV
410 list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs);
411 return true;
412 }
413
414 nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev), GFP_KERNEL);
b94d5230
DW
415 if (!nfit_memdev)
416 return false;
417 INIT_LIST_HEAD(&nfit_memdev->list);
418 nfit_memdev->memdev = memdev;
419 list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs);
420 dev_dbg(dev, "%s: memdev handle: %#x spa: %d dcr: %d\n",
421 __func__, memdev->device_handle, memdev->range_index,
422 memdev->region_index);
423 return true;
424}
425
426static bool add_dcr(struct acpi_nfit_desc *acpi_desc,
20985164 427 struct nfit_table_prev *prev,
b94d5230
DW
428 struct acpi_nfit_control_region *dcr)
429{
826c416f 430 size_t length = min_t(size_t, sizeof(*dcr), dcr->header.length);
b94d5230 431 struct device *dev = acpi_desc->dev;
20985164
VV
432 struct nfit_dcr *nfit_dcr;
433
434 list_for_each_entry(nfit_dcr, &prev->dcrs, list)
826c416f 435 if (memcmp(nfit_dcr->dcr, dcr, length) == 0) {
20985164
VV
436 list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs);
437 return true;
438 }
b94d5230 439
20985164 440 nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr), GFP_KERNEL);
b94d5230
DW
441 if (!nfit_dcr)
442 return false;
443 INIT_LIST_HEAD(&nfit_dcr->list);
444 nfit_dcr->dcr = dcr;
445 list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs);
446 dev_dbg(dev, "%s: dcr index: %d windows: %d\n", __func__,
447 dcr->region_index, dcr->windows);
448 return true;
449}
450
451static bool add_bdw(struct acpi_nfit_desc *acpi_desc,
20985164 452 struct nfit_table_prev *prev,
b94d5230
DW
453 struct acpi_nfit_data_region *bdw)
454{
826c416f 455 size_t length = min_t(size_t, sizeof(*bdw), bdw->header.length);
b94d5230 456 struct device *dev = acpi_desc->dev;
20985164
VV
457 struct nfit_bdw *nfit_bdw;
458
459 list_for_each_entry(nfit_bdw, &prev->bdws, list)
826c416f 460 if (memcmp(nfit_bdw->bdw, bdw, length) == 0) {
20985164
VV
461 list_move_tail(&nfit_bdw->list, &acpi_desc->bdws);
462 return true;
463 }
b94d5230 464
20985164 465 nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw), GFP_KERNEL);
b94d5230
DW
466 if (!nfit_bdw)
467 return false;
468 INIT_LIST_HEAD(&nfit_bdw->list);
469 nfit_bdw->bdw = bdw;
470 list_add_tail(&nfit_bdw->list, &acpi_desc->bdws);
471 dev_dbg(dev, "%s: bdw dcr: %d windows: %d\n", __func__,
472 bdw->region_index, bdw->windows);
473 return true;
474}
475
047fc8a1 476static bool add_idt(struct acpi_nfit_desc *acpi_desc,
20985164 477 struct nfit_table_prev *prev,
047fc8a1
RZ
478 struct acpi_nfit_interleave *idt)
479{
826c416f 480 size_t length = min_t(size_t, sizeof(*idt), idt->header.length);
047fc8a1 481 struct device *dev = acpi_desc->dev;
20985164
VV
482 struct nfit_idt *nfit_idt;
483
484 list_for_each_entry(nfit_idt, &prev->idts, list)
826c416f 485 if (memcmp(nfit_idt->idt, idt, length) == 0) {
20985164
VV
486 list_move_tail(&nfit_idt->list, &acpi_desc->idts);
487 return true;
488 }
047fc8a1 489
20985164 490 nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt), GFP_KERNEL);
047fc8a1
RZ
491 if (!nfit_idt)
492 return false;
493 INIT_LIST_HEAD(&nfit_idt->list);
494 nfit_idt->idt = idt;
495 list_add_tail(&nfit_idt->list, &acpi_desc->idts);
496 dev_dbg(dev, "%s: idt index: %d num_lines: %d\n", __func__,
497 idt->interleave_index, idt->line_count);
498 return true;
499}
500
c2ad2954 501static bool add_flush(struct acpi_nfit_desc *acpi_desc,
20985164 502 struct nfit_table_prev *prev,
c2ad2954
RZ
503 struct acpi_nfit_flush_address *flush)
504{
826c416f 505 size_t length = min_t(size_t, sizeof(*flush), flush->header.length);
c2ad2954 506 struct device *dev = acpi_desc->dev;
20985164 507 struct nfit_flush *nfit_flush;
c2ad2954 508
20985164 509 list_for_each_entry(nfit_flush, &prev->flushes, list)
826c416f 510 if (memcmp(nfit_flush->flush, flush, length) == 0) {
20985164
VV
511 list_move_tail(&nfit_flush->list, &acpi_desc->flushes);
512 return true;
513 }
514
515 nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush), GFP_KERNEL);
c2ad2954
RZ
516 if (!nfit_flush)
517 return false;
518 INIT_LIST_HEAD(&nfit_flush->list);
519 nfit_flush->flush = flush;
520 list_add_tail(&nfit_flush->list, &acpi_desc->flushes);
521 dev_dbg(dev, "%s: nfit_flush handle: %d hint_count: %d\n", __func__,
522 flush->device_handle, flush->hint_count);
523 return true;
524}
525
20985164
VV
526static void *add_table(struct acpi_nfit_desc *acpi_desc,
527 struct nfit_table_prev *prev, void *table, const void *end)
b94d5230
DW
528{
529 struct device *dev = acpi_desc->dev;
530 struct acpi_nfit_header *hdr;
531 void *err = ERR_PTR(-ENOMEM);
532
533 if (table >= end)
534 return NULL;
535
536 hdr = table;
564d5011
VV
537 if (!hdr->length) {
538 dev_warn(dev, "found a zero length table '%d' parsing nfit\n",
539 hdr->type);
540 return NULL;
541 }
542
b94d5230
DW
543 switch (hdr->type) {
544 case ACPI_NFIT_TYPE_SYSTEM_ADDRESS:
20985164 545 if (!add_spa(acpi_desc, prev, table))
b94d5230
DW
546 return err;
547 break;
548 case ACPI_NFIT_TYPE_MEMORY_MAP:
20985164 549 if (!add_memdev(acpi_desc, prev, table))
b94d5230
DW
550 return err;
551 break;
552 case ACPI_NFIT_TYPE_CONTROL_REGION:
20985164 553 if (!add_dcr(acpi_desc, prev, table))
b94d5230
DW
554 return err;
555 break;
556 case ACPI_NFIT_TYPE_DATA_REGION:
20985164 557 if (!add_bdw(acpi_desc, prev, table))
b94d5230
DW
558 return err;
559 break;
b94d5230 560 case ACPI_NFIT_TYPE_INTERLEAVE:
20985164 561 if (!add_idt(acpi_desc, prev, table))
047fc8a1 562 return err;
b94d5230
DW
563 break;
564 case ACPI_NFIT_TYPE_FLUSH_ADDRESS:
20985164 565 if (!add_flush(acpi_desc, prev, table))
c2ad2954 566 return err;
b94d5230
DW
567 break;
568 case ACPI_NFIT_TYPE_SMBIOS:
569 dev_dbg(dev, "%s: smbios\n", __func__);
570 break;
571 default:
572 dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type);
573 break;
574 }
575
576 return table + hdr->length;
577}
578
579static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc,
580 struct nfit_mem *nfit_mem)
581{
582 u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
583 u16 dcr = nfit_mem->dcr->region_index;
584 struct nfit_spa *nfit_spa;
585
586 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
587 u16 range_index = nfit_spa->spa->range_index;
588 int type = nfit_spa_type(nfit_spa->spa);
589 struct nfit_memdev *nfit_memdev;
590
591 if (type != NFIT_SPA_BDW)
592 continue;
593
594 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
595 if (nfit_memdev->memdev->range_index != range_index)
596 continue;
597 if (nfit_memdev->memdev->device_handle != device_handle)
598 continue;
599 if (nfit_memdev->memdev->region_index != dcr)
600 continue;
601
602 nfit_mem->spa_bdw = nfit_spa->spa;
603 return;
604 }
605 }
606
607 dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n",
608 nfit_mem->spa_dcr->range_index);
609 nfit_mem->bdw = NULL;
610}
611
6697b2cf 612static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc,
b94d5230
DW
613 struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa)
614{
615 u16 dcr = __to_nfit_memdev(nfit_mem)->region_index;
047fc8a1 616 struct nfit_memdev *nfit_memdev;
b94d5230 617 struct nfit_bdw *nfit_bdw;
047fc8a1
RZ
618 struct nfit_idt *nfit_idt;
619 u16 idt_idx, range_index;
b94d5230 620
b94d5230
DW
621 list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) {
622 if (nfit_bdw->bdw->region_index != dcr)
623 continue;
624 nfit_mem->bdw = nfit_bdw->bdw;
625 break;
626 }
627
628 if (!nfit_mem->bdw)
6697b2cf 629 return;
b94d5230
DW
630
631 nfit_mem_find_spa_bdw(acpi_desc, nfit_mem);
047fc8a1
RZ
632
633 if (!nfit_mem->spa_bdw)
6697b2cf 634 return;
047fc8a1
RZ
635
636 range_index = nfit_mem->spa_bdw->range_index;
637 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
638 if (nfit_memdev->memdev->range_index != range_index ||
639 nfit_memdev->memdev->region_index != dcr)
640 continue;
641 nfit_mem->memdev_bdw = nfit_memdev->memdev;
642 idt_idx = nfit_memdev->memdev->interleave_index;
643 list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
644 if (nfit_idt->idt->interleave_index != idt_idx)
645 continue;
646 nfit_mem->idt_bdw = nfit_idt->idt;
647 break;
648 }
649 break;
650 }
b94d5230
DW
651}
652
653static int nfit_mem_dcr_init(struct acpi_nfit_desc *acpi_desc,
654 struct acpi_nfit_system_address *spa)
655{
656 struct nfit_mem *nfit_mem, *found;
657 struct nfit_memdev *nfit_memdev;
658 int type = nfit_spa_type(spa);
b94d5230
DW
659
660 switch (type) {
661 case NFIT_SPA_DCR:
662 case NFIT_SPA_PM:
663 break;
664 default:
665 return 0;
666 }
667
668 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
ad9ac5e1 669 struct nfit_flush *nfit_flush;
6697b2cf
DW
670 struct nfit_dcr *nfit_dcr;
671 u32 device_handle;
672 u16 dcr;
b94d5230
DW
673
674 if (nfit_memdev->memdev->range_index != spa->range_index)
675 continue;
676 found = NULL;
677 dcr = nfit_memdev->memdev->region_index;
6697b2cf 678 device_handle = nfit_memdev->memdev->device_handle;
b94d5230 679 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
6697b2cf
DW
680 if (__to_nfit_memdev(nfit_mem)->device_handle
681 == device_handle) {
b94d5230
DW
682 found = nfit_mem;
683 break;
684 }
685
686 if (found)
687 nfit_mem = found;
688 else {
689 nfit_mem = devm_kzalloc(acpi_desc->dev,
690 sizeof(*nfit_mem), GFP_KERNEL);
691 if (!nfit_mem)
692 return -ENOMEM;
693 INIT_LIST_HEAD(&nfit_mem->list);
8cc6ddfc 694 nfit_mem->acpi_desc = acpi_desc;
6697b2cf
DW
695 list_add(&nfit_mem->list, &acpi_desc->dimms);
696 }
697
698 list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) {
699 if (nfit_dcr->dcr->region_index != dcr)
700 continue;
701 /*
702 * Record the control region for the dimm. For
703 * the ACPI 6.1 case, where there are separate
704 * control regions for the pmem vs blk
705 * interfaces, be sure to record the extended
706 * blk details.
707 */
708 if (!nfit_mem->dcr)
709 nfit_mem->dcr = nfit_dcr->dcr;
710 else if (nfit_mem->dcr->windows == 0
711 && nfit_dcr->dcr->windows)
712 nfit_mem->dcr = nfit_dcr->dcr;
713 break;
714 }
715
ad9ac5e1 716 list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) {
e5ae3b25
DW
717 struct acpi_nfit_flush_address *flush;
718 u16 i;
719
ad9ac5e1
DW
720 if (nfit_flush->flush->device_handle != device_handle)
721 continue;
722 nfit_mem->nfit_flush = nfit_flush;
e5ae3b25
DW
723 flush = nfit_flush->flush;
724 nfit_mem->flush_wpq = devm_kzalloc(acpi_desc->dev,
725 flush->hint_count
726 * sizeof(struct resource), GFP_KERNEL);
727 if (!nfit_mem->flush_wpq)
728 return -ENOMEM;
729 for (i = 0; i < flush->hint_count; i++) {
730 struct resource *res = &nfit_mem->flush_wpq[i];
731
732 res->start = flush->hint_address[i];
733 res->end = res->start + 8 - 1;
734 }
ad9ac5e1
DW
735 break;
736 }
737
6697b2cf
DW
738 if (dcr && !nfit_mem->dcr) {
739 dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n",
740 spa->range_index, dcr);
741 return -ENODEV;
b94d5230
DW
742 }
743
744 if (type == NFIT_SPA_DCR) {
047fc8a1
RZ
745 struct nfit_idt *nfit_idt;
746 u16 idt_idx;
747
b94d5230
DW
748 /* multiple dimms may share a SPA when interleaved */
749 nfit_mem->spa_dcr = spa;
750 nfit_mem->memdev_dcr = nfit_memdev->memdev;
047fc8a1
RZ
751 idt_idx = nfit_memdev->memdev->interleave_index;
752 list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
753 if (nfit_idt->idt->interleave_index != idt_idx)
754 continue;
755 nfit_mem->idt_dcr = nfit_idt->idt;
756 break;
757 }
6697b2cf 758 nfit_mem_init_bdw(acpi_desc, nfit_mem, spa);
b94d5230
DW
759 } else {
760 /*
761 * A single dimm may belong to multiple SPA-PM
762 * ranges, record at least one in addition to
763 * any SPA-DCR range.
764 */
765 nfit_mem->memdev_pmem = nfit_memdev->memdev;
766 }
b94d5230
DW
767 }
768
769 return 0;
770}
771
772static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b)
773{
774 struct nfit_mem *a = container_of(_a, typeof(*a), list);
775 struct nfit_mem *b = container_of(_b, typeof(*b), list);
776 u32 handleA, handleB;
777
778 handleA = __to_nfit_memdev(a)->device_handle;
779 handleB = __to_nfit_memdev(b)->device_handle;
780 if (handleA < handleB)
781 return -1;
782 else if (handleA > handleB)
783 return 1;
784 return 0;
785}
786
787static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc)
788{
789 struct nfit_spa *nfit_spa;
790
791 /*
792 * For each SPA-DCR or SPA-PMEM address range find its
793 * corresponding MEMDEV(s). From each MEMDEV find the
794 * corresponding DCR. Then, if we're operating on a SPA-DCR,
795 * try to find a SPA-BDW and a corresponding BDW that references
796 * the DCR. Throw it all into an nfit_mem object. Note, that
797 * BDWs are optional.
798 */
799 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
800 int rc;
801
802 rc = nfit_mem_dcr_init(acpi_desc, nfit_spa->spa);
803 if (rc)
804 return rc;
805 }
806
807 list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp);
808
809 return 0;
810}
811
45def22c
DW
812static ssize_t revision_show(struct device *dev,
813 struct device_attribute *attr, char *buf)
814{
815 struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
816 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
817 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
818
6b577c9d 819 return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision);
45def22c
DW
820}
821static DEVICE_ATTR_RO(revision);
822
823static struct attribute *acpi_nfit_attributes[] = {
824 &dev_attr_revision.attr,
825 NULL,
826};
827
828static struct attribute_group acpi_nfit_attribute_group = {
829 .name = "nfit",
830 .attrs = acpi_nfit_attributes,
831};
832
a61fe6f7 833static const struct attribute_group *acpi_nfit_attribute_groups[] = {
45def22c
DW
834 &nvdimm_bus_attribute_group,
835 &acpi_nfit_attribute_group,
836 NULL,
837};
838
e6dfb2de
DW
839static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev)
840{
841 struct nvdimm *nvdimm = to_nvdimm(dev);
842 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
843
844 return __to_nfit_memdev(nfit_mem);
845}
846
847static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev)
848{
849 struct nvdimm *nvdimm = to_nvdimm(dev);
850 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
851
852 return nfit_mem->dcr;
853}
854
855static ssize_t handle_show(struct device *dev,
856 struct device_attribute *attr, char *buf)
857{
858 struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
859
860 return sprintf(buf, "%#x\n", memdev->device_handle);
861}
862static DEVICE_ATTR_RO(handle);
863
864static ssize_t phys_id_show(struct device *dev,
865 struct device_attribute *attr, char *buf)
866{
867 struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
868
869 return sprintf(buf, "%#x\n", memdev->physical_id);
870}
871static DEVICE_ATTR_RO(phys_id);
872
873static ssize_t vendor_show(struct device *dev,
874 struct device_attribute *attr, char *buf)
875{
876 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
877
5ad9a7fd 878 return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->vendor_id));
e6dfb2de
DW
879}
880static DEVICE_ATTR_RO(vendor);
881
882static ssize_t rev_id_show(struct device *dev,
883 struct device_attribute *attr, char *buf)
884{
885 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
886
5ad9a7fd 887 return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->revision_id));
e6dfb2de
DW
888}
889static DEVICE_ATTR_RO(rev_id);
890
891static ssize_t device_show(struct device *dev,
892 struct device_attribute *attr, char *buf)
893{
894 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
895
5ad9a7fd 896 return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->device_id));
e6dfb2de
DW
897}
898static DEVICE_ATTR_RO(device);
899
6ca72085
DW
900static ssize_t subsystem_vendor_show(struct device *dev,
901 struct device_attribute *attr, char *buf)
902{
903 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
904
905 return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_vendor_id));
906}
907static DEVICE_ATTR_RO(subsystem_vendor);
908
909static ssize_t subsystem_rev_id_show(struct device *dev,
910 struct device_attribute *attr, char *buf)
911{
912 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
913
914 return sprintf(buf, "0x%04x\n",
915 be16_to_cpu(dcr->subsystem_revision_id));
916}
917static DEVICE_ATTR_RO(subsystem_rev_id);
918
919static ssize_t subsystem_device_show(struct device *dev,
920 struct device_attribute *attr, char *buf)
921{
922 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
923
924 return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_device_id));
925}
926static DEVICE_ATTR_RO(subsystem_device);
927
8cc6ddfc
DW
928static int num_nvdimm_formats(struct nvdimm *nvdimm)
929{
930 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
931 int formats = 0;
932
933 if (nfit_mem->memdev_pmem)
934 formats++;
935 if (nfit_mem->memdev_bdw)
936 formats++;
937 return formats;
938}
939
e6dfb2de
DW
940static ssize_t format_show(struct device *dev,
941 struct device_attribute *attr, char *buf)
942{
943 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
944
1b982baf 945 return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->code));
e6dfb2de
DW
946}
947static DEVICE_ATTR_RO(format);
948
8cc6ddfc
DW
949static ssize_t format1_show(struct device *dev,
950 struct device_attribute *attr, char *buf)
951{
952 u32 handle;
953 ssize_t rc = -ENXIO;
954 struct nfit_mem *nfit_mem;
955 struct nfit_memdev *nfit_memdev;
956 struct acpi_nfit_desc *acpi_desc;
957 struct nvdimm *nvdimm = to_nvdimm(dev);
958 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
959
960 nfit_mem = nvdimm_provider_data(nvdimm);
961 acpi_desc = nfit_mem->acpi_desc;
962 handle = to_nfit_memdev(dev)->device_handle;
963
964 /* assumes DIMMs have at most 2 published interface codes */
965 mutex_lock(&acpi_desc->init_mutex);
966 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
967 struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev;
968 struct nfit_dcr *nfit_dcr;
969
970 if (memdev->device_handle != handle)
971 continue;
972
973 list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) {
974 if (nfit_dcr->dcr->region_index != memdev->region_index)
975 continue;
976 if (nfit_dcr->dcr->code == dcr->code)
977 continue;
1b982baf
DW
978 rc = sprintf(buf, "%#x\n",
979 be16_to_cpu(nfit_dcr->dcr->code));
8cc6ddfc
DW
980 break;
981 }
982 if (rc != ENXIO)
983 break;
984 }
985 mutex_unlock(&acpi_desc->init_mutex);
986 return rc;
987}
988static DEVICE_ATTR_RO(format1);
989
990static ssize_t formats_show(struct device *dev,
991 struct device_attribute *attr, char *buf)
992{
993 struct nvdimm *nvdimm = to_nvdimm(dev);
994
995 return sprintf(buf, "%d\n", num_nvdimm_formats(nvdimm));
996}
997static DEVICE_ATTR_RO(formats);
998
e6dfb2de
DW
999static ssize_t serial_show(struct device *dev,
1000 struct device_attribute *attr, char *buf)
1001{
1002 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
1003
5ad9a7fd 1004 return sprintf(buf, "0x%08x\n", be32_to_cpu(dcr->serial_number));
e6dfb2de
DW
1005}
1006static DEVICE_ATTR_RO(serial);
1007
a94e3fbe
DW
1008static ssize_t family_show(struct device *dev,
1009 struct device_attribute *attr, char *buf)
1010{
1011 struct nvdimm *nvdimm = to_nvdimm(dev);
1012 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
1013
1014 if (nfit_mem->family < 0)
1015 return -ENXIO;
1016 return sprintf(buf, "%d\n", nfit_mem->family);
1017}
1018static DEVICE_ATTR_RO(family);
1019
1020static ssize_t dsm_mask_show(struct device *dev,
1021 struct device_attribute *attr, char *buf)
1022{
1023 struct nvdimm *nvdimm = to_nvdimm(dev);
1024 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
1025
1026 if (nfit_mem->family < 0)
1027 return -ENXIO;
1028 return sprintf(buf, "%#lx\n", nfit_mem->dsm_mask);
1029}
1030static DEVICE_ATTR_RO(dsm_mask);
1031
58138820
DW
1032static ssize_t flags_show(struct device *dev,
1033 struct device_attribute *attr, char *buf)
1034{
1035 u16 flags = to_nfit_memdev(dev)->flags;
1036
1037 return sprintf(buf, "%s%s%s%s%s\n",
402bae59
TK
1038 flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "",
1039 flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "",
1040 flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "",
ca321d1c 1041 flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "",
402bae59 1042 flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : "");
58138820
DW
1043}
1044static DEVICE_ATTR_RO(flags);
1045
38a879ba
TK
1046static ssize_t id_show(struct device *dev,
1047 struct device_attribute *attr, char *buf)
1048{
1049 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
1050
1051 if (dcr->valid_fields & ACPI_NFIT_CONTROL_MFG_INFO_VALID)
1052 return sprintf(buf, "%04x-%02x-%04x-%08x\n",
1053 be16_to_cpu(dcr->vendor_id),
1054 dcr->manufacturing_location,
1055 be16_to_cpu(dcr->manufacturing_date),
1056 be32_to_cpu(dcr->serial_number));
1057 else
1058 return sprintf(buf, "%04x-%08x\n",
1059 be16_to_cpu(dcr->vendor_id),
1060 be32_to_cpu(dcr->serial_number));
1061}
1062static DEVICE_ATTR_RO(id);
1063
e6dfb2de
DW
1064static struct attribute *acpi_nfit_dimm_attributes[] = {
1065 &dev_attr_handle.attr,
1066 &dev_attr_phys_id.attr,
1067 &dev_attr_vendor.attr,
1068 &dev_attr_device.attr,
6ca72085
DW
1069 &dev_attr_rev_id.attr,
1070 &dev_attr_subsystem_vendor.attr,
1071 &dev_attr_subsystem_device.attr,
1072 &dev_attr_subsystem_rev_id.attr,
e6dfb2de 1073 &dev_attr_format.attr,
8cc6ddfc
DW
1074 &dev_attr_formats.attr,
1075 &dev_attr_format1.attr,
e6dfb2de 1076 &dev_attr_serial.attr,
58138820 1077 &dev_attr_flags.attr,
38a879ba 1078 &dev_attr_id.attr,
a94e3fbe
DW
1079 &dev_attr_family.attr,
1080 &dev_attr_dsm_mask.attr,
e6dfb2de
DW
1081 NULL,
1082};
1083
1084static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj,
1085 struct attribute *a, int n)
1086{
1087 struct device *dev = container_of(kobj, struct device, kobj);
8cc6ddfc 1088 struct nvdimm *nvdimm = to_nvdimm(dev);
e6dfb2de 1089
8cc6ddfc
DW
1090 if (!to_nfit_dcr(dev))
1091 return 0;
1092 if (a == &dev_attr_format1.attr && num_nvdimm_formats(nvdimm) <= 1)
e6dfb2de 1093 return 0;
8cc6ddfc 1094 return a->mode;
e6dfb2de
DW
1095}
1096
1097static struct attribute_group acpi_nfit_dimm_attribute_group = {
1098 .name = "nfit",
1099 .attrs = acpi_nfit_dimm_attributes,
1100 .is_visible = acpi_nfit_dimm_attr_visible,
1101};
1102
1103static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = {
62232e45 1104 &nvdimm_attribute_group,
4d88a97a 1105 &nd_device_attribute_group,
e6dfb2de
DW
1106 &acpi_nfit_dimm_attribute_group,
1107 NULL,
1108};
1109
1110static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc,
1111 u32 device_handle)
1112{
1113 struct nfit_mem *nfit_mem;
1114
1115 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
1116 if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle)
1117 return nfit_mem->nvdimm;
1118
1119 return NULL;
1120}
1121
62232e45
DW
1122static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc,
1123 struct nfit_mem *nfit_mem, u32 device_handle)
1124{
1125 struct acpi_device *adev, *adev_dimm;
1126 struct device *dev = acpi_desc->dev;
31eca76b
DW
1127 unsigned long dsm_mask;
1128 const u8 *uuid;
60e95f43 1129 int i;
62232e45 1130
e3654eca
DW
1131 /* nfit test assumes 1:1 relationship between commands and dsms */
1132 nfit_mem->dsm_mask = acpi_desc->dimm_cmd_force_en;
31eca76b 1133 nfit_mem->family = NVDIMM_FAMILY_INTEL;
62232e45
DW
1134 adev = to_acpi_dev(acpi_desc);
1135 if (!adev)
1136 return 0;
1137
1138 adev_dimm = acpi_find_child_device(adev, device_handle, false);
1139 nfit_mem->adev = adev_dimm;
1140 if (!adev_dimm) {
1141 dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n",
1142 device_handle);
4d88a97a 1143 return force_enable_dimms ? 0 : -ENODEV;
62232e45
DW
1144 }
1145
31eca76b 1146 /*
e02fb726 1147 * Until standardization materializes we need to consider 4
31eca76b
DW
1148 * different command sets. Note, that checking for function0 (bit0)
1149 * tells us if any commands are reachable through this uuid.
1150 */
e02fb726 1151 for (i = NVDIMM_FAMILY_INTEL; i <= NVDIMM_FAMILY_MSFT; i++)
31eca76b
DW
1152 if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1))
1153 break;
1154
1155 /* limit the supported commands to those that are publicly documented */
1156 nfit_mem->family = i;
87554098 1157 if (nfit_mem->family == NVDIMM_FAMILY_INTEL) {
31eca76b 1158 dsm_mask = 0x3fe;
87554098
DW
1159 if (disable_vendor_specific)
1160 dsm_mask &= ~(1 << ND_CMD_VENDOR);
e02fb726 1161 } else if (nfit_mem->family == NVDIMM_FAMILY_HPE1) {
31eca76b 1162 dsm_mask = 0x1c3c76;
e02fb726 1163 } else if (nfit_mem->family == NVDIMM_FAMILY_HPE2) {
31eca76b 1164 dsm_mask = 0x1fe;
87554098
DW
1165 if (disable_vendor_specific)
1166 dsm_mask &= ~(1 << 8);
e02fb726 1167 } else if (nfit_mem->family == NVDIMM_FAMILY_MSFT) {
1168 dsm_mask = 0xffffffff;
87554098 1169 } else {
31eca76b
DW
1170 dev_err(dev, "unknown dimm command family\n");
1171 nfit_mem->family = -1;
1172 return force_enable_dimms ? 0 : -ENODEV;
1173 }
1174
1175 uuid = to_nfit_uuid(nfit_mem->family);
1176 for_each_set_bit(i, &dsm_mask, BITS_PER_LONG)
62232e45
DW
1177 if (acpi_check_dsm(adev_dimm->handle, uuid, 1, 1ULL << i))
1178 set_bit(i, &nfit_mem->dsm_mask);
1179
60e95f43 1180 return 0;
62232e45
DW
1181}
1182
e6dfb2de
DW
1183static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc)
1184{
1185 struct nfit_mem *nfit_mem;
4d88a97a 1186 int dimm_count = 0;
e6dfb2de
DW
1187
1188 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
e5ae3b25 1189 struct acpi_nfit_flush_address *flush;
31eca76b 1190 unsigned long flags = 0, cmd_mask;
e6dfb2de 1191 struct nvdimm *nvdimm;
e6dfb2de 1192 u32 device_handle;
58138820 1193 u16 mem_flags;
62232e45 1194 int rc;
e6dfb2de
DW
1195
1196 device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
1197 nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle);
1198 if (nvdimm) {
20985164 1199 dimm_count++;
e6dfb2de
DW
1200 continue;
1201 }
1202
1203 if (nfit_mem->bdw && nfit_mem->memdev_pmem)
1204 flags |= NDD_ALIASING;
1205
58138820 1206 mem_flags = __to_nfit_memdev(nfit_mem)->flags;
ca321d1c 1207 if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED)
58138820
DW
1208 flags |= NDD_UNARMED;
1209
62232e45
DW
1210 rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle);
1211 if (rc)
1212 continue;
1213
e3654eca 1214 /*
31eca76b
DW
1215 * TODO: provide translation for non-NVDIMM_FAMILY_INTEL
1216 * devices (i.e. from nd_cmd to acpi_dsm) to standardize the
1217 * userspace interface.
e3654eca 1218 */
31eca76b
DW
1219 cmd_mask = 1UL << ND_CMD_CALL;
1220 if (nfit_mem->family == NVDIMM_FAMILY_INTEL)
1221 cmd_mask |= nfit_mem->dsm_mask;
1222
e5ae3b25
DW
1223 flush = nfit_mem->nfit_flush ? nfit_mem->nfit_flush->flush
1224 : NULL;
e6dfb2de 1225 nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem,
62232e45 1226 acpi_nfit_dimm_attribute_groups,
e5ae3b25
DW
1227 flags, cmd_mask, flush ? flush->hint_count : 0,
1228 nfit_mem->flush_wpq);
e6dfb2de
DW
1229 if (!nvdimm)
1230 return -ENOMEM;
1231
1232 nfit_mem->nvdimm = nvdimm;
4d88a97a 1233 dimm_count++;
58138820
DW
1234
1235 if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0)
1236 continue;
1237
402bae59 1238 dev_info(acpi_desc->dev, "%s flags:%s%s%s%s\n",
58138820 1239 nvdimm_name(nvdimm),
402bae59
TK
1240 mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "",
1241 mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"",
1242 mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "",
ca321d1c 1243 mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : "");
58138820 1244
e6dfb2de
DW
1245 }
1246
4d88a97a 1247 return nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count);
e6dfb2de
DW
1248}
1249
62232e45
DW
1250static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc)
1251{
1252 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
1253 const u8 *uuid = to_nfit_uuid(NFIT_DEV_BUS);
1254 struct acpi_device *adev;
1255 int i;
1256
e3654eca 1257 nd_desc->cmd_mask = acpi_desc->bus_cmd_force_en;
62232e45
DW
1258 adev = to_acpi_dev(acpi_desc);
1259 if (!adev)
1260 return;
1261
d4f32367 1262 for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++)
62232e45 1263 if (acpi_check_dsm(adev->handle, uuid, 1, 1ULL << i))
e3654eca 1264 set_bit(i, &nd_desc->cmd_mask);
62232e45
DW
1265}
1266
1f7df6f8
DW
1267static ssize_t range_index_show(struct device *dev,
1268 struct device_attribute *attr, char *buf)
1269{
1270 struct nd_region *nd_region = to_nd_region(dev);
1271 struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region);
1272
1273 return sprintf(buf, "%d\n", nfit_spa->spa->range_index);
1274}
1275static DEVICE_ATTR_RO(range_index);
1276
1277static struct attribute *acpi_nfit_region_attributes[] = {
1278 &dev_attr_range_index.attr,
1279 NULL,
1280};
1281
1282static struct attribute_group acpi_nfit_region_attribute_group = {
1283 .name = "nfit",
1284 .attrs = acpi_nfit_region_attributes,
1285};
1286
1287static const struct attribute_group *acpi_nfit_region_attribute_groups[] = {
1288 &nd_region_attribute_group,
1289 &nd_mapping_attribute_group,
3d88002e 1290 &nd_device_attribute_group,
74ae66c3 1291 &nd_numa_attribute_group,
1f7df6f8
DW
1292 &acpi_nfit_region_attribute_group,
1293 NULL,
1294};
1295
eaf96153
DW
1296/* enough info to uniquely specify an interleave set */
1297struct nfit_set_info {
1298 struct nfit_set_info_map {
1299 u64 region_offset;
1300 u32 serial_number;
1301 u32 pad;
1302 } mapping[0];
1303};
1304
1305static size_t sizeof_nfit_set_info(int num_mappings)
1306{
1307 return sizeof(struct nfit_set_info)
1308 + num_mappings * sizeof(struct nfit_set_info_map);
1309}
1310
1311static int cmp_map(const void *m0, const void *m1)
1312{
1313 const struct nfit_set_info_map *map0 = m0;
1314 const struct nfit_set_info_map *map1 = m1;
1315
1316 return memcmp(&map0->region_offset, &map1->region_offset,
1317 sizeof(u64));
1318}
1319
1320/* Retrieve the nth entry referencing this spa */
1321static struct acpi_nfit_memory_map *memdev_from_spa(
1322 struct acpi_nfit_desc *acpi_desc, u16 range_index, int n)
1323{
1324 struct nfit_memdev *nfit_memdev;
1325
1326 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list)
1327 if (nfit_memdev->memdev->range_index == range_index)
1328 if (n-- == 0)
1329 return nfit_memdev->memdev;
1330 return NULL;
1331}
1332
1333static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc,
1334 struct nd_region_desc *ndr_desc,
1335 struct acpi_nfit_system_address *spa)
1336{
1337 int i, spa_type = nfit_spa_type(spa);
1338 struct device *dev = acpi_desc->dev;
1339 struct nd_interleave_set *nd_set;
1340 u16 nr = ndr_desc->num_mappings;
1341 struct nfit_set_info *info;
1342
1343 if (spa_type == NFIT_SPA_PM || spa_type == NFIT_SPA_VOLATILE)
1344 /* pass */;
1345 else
1346 return 0;
1347
1348 nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL);
1349 if (!nd_set)
1350 return -ENOMEM;
1351
1352 info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL);
1353 if (!info)
1354 return -ENOMEM;
1355 for (i = 0; i < nr; i++) {
1356 struct nd_mapping *nd_mapping = &ndr_desc->nd_mapping[i];
1357 struct nfit_set_info_map *map = &info->mapping[i];
1358 struct nvdimm *nvdimm = nd_mapping->nvdimm;
1359 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
1360 struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc,
1361 spa->range_index, i);
1362
1363 if (!memdev || !nfit_mem->dcr) {
1364 dev_err(dev, "%s: failed to find DCR\n", __func__);
1365 return -ENODEV;
1366 }
1367
1368 map->region_offset = memdev->region_offset;
1369 map->serial_number = nfit_mem->dcr->serial_number;
1370 }
1371
1372 sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map),
1373 cmp_map, NULL);
1374 nd_set->cookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0);
1375 ndr_desc->nd_set = nd_set;
1376 devm_kfree(dev, info);
1377
1378 return 0;
1379}
1380
047fc8a1
RZ
1381static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio)
1382{
1383 struct acpi_nfit_interleave *idt = mmio->idt;
1384 u32 sub_line_offset, line_index, line_offset;
1385 u64 line_no, table_skip_count, table_offset;
1386
1387 line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset);
1388 table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index);
1389 line_offset = idt->line_offset[line_index]
1390 * mmio->line_size;
1391 table_offset = table_skip_count * mmio->table_size;
1392
1393 return mmio->base_offset + line_offset + table_offset + sub_line_offset;
1394}
1395
de4a196c 1396static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw)
047fc8a1
RZ
1397{
1398 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
1399 u64 offset = nfit_blk->stat_offset + mmio->size * bw;
1400
1401 if (mmio->num_lines)
1402 offset = to_interleave_offset(offset, mmio);
1403
12f03ee6 1404 return readl(mmio->addr.base + offset);
047fc8a1
RZ
1405}
1406
1407static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw,
1408 resource_size_t dpa, unsigned int len, unsigned int write)
1409{
1410 u64 cmd, offset;
1411 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
1412
1413 enum {
1414 BCW_OFFSET_MASK = (1ULL << 48)-1,
1415 BCW_LEN_SHIFT = 48,
1416 BCW_LEN_MASK = (1ULL << 8) - 1,
1417 BCW_CMD_SHIFT = 56,
1418 };
1419
1420 cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK;
1421 len = len >> L1_CACHE_SHIFT;
1422 cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT;
1423 cmd |= ((u64) write) << BCW_CMD_SHIFT;
1424
1425 offset = nfit_blk->cmd_offset + mmio->size * bw;
1426 if (mmio->num_lines)
1427 offset = to_interleave_offset(offset, mmio);
1428
67a3e8fe 1429 writeq(cmd, mmio->addr.base + offset);
f284a4f2 1430 nvdimm_flush(nfit_blk->nd_region);
f0f2c072 1431
aef25338 1432 if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH)
67a3e8fe 1433 readq(mmio->addr.base + offset);
047fc8a1
RZ
1434}
1435
1436static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk,
1437 resource_size_t dpa, void *iobuf, size_t len, int rw,
1438 unsigned int lane)
1439{
1440 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
1441 unsigned int copied = 0;
1442 u64 base_offset;
1443 int rc;
1444
1445 base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES
1446 + lane * mmio->size;
047fc8a1
RZ
1447 write_blk_ctl(nfit_blk, lane, dpa, len, rw);
1448 while (len) {
1449 unsigned int c;
1450 u64 offset;
1451
1452 if (mmio->num_lines) {
1453 u32 line_offset;
1454
1455 offset = to_interleave_offset(base_offset + copied,
1456 mmio);
1457 div_u64_rem(offset, mmio->line_size, &line_offset);
1458 c = min_t(size_t, len, mmio->line_size - line_offset);
1459 } else {
1460 offset = base_offset + nfit_blk->bdw_offset;
1461 c = len;
1462 }
1463
1464 if (rw)
67a3e8fe 1465 memcpy_to_pmem(mmio->addr.aperture + offset,
c2ad2954 1466 iobuf + copied, c);
67a3e8fe 1467 else {
aef25338 1468 if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH)
67a3e8fe
RZ
1469 mmio_flush_range((void __force *)
1470 mmio->addr.aperture + offset, c);
1471
c2ad2954 1472 memcpy_from_pmem(iobuf + copied,
67a3e8fe
RZ
1473 mmio->addr.aperture + offset, c);
1474 }
047fc8a1
RZ
1475
1476 copied += c;
1477 len -= c;
1478 }
c2ad2954
RZ
1479
1480 if (rw)
f284a4f2 1481 nvdimm_flush(nfit_blk->nd_region);
c2ad2954 1482
047fc8a1
RZ
1483 rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0;
1484 return rc;
1485}
1486
1487static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr,
1488 resource_size_t dpa, void *iobuf, u64 len, int rw)
1489{
1490 struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr);
1491 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
1492 struct nd_region *nd_region = nfit_blk->nd_region;
1493 unsigned int lane, copied = 0;
1494 int rc = 0;
1495
1496 lane = nd_region_acquire_lane(nd_region);
1497 while (len) {
1498 u64 c = min(len, mmio->size);
1499
1500 rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied,
1501 iobuf + copied, c, rw, lane);
1502 if (rc)
1503 break;
1504
1505 copied += c;
1506 len -= c;
1507 }
1508 nd_region_release_lane(nd_region, lane);
1509
1510 return rc;
1511}
1512
047fc8a1
RZ
1513static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio,
1514 struct acpi_nfit_interleave *idt, u16 interleave_ways)
1515{
1516 if (idt) {
1517 mmio->num_lines = idt->line_count;
1518 mmio->line_size = idt->line_size;
1519 if (interleave_ways == 0)
1520 return -ENXIO;
1521 mmio->table_size = mmio->num_lines * interleave_ways
1522 * mmio->line_size;
1523 }
1524
1525 return 0;
1526}
1527
f0f2c072
RZ
1528static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc,
1529 struct nvdimm *nvdimm, struct nfit_blk *nfit_blk)
1530{
1531 struct nd_cmd_dimm_flags flags;
1532 int rc;
1533
1534 memset(&flags, 0, sizeof(flags));
1535 rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags,
aef25338 1536 sizeof(flags), NULL);
f0f2c072
RZ
1537
1538 if (rc >= 0 && flags.status == 0)
1539 nfit_blk->dimm_flags = flags.flags;
1540 else if (rc == -ENOTTY) {
1541 /* fall back to a conservative default */
aef25338 1542 nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH;
f0f2c072
RZ
1543 rc = 0;
1544 } else
1545 rc = -ENXIO;
1546
1547 return rc;
1548}
1549
047fc8a1
RZ
1550static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus,
1551 struct device *dev)
1552{
1553 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
047fc8a1
RZ
1554 struct nd_blk_region *ndbr = to_nd_blk_region(dev);
1555 struct nfit_blk_mmio *mmio;
1556 struct nfit_blk *nfit_blk;
1557 struct nfit_mem *nfit_mem;
1558 struct nvdimm *nvdimm;
1559 int rc;
1560
1561 nvdimm = nd_blk_region_to_dimm(ndbr);
1562 nfit_mem = nvdimm_provider_data(nvdimm);
1563 if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) {
1564 dev_dbg(dev, "%s: missing%s%s%s\n", __func__,
1565 nfit_mem ? "" : " nfit_mem",
193ccca4
DW
1566 (nfit_mem && nfit_mem->dcr) ? "" : " dcr",
1567 (nfit_mem && nfit_mem->bdw) ? "" : " bdw");
047fc8a1
RZ
1568 return -ENXIO;
1569 }
1570
1571 nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL);
1572 if (!nfit_blk)
1573 return -ENOMEM;
1574 nd_blk_region_set_provider_data(ndbr, nfit_blk);
1575 nfit_blk->nd_region = to_nd_region(dev);
1576
1577 /* map block aperture memory */
1578 nfit_blk->bdw_offset = nfit_mem->bdw->offset;
1579 mmio = &nfit_blk->mmio[BDW];
29b9aa0a
DW
1580 mmio->addr.base = devm_nvdimm_memremap(dev, nfit_mem->spa_bdw->address,
1581 nfit_mem->spa_bdw->length, ARCH_MEMREMAP_PMEM);
67a3e8fe 1582 if (!mmio->addr.base) {
047fc8a1
RZ
1583 dev_dbg(dev, "%s: %s failed to map bdw\n", __func__,
1584 nvdimm_name(nvdimm));
1585 return -ENOMEM;
1586 }
1587 mmio->size = nfit_mem->bdw->size;
1588 mmio->base_offset = nfit_mem->memdev_bdw->region_offset;
1589 mmio->idt = nfit_mem->idt_bdw;
1590 mmio->spa = nfit_mem->spa_bdw;
1591 rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw,
1592 nfit_mem->memdev_bdw->interleave_ways);
1593 if (rc) {
1594 dev_dbg(dev, "%s: %s failed to init bdw interleave\n",
1595 __func__, nvdimm_name(nvdimm));
1596 return rc;
1597 }
1598
1599 /* map block control memory */
1600 nfit_blk->cmd_offset = nfit_mem->dcr->command_offset;
1601 nfit_blk->stat_offset = nfit_mem->dcr->status_offset;
1602 mmio = &nfit_blk->mmio[DCR];
29b9aa0a
DW
1603 mmio->addr.base = devm_nvdimm_ioremap(dev, nfit_mem->spa_dcr->address,
1604 nfit_mem->spa_dcr->length);
67a3e8fe 1605 if (!mmio->addr.base) {
047fc8a1
RZ
1606 dev_dbg(dev, "%s: %s failed to map dcr\n", __func__,
1607 nvdimm_name(nvdimm));
1608 return -ENOMEM;
1609 }
1610 mmio->size = nfit_mem->dcr->window_size;
1611 mmio->base_offset = nfit_mem->memdev_dcr->region_offset;
1612 mmio->idt = nfit_mem->idt_dcr;
1613 mmio->spa = nfit_mem->spa_dcr;
1614 rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr,
1615 nfit_mem->memdev_dcr->interleave_ways);
1616 if (rc) {
1617 dev_dbg(dev, "%s: %s failed to init dcr interleave\n",
1618 __func__, nvdimm_name(nvdimm));
1619 return rc;
1620 }
1621
f0f2c072
RZ
1622 rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk);
1623 if (rc < 0) {
1624 dev_dbg(dev, "%s: %s failed get DIMM flags\n",
1625 __func__, nvdimm_name(nvdimm));
1626 return rc;
1627 }
1628
f284a4f2 1629 if (nvdimm_has_flush(nfit_blk->nd_region) < 0)
c2ad2954
RZ
1630 dev_warn(dev, "unable to guarantee persistence of writes\n");
1631
047fc8a1
RZ
1632 if (mmio->line_size == 0)
1633 return 0;
1634
1635 if ((u32) nfit_blk->cmd_offset % mmio->line_size
1636 + 8 > mmio->line_size) {
1637 dev_dbg(dev, "cmd_offset crosses interleave boundary\n");
1638 return -ENXIO;
1639 } else if ((u32) nfit_blk->stat_offset % mmio->line_size
1640 + 8 > mmio->line_size) {
1641 dev_dbg(dev, "stat_offset crosses interleave boundary\n");
1642 return -ENXIO;
1643 }
1644
1645 return 0;
1646}
1647
aef25338 1648static int ars_get_cap(struct acpi_nfit_desc *acpi_desc,
1cf03c00 1649 struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa)
0caeef63 1650{
aef25338 1651 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
1cf03c00 1652 struct acpi_nfit_system_address *spa = nfit_spa->spa;
aef25338
DW
1653 int cmd_rc, rc;
1654
1cf03c00
DW
1655 cmd->address = spa->address;
1656 cmd->length = spa->length;
aef25338
DW
1657 rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd,
1658 sizeof(*cmd), &cmd_rc);
1659 if (rc < 0)
1660 return rc;
1cf03c00 1661 return cmd_rc;
0caeef63
VV
1662}
1663
1cf03c00 1664static int ars_start(struct acpi_nfit_desc *acpi_desc, struct nfit_spa *nfit_spa)
0caeef63
VV
1665{
1666 int rc;
1cf03c00
DW
1667 int cmd_rc;
1668 struct nd_cmd_ars_start ars_start;
1669 struct acpi_nfit_system_address *spa = nfit_spa->spa;
1670 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
0caeef63 1671
1cf03c00
DW
1672 memset(&ars_start, 0, sizeof(ars_start));
1673 ars_start.address = spa->address;
1674 ars_start.length = spa->length;
1675 if (nfit_spa_type(spa) == NFIT_SPA_PM)
1676 ars_start.type = ND_ARS_PERSISTENT;
1677 else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE)
1678 ars_start.type = ND_ARS_VOLATILE;
1679 else
1680 return -ENOTTY;
aef25338 1681
1cf03c00
DW
1682 rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start,
1683 sizeof(ars_start), &cmd_rc);
aef25338 1684
1cf03c00
DW
1685 if (rc < 0)
1686 return rc;
1687 return cmd_rc;
0caeef63
VV
1688}
1689
1cf03c00 1690static int ars_continue(struct acpi_nfit_desc *acpi_desc)
0caeef63 1691{
aef25338 1692 int rc, cmd_rc;
1cf03c00
DW
1693 struct nd_cmd_ars_start ars_start;
1694 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
1695 struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
1696
1697 memset(&ars_start, 0, sizeof(ars_start));
1698 ars_start.address = ars_status->restart_address;
1699 ars_start.length = ars_status->restart_length;
1700 ars_start.type = ars_status->type;
1701 rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start,
1702 sizeof(ars_start), &cmd_rc);
1703 if (rc < 0)
1704 return rc;
1705 return cmd_rc;
1706}
0caeef63 1707
1cf03c00
DW
1708static int ars_get_status(struct acpi_nfit_desc *acpi_desc)
1709{
1710 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
1711 struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
1712 int rc, cmd_rc;
aef25338 1713
1cf03c00
DW
1714 rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status,
1715 acpi_desc->ars_status_size, &cmd_rc);
1716 if (rc < 0)
1717 return rc;
1718 return cmd_rc;
0caeef63
VV
1719}
1720
1721static int ars_status_process_records(struct nvdimm_bus *nvdimm_bus,
1cf03c00 1722 struct nd_cmd_ars_status *ars_status)
0caeef63
VV
1723{
1724 int rc;
1725 u32 i;
1726
0caeef63
VV
1727 for (i = 0; i < ars_status->num_records; i++) {
1728 rc = nvdimm_bus_add_poison(nvdimm_bus,
1729 ars_status->records[i].err_address,
1730 ars_status->records[i].length);
1731 if (rc)
1732 return rc;
1733 }
1734
1735 return 0;
1736}
1737
af1996ef
TK
1738static void acpi_nfit_remove_resource(void *data)
1739{
1740 struct resource *res = data;
1741
1742 remove_resource(res);
1743}
1744
1745static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc,
1746 struct nd_region_desc *ndr_desc)
1747{
1748 struct resource *res, *nd_res = ndr_desc->res;
1749 int is_pmem, ret;
1750
1751 /* No operation if the region is already registered as PMEM */
1752 is_pmem = region_intersects(nd_res->start, resource_size(nd_res),
1753 IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY);
1754 if (is_pmem == REGION_INTERSECTS)
1755 return 0;
1756
1757 res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL);
1758 if (!res)
1759 return -ENOMEM;
1760
1761 res->name = "Persistent Memory";
1762 res->start = nd_res->start;
1763 res->end = nd_res->end;
1764 res->flags = IORESOURCE_MEM;
1765 res->desc = IORES_DESC_PERSISTENT_MEMORY;
1766
1767 ret = insert_resource(&iomem_resource, res);
1768 if (ret)
1769 return ret;
1770
d932dd2c
SV
1771 ret = devm_add_action_or_reset(acpi_desc->dev,
1772 acpi_nfit_remove_resource,
1773 res);
1774 if (ret)
af1996ef 1775 return ret;
af1996ef
TK
1776
1777 return 0;
1778}
1779
1f7df6f8
DW
1780static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc,
1781 struct nd_mapping *nd_mapping, struct nd_region_desc *ndr_desc,
1782 struct acpi_nfit_memory_map *memdev,
1cf03c00 1783 struct nfit_spa *nfit_spa)
1f7df6f8
DW
1784{
1785 struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc,
1786 memdev->device_handle);
1cf03c00 1787 struct acpi_nfit_system_address *spa = nfit_spa->spa;
047fc8a1 1788 struct nd_blk_region_desc *ndbr_desc;
1f7df6f8
DW
1789 struct nfit_mem *nfit_mem;
1790 int blk_valid = 0;
1791
1792 if (!nvdimm) {
1793 dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n",
1794 spa->range_index, memdev->device_handle);
1795 return -ENODEV;
1796 }
1797
1798 nd_mapping->nvdimm = nvdimm;
1799 switch (nfit_spa_type(spa)) {
1800 case NFIT_SPA_PM:
1801 case NFIT_SPA_VOLATILE:
1802 nd_mapping->start = memdev->address;
1803 nd_mapping->size = memdev->region_size;
1804 break;
1805 case NFIT_SPA_DCR:
1806 nfit_mem = nvdimm_provider_data(nvdimm);
1807 if (!nfit_mem || !nfit_mem->bdw) {
1808 dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n",
1809 spa->range_index, nvdimm_name(nvdimm));
1810 } else {
1811 nd_mapping->size = nfit_mem->bdw->capacity;
1812 nd_mapping->start = nfit_mem->bdw->start_address;
5212e11f 1813 ndr_desc->num_lanes = nfit_mem->bdw->windows;
1f7df6f8
DW
1814 blk_valid = 1;
1815 }
1816
1817 ndr_desc->nd_mapping = nd_mapping;
1818 ndr_desc->num_mappings = blk_valid;
047fc8a1
RZ
1819 ndbr_desc = to_blk_region_desc(ndr_desc);
1820 ndbr_desc->enable = acpi_nfit_blk_region_enable;
6bc75619 1821 ndbr_desc->do_io = acpi_desc->blk_do_io;
1cf03c00
DW
1822 nfit_spa->nd_region = nvdimm_blk_region_create(acpi_desc->nvdimm_bus,
1823 ndr_desc);
1824 if (!nfit_spa->nd_region)
1f7df6f8
DW
1825 return -ENOMEM;
1826 break;
1827 }
1828
1829 return 0;
1830}
1831
c2f32acd
LCY
1832static bool nfit_spa_is_virtual(struct acpi_nfit_system_address *spa)
1833{
1834 return (nfit_spa_type(spa) == NFIT_SPA_VDISK ||
1835 nfit_spa_type(spa) == NFIT_SPA_VCD ||
1836 nfit_spa_type(spa) == NFIT_SPA_PDISK ||
1837 nfit_spa_type(spa) == NFIT_SPA_PCD);
1838}
1839
1f7df6f8
DW
1840static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc,
1841 struct nfit_spa *nfit_spa)
1842{
1843 static struct nd_mapping nd_mappings[ND_MAX_MAPPINGS];
1844 struct acpi_nfit_system_address *spa = nfit_spa->spa;
047fc8a1
RZ
1845 struct nd_blk_region_desc ndbr_desc;
1846 struct nd_region_desc *ndr_desc;
1f7df6f8 1847 struct nfit_memdev *nfit_memdev;
1f7df6f8
DW
1848 struct nvdimm_bus *nvdimm_bus;
1849 struct resource res;
eaf96153 1850 int count = 0, rc;
1f7df6f8 1851
1cf03c00 1852 if (nfit_spa->nd_region)
20985164
VV
1853 return 0;
1854
c2f32acd 1855 if (spa->range_index == 0 && !nfit_spa_is_virtual(spa)) {
1f7df6f8
DW
1856 dev_dbg(acpi_desc->dev, "%s: detected invalid spa index\n",
1857 __func__);
1858 return 0;
1859 }
1860
1861 memset(&res, 0, sizeof(res));
1862 memset(&nd_mappings, 0, sizeof(nd_mappings));
047fc8a1 1863 memset(&ndbr_desc, 0, sizeof(ndbr_desc));
1f7df6f8
DW
1864 res.start = spa->address;
1865 res.end = res.start + spa->length - 1;
047fc8a1
RZ
1866 ndr_desc = &ndbr_desc.ndr_desc;
1867 ndr_desc->res = &res;
1868 ndr_desc->provider_data = nfit_spa;
1869 ndr_desc->attr_groups = acpi_nfit_region_attribute_groups;
41d7a6d6
TK
1870 if (spa->flags & ACPI_NFIT_PROXIMITY_VALID)
1871 ndr_desc->numa_node = acpi_map_pxm_to_online_node(
1872 spa->proximity_domain);
1873 else
1874 ndr_desc->numa_node = NUMA_NO_NODE;
1875
1f7df6f8
DW
1876 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
1877 struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev;
1878 struct nd_mapping *nd_mapping;
1f7df6f8
DW
1879
1880 if (memdev->range_index != spa->range_index)
1881 continue;
1882 if (count >= ND_MAX_MAPPINGS) {
1883 dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n",
1884 spa->range_index, ND_MAX_MAPPINGS);
1885 return -ENXIO;
1886 }
1887 nd_mapping = &nd_mappings[count++];
047fc8a1 1888 rc = acpi_nfit_init_mapping(acpi_desc, nd_mapping, ndr_desc,
1cf03c00 1889 memdev, nfit_spa);
1f7df6f8 1890 if (rc)
1cf03c00 1891 goto out;
1f7df6f8
DW
1892 }
1893
047fc8a1
RZ
1894 ndr_desc->nd_mapping = nd_mappings;
1895 ndr_desc->num_mappings = count;
1896 rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa);
eaf96153 1897 if (rc)
1cf03c00 1898 goto out;
eaf96153 1899
1f7df6f8
DW
1900 nvdimm_bus = acpi_desc->nvdimm_bus;
1901 if (nfit_spa_type(spa) == NFIT_SPA_PM) {
af1996ef 1902 rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc);
48901165 1903 if (rc) {
af1996ef
TK
1904 dev_warn(acpi_desc->dev,
1905 "failed to insert pmem resource to iomem: %d\n",
1906 rc);
48901165 1907 goto out;
0caeef63 1908 }
48901165 1909
1cf03c00
DW
1910 nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus,
1911 ndr_desc);
1912 if (!nfit_spa->nd_region)
1913 rc = -ENOMEM;
1f7df6f8 1914 } else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) {
1cf03c00
DW
1915 nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus,
1916 ndr_desc);
1917 if (!nfit_spa->nd_region)
1918 rc = -ENOMEM;
c2f32acd
LCY
1919 } else if (nfit_spa_is_virtual(spa)) {
1920 nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus,
1921 ndr_desc);
1922 if (!nfit_spa->nd_region)
1923 rc = -ENOMEM;
1f7df6f8 1924 }
20985164 1925
1cf03c00
DW
1926 out:
1927 if (rc)
1928 dev_err(acpi_desc->dev, "failed to register spa range %d\n",
1929 nfit_spa->spa->range_index);
1930 return rc;
1931}
1932
1933static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc,
1934 u32 max_ars)
1935{
1936 struct device *dev = acpi_desc->dev;
1937 struct nd_cmd_ars_status *ars_status;
1938
1939 if (acpi_desc->ars_status && acpi_desc->ars_status_size >= max_ars) {
1940 memset(acpi_desc->ars_status, 0, acpi_desc->ars_status_size);
1941 return 0;
1942 }
1943
1944 if (acpi_desc->ars_status)
1945 devm_kfree(dev, acpi_desc->ars_status);
1946 acpi_desc->ars_status = NULL;
1947 ars_status = devm_kzalloc(dev, max_ars, GFP_KERNEL);
1948 if (!ars_status)
1949 return -ENOMEM;
1950 acpi_desc->ars_status = ars_status;
1951 acpi_desc->ars_status_size = max_ars;
1f7df6f8
DW
1952 return 0;
1953}
1954
1cf03c00
DW
1955static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc,
1956 struct nfit_spa *nfit_spa)
1957{
1958 struct acpi_nfit_system_address *spa = nfit_spa->spa;
1959 int rc;
1960
1961 if (!nfit_spa->max_ars) {
1962 struct nd_cmd_ars_cap ars_cap;
1963
1964 memset(&ars_cap, 0, sizeof(ars_cap));
1965 rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa);
1966 if (rc < 0)
1967 return rc;
1968 nfit_spa->max_ars = ars_cap.max_ars_out;
1969 nfit_spa->clear_err_unit = ars_cap.clear_err_unit;
1970 /* check that the supported scrub types match the spa type */
1971 if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE &&
1972 ((ars_cap.status >> 16) & ND_ARS_VOLATILE) == 0)
1973 return -ENOTTY;
1974 else if (nfit_spa_type(spa) == NFIT_SPA_PM &&
1975 ((ars_cap.status >> 16) & ND_ARS_PERSISTENT) == 0)
1976 return -ENOTTY;
1977 }
1978
1979 if (ars_status_alloc(acpi_desc, nfit_spa->max_ars))
1980 return -ENOMEM;
1981
1982 rc = ars_get_status(acpi_desc);
1983 if (rc < 0 && rc != -ENOSPC)
1984 return rc;
1985
1986 if (ars_status_process_records(acpi_desc->nvdimm_bus,
1987 acpi_desc->ars_status))
1988 return -ENOMEM;
1989
1990 return 0;
1991}
1992
1993static void acpi_nfit_async_scrub(struct acpi_nfit_desc *acpi_desc,
1994 struct nfit_spa *nfit_spa)
1995{
1996 struct acpi_nfit_system_address *spa = nfit_spa->spa;
1997 unsigned int overflow_retry = scrub_overflow_abort;
1998 u64 init_ars_start = 0, init_ars_len = 0;
1999 struct device *dev = acpi_desc->dev;
2000 unsigned int tmo = scrub_timeout;
2001 int rc;
2002
2003 if (nfit_spa->ars_done || !nfit_spa->nd_region)
2004 return;
2005
2006 rc = ars_start(acpi_desc, nfit_spa);
2007 /*
2008 * If we timed out the initial scan we'll still be busy here,
2009 * and will wait another timeout before giving up permanently.
2010 */
2011 if (rc < 0 && rc != -EBUSY)
2012 return;
2013
2014 do {
2015 u64 ars_start, ars_len;
2016
2017 if (acpi_desc->cancel)
2018 break;
2019 rc = acpi_nfit_query_poison(acpi_desc, nfit_spa);
2020 if (rc == -ENOTTY)
2021 break;
2022 if (rc == -EBUSY && !tmo) {
2023 dev_warn(dev, "range %d ars timeout, aborting\n",
2024 spa->range_index);
2025 break;
2026 }
2027
2028 if (rc == -EBUSY) {
2029 /*
2030 * Note, entries may be appended to the list
2031 * while the lock is dropped, but the workqueue
2032 * being active prevents entries being deleted /
2033 * freed.
2034 */
2035 mutex_unlock(&acpi_desc->init_mutex);
2036 ssleep(1);
2037 tmo--;
2038 mutex_lock(&acpi_desc->init_mutex);
2039 continue;
2040 }
2041
2042 /* we got some results, but there are more pending... */
2043 if (rc == -ENOSPC && overflow_retry--) {
2044 if (!init_ars_len) {
2045 init_ars_len = acpi_desc->ars_status->length;
2046 init_ars_start = acpi_desc->ars_status->address;
2047 }
2048 rc = ars_continue(acpi_desc);
2049 }
2050
2051 if (rc < 0) {
2052 dev_warn(dev, "range %d ars continuation failed\n",
2053 spa->range_index);
2054 break;
2055 }
2056
2057 if (init_ars_len) {
2058 ars_start = init_ars_start;
2059 ars_len = init_ars_len;
2060 } else {
2061 ars_start = acpi_desc->ars_status->address;
2062 ars_len = acpi_desc->ars_status->length;
2063 }
2064 dev_dbg(dev, "spa range: %d ars from %#llx + %#llx complete\n",
2065 spa->range_index, ars_start, ars_len);
2066 /* notify the region about new poison entries */
2067 nvdimm_region_notify(nfit_spa->nd_region,
2068 NVDIMM_REVALIDATE_POISON);
2069 break;
2070 } while (1);
2071}
2072
2073static void acpi_nfit_scrub(struct work_struct *work)
1f7df6f8 2074{
1cf03c00
DW
2075 struct device *dev;
2076 u64 init_scrub_length = 0;
1f7df6f8 2077 struct nfit_spa *nfit_spa;
1cf03c00
DW
2078 u64 init_scrub_address = 0;
2079 bool init_ars_done = false;
2080 struct acpi_nfit_desc *acpi_desc;
2081 unsigned int tmo = scrub_timeout;
2082 unsigned int overflow_retry = scrub_overflow_abort;
2083
2084 acpi_desc = container_of(work, typeof(*acpi_desc), work);
2085 dev = acpi_desc->dev;
1f7df6f8 2086
1cf03c00
DW
2087 /*
2088 * We scrub in 2 phases. The first phase waits for any platform
2089 * firmware initiated scrubs to complete and then we go search for the
2090 * affected spa regions to mark them scanned. In the second phase we
2091 * initiate a directed scrub for every range that was not scrubbed in
2092 * phase 1.
2093 */
2094
2095 /* process platform firmware initiated scrubs */
2096 retry:
2097 mutex_lock(&acpi_desc->init_mutex);
1f7df6f8 2098 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
1cf03c00
DW
2099 struct nd_cmd_ars_status *ars_status;
2100 struct acpi_nfit_system_address *spa;
2101 u64 ars_start, ars_len;
2102 int rc;
1f7df6f8 2103
1cf03c00
DW
2104 if (acpi_desc->cancel)
2105 break;
2106
2107 if (nfit_spa->nd_region)
2108 continue;
2109
2110 if (init_ars_done) {
2111 /*
2112 * No need to re-query, we're now just
2113 * reconciling all the ranges covered by the
2114 * initial scrub
2115 */
2116 rc = 0;
2117 } else
2118 rc = acpi_nfit_query_poison(acpi_desc, nfit_spa);
2119
2120 if (rc == -ENOTTY) {
2121 /* no ars capability, just register spa and move on */
2122 acpi_nfit_register_region(acpi_desc, nfit_spa);
2123 continue;
2124 }
2125
2126 if (rc == -EBUSY && !tmo) {
2127 /* fallthrough to directed scrub in phase 2 */
2128 dev_warn(dev, "timeout awaiting ars results, continuing...\n");
2129 break;
2130 } else if (rc == -EBUSY) {
2131 mutex_unlock(&acpi_desc->init_mutex);
2132 ssleep(1);
2133 tmo--;
2134 goto retry;
2135 }
2136
2137 /* we got some results, but there are more pending... */
2138 if (rc == -ENOSPC && overflow_retry--) {
2139 ars_status = acpi_desc->ars_status;
2140 /*
2141 * Record the original scrub range, so that we
2142 * can recall all the ranges impacted by the
2143 * initial scrub.
2144 */
2145 if (!init_scrub_length) {
2146 init_scrub_length = ars_status->length;
2147 init_scrub_address = ars_status->address;
2148 }
2149 rc = ars_continue(acpi_desc);
2150 if (rc == 0) {
2151 mutex_unlock(&acpi_desc->init_mutex);
2152 goto retry;
2153 }
2154 }
2155
2156 if (rc < 0) {
2157 /*
2158 * Initial scrub failed, we'll give it one more
2159 * try below...
2160 */
2161 break;
2162 }
2163
2164 /* We got some final results, record completed ranges */
2165 ars_status = acpi_desc->ars_status;
2166 if (init_scrub_length) {
2167 ars_start = init_scrub_address;
2168 ars_len = ars_start + init_scrub_length;
2169 } else {
2170 ars_start = ars_status->address;
2171 ars_len = ars_status->length;
2172 }
2173 spa = nfit_spa->spa;
2174
2175 if (!init_ars_done) {
2176 init_ars_done = true;
2177 dev_dbg(dev, "init scrub %#llx + %#llx complete\n",
2178 ars_start, ars_len);
2179 }
2180 if (ars_start <= spa->address && ars_start + ars_len
2181 >= spa->address + spa->length)
2182 acpi_nfit_register_region(acpi_desc, nfit_spa);
1f7df6f8 2183 }
1cf03c00
DW
2184
2185 /*
2186 * For all the ranges not covered by an initial scrub we still
2187 * want to see if there are errors, but it's ok to discover them
2188 * asynchronously.
2189 */
2190 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
2191 /*
2192 * Flag all the ranges that still need scrubbing, but
2193 * register them now to make data available.
2194 */
2195 if (nfit_spa->nd_region)
2196 nfit_spa->ars_done = 1;
2197 else
2198 acpi_nfit_register_region(acpi_desc, nfit_spa);
2199 }
2200
2201 list_for_each_entry(nfit_spa, &acpi_desc->spas, list)
2202 acpi_nfit_async_scrub(acpi_desc, nfit_spa);
2203 mutex_unlock(&acpi_desc->init_mutex);
2204}
2205
2206static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc)
2207{
2208 struct nfit_spa *nfit_spa;
2209 int rc;
2210
2211 list_for_each_entry(nfit_spa, &acpi_desc->spas, list)
2212 if (nfit_spa_type(nfit_spa->spa) == NFIT_SPA_DCR) {
2213 /* BLK regions don't need to wait for ars results */
2214 rc = acpi_nfit_register_region(acpi_desc, nfit_spa);
2215 if (rc)
2216 return rc;
2217 }
2218
2219 queue_work(nfit_wq, &acpi_desc->work);
1f7df6f8
DW
2220 return 0;
2221}
2222
20985164
VV
2223static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc,
2224 struct nfit_table_prev *prev)
2225{
2226 struct device *dev = acpi_desc->dev;
2227
2228 if (!list_empty(&prev->spas) ||
2229 !list_empty(&prev->memdevs) ||
2230 !list_empty(&prev->dcrs) ||
2231 !list_empty(&prev->bdws) ||
2232 !list_empty(&prev->idts) ||
2233 !list_empty(&prev->flushes)) {
2234 dev_err(dev, "new nfit deletes entries (unsupported)\n");
2235 return -ENXIO;
2236 }
2237 return 0;
2238}
2239
6bc75619 2240int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, acpi_size sz)
b94d5230
DW
2241{
2242 struct device *dev = acpi_desc->dev;
20985164 2243 struct nfit_table_prev prev;
b94d5230
DW
2244 const void *end;
2245 u8 *data;
1f7df6f8 2246 int rc;
b94d5230 2247
20985164
VV
2248 mutex_lock(&acpi_desc->init_mutex);
2249
2250 INIT_LIST_HEAD(&prev.spas);
2251 INIT_LIST_HEAD(&prev.memdevs);
2252 INIT_LIST_HEAD(&prev.dcrs);
2253 INIT_LIST_HEAD(&prev.bdws);
2254 INIT_LIST_HEAD(&prev.idts);
2255 INIT_LIST_HEAD(&prev.flushes);
2256
2257 list_cut_position(&prev.spas, &acpi_desc->spas,
2258 acpi_desc->spas.prev);
2259 list_cut_position(&prev.memdevs, &acpi_desc->memdevs,
2260 acpi_desc->memdevs.prev);
2261 list_cut_position(&prev.dcrs, &acpi_desc->dcrs,
2262 acpi_desc->dcrs.prev);
2263 list_cut_position(&prev.bdws, &acpi_desc->bdws,
2264 acpi_desc->bdws.prev);
2265 list_cut_position(&prev.idts, &acpi_desc->idts,
2266 acpi_desc->idts.prev);
2267 list_cut_position(&prev.flushes, &acpi_desc->flushes,
2268 acpi_desc->flushes.prev);
b94d5230
DW
2269
2270 data = (u8 *) acpi_desc->nfit;
2271 end = data + sz;
b94d5230 2272 while (!IS_ERR_OR_NULL(data))
20985164 2273 data = add_table(acpi_desc, &prev, data, end);
b94d5230
DW
2274
2275 if (IS_ERR(data)) {
2276 dev_dbg(dev, "%s: nfit table parsing error: %ld\n", __func__,
2277 PTR_ERR(data));
20985164
VV
2278 rc = PTR_ERR(data);
2279 goto out_unlock;
b94d5230
DW
2280 }
2281
20985164
VV
2282 rc = acpi_nfit_check_deletions(acpi_desc, &prev);
2283 if (rc)
2284 goto out_unlock;
2285
81ed4e36
DW
2286 rc = nfit_mem_init(acpi_desc);
2287 if (rc)
20985164 2288 goto out_unlock;
b94d5230 2289
62232e45
DW
2290 acpi_nfit_init_dsms(acpi_desc);
2291
1f7df6f8
DW
2292 rc = acpi_nfit_register_dimms(acpi_desc);
2293 if (rc)
20985164
VV
2294 goto out_unlock;
2295
2296 rc = acpi_nfit_register_regions(acpi_desc);
1f7df6f8 2297
20985164
VV
2298 out_unlock:
2299 mutex_unlock(&acpi_desc->init_mutex);
2300 return rc;
b94d5230 2301}
6bc75619 2302EXPORT_SYMBOL_GPL(acpi_nfit_init);
b94d5230 2303
7ae0fa43
DW
2304struct acpi_nfit_flush_work {
2305 struct work_struct work;
2306 struct completion cmp;
2307};
2308
2309static void flush_probe(struct work_struct *work)
2310{
2311 struct acpi_nfit_flush_work *flush;
2312
2313 flush = container_of(work, typeof(*flush), work);
2314 complete(&flush->cmp);
2315}
2316
2317static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc)
2318{
2319 struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
2320 struct device *dev = acpi_desc->dev;
2321 struct acpi_nfit_flush_work flush;
2322
2323 /* bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */
2324 device_lock(dev);
2325 device_unlock(dev);
2326
2327 /*
2328 * Scrub work could take 10s of seconds, userspace may give up so we
2329 * need to be interruptible while waiting.
2330 */
2331 INIT_WORK_ONSTACK(&flush.work, flush_probe);
2332 COMPLETION_INITIALIZER_ONSTACK(flush.cmp);
2333 queue_work(nfit_wq, &flush.work);
2334 return wait_for_completion_interruptible(&flush.cmp);
2335}
2336
87bf572e
DW
2337static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc,
2338 struct nvdimm *nvdimm, unsigned int cmd)
2339{
2340 struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
2341
2342 if (nvdimm)
2343 return 0;
2344 if (cmd != ND_CMD_ARS_START)
2345 return 0;
2346
2347 /*
2348 * The kernel and userspace may race to initiate a scrub, but
2349 * the scrub thread is prepared to lose that initial race. It
2350 * just needs guarantees that any ars it initiates are not
2351 * interrupted by any intervening start reqeusts from userspace.
2352 */
2353 if (work_busy(&acpi_desc->work))
2354 return -EBUSY;
2355
2356 return 0;
2357}
2358
a61fe6f7 2359void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev)
b94d5230
DW
2360{
2361 struct nvdimm_bus_descriptor *nd_desc;
b94d5230
DW
2362
2363 dev_set_drvdata(dev, acpi_desc);
2364 acpi_desc->dev = dev;
6bc75619 2365 acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io;
b94d5230
DW
2366 nd_desc = &acpi_desc->nd_desc;
2367 nd_desc->provider_name = "ACPI.NFIT";
2368 nd_desc->ndctl = acpi_nfit_ctl;
7ae0fa43 2369 nd_desc->flush_probe = acpi_nfit_flush_probe;
87bf572e 2370 nd_desc->clear_to_send = acpi_nfit_clear_to_send;
45def22c 2371 nd_desc->attr_groups = acpi_nfit_attribute_groups;
b94d5230 2372
20985164
VV
2373 INIT_LIST_HEAD(&acpi_desc->spas);
2374 INIT_LIST_HEAD(&acpi_desc->dcrs);
2375 INIT_LIST_HEAD(&acpi_desc->bdws);
2376 INIT_LIST_HEAD(&acpi_desc->idts);
2377 INIT_LIST_HEAD(&acpi_desc->flushes);
2378 INIT_LIST_HEAD(&acpi_desc->memdevs);
2379 INIT_LIST_HEAD(&acpi_desc->dimms);
20985164 2380 mutex_init(&acpi_desc->init_mutex);
1cf03c00 2381 INIT_WORK(&acpi_desc->work, acpi_nfit_scrub);
20985164 2382}
a61fe6f7 2383EXPORT_SYMBOL_GPL(acpi_nfit_desc_init);
20985164
VV
2384
2385static int acpi_nfit_add(struct acpi_device *adev)
2386{
2387 struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
2388 struct acpi_nfit_desc *acpi_desc;
2389 struct device *dev = &adev->dev;
2390 struct acpi_table_header *tbl;
2391 acpi_status status = AE_OK;
2392 acpi_size sz;
2393 int rc;
2394
82595423 2395 status = acpi_get_table_with_size(ACPI_SIG_NFIT, 0, &tbl, &sz);
20985164
VV
2396 if (ACPI_FAILURE(status)) {
2397 /* This is ok, we could have an nvdimm hotplugged later */
2398 dev_dbg(dev, "failed to find NFIT at startup\n");
2399 return 0;
2400 }
2401
a61fe6f7
DW
2402 acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
2403 if (!acpi_desc)
2404 return -ENOMEM;
2405 acpi_nfit_desc_init(acpi_desc, &adev->dev);
2406 acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, &acpi_desc->nd_desc);
2407 if (!acpi_desc->nvdimm_bus)
2408 return -ENOMEM;
20985164 2409
6b577c9d
LK
2410 /*
2411 * Save the acpi header for later and then skip it,
2412 * making nfit point to the first nfit table header.
2413 */
2414 acpi_desc->acpi_header = *tbl;
2415 acpi_desc->nfit = (void *) tbl + sizeof(struct acpi_table_nfit);
2416 sz -= sizeof(struct acpi_table_nfit);
20985164
VV
2417
2418 /* Evaluate _FIT and override with that if present */
2419 status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf);
2420 if (ACPI_SUCCESS(status) && buf.length > 0) {
6b577c9d
LK
2421 union acpi_object *obj;
2422 /*
2423 * Adjust for the acpi_object header of the _FIT
2424 */
2425 obj = buf.pointer;
2426 if (obj->type == ACPI_TYPE_BUFFER) {
2427 acpi_desc->nfit =
2428 (struct acpi_nfit_header *)obj->buffer.pointer;
2429 sz = obj->buffer.length;
2430 } else
2431 dev_dbg(dev, "%s invalid type %d, ignoring _FIT\n",
2432 __func__, (int) obj->type);
20985164 2433 }
b94d5230
DW
2434
2435 rc = acpi_nfit_init(acpi_desc, sz);
2436 if (rc) {
2437 nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
2438 return rc;
2439 }
2440 return 0;
2441}
2442
2443static int acpi_nfit_remove(struct acpi_device *adev)
2444{
2445 struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(&adev->dev);
2446
7ae0fa43
DW
2447 acpi_desc->cancel = 1;
2448 flush_workqueue(nfit_wq);
b94d5230
DW
2449 nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
2450 return 0;
2451}
2452
20985164
VV
2453static void acpi_nfit_notify(struct acpi_device *adev, u32 event)
2454{
2455 struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(&adev->dev);
2456 struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
6b577c9d
LK
2457 struct acpi_nfit_header *nfit_saved;
2458 union acpi_object *obj;
20985164
VV
2459 struct device *dev = &adev->dev;
2460 acpi_status status;
2461 int ret;
2462
2463 dev_dbg(dev, "%s: event: %d\n", __func__, event);
2464
2465 device_lock(dev);
2466 if (!dev->driver) {
2467 /* dev->driver may be null if we're being removed */
2468 dev_dbg(dev, "%s: no driver found for dev\n", __func__);
d91e8928 2469 goto out_unlock;
20985164
VV
2470 }
2471
2472 if (!acpi_desc) {
a61fe6f7
DW
2473 acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
2474 if (!acpi_desc)
2475 goto out_unlock;
2476 acpi_nfit_desc_init(acpi_desc, &adev->dev);
2477 acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, &acpi_desc->nd_desc);
2478 if (!acpi_desc->nvdimm_bus)
20985164 2479 goto out_unlock;
7ae0fa43
DW
2480 } else {
2481 /*
2482 * Finish previous registration before considering new
2483 * regions.
2484 */
2485 flush_workqueue(nfit_wq);
20985164
VV
2486 }
2487
2488 /* Evaluate _FIT */
2489 status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf);
2490 if (ACPI_FAILURE(status)) {
2491 dev_err(dev, "failed to evaluate _FIT\n");
2492 goto out_unlock;
2493 }
2494
2495 nfit_saved = acpi_desc->nfit;
6b577c9d
LK
2496 obj = buf.pointer;
2497 if (obj->type == ACPI_TYPE_BUFFER) {
2498 acpi_desc->nfit =
2499 (struct acpi_nfit_header *)obj->buffer.pointer;
2500 ret = acpi_nfit_init(acpi_desc, obj->buffer.length);
2501 if (ret) {
2502 /* Merge failed, restore old nfit, and exit */
2503 acpi_desc->nfit = nfit_saved;
2504 dev_err(dev, "failed to merge updated NFIT\n");
2505 }
2506 } else {
2507 /* Bad _FIT, restore old nfit */
2508 dev_err(dev, "Invalid _FIT\n");
20985164
VV
2509 }
2510 kfree(buf.pointer);
2511
2512 out_unlock:
2513 device_unlock(dev);
2514}
2515
b94d5230
DW
2516static const struct acpi_device_id acpi_nfit_ids[] = {
2517 { "ACPI0012", 0 },
2518 { "", 0 },
2519};
2520MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids);
2521
2522static struct acpi_driver acpi_nfit_driver = {
2523 .name = KBUILD_MODNAME,
2524 .ids = acpi_nfit_ids,
2525 .ops = {
2526 .add = acpi_nfit_add,
2527 .remove = acpi_nfit_remove,
20985164 2528 .notify = acpi_nfit_notify,
b94d5230
DW
2529 },
2530};
2531
2532static __init int nfit_init(void)
2533{
2534 BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40);
2535 BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56);
2536 BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48);
2537 BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20);
2538 BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9);
2539 BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80);
2540 BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40);
2541
2542 acpi_str_to_uuid(UUID_VOLATILE_MEMORY, nfit_uuid[NFIT_SPA_VOLATILE]);
2543 acpi_str_to_uuid(UUID_PERSISTENT_MEMORY, nfit_uuid[NFIT_SPA_PM]);
2544 acpi_str_to_uuid(UUID_CONTROL_REGION, nfit_uuid[NFIT_SPA_DCR]);
2545 acpi_str_to_uuid(UUID_DATA_REGION, nfit_uuid[NFIT_SPA_BDW]);
2546 acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_VDISK]);
2547 acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_CD, nfit_uuid[NFIT_SPA_VCD]);
2548 acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_PDISK]);
2549 acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_CD, nfit_uuid[NFIT_SPA_PCD]);
2550 acpi_str_to_uuid(UUID_NFIT_BUS, nfit_uuid[NFIT_DEV_BUS]);
2551 acpi_str_to_uuid(UUID_NFIT_DIMM, nfit_uuid[NFIT_DEV_DIMM]);
31eca76b
DW
2552 acpi_str_to_uuid(UUID_NFIT_DIMM_N_HPE1, nfit_uuid[NFIT_DEV_DIMM_N_HPE1]);
2553 acpi_str_to_uuid(UUID_NFIT_DIMM_N_HPE2, nfit_uuid[NFIT_DEV_DIMM_N_HPE2]);
e02fb726 2554 acpi_str_to_uuid(UUID_NFIT_DIMM_N_MSFT, nfit_uuid[NFIT_DEV_DIMM_N_MSFT]);
b94d5230 2555
7ae0fa43
DW
2556 nfit_wq = create_singlethread_workqueue("nfit");
2557 if (!nfit_wq)
2558 return -ENOMEM;
2559
b94d5230
DW
2560 return acpi_bus_register_driver(&acpi_nfit_driver);
2561}
2562
2563static __exit void nfit_exit(void)
2564{
2565 acpi_bus_unregister_driver(&acpi_nfit_driver);
7ae0fa43 2566 destroy_workqueue(nfit_wq);
b94d5230
DW
2567}
2568
2569module_init(nfit_init);
2570module_exit(nfit_exit);
2571MODULE_LICENSE("GPL v2");
2572MODULE_AUTHOR("Intel Corporation");