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1da177e4 LT |
1 | /* |
2 | * pci_root.c - ACPI PCI Root Bridge Driver ($Revision: 40 $) | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
6 | * | |
7 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or (at | |
12 | * your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but | |
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * General Public License for more details. | |
18 | * | |
1da177e4 LT |
19 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
20 | */ | |
21 | ||
22 | #include <linux/kernel.h> | |
23 | #include <linux/module.h> | |
24 | #include <linux/init.h> | |
25 | #include <linux/types.h> | |
d0020f65 | 26 | #include <linux/mutex.h> |
1da177e4 | 27 | #include <linux/pm.h> |
b67ea761 | 28 | #include <linux/pm_runtime.h> |
1da177e4 | 29 | #include <linux/pci.h> |
990a7ac5 | 30 | #include <linux/pci-acpi.h> |
eca67315 | 31 | #include <linux/pci-aspm.h> |
864b94ad | 32 | #include <linux/dmar.h> |
1da177e4 | 33 | #include <linux/acpi.h> |
5a0e3ad6 | 34 | #include <linux/slab.h> |
7bc5a2ba | 35 | #include <linux/dmi.h> |
630b3aff | 36 | #include <linux/platform_data/x86/apple.h> |
8b48463f | 37 | #include <acpi/apei.h> /* for acpi_hest_init() */ |
1da177e4 | 38 | |
ace8238b RW |
39 | #include "internal.h" |
40 | ||
1da177e4 | 41 | #define _COMPONENT ACPI_PCI_COMPONENT |
f52fd66d | 42 | ACPI_MODULE_NAME("pci_root"); |
1da177e4 | 43 | #define ACPI_PCI_ROOT_CLASS "pci_bridge" |
1da177e4 | 44 | #define ACPI_PCI_ROOT_DEVICE_NAME "PCI Root Bridge" |
00c43b96 RW |
45 | static int acpi_pci_root_add(struct acpi_device *device, |
46 | const struct acpi_device_id *not_used); | |
47 | static void acpi_pci_root_remove(struct acpi_device *device); | |
1da177e4 | 48 | |
3338db00 RW |
49 | static int acpi_pci_root_scan_dependent(struct acpi_device *adev) |
50 | { | |
1f7c164b | 51 | acpiphp_check_host_bridge(adev); |
3338db00 RW |
52 | return 0; |
53 | } | |
54 | ||
7dab9ef4 BH |
55 | #define ACPI_PCIE_REQ_SUPPORT (OSC_PCI_EXT_CONFIG_SUPPORT \ |
56 | | OSC_PCI_ASPM_SUPPORT \ | |
57 | | OSC_PCI_CLOCK_PM_SUPPORT \ | |
58 | | OSC_PCI_MSI_SUPPORT) | |
415e12b2 | 59 | |
c97adf9e | 60 | static const struct acpi_device_id root_device_ids[] = { |
1ba90e3a TR |
61 | {"PNP0A03", 0}, |
62 | {"", 0}, | |
63 | }; | |
1ba90e3a | 64 | |
00c43b96 | 65 | static struct acpi_scan_handler pci_root_handler = { |
1ba90e3a | 66 | .ids = root_device_ids, |
00c43b96 RW |
67 | .attach = acpi_pci_root_add, |
68 | .detach = acpi_pci_root_remove, | |
ca499fc8 | 69 | .hotplug = { |
3338db00 RW |
70 | .enabled = true, |
71 | .scan_dependent = acpi_pci_root_scan_dependent, | |
ca499fc8 | 72 | }, |
1da177e4 LT |
73 | }; |
74 | ||
63f10f0f | 75 | static DEFINE_MUTEX(osc_lock); |
1da177e4 | 76 | |
27558203 AC |
77 | /** |
78 | * acpi_is_root_bridge - determine whether an ACPI CA node is a PCI root bridge | |
79 | * @handle - the ACPI CA node in question. | |
80 | * | |
81 | * Note: we could make this API take a struct acpi_device * instead, but | |
82 | * for now, it's more convenient to operate on an acpi_handle. | |
83 | */ | |
84 | int acpi_is_root_bridge(acpi_handle handle) | |
85 | { | |
86 | int ret; | |
87 | struct acpi_device *device; | |
88 | ||
89 | ret = acpi_bus_get_device(handle, &device); | |
90 | if (ret) | |
91 | return 0; | |
92 | ||
93 | ret = acpi_match_device_ids(device, root_device_ids); | |
94 | if (ret) | |
95 | return 0; | |
96 | else | |
97 | return 1; | |
98 | } | |
99 | EXPORT_SYMBOL_GPL(acpi_is_root_bridge); | |
100 | ||
1da177e4 | 101 | static acpi_status |
4be44fcd | 102 | get_root_bridge_busnr_callback(struct acpi_resource *resource, void *data) |
1da177e4 | 103 | { |
6ad95513 | 104 | struct resource *res = data; |
1da177e4 | 105 | struct acpi_resource_address64 address; |
f6c1c8ff | 106 | acpi_status status; |
1da177e4 | 107 | |
f6c1c8ff BH |
108 | status = acpi_resource_to_address64(resource, &address); |
109 | if (ACPI_FAILURE(status)) | |
1da177e4 LT |
110 | return AE_OK; |
111 | ||
a45de93e | 112 | if ((address.address.address_length > 0) && |
6ad95513 | 113 | (address.resource_type == ACPI_BUS_NUMBER_RANGE)) { |
a45de93e LZ |
114 | res->start = address.address.minimum; |
115 | res->end = address.address.minimum + address.address.address_length - 1; | |
6ad95513 | 116 | } |
1da177e4 LT |
117 | |
118 | return AE_OK; | |
119 | } | |
120 | ||
f5eebbe1 | 121 | static acpi_status try_get_root_bridge_busnr(acpi_handle handle, |
6ad95513 | 122 | struct resource *res) |
1da177e4 LT |
123 | { |
124 | acpi_status status; | |
125 | ||
6ad95513 | 126 | res->start = -1; |
4be44fcd LB |
127 | status = |
128 | acpi_walk_resources(handle, METHOD_NAME__CRS, | |
6ad95513 | 129 | get_root_bridge_busnr_callback, res); |
1da177e4 LT |
130 | if (ACPI_FAILURE(status)) |
131 | return status; | |
6ad95513 | 132 | if (res->start == -1) |
1da177e4 LT |
133 | return AE_ERROR; |
134 | return AE_OK; | |
135 | } | |
136 | ||
955f14b4 BH |
137 | struct pci_osc_bit_struct { |
138 | u32 bit; | |
139 | char *desc; | |
140 | }; | |
141 | ||
142 | static struct pci_osc_bit_struct pci_osc_support_bit[] = { | |
143 | { OSC_PCI_EXT_CONFIG_SUPPORT, "ExtendedConfig" }, | |
144 | { OSC_PCI_ASPM_SUPPORT, "ASPM" }, | |
145 | { OSC_PCI_CLOCK_PM_SUPPORT, "ClockPM" }, | |
146 | { OSC_PCI_SEGMENT_GROUPS_SUPPORT, "Segments" }, | |
147 | { OSC_PCI_MSI_SUPPORT, "MSI" }, | |
ba11edc6 | 148 | { OSC_PCI_HPX_TYPE_3_SUPPORT, "HPX-Type3" }, |
955f14b4 BH |
149 | }; |
150 | ||
151 | static struct pci_osc_bit_struct pci_osc_control_bit[] = { | |
152 | { OSC_PCI_EXPRESS_NATIVE_HP_CONTROL, "PCIeHotplug" }, | |
153 | { OSC_PCI_SHPC_NATIVE_HP_CONTROL, "SHPCHotplug" }, | |
154 | { OSC_PCI_EXPRESS_PME_CONTROL, "PME" }, | |
155 | { OSC_PCI_EXPRESS_AER_CONTROL, "AER" }, | |
156 | { OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" }, | |
af8bb9f8 | 157 | { OSC_PCI_EXPRESS_LTR_CONTROL, "LTR" }, |
955f14b4 BH |
158 | }; |
159 | ||
160 | static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word, | |
161 | struct pci_osc_bit_struct *table, int size) | |
162 | { | |
163 | char buf[80]; | |
164 | int i, len = 0; | |
165 | struct pci_osc_bit_struct *entry; | |
166 | ||
167 | buf[0] = '\0'; | |
168 | for (i = 0, entry = table; i < size; i++, entry++) | |
169 | if (word & entry->bit) | |
170 | len += snprintf(buf + len, sizeof(buf) - len, "%s%s", | |
171 | len ? " " : "", entry->desc); | |
172 | ||
173 | dev_info(&root->device->dev, "_OSC: %s [%s]\n", msg, buf); | |
174 | } | |
175 | ||
176 | static void decode_osc_support(struct acpi_pci_root *root, char *msg, u32 word) | |
177 | { | |
178 | decode_osc_bits(root, msg, word, pci_osc_support_bit, | |
179 | ARRAY_SIZE(pci_osc_support_bit)); | |
180 | } | |
181 | ||
182 | static void decode_osc_control(struct acpi_pci_root *root, char *msg, u32 word) | |
183 | { | |
184 | decode_osc_bits(root, msg, word, pci_osc_control_bit, | |
185 | ARRAY_SIZE(pci_osc_control_bit)); | |
186 | } | |
187 | ||
3a9622dc | 188 | static u8 pci_osc_uuid_str[] = "33DB4D5B-1FF7-401C-9657-7441C03DD766"; |
63f10f0f KK |
189 | |
190 | static acpi_status acpi_pci_run_osc(acpi_handle handle, | |
191 | const u32 *capbuf, u32 *retval) | |
192 | { | |
3a9622dc SL |
193 | struct acpi_osc_context context = { |
194 | .uuid_str = pci_osc_uuid_str, | |
195 | .rev = 1, | |
196 | .cap.length = 12, | |
197 | .cap.pointer = (void *)capbuf, | |
198 | }; | |
63f10f0f | 199 | acpi_status status; |
63f10f0f | 200 | |
3a9622dc SL |
201 | status = acpi_run_osc(handle, &context); |
202 | if (ACPI_SUCCESS(status)) { | |
203 | *retval = *((u32 *)(context.ret.pointer + 8)); | |
204 | kfree(context.ret.pointer); | |
63f10f0f | 205 | } |
63f10f0f KK |
206 | return status; |
207 | } | |
208 | ||
ab8e8957 RW |
209 | static acpi_status acpi_pci_query_osc(struct acpi_pci_root *root, |
210 | u32 support, | |
211 | u32 *control) | |
63f10f0f KK |
212 | { |
213 | acpi_status status; | |
ab8e8957 RW |
214 | u32 result, capbuf[3]; |
215 | ||
216 | support &= OSC_PCI_SUPPORT_MASKS; | |
217 | support |= root->osc_support_set; | |
63f10f0f | 218 | |
b938a229 BH |
219 | capbuf[OSC_QUERY_DWORD] = OSC_QUERY_ENABLE; |
220 | capbuf[OSC_SUPPORT_DWORD] = support; | |
ab8e8957 RW |
221 | if (control) { |
222 | *control &= OSC_PCI_CONTROL_MASKS; | |
b938a229 | 223 | capbuf[OSC_CONTROL_DWORD] = *control | root->osc_control_set; |
ab8e8957 | 224 | } else { |
545d6e18 | 225 | /* Run _OSC query only with existing controls. */ |
b938a229 | 226 | capbuf[OSC_CONTROL_DWORD] = root->osc_control_set; |
ab8e8957 | 227 | } |
63f10f0f KK |
228 | |
229 | status = acpi_pci_run_osc(root->device->handle, capbuf, &result); | |
230 | if (ACPI_SUCCESS(status)) { | |
ab8e8957 | 231 | root->osc_support_set = support; |
2b8fd918 | 232 | if (control) |
ab8e8957 | 233 | *control = result; |
63f10f0f KK |
234 | } |
235 | return status; | |
236 | } | |
237 | ||
238 | static acpi_status acpi_pci_osc_support(struct acpi_pci_root *root, u32 flags) | |
239 | { | |
240 | acpi_status status; | |
63f10f0f | 241 | |
63f10f0f | 242 | mutex_lock(&osc_lock); |
ab8e8957 | 243 | status = acpi_pci_query_osc(root, flags, NULL); |
63f10f0f KK |
244 | mutex_unlock(&osc_lock); |
245 | return status; | |
246 | } | |
247 | ||
76d56de5 | 248 | struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle) |
63f10f0f KK |
249 | { |
250 | struct acpi_pci_root *root; | |
cd4faf9c | 251 | struct acpi_device *device; |
c1aec834 | 252 | |
cd4faf9c TI |
253 | if (acpi_bus_get_device(handle, &device) || |
254 | acpi_match_device_ids(device, root_device_ids)) | |
255 | return NULL; | |
256 | ||
257 | root = acpi_driver_data(device); | |
258 | ||
259 | return root; | |
63f10f0f | 260 | } |
76d56de5 | 261 | EXPORT_SYMBOL_GPL(acpi_pci_find_root); |
63f10f0f | 262 | |
2f7bbceb AC |
263 | struct acpi_handle_node { |
264 | struct list_head node; | |
265 | acpi_handle handle; | |
266 | }; | |
267 | ||
268 | /** | |
269 | * acpi_get_pci_dev - convert ACPI CA handle to struct pci_dev | |
270 | * @handle: the handle in question | |
271 | * | |
272 | * Given an ACPI CA handle, the desired PCI device is located in the | |
273 | * list of PCI devices. | |
274 | * | |
275 | * If the device is found, its reference count is increased and this | |
276 | * function returns a pointer to its data structure. The caller must | |
277 | * decrement the reference count by calling pci_dev_put(). | |
278 | * If no device is found, %NULL is returned. | |
279 | */ | |
280 | struct pci_dev *acpi_get_pci_dev(acpi_handle handle) | |
281 | { | |
282 | int dev, fn; | |
283 | unsigned long long adr; | |
284 | acpi_status status; | |
285 | acpi_handle phandle; | |
286 | struct pci_bus *pbus; | |
287 | struct pci_dev *pdev = NULL; | |
288 | struct acpi_handle_node *node, *tmp; | |
289 | struct acpi_pci_root *root; | |
290 | LIST_HEAD(device_list); | |
291 | ||
292 | /* | |
293 | * Walk up the ACPI CA namespace until we reach a PCI root bridge. | |
294 | */ | |
295 | phandle = handle; | |
296 | while (!acpi_is_root_bridge(phandle)) { | |
297 | node = kzalloc(sizeof(struct acpi_handle_node), GFP_KERNEL); | |
298 | if (!node) | |
299 | goto out; | |
300 | ||
301 | INIT_LIST_HEAD(&node->node); | |
302 | node->handle = phandle; | |
303 | list_add(&node->node, &device_list); | |
304 | ||
305 | status = acpi_get_parent(phandle, &phandle); | |
306 | if (ACPI_FAILURE(status)) | |
307 | goto out; | |
308 | } | |
309 | ||
310 | root = acpi_pci_find_root(phandle); | |
311 | if (!root) | |
312 | goto out; | |
313 | ||
314 | pbus = root->bus; | |
315 | ||
316 | /* | |
317 | * Now, walk back down the PCI device tree until we return to our | |
318 | * original handle. Assumes that everything between the PCI root | |
319 | * bridge and the device we're looking for must be a P2P bridge. | |
320 | */ | |
321 | list_for_each_entry(node, &device_list, node) { | |
322 | acpi_handle hnd = node->handle; | |
323 | status = acpi_evaluate_integer(hnd, "_ADR", NULL, &adr); | |
324 | if (ACPI_FAILURE(status)) | |
325 | goto out; | |
326 | dev = (adr >> 16) & 0xffff; | |
327 | fn = adr & 0xffff; | |
328 | ||
329 | pdev = pci_get_slot(pbus, PCI_DEVFN(dev, fn)); | |
412af978 | 330 | if (!pdev || hnd == handle) |
2f7bbceb AC |
331 | break; |
332 | ||
333 | pbus = pdev->subordinate; | |
334 | pci_dev_put(pdev); | |
497fb54f RW |
335 | |
336 | /* | |
337 | * This function may be called for a non-PCI device that has a | |
338 | * PCI parent (eg. a disk under a PCI SATA controller). In that | |
339 | * case pdev->subordinate will be NULL for the parent. | |
340 | */ | |
341 | if (!pbus) { | |
342 | dev_dbg(&pdev->dev, "Not a PCI-to-PCI bridge\n"); | |
343 | pdev = NULL; | |
344 | break; | |
345 | } | |
2f7bbceb AC |
346 | } |
347 | out: | |
348 | list_for_each_entry_safe(node, tmp, &device_list, node) | |
349 | kfree(node); | |
350 | ||
351 | return pdev; | |
352 | } | |
353 | EXPORT_SYMBOL_GPL(acpi_get_pci_dev); | |
354 | ||
63f10f0f | 355 | /** |
75fb60f2 RW |
356 | * acpi_pci_osc_control_set - Request control of PCI root _OSC features. |
357 | * @handle: ACPI handle of a PCI root bridge (or PCIe Root Complex). | |
358 | * @mask: Mask of _OSC bits to request control of, place to store control mask. | |
359 | * @req: Mask of _OSC bits the control of is essential to the caller. | |
63f10f0f | 360 | * |
75fb60f2 RW |
361 | * Run _OSC query for @mask and if that is successful, compare the returned |
362 | * mask of control bits with @req. If all of the @req bits are set in the | |
363 | * returned mask, run _OSC request for it. | |
364 | * | |
365 | * The variable at the @mask address may be modified regardless of whether or | |
366 | * not the function returns success. On success it will contain the mask of | |
367 | * _OSC bits the BIOS has granted control of, but its contents are meaningless | |
368 | * on failure. | |
63f10f0f | 369 | **/ |
75fb60f2 | 370 | acpi_status acpi_pci_osc_control_set(acpi_handle handle, u32 *mask, u32 req) |
63f10f0f | 371 | { |
75fb60f2 | 372 | struct acpi_pci_root *root; |
4ffe6e54 | 373 | acpi_status status = AE_OK; |
75fb60f2 | 374 | u32 ctrl, capbuf[3]; |
63f10f0f | 375 | |
75fb60f2 RW |
376 | if (!mask) |
377 | return AE_BAD_PARAMETER; | |
378 | ||
379 | ctrl = *mask & OSC_PCI_CONTROL_MASKS; | |
380 | if ((ctrl & req) != req) | |
63f10f0f KK |
381 | return AE_TYPE; |
382 | ||
383 | root = acpi_pci_find_root(handle); | |
384 | if (!root) | |
385 | return AE_NOT_EXIST; | |
386 | ||
387 | mutex_lock(&osc_lock); | |
75fb60f2 RW |
388 | |
389 | *mask = ctrl | root->osc_control_set; | |
63f10f0f | 390 | /* No need to evaluate _OSC if the control was already granted. */ |
75fb60f2 | 391 | if ((root->osc_control_set & ctrl) == ctrl) |
63f10f0f KK |
392 | goto out; |
393 | ||
75fb60f2 RW |
394 | /* Need to check the available controls bits before requesting them. */ |
395 | while (*mask) { | |
396 | status = acpi_pci_query_osc(root, root->osc_support_set, mask); | |
397 | if (ACPI_FAILURE(status)) | |
398 | goto out; | |
399 | if (ctrl == *mask) | |
400 | break; | |
955f14b4 BH |
401 | decode_osc_control(root, "platform does not support", |
402 | ctrl & ~(*mask)); | |
75fb60f2 RW |
403 | ctrl = *mask; |
404 | } | |
2b8fd918 | 405 | |
75fb60f2 | 406 | if ((ctrl & req) != req) { |
955f14b4 BH |
407 | decode_osc_control(root, "not requesting control; platform does not support", |
408 | req & ~(ctrl)); | |
63f10f0f KK |
409 | status = AE_SUPPORT; |
410 | goto out; | |
411 | } | |
412 | ||
b938a229 BH |
413 | capbuf[OSC_QUERY_DWORD] = 0; |
414 | capbuf[OSC_SUPPORT_DWORD] = root->osc_support_set; | |
415 | capbuf[OSC_CONTROL_DWORD] = ctrl; | |
75fb60f2 | 416 | status = acpi_pci_run_osc(handle, capbuf, mask); |
63f10f0f | 417 | if (ACPI_SUCCESS(status)) |
75fb60f2 | 418 | root->osc_control_set = *mask; |
63f10f0f KK |
419 | out: |
420 | mutex_unlock(&osc_lock); | |
421 | return status; | |
422 | } | |
9f5404d8 | 423 | EXPORT_SYMBOL(acpi_pci_osc_control_set); |
63f10f0f | 424 | |
c238252f SK |
425 | static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm, |
426 | bool is_pcie) | |
1da177e4 | 427 | { |
955f14b4 | 428 | u32 support, control, requested; |
3e43abb0 BH |
429 | acpi_status status; |
430 | struct acpi_device *device = root->device; | |
bfe2414a | 431 | acpi_handle handle = device->handle; |
1da177e4 | 432 | |
7bc5a2ba MG |
433 | /* |
434 | * Apple always return failure on _OSC calls when _OSI("Darwin") has | |
435 | * been called successfully. We know the feature set supported by the | |
436 | * platform, so avoid calling _OSC at all | |
437 | */ | |
630b3aff | 438 | if (x86_apple_machine) { |
7bc5a2ba MG |
439 | root->osc_control_set = ~OSC_PCI_EXPRESS_PME_CONTROL; |
440 | decode_osc_control(root, "OS assumes control of", | |
441 | root->osc_control_set); | |
442 | return; | |
443 | } | |
444 | ||
2786f6e3 | 445 | /* |
990a7ac5 AP |
446 | * All supported architectures that use ACPI have support for |
447 | * PCI domains, so we indicate this in _OSC support capabilities. | |
2786f6e3 | 448 | */ |
65afe916 | 449 | support = OSC_PCI_SEGMENT_GROUPS_SUPPORT; |
ba11edc6 | 450 | support |= OSC_PCI_HPX_TYPE_3_SUPPORT; |
8c33f51d | 451 | if (pci_ext_cfg_avail()) |
b8eb67fc | 452 | support |= OSC_PCI_EXT_CONFIG_SUPPORT; |
1b2a7be6 | 453 | if (pcie_aspm_support_enabled()) |
b8eb67fc | 454 | support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT; |
07ae95f9 | 455 | if (pci_msi_enabled()) |
b8eb67fc | 456 | support |= OSC_PCI_MSI_SUPPORT; |
955f14b4 BH |
457 | |
458 | decode_osc_support(root, "OS supports", support); | |
1b2a7be6 BH |
459 | status = acpi_pci_osc_support(root, support); |
460 | if (ACPI_FAILURE(status)) { | |
c238252f SK |
461 | *no_aspm = 1; |
462 | ||
463 | /* _OSC is optional for PCI host bridges */ | |
464 | if ((status == AE_NOT_FOUND) && !is_pcie) | |
465 | return; | |
466 | ||
1ad61b61 SK |
467 | dev_info(&device->dev, "_OSC failed (%s)%s\n", |
468 | acpi_format_exception(status), | |
469 | pcie_aspm_support_enabled() ? "; disabling ASPM" : ""); | |
65afe916 | 470 | return; |
2d9c8677 | 471 | } |
b8178f13 | 472 | |
43613a1f BH |
473 | if (pcie_ports_disabled) { |
474 | dev_info(&device->dev, "PCIe port services disabled; not requesting _OSC control\n"); | |
475 | return; | |
476 | } | |
477 | ||
de189662 | 478 | if ((support & ACPI_PCIE_REQ_SUPPORT) != ACPI_PCIE_REQ_SUPPORT) { |
955f14b4 BH |
479 | decode_osc_support(root, "not requesting OS control; OS requires", |
480 | ACPI_PCIE_REQ_SUPPORT); | |
de189662 BH |
481 | return; |
482 | } | |
483 | ||
484 | control = OSC_PCI_EXPRESS_CAPABILITY_CONTROL | |
de189662 BH |
485 | | OSC_PCI_EXPRESS_PME_CONTROL; |
486 | ||
af8bb9f8 BH |
487 | if (IS_ENABLED(CONFIG_PCIEASPM)) |
488 | control |= OSC_PCI_EXPRESS_LTR_CONTROL; | |
489 | ||
408fec36 MW |
490 | if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE)) |
491 | control |= OSC_PCI_EXPRESS_NATIVE_HP_CONTROL; | |
492 | ||
1df81a6d MW |
493 | if (IS_ENABLED(CONFIG_HOTPLUG_PCI_SHPC)) |
494 | control |= OSC_PCI_SHPC_NATIVE_HP_CONTROL; | |
495 | ||
de189662 BH |
496 | if (pci_aer_available()) { |
497 | if (aer_acpi_firmware_first()) | |
955f14b4 BH |
498 | dev_info(&device->dev, |
499 | "PCIe AER handled by firmware\n"); | |
de189662 BH |
500 | else |
501 | control |= OSC_PCI_EXPRESS_AER_CONTROL; | |
502 | } | |
415e12b2 | 503 | |
955f14b4 | 504 | requested = control; |
de189662 BH |
505 | status = acpi_pci_osc_control_set(handle, &control, |
506 | OSC_PCI_EXPRESS_CAPABILITY_CONTROL); | |
507 | if (ACPI_SUCCESS(status)) { | |
955f14b4 | 508 | decode_osc_control(root, "OS now controls", control); |
de189662 | 509 | if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) { |
3dc48af3 | 510 | /* |
387d3757 MG |
511 | * We have ASPM control, but the FADT indicates that |
512 | * it's unsupported. Leave existing configuration | |
513 | * intact and prevent the OS from touching it. | |
3dc48af3 | 514 | */ |
387d3757 MG |
515 | dev_info(&device->dev, "FADT indicates ASPM is unsupported, using BIOS configuration\n"); |
516 | *no_aspm = 1; | |
eca67315 | 517 | } |
a246670d | 518 | } else { |
955f14b4 BH |
519 | decode_osc_control(root, "OS requested", requested); |
520 | decode_osc_control(root, "platform willing to grant", control); | |
521 | dev_info(&device->dev, "_OSC failed (%s); disabling ASPM\n", | |
522 | acpi_format_exception(status)); | |
523 | ||
de189662 BH |
524 | /* |
525 | * We want to disable ASPM here, but aspm_disabled | |
526 | * needs to remain in its state from boot so that we | |
527 | * properly handle PCIe 1.1 devices. So we set this | |
528 | * flag here, to defer the action until after the ACPI | |
529 | * root scan. | |
530 | */ | |
531 | *no_aspm = 1; | |
415e12b2 | 532 | } |
3e43abb0 BH |
533 | } |
534 | ||
00c43b96 RW |
535 | static int acpi_pci_root_add(struct acpi_device *device, |
536 | const struct acpi_device_id *not_used) | |
1da177e4 | 537 | { |
f5eebbe1 BH |
538 | unsigned long long segment, bus; |
539 | acpi_status status; | |
540 | int result; | |
541 | struct acpi_pci_root *root; | |
bfe2414a | 542 | acpi_handle handle = device->handle; |
387d3757 | 543 | int no_aspm = 0; |
9762b33d | 544 | bool hotadd = system_state == SYSTEM_RUNNING; |
c238252f | 545 | bool is_pcie; |
1da177e4 | 546 | |
6ad95513 BH |
547 | root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL); |
548 | if (!root) | |
549 | return -ENOMEM; | |
550 | ||
f5eebbe1 | 551 | segment = 0; |
bfe2414a | 552 | status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL, |
f5eebbe1 BH |
553 | &segment); |
554 | if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) { | |
6dc7d22c | 555 | dev_err(&device->dev, "can't evaluate _SEG\n"); |
6ad95513 BH |
556 | result = -ENODEV; |
557 | goto end; | |
f5eebbe1 | 558 | } |
1da177e4 | 559 | |
f5eebbe1 | 560 | /* Check _CRS first, then _BBN. If no _BBN, default to zero. */ |
6ad95513 | 561 | root->secondary.flags = IORESOURCE_BUS; |
bfe2414a | 562 | status = try_get_root_bridge_busnr(handle, &root->secondary); |
f5eebbe1 | 563 | if (ACPI_FAILURE(status)) { |
6ad95513 BH |
564 | /* |
565 | * We need both the start and end of the downstream bus range | |
566 | * to interpret _CBA (MMCONFIG base address), so it really is | |
567 | * supposed to be in _CRS. If we don't find it there, all we | |
568 | * can do is assume [_BBN-0xFF] or [0-0xFF]. | |
569 | */ | |
570 | root->secondary.end = 0xFF; | |
6dc7d22c JL |
571 | dev_warn(&device->dev, |
572 | FW_BUG "no secondary bus range in _CRS\n"); | |
bfe2414a | 573 | status = acpi_evaluate_integer(handle, METHOD_NAME__BBN, |
e545b55a | 574 | NULL, &bus); |
6ad95513 BH |
575 | if (ACPI_SUCCESS(status)) |
576 | root->secondary.start = bus; | |
577 | else if (status == AE_NOT_FOUND) | |
578 | root->secondary.start = 0; | |
579 | else { | |
6dc7d22c | 580 | dev_err(&device->dev, "can't evaluate _BBN\n"); |
6ad95513 BH |
581 | result = -ENODEV; |
582 | goto end; | |
f5eebbe1 BH |
583 | } |
584 | } | |
1da177e4 | 585 | |
32917e5b | 586 | root->device = device; |
0705495d | 587 | root->segment = segment & 0xFFFF; |
1da177e4 LT |
588 | strcpy(acpi_device_name(device), ACPI_PCI_ROOT_DEVICE_NAME); |
589 | strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS); | |
db89b4f0 | 590 | device->driver_data = root; |
1da177e4 | 591 | |
864b94ad JL |
592 | if (hotadd && dmar_device_add(handle)) { |
593 | result = -ENXIO; | |
594 | goto end; | |
595 | } | |
596 | ||
6dc7d22c | 597 | pr_info(PREFIX "%s [%s] (domain %04x %pR)\n", |
4be44fcd | 598 | acpi_device_name(device), acpi_device_bid(device), |
6ad95513 | 599 | root->segment, &root->secondary); |
1da177e4 | 600 | |
bfe2414a | 601 | root->mcfg_addr = acpi_pci_root_get_mcfg_addr(handle); |
1da177e4 | 602 | |
c238252f SK |
603 | is_pcie = strcmp(acpi_device_hid(device), "PNP0A08") == 0; |
604 | negotiate_os_control(root, &no_aspm, is_pcie); | |
415e12b2 | 605 | |
3dc48af3 NH |
606 | /* |
607 | * TBD: Need PCI interface for enumeration/configuration of roots. | |
608 | */ | |
609 | ||
610 | /* | |
611 | * Scan the Root Bridge | |
612 | * -------------------- | |
613 | * Must do this prior to any attempt to bind the root device, as the | |
614 | * PCI namespace does not get created until this call is made (and | |
615 | * thus the root bridge's pci_dev does not exist). | |
616 | */ | |
617 | root->bus = pci_acpi_scan_root(root); | |
618 | if (!root->bus) { | |
619 | dev_err(&device->dev, | |
620 | "Bus %04x:%02x not present in PCI namespace\n", | |
621 | root->segment, (unsigned int)root->secondary.start); | |
f516bde5 | 622 | device->driver_data = NULL; |
3dc48af3 | 623 | result = -ENODEV; |
864b94ad | 624 | goto remove_dmar; |
3dc48af3 NH |
625 | } |
626 | ||
3dc48af3 NH |
627 | if (no_aspm) |
628 | pcie_no_aspm(); | |
629 | ||
c072530f | 630 | pci_acpi_add_bus_pm_notifier(device); |
de3ef1eb | 631 | device_set_wakeup_capable(root->bus->bridge, device->wakeup.flags.valid); |
b67ea761 | 632 | |
864b94ad | 633 | if (hotadd) { |
3c449ed0 | 634 | pcibios_resource_survey_bus(root->bus); |
39772038 | 635 | pci_assign_unassigned_root_bus_resources(root->bus); |
584c5c42 RW |
636 | /* |
637 | * This is only called for the hotadd case. For the boot-time | |
638 | * case, we need to wait until after PCI initialization in | |
639 | * order to deal with IOAPICs mapped in on a PCI BAR. | |
640 | * | |
641 | * This is currently x86-specific, because acpi_ioapic_add() | |
642 | * is an empty function without CONFIG_ACPI_HOTPLUG_IOAPIC. | |
643 | * And CONFIG_ACPI_HOTPLUG_IOAPIC depends on CONFIG_X86_IO_APIC | |
644 | * (see drivers/acpi/Kconfig). | |
645 | */ | |
fe7bd58f | 646 | acpi_ioapic_add(root->device->handle); |
516ca223 | 647 | } |
62a08c5a | 648 | |
7a3bb55e | 649 | pci_lock_rescan_remove(); |
caf420c6 | 650 | pci_bus_add_devices(root->bus); |
7a3bb55e | 651 | pci_unlock_rescan_remove(); |
00c43b96 | 652 | return 1; |
47525cda | 653 | |
864b94ad JL |
654 | remove_dmar: |
655 | if (hotadd) | |
656 | dmar_device_remove(handle); | |
47525cda RW |
657 | end: |
658 | kfree(root); | |
659 | return result; | |
c431ada4 | 660 | } |
1da177e4 | 661 | |
00c43b96 | 662 | static void acpi_pci_root_remove(struct acpi_device *device) |
1da177e4 | 663 | { |
caf420c6 | 664 | struct acpi_pci_root *root = acpi_driver_data(device); |
c8e9afb1 | 665 | |
7a3bb55e RW |
666 | pci_lock_rescan_remove(); |
667 | ||
9738a1fd YL |
668 | pci_stop_root_bus(root->bus); |
669 | ||
f2ae5da7 | 670 | pci_ioapic_remove(root); |
de3ef1eb | 671 | device_set_wakeup_capable(root->bus->bridge, false); |
b67ea761 RW |
672 | pci_acpi_remove_bus_pm_notifier(device); |
673 | ||
9738a1fd | 674 | pci_remove_root_bus(root->bus); |
f2ae5da7 | 675 | WARN_ON(acpi_ioapic_remove(root)); |
9738a1fd | 676 | |
864b94ad JL |
677 | dmar_device_remove(device->handle); |
678 | ||
7a3bb55e RW |
679 | pci_unlock_rescan_remove(); |
680 | ||
1da177e4 | 681 | kfree(root); |
1da177e4 LT |
682 | } |
683 | ||
2c204383 JL |
684 | /* |
685 | * Following code to support acpi_pci_root_create() is copied from | |
686 | * arch/x86/pci/acpi.c and modified so it could be reused by x86, IA64 | |
687 | * and ARM64. | |
688 | */ | |
689 | static void acpi_pci_root_validate_resources(struct device *dev, | |
690 | struct list_head *resources, | |
691 | unsigned long type) | |
692 | { | |
693 | LIST_HEAD(list); | |
694 | struct resource *res1, *res2, *root = NULL; | |
695 | struct resource_entry *tmp, *entry, *entry2; | |
696 | ||
697 | BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0); | |
698 | root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource; | |
699 | ||
700 | list_splice_init(resources, &list); | |
701 | resource_list_for_each_entry_safe(entry, tmp, &list) { | |
702 | bool free = false; | |
703 | resource_size_t end; | |
704 | ||
705 | res1 = entry->res; | |
706 | if (!(res1->flags & type)) | |
707 | goto next; | |
708 | ||
709 | /* Exclude non-addressable range or non-addressable portion */ | |
710 | end = min(res1->end, root->end); | |
711 | if (end <= res1->start) { | |
712 | dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n", | |
713 | res1); | |
714 | free = true; | |
715 | goto next; | |
716 | } else if (res1->end != end) { | |
717 | dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n", | |
718 | res1, (unsigned long long)end + 1, | |
719 | (unsigned long long)res1->end); | |
720 | res1->end = end; | |
721 | } | |
722 | ||
723 | resource_list_for_each_entry(entry2, resources) { | |
724 | res2 = entry2->res; | |
725 | if (!(res2->flags & type)) | |
726 | continue; | |
727 | ||
728 | /* | |
729 | * I don't like throwing away windows because then | |
730 | * our resources no longer match the ACPI _CRS, but | |
731 | * the kernel resource tree doesn't allow overlaps. | |
732 | */ | |
733 | if (resource_overlaps(res1, res2)) { | |
734 | res2->start = min(res1->start, res2->start); | |
735 | res2->end = max(res1->end, res2->end); | |
736 | dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n", | |
737 | res2, res1); | |
738 | free = true; | |
739 | goto next; | |
740 | } | |
741 | } | |
742 | ||
743 | next: | |
744 | resource_list_del(entry); | |
745 | if (free) | |
746 | resource_list_free_entry(entry); | |
747 | else | |
748 | resource_list_add_tail(entry, resources); | |
749 | } | |
750 | } | |
751 | ||
fcfaab30 GP |
752 | static void acpi_pci_root_remap_iospace(struct fwnode_handle *fwnode, |
753 | struct resource_entry *entry) | |
0a70abb3 J |
754 | { |
755 | #ifdef PCI_IOBASE | |
756 | struct resource *res = entry->res; | |
757 | resource_size_t cpu_addr = res->start; | |
758 | resource_size_t pci_addr = cpu_addr - entry->offset; | |
759 | resource_size_t length = resource_size(res); | |
760 | unsigned long port; | |
761 | ||
fcfaab30 | 762 | if (pci_register_io_range(fwnode, cpu_addr, length)) |
0a70abb3 J |
763 | goto err; |
764 | ||
765 | port = pci_address_to_pio(cpu_addr); | |
766 | if (port == (unsigned long)-1) | |
767 | goto err; | |
768 | ||
769 | res->start = port; | |
770 | res->end = port + length - 1; | |
771 | entry->offset = port - pci_addr; | |
772 | ||
773 | if (pci_remap_iospace(res, cpu_addr) < 0) | |
774 | goto err; | |
775 | ||
776 | pr_info("Remapped I/O %pa to %pR\n", &cpu_addr, res); | |
777 | return; | |
778 | err: | |
779 | res->flags |= IORESOURCE_DISABLED; | |
780 | #endif | |
781 | } | |
782 | ||
2c204383 JL |
783 | int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info) |
784 | { | |
785 | int ret; | |
786 | struct list_head *list = &info->resources; | |
787 | struct acpi_device *device = info->bridge; | |
788 | struct resource_entry *entry, *tmp; | |
789 | unsigned long flags; | |
790 | ||
791 | flags = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT; | |
792 | ret = acpi_dev_get_resources(device, list, | |
793 | acpi_dev_filter_resource_type_cb, | |
794 | (void *)flags); | |
795 | if (ret < 0) | |
796 | dev_warn(&device->dev, | |
797 | "failed to parse _CRS method, error code %d\n", ret); | |
798 | else if (ret == 0) | |
799 | dev_dbg(&device->dev, | |
800 | "no IO and memory resources present in _CRS\n"); | |
801 | else { | |
802 | resource_list_for_each_entry_safe(entry, tmp, list) { | |
0a70abb3 | 803 | if (entry->res->flags & IORESOURCE_IO) |
fcfaab30 GP |
804 | acpi_pci_root_remap_iospace(&device->fwnode, |
805 | entry); | |
0a70abb3 | 806 | |
2c204383 JL |
807 | if (entry->res->flags & IORESOURCE_DISABLED) |
808 | resource_list_destroy_entry(entry); | |
809 | else | |
810 | entry->res->name = info->name; | |
811 | } | |
812 | acpi_pci_root_validate_resources(&device->dev, list, | |
813 | IORESOURCE_MEM); | |
814 | acpi_pci_root_validate_resources(&device->dev, list, | |
815 | IORESOURCE_IO); | |
816 | } | |
817 | ||
818 | return ret; | |
819 | } | |
820 | ||
821 | static void pci_acpi_root_add_resources(struct acpi_pci_root_info *info) | |
822 | { | |
823 | struct resource_entry *entry, *tmp; | |
824 | struct resource *res, *conflict, *root = NULL; | |
825 | ||
826 | resource_list_for_each_entry_safe(entry, tmp, &info->resources) { | |
827 | res = entry->res; | |
828 | if (res->flags & IORESOURCE_MEM) | |
829 | root = &iomem_resource; | |
830 | else if (res->flags & IORESOURCE_IO) | |
831 | root = &ioport_resource; | |
832 | else | |
833 | continue; | |
834 | ||
727ae8be LJ |
835 | /* |
836 | * Some legacy x86 host bridge drivers use iomem_resource and | |
837 | * ioport_resource as default resource pool, skip it. | |
838 | */ | |
839 | if (res == root) | |
840 | continue; | |
841 | ||
2c204383 JL |
842 | conflict = insert_resource_conflict(root, res); |
843 | if (conflict) { | |
844 | dev_info(&info->bridge->dev, | |
845 | "ignoring host bridge window %pR (conflicts with %s %pR)\n", | |
846 | res, conflict->name, conflict); | |
847 | resource_list_destroy_entry(entry); | |
848 | } | |
849 | } | |
850 | } | |
851 | ||
852 | static void __acpi_pci_root_release_info(struct acpi_pci_root_info *info) | |
853 | { | |
854 | struct resource *res; | |
855 | struct resource_entry *entry, *tmp; | |
856 | ||
857 | if (!info) | |
858 | return; | |
859 | ||
860 | resource_list_for_each_entry_safe(entry, tmp, &info->resources) { | |
861 | res = entry->res; | |
862 | if (res->parent && | |
863 | (res->flags & (IORESOURCE_MEM | IORESOURCE_IO))) | |
864 | release_resource(res); | |
865 | resource_list_destroy_entry(entry); | |
866 | } | |
867 | ||
868 | info->ops->release_info(info); | |
869 | } | |
870 | ||
871 | static void acpi_pci_root_release_info(struct pci_host_bridge *bridge) | |
872 | { | |
873 | struct resource *res; | |
874 | struct resource_entry *entry; | |
875 | ||
876 | resource_list_for_each_entry(entry, &bridge->windows) { | |
877 | res = entry->res; | |
0a70abb3 J |
878 | if (res->flags & IORESOURCE_IO) |
879 | pci_unmap_iospace(res); | |
2c204383 JL |
880 | if (res->parent && |
881 | (res->flags & (IORESOURCE_MEM | IORESOURCE_IO))) | |
882 | release_resource(res); | |
883 | } | |
884 | __acpi_pci_root_release_info(bridge->release_data); | |
885 | } | |
886 | ||
887 | struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root, | |
888 | struct acpi_pci_root_ops *ops, | |
889 | struct acpi_pci_root_info *info, | |
890 | void *sysdata) | |
891 | { | |
892 | int ret, busnum = root->secondary.start; | |
893 | struct acpi_device *device = root->device; | |
894 | int node = acpi_get_node(device->handle); | |
895 | struct pci_bus *bus; | |
02bfeb48 | 896 | struct pci_host_bridge *host_bridge; |
2c204383 JL |
897 | |
898 | info->root = root; | |
899 | info->bridge = device; | |
900 | info->ops = ops; | |
901 | INIT_LIST_HEAD(&info->resources); | |
902 | snprintf(info->name, sizeof(info->name), "PCI Bus %04x:%02x", | |
903 | root->segment, busnum); | |
904 | ||
905 | if (ops->init_info && ops->init_info(info)) | |
906 | goto out_release_info; | |
907 | if (ops->prepare_resources) | |
908 | ret = ops->prepare_resources(info); | |
909 | else | |
910 | ret = acpi_pci_probe_root_resources(info); | |
911 | if (ret < 0) | |
912 | goto out_release_info; | |
913 | ||
914 | pci_acpi_root_add_resources(info); | |
915 | pci_add_resource(&info->resources, &root->secondary); | |
916 | bus = pci_create_root_bus(NULL, busnum, ops->pci_ops, | |
917 | sysdata, &info->resources); | |
918 | if (!bus) | |
919 | goto out_release_info; | |
920 | ||
02bfeb48 BH |
921 | host_bridge = to_pci_host_bridge(bus->bridge); |
922 | if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL)) | |
9310f0dc | 923 | host_bridge->native_pcie_hotplug = 0; |
1df81a6d MW |
924 | if (!(root->osc_control_set & OSC_PCI_SHPC_NATIVE_HP_CONTROL)) |
925 | host_bridge->native_shpc_hotplug = 0; | |
02bfeb48 BH |
926 | if (!(root->osc_control_set & OSC_PCI_EXPRESS_AER_CONTROL)) |
927 | host_bridge->native_aer = 0; | |
928 | if (!(root->osc_control_set & OSC_PCI_EXPRESS_PME_CONTROL)) | |
929 | host_bridge->native_pme = 0; | |
af8bb9f8 BH |
930 | if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL)) |
931 | host_bridge->native_ltr = 0; | |
02bfeb48 | 932 | |
2c204383 | 933 | pci_scan_child_bus(bus); |
02bfeb48 BH |
934 | pci_set_host_bridge_release(host_bridge, acpi_pci_root_release_info, |
935 | info); | |
2c204383 JL |
936 | if (node != NUMA_NO_NODE) |
937 | dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node); | |
938 | return bus; | |
939 | ||
940 | out_release_info: | |
941 | __acpi_pci_root_release_info(info); | |
942 | return NULL; | |
943 | } | |
944 | ||
00c43b96 | 945 | void __init acpi_pci_root_init(void) |
1da177e4 | 946 | { |
d3072e6a | 947 | acpi_hest_init(); |
3338db00 | 948 | if (acpi_pci_disabled) |
668192b6 | 949 | return; |
668192b6 | 950 | |
3338db00 RW |
951 | pci_acpi_crs_quirks(); |
952 | acpi_scan_add_handler_with_hotplug(&pci_root_handler, "pci_root"); | |
668192b6 | 953 | } |