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CommitLineData
1da177e4
LT
1/*
2 * pci_root.c - ACPI PCI Root Bridge Driver ($Revision: 40 $)
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 *
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or (at
12 * your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
1da177e4
LT
19 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
20 */
21
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/init.h>
25#include <linux/types.h>
d0020f65 26#include <linux/mutex.h>
1da177e4 27#include <linux/pm.h>
b67ea761 28#include <linux/pm_runtime.h>
1da177e4 29#include <linux/pci.h>
990a7ac5 30#include <linux/pci-acpi.h>
eca67315 31#include <linux/pci-aspm.h>
864b94ad 32#include <linux/dmar.h>
1da177e4 33#include <linux/acpi.h>
5a0e3ad6 34#include <linux/slab.h>
7bc5a2ba 35#include <linux/dmi.h>
630b3aff 36#include <linux/platform_data/x86/apple.h>
8b48463f 37#include <acpi/apei.h> /* for acpi_hest_init() */
1da177e4 38
ace8238b
RW
39#include "internal.h"
40
1da177e4 41#define _COMPONENT ACPI_PCI_COMPONENT
f52fd66d 42ACPI_MODULE_NAME("pci_root");
1da177e4 43#define ACPI_PCI_ROOT_CLASS "pci_bridge"
1da177e4 44#define ACPI_PCI_ROOT_DEVICE_NAME "PCI Root Bridge"
00c43b96
RW
45static int acpi_pci_root_add(struct acpi_device *device,
46 const struct acpi_device_id *not_used);
47static void acpi_pci_root_remove(struct acpi_device *device);
1da177e4 48
3338db00
RW
49static int acpi_pci_root_scan_dependent(struct acpi_device *adev)
50{
1f7c164b 51 acpiphp_check_host_bridge(adev);
3338db00
RW
52 return 0;
53}
54
7dab9ef4
BH
55#define ACPI_PCIE_REQ_SUPPORT (OSC_PCI_EXT_CONFIG_SUPPORT \
56 | OSC_PCI_ASPM_SUPPORT \
57 | OSC_PCI_CLOCK_PM_SUPPORT \
58 | OSC_PCI_MSI_SUPPORT)
415e12b2 59
c97adf9e 60static const struct acpi_device_id root_device_ids[] = {
1ba90e3a
TR
61 {"PNP0A03", 0},
62 {"", 0},
63};
1ba90e3a 64
00c43b96 65static struct acpi_scan_handler pci_root_handler = {
1ba90e3a 66 .ids = root_device_ids,
00c43b96
RW
67 .attach = acpi_pci_root_add,
68 .detach = acpi_pci_root_remove,
ca499fc8 69 .hotplug = {
3338db00
RW
70 .enabled = true,
71 .scan_dependent = acpi_pci_root_scan_dependent,
ca499fc8 72 },
1da177e4
LT
73};
74
63f10f0f 75static DEFINE_MUTEX(osc_lock);
1da177e4 76
27558203
AC
77/**
78 * acpi_is_root_bridge - determine whether an ACPI CA node is a PCI root bridge
79 * @handle - the ACPI CA node in question.
80 *
81 * Note: we could make this API take a struct acpi_device * instead, but
82 * for now, it's more convenient to operate on an acpi_handle.
83 */
84int acpi_is_root_bridge(acpi_handle handle)
85{
86 int ret;
87 struct acpi_device *device;
88
89 ret = acpi_bus_get_device(handle, &device);
90 if (ret)
91 return 0;
92
93 ret = acpi_match_device_ids(device, root_device_ids);
94 if (ret)
95 return 0;
96 else
97 return 1;
98}
99EXPORT_SYMBOL_GPL(acpi_is_root_bridge);
100
1da177e4 101static acpi_status
4be44fcd 102get_root_bridge_busnr_callback(struct acpi_resource *resource, void *data)
1da177e4 103{
6ad95513 104 struct resource *res = data;
1da177e4 105 struct acpi_resource_address64 address;
f6c1c8ff 106 acpi_status status;
1da177e4 107
f6c1c8ff
BH
108 status = acpi_resource_to_address64(resource, &address);
109 if (ACPI_FAILURE(status))
1da177e4
LT
110 return AE_OK;
111
a45de93e 112 if ((address.address.address_length > 0) &&
6ad95513 113 (address.resource_type == ACPI_BUS_NUMBER_RANGE)) {
a45de93e
LZ
114 res->start = address.address.minimum;
115 res->end = address.address.minimum + address.address.address_length - 1;
6ad95513 116 }
1da177e4
LT
117
118 return AE_OK;
119}
120
f5eebbe1 121static acpi_status try_get_root_bridge_busnr(acpi_handle handle,
6ad95513 122 struct resource *res)
1da177e4
LT
123{
124 acpi_status status;
125
6ad95513 126 res->start = -1;
4be44fcd
LB
127 status =
128 acpi_walk_resources(handle, METHOD_NAME__CRS,
6ad95513 129 get_root_bridge_busnr_callback, res);
1da177e4
LT
130 if (ACPI_FAILURE(status))
131 return status;
6ad95513 132 if (res->start == -1)
1da177e4
LT
133 return AE_ERROR;
134 return AE_OK;
135}
136
955f14b4
BH
137struct pci_osc_bit_struct {
138 u32 bit;
139 char *desc;
140};
141
142static struct pci_osc_bit_struct pci_osc_support_bit[] = {
143 { OSC_PCI_EXT_CONFIG_SUPPORT, "ExtendedConfig" },
144 { OSC_PCI_ASPM_SUPPORT, "ASPM" },
145 { OSC_PCI_CLOCK_PM_SUPPORT, "ClockPM" },
146 { OSC_PCI_SEGMENT_GROUPS_SUPPORT, "Segments" },
147 { OSC_PCI_MSI_SUPPORT, "MSI" },
148};
149
150static struct pci_osc_bit_struct pci_osc_control_bit[] = {
151 { OSC_PCI_EXPRESS_NATIVE_HP_CONTROL, "PCIeHotplug" },
152 { OSC_PCI_SHPC_NATIVE_HP_CONTROL, "SHPCHotplug" },
153 { OSC_PCI_EXPRESS_PME_CONTROL, "PME" },
154 { OSC_PCI_EXPRESS_AER_CONTROL, "AER" },
155 { OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" },
156};
157
158static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word,
159 struct pci_osc_bit_struct *table, int size)
160{
161 char buf[80];
162 int i, len = 0;
163 struct pci_osc_bit_struct *entry;
164
165 buf[0] = '\0';
166 for (i = 0, entry = table; i < size; i++, entry++)
167 if (word & entry->bit)
168 len += snprintf(buf + len, sizeof(buf) - len, "%s%s",
169 len ? " " : "", entry->desc);
170
171 dev_info(&root->device->dev, "_OSC: %s [%s]\n", msg, buf);
172}
173
174static void decode_osc_support(struct acpi_pci_root *root, char *msg, u32 word)
175{
176 decode_osc_bits(root, msg, word, pci_osc_support_bit,
177 ARRAY_SIZE(pci_osc_support_bit));
178}
179
180static void decode_osc_control(struct acpi_pci_root *root, char *msg, u32 word)
181{
182 decode_osc_bits(root, msg, word, pci_osc_control_bit,
183 ARRAY_SIZE(pci_osc_control_bit));
184}
185
3a9622dc 186static u8 pci_osc_uuid_str[] = "33DB4D5B-1FF7-401C-9657-7441C03DD766";
63f10f0f
KK
187
188static acpi_status acpi_pci_run_osc(acpi_handle handle,
189 const u32 *capbuf, u32 *retval)
190{
3a9622dc
SL
191 struct acpi_osc_context context = {
192 .uuid_str = pci_osc_uuid_str,
193 .rev = 1,
194 .cap.length = 12,
195 .cap.pointer = (void *)capbuf,
196 };
63f10f0f 197 acpi_status status;
63f10f0f 198
3a9622dc
SL
199 status = acpi_run_osc(handle, &context);
200 if (ACPI_SUCCESS(status)) {
201 *retval = *((u32 *)(context.ret.pointer + 8));
202 kfree(context.ret.pointer);
63f10f0f 203 }
63f10f0f
KK
204 return status;
205}
206
ab8e8957
RW
207static acpi_status acpi_pci_query_osc(struct acpi_pci_root *root,
208 u32 support,
209 u32 *control)
63f10f0f
KK
210{
211 acpi_status status;
ab8e8957
RW
212 u32 result, capbuf[3];
213
214 support &= OSC_PCI_SUPPORT_MASKS;
215 support |= root->osc_support_set;
63f10f0f 216
b938a229
BH
217 capbuf[OSC_QUERY_DWORD] = OSC_QUERY_ENABLE;
218 capbuf[OSC_SUPPORT_DWORD] = support;
ab8e8957
RW
219 if (control) {
220 *control &= OSC_PCI_CONTROL_MASKS;
b938a229 221 capbuf[OSC_CONTROL_DWORD] = *control | root->osc_control_set;
ab8e8957 222 } else {
545d6e18 223 /* Run _OSC query only with existing controls. */
b938a229 224 capbuf[OSC_CONTROL_DWORD] = root->osc_control_set;
ab8e8957 225 }
63f10f0f
KK
226
227 status = acpi_pci_run_osc(root->device->handle, capbuf, &result);
228 if (ACPI_SUCCESS(status)) {
ab8e8957 229 root->osc_support_set = support;
2b8fd918 230 if (control)
ab8e8957 231 *control = result;
63f10f0f
KK
232 }
233 return status;
234}
235
236static acpi_status acpi_pci_osc_support(struct acpi_pci_root *root, u32 flags)
237{
238 acpi_status status;
63f10f0f 239
63f10f0f 240 mutex_lock(&osc_lock);
ab8e8957 241 status = acpi_pci_query_osc(root, flags, NULL);
63f10f0f
KK
242 mutex_unlock(&osc_lock);
243 return status;
244}
245
76d56de5 246struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle)
63f10f0f
KK
247{
248 struct acpi_pci_root *root;
cd4faf9c 249 struct acpi_device *device;
c1aec834 250
cd4faf9c
TI
251 if (acpi_bus_get_device(handle, &device) ||
252 acpi_match_device_ids(device, root_device_ids))
253 return NULL;
254
255 root = acpi_driver_data(device);
256
257 return root;
63f10f0f 258}
76d56de5 259EXPORT_SYMBOL_GPL(acpi_pci_find_root);
63f10f0f 260
2f7bbceb
AC
261struct acpi_handle_node {
262 struct list_head node;
263 acpi_handle handle;
264};
265
266/**
267 * acpi_get_pci_dev - convert ACPI CA handle to struct pci_dev
268 * @handle: the handle in question
269 *
270 * Given an ACPI CA handle, the desired PCI device is located in the
271 * list of PCI devices.
272 *
273 * If the device is found, its reference count is increased and this
274 * function returns a pointer to its data structure. The caller must
275 * decrement the reference count by calling pci_dev_put().
276 * If no device is found, %NULL is returned.
277 */
278struct pci_dev *acpi_get_pci_dev(acpi_handle handle)
279{
280 int dev, fn;
281 unsigned long long adr;
282 acpi_status status;
283 acpi_handle phandle;
284 struct pci_bus *pbus;
285 struct pci_dev *pdev = NULL;
286 struct acpi_handle_node *node, *tmp;
287 struct acpi_pci_root *root;
288 LIST_HEAD(device_list);
289
290 /*
291 * Walk up the ACPI CA namespace until we reach a PCI root bridge.
292 */
293 phandle = handle;
294 while (!acpi_is_root_bridge(phandle)) {
295 node = kzalloc(sizeof(struct acpi_handle_node), GFP_KERNEL);
296 if (!node)
297 goto out;
298
299 INIT_LIST_HEAD(&node->node);
300 node->handle = phandle;
301 list_add(&node->node, &device_list);
302
303 status = acpi_get_parent(phandle, &phandle);
304 if (ACPI_FAILURE(status))
305 goto out;
306 }
307
308 root = acpi_pci_find_root(phandle);
309 if (!root)
310 goto out;
311
312 pbus = root->bus;
313
314 /*
315 * Now, walk back down the PCI device tree until we return to our
316 * original handle. Assumes that everything between the PCI root
317 * bridge and the device we're looking for must be a P2P bridge.
318 */
319 list_for_each_entry(node, &device_list, node) {
320 acpi_handle hnd = node->handle;
321 status = acpi_evaluate_integer(hnd, "_ADR", NULL, &adr);
322 if (ACPI_FAILURE(status))
323 goto out;
324 dev = (adr >> 16) & 0xffff;
325 fn = adr & 0xffff;
326
327 pdev = pci_get_slot(pbus, PCI_DEVFN(dev, fn));
412af978 328 if (!pdev || hnd == handle)
2f7bbceb
AC
329 break;
330
331 pbus = pdev->subordinate;
332 pci_dev_put(pdev);
497fb54f
RW
333
334 /*
335 * This function may be called for a non-PCI device that has a
336 * PCI parent (eg. a disk under a PCI SATA controller). In that
337 * case pdev->subordinate will be NULL for the parent.
338 */
339 if (!pbus) {
340 dev_dbg(&pdev->dev, "Not a PCI-to-PCI bridge\n");
341 pdev = NULL;
342 break;
343 }
2f7bbceb
AC
344 }
345out:
346 list_for_each_entry_safe(node, tmp, &device_list, node)
347 kfree(node);
348
349 return pdev;
350}
351EXPORT_SYMBOL_GPL(acpi_get_pci_dev);
352
63f10f0f 353/**
75fb60f2
RW
354 * acpi_pci_osc_control_set - Request control of PCI root _OSC features.
355 * @handle: ACPI handle of a PCI root bridge (or PCIe Root Complex).
356 * @mask: Mask of _OSC bits to request control of, place to store control mask.
357 * @req: Mask of _OSC bits the control of is essential to the caller.
63f10f0f 358 *
75fb60f2
RW
359 * Run _OSC query for @mask and if that is successful, compare the returned
360 * mask of control bits with @req. If all of the @req bits are set in the
361 * returned mask, run _OSC request for it.
362 *
363 * The variable at the @mask address may be modified regardless of whether or
364 * not the function returns success. On success it will contain the mask of
365 * _OSC bits the BIOS has granted control of, but its contents are meaningless
366 * on failure.
63f10f0f 367 **/
75fb60f2 368acpi_status acpi_pci_osc_control_set(acpi_handle handle, u32 *mask, u32 req)
63f10f0f 369{
75fb60f2 370 struct acpi_pci_root *root;
4ffe6e54 371 acpi_status status = AE_OK;
75fb60f2 372 u32 ctrl, capbuf[3];
63f10f0f 373
75fb60f2
RW
374 if (!mask)
375 return AE_BAD_PARAMETER;
376
377 ctrl = *mask & OSC_PCI_CONTROL_MASKS;
378 if ((ctrl & req) != req)
63f10f0f
KK
379 return AE_TYPE;
380
381 root = acpi_pci_find_root(handle);
382 if (!root)
383 return AE_NOT_EXIST;
384
385 mutex_lock(&osc_lock);
75fb60f2
RW
386
387 *mask = ctrl | root->osc_control_set;
63f10f0f 388 /* No need to evaluate _OSC if the control was already granted. */
75fb60f2 389 if ((root->osc_control_set & ctrl) == ctrl)
63f10f0f
KK
390 goto out;
391
75fb60f2
RW
392 /* Need to check the available controls bits before requesting them. */
393 while (*mask) {
394 status = acpi_pci_query_osc(root, root->osc_support_set, mask);
395 if (ACPI_FAILURE(status))
396 goto out;
397 if (ctrl == *mask)
398 break;
955f14b4
BH
399 decode_osc_control(root, "platform does not support",
400 ctrl & ~(*mask));
75fb60f2
RW
401 ctrl = *mask;
402 }
2b8fd918 403
75fb60f2 404 if ((ctrl & req) != req) {
955f14b4
BH
405 decode_osc_control(root, "not requesting control; platform does not support",
406 req & ~(ctrl));
63f10f0f
KK
407 status = AE_SUPPORT;
408 goto out;
409 }
410
b938a229
BH
411 capbuf[OSC_QUERY_DWORD] = 0;
412 capbuf[OSC_SUPPORT_DWORD] = root->osc_support_set;
413 capbuf[OSC_CONTROL_DWORD] = ctrl;
75fb60f2 414 status = acpi_pci_run_osc(handle, capbuf, mask);
63f10f0f 415 if (ACPI_SUCCESS(status))
75fb60f2 416 root->osc_control_set = *mask;
63f10f0f
KK
417out:
418 mutex_unlock(&osc_lock);
419 return status;
420}
9f5404d8 421EXPORT_SYMBOL(acpi_pci_osc_control_set);
63f10f0f 422
387d3757 423static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm)
1da177e4 424{
955f14b4 425 u32 support, control, requested;
3e43abb0
BH
426 acpi_status status;
427 struct acpi_device *device = root->device;
bfe2414a 428 acpi_handle handle = device->handle;
1da177e4 429
7bc5a2ba
MG
430 /*
431 * Apple always return failure on _OSC calls when _OSI("Darwin") has
432 * been called successfully. We know the feature set supported by the
433 * platform, so avoid calling _OSC at all
434 */
630b3aff 435 if (x86_apple_machine) {
7bc5a2ba
MG
436 root->osc_control_set = ~OSC_PCI_EXPRESS_PME_CONTROL;
437 decode_osc_control(root, "OS assumes control of",
438 root->osc_control_set);
439 return;
440 }
441
2786f6e3 442 /*
990a7ac5
AP
443 * All supported architectures that use ACPI have support for
444 * PCI domains, so we indicate this in _OSC support capabilities.
2786f6e3 445 */
65afe916 446 support = OSC_PCI_SEGMENT_GROUPS_SUPPORT;
8c33f51d 447 if (pci_ext_cfg_avail())
b8eb67fc 448 support |= OSC_PCI_EXT_CONFIG_SUPPORT;
1b2a7be6 449 if (pcie_aspm_support_enabled())
b8eb67fc 450 support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT;
07ae95f9 451 if (pci_msi_enabled())
b8eb67fc 452 support |= OSC_PCI_MSI_SUPPORT;
955f14b4
BH
453
454 decode_osc_support(root, "OS supports", support);
1b2a7be6
BH
455 status = acpi_pci_osc_support(root, support);
456 if (ACPI_FAILURE(status)) {
f8a99ee6
SK
457 dev_info(&device->dev, "_OSC failed (%s)%s\n",
458 acpi_format_exception(status),
459 pcie_aspm_support_enabled() ? "; disabling ASPM" : "");
1b2a7be6 460 *no_aspm = 1;
65afe916 461 return;
2d9c8677 462 }
b8178f13 463
43613a1f
BH
464 if (pcie_ports_disabled) {
465 dev_info(&device->dev, "PCIe port services disabled; not requesting _OSC control\n");
466 return;
467 }
468
de189662 469 if ((support & ACPI_PCIE_REQ_SUPPORT) != ACPI_PCIE_REQ_SUPPORT) {
955f14b4
BH
470 decode_osc_support(root, "not requesting OS control; OS requires",
471 ACPI_PCIE_REQ_SUPPORT);
de189662
BH
472 return;
473 }
474
475 control = OSC_PCI_EXPRESS_CAPABILITY_CONTROL
de189662
BH
476 | OSC_PCI_EXPRESS_PME_CONTROL;
477
988d9417
MW
478 if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))
479 control |= OSC_PCI_EXPRESS_NATIVE_HP_CONTROL;
480
de189662
BH
481 if (pci_aer_available()) {
482 if (aer_acpi_firmware_first())
955f14b4
BH
483 dev_info(&device->dev,
484 "PCIe AER handled by firmware\n");
de189662
BH
485 else
486 control |= OSC_PCI_EXPRESS_AER_CONTROL;
487 }
415e12b2 488
955f14b4 489 requested = control;
de189662
BH
490 status = acpi_pci_osc_control_set(handle, &control,
491 OSC_PCI_EXPRESS_CAPABILITY_CONTROL);
492 if (ACPI_SUCCESS(status)) {
955f14b4 493 decode_osc_control(root, "OS now controls", control);
de189662 494 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
3dc48af3 495 /*
387d3757
MG
496 * We have ASPM control, but the FADT indicates that
497 * it's unsupported. Leave existing configuration
498 * intact and prevent the OS from touching it.
3dc48af3 499 */
387d3757
MG
500 dev_info(&device->dev, "FADT indicates ASPM is unsupported, using BIOS configuration\n");
501 *no_aspm = 1;
eca67315 502 }
a246670d 503 } else {
955f14b4
BH
504 decode_osc_control(root, "OS requested", requested);
505 decode_osc_control(root, "platform willing to grant", control);
506 dev_info(&device->dev, "_OSC failed (%s); disabling ASPM\n",
507 acpi_format_exception(status));
508
de189662
BH
509 /*
510 * We want to disable ASPM here, but aspm_disabled
511 * needs to remain in its state from boot so that we
512 * properly handle PCIe 1.1 devices. So we set this
513 * flag here, to defer the action until after the ACPI
514 * root scan.
515 */
516 *no_aspm = 1;
415e12b2 517 }
3e43abb0
BH
518}
519
00c43b96
RW
520static int acpi_pci_root_add(struct acpi_device *device,
521 const struct acpi_device_id *not_used)
1da177e4 522{
f5eebbe1
BH
523 unsigned long long segment, bus;
524 acpi_status status;
525 int result;
526 struct acpi_pci_root *root;
bfe2414a 527 acpi_handle handle = device->handle;
387d3757 528 int no_aspm = 0;
9762b33d 529 bool hotadd = system_state == SYSTEM_RUNNING;
1da177e4 530
6ad95513
BH
531 root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL);
532 if (!root)
533 return -ENOMEM;
534
f5eebbe1 535 segment = 0;
bfe2414a 536 status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL,
f5eebbe1
BH
537 &segment);
538 if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
6dc7d22c 539 dev_err(&device->dev, "can't evaluate _SEG\n");
6ad95513
BH
540 result = -ENODEV;
541 goto end;
f5eebbe1 542 }
1da177e4 543
f5eebbe1 544 /* Check _CRS first, then _BBN. If no _BBN, default to zero. */
6ad95513 545 root->secondary.flags = IORESOURCE_BUS;
bfe2414a 546 status = try_get_root_bridge_busnr(handle, &root->secondary);
f5eebbe1 547 if (ACPI_FAILURE(status)) {
6ad95513
BH
548 /*
549 * We need both the start and end of the downstream bus range
550 * to interpret _CBA (MMCONFIG base address), so it really is
551 * supposed to be in _CRS. If we don't find it there, all we
552 * can do is assume [_BBN-0xFF] or [0-0xFF].
553 */
554 root->secondary.end = 0xFF;
6dc7d22c
JL
555 dev_warn(&device->dev,
556 FW_BUG "no secondary bus range in _CRS\n");
bfe2414a 557 status = acpi_evaluate_integer(handle, METHOD_NAME__BBN,
e545b55a 558 NULL, &bus);
6ad95513
BH
559 if (ACPI_SUCCESS(status))
560 root->secondary.start = bus;
561 else if (status == AE_NOT_FOUND)
562 root->secondary.start = 0;
563 else {
6dc7d22c 564 dev_err(&device->dev, "can't evaluate _BBN\n");
6ad95513
BH
565 result = -ENODEV;
566 goto end;
f5eebbe1
BH
567 }
568 }
1da177e4 569
32917e5b 570 root->device = device;
0705495d 571 root->segment = segment & 0xFFFF;
1da177e4
LT
572 strcpy(acpi_device_name(device), ACPI_PCI_ROOT_DEVICE_NAME);
573 strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS);
db89b4f0 574 device->driver_data = root;
1da177e4 575
864b94ad
JL
576 if (hotadd && dmar_device_add(handle)) {
577 result = -ENXIO;
578 goto end;
579 }
580
6dc7d22c 581 pr_info(PREFIX "%s [%s] (domain %04x %pR)\n",
4be44fcd 582 acpi_device_name(device), acpi_device_bid(device),
6ad95513 583 root->segment, &root->secondary);
1da177e4 584
bfe2414a 585 root->mcfg_addr = acpi_pci_root_get_mcfg_addr(handle);
1da177e4 586
387d3757 587 negotiate_os_control(root, &no_aspm);
415e12b2 588
3dc48af3
NH
589 /*
590 * TBD: Need PCI interface for enumeration/configuration of roots.
591 */
592
593 /*
594 * Scan the Root Bridge
595 * --------------------
596 * Must do this prior to any attempt to bind the root device, as the
597 * PCI namespace does not get created until this call is made (and
598 * thus the root bridge's pci_dev does not exist).
599 */
600 root->bus = pci_acpi_scan_root(root);
601 if (!root->bus) {
602 dev_err(&device->dev,
603 "Bus %04x:%02x not present in PCI namespace\n",
604 root->segment, (unsigned int)root->secondary.start);
f516bde5 605 device->driver_data = NULL;
3dc48af3 606 result = -ENODEV;
864b94ad 607 goto remove_dmar;
3dc48af3
NH
608 }
609
3dc48af3
NH
610 if (no_aspm)
611 pcie_no_aspm();
612
c072530f 613 pci_acpi_add_bus_pm_notifier(device);
de3ef1eb 614 device_set_wakeup_capable(root->bus->bridge, device->wakeup.flags.valid);
b67ea761 615
864b94ad 616 if (hotadd) {
3c449ed0 617 pcibios_resource_survey_bus(root->bus);
39772038 618 pci_assign_unassigned_root_bus_resources(root->bus);
584c5c42
RW
619 /*
620 * This is only called for the hotadd case. For the boot-time
621 * case, we need to wait until after PCI initialization in
622 * order to deal with IOAPICs mapped in on a PCI BAR.
623 *
624 * This is currently x86-specific, because acpi_ioapic_add()
625 * is an empty function without CONFIG_ACPI_HOTPLUG_IOAPIC.
626 * And CONFIG_ACPI_HOTPLUG_IOAPIC depends on CONFIG_X86_IO_APIC
627 * (see drivers/acpi/Kconfig).
628 */
fe7bd58f 629 acpi_ioapic_add(root->device->handle);
516ca223 630 }
62a08c5a 631
7a3bb55e 632 pci_lock_rescan_remove();
caf420c6 633 pci_bus_add_devices(root->bus);
7a3bb55e 634 pci_unlock_rescan_remove();
00c43b96 635 return 1;
47525cda 636
864b94ad
JL
637remove_dmar:
638 if (hotadd)
639 dmar_device_remove(handle);
47525cda
RW
640end:
641 kfree(root);
642 return result;
c431ada4 643}
1da177e4 644
00c43b96 645static void acpi_pci_root_remove(struct acpi_device *device)
1da177e4 646{
caf420c6 647 struct acpi_pci_root *root = acpi_driver_data(device);
c8e9afb1 648
7a3bb55e
RW
649 pci_lock_rescan_remove();
650
9738a1fd
YL
651 pci_stop_root_bus(root->bus);
652
f2ae5da7 653 pci_ioapic_remove(root);
de3ef1eb 654 device_set_wakeup_capable(root->bus->bridge, false);
b67ea761
RW
655 pci_acpi_remove_bus_pm_notifier(device);
656
9738a1fd 657 pci_remove_root_bus(root->bus);
f2ae5da7 658 WARN_ON(acpi_ioapic_remove(root));
9738a1fd 659
864b94ad
JL
660 dmar_device_remove(device->handle);
661
7a3bb55e
RW
662 pci_unlock_rescan_remove();
663
1da177e4 664 kfree(root);
1da177e4
LT
665}
666
2c204383
JL
667/*
668 * Following code to support acpi_pci_root_create() is copied from
669 * arch/x86/pci/acpi.c and modified so it could be reused by x86, IA64
670 * and ARM64.
671 */
672static void acpi_pci_root_validate_resources(struct device *dev,
673 struct list_head *resources,
674 unsigned long type)
675{
676 LIST_HEAD(list);
677 struct resource *res1, *res2, *root = NULL;
678 struct resource_entry *tmp, *entry, *entry2;
679
680 BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0);
681 root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource;
682
683 list_splice_init(resources, &list);
684 resource_list_for_each_entry_safe(entry, tmp, &list) {
685 bool free = false;
686 resource_size_t end;
687
688 res1 = entry->res;
689 if (!(res1->flags & type))
690 goto next;
691
692 /* Exclude non-addressable range or non-addressable portion */
693 end = min(res1->end, root->end);
694 if (end <= res1->start) {
695 dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n",
696 res1);
697 free = true;
698 goto next;
699 } else if (res1->end != end) {
700 dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n",
701 res1, (unsigned long long)end + 1,
702 (unsigned long long)res1->end);
703 res1->end = end;
704 }
705
706 resource_list_for_each_entry(entry2, resources) {
707 res2 = entry2->res;
708 if (!(res2->flags & type))
709 continue;
710
711 /*
712 * I don't like throwing away windows because then
713 * our resources no longer match the ACPI _CRS, but
714 * the kernel resource tree doesn't allow overlaps.
715 */
716 if (resource_overlaps(res1, res2)) {
717 res2->start = min(res1->start, res2->start);
718 res2->end = max(res1->end, res2->end);
719 dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n",
720 res2, res1);
721 free = true;
722 goto next;
723 }
724 }
725
726next:
727 resource_list_del(entry);
728 if (free)
729 resource_list_free_entry(entry);
730 else
731 resource_list_add_tail(entry, resources);
732 }
733}
734
36e6f3d4
GP
735static void acpi_pci_root_remap_iospace(struct fwnode_handle *fwnode,
736 struct resource_entry *entry)
0a70abb3
J
737{
738#ifdef PCI_IOBASE
739 struct resource *res = entry->res;
740 resource_size_t cpu_addr = res->start;
741 resource_size_t pci_addr = cpu_addr - entry->offset;
742 resource_size_t length = resource_size(res);
743 unsigned long port;
744
36e6f3d4 745 if (pci_register_io_range(fwnode, cpu_addr, length))
0a70abb3
J
746 goto err;
747
748 port = pci_address_to_pio(cpu_addr);
749 if (port == (unsigned long)-1)
750 goto err;
751
752 res->start = port;
753 res->end = port + length - 1;
754 entry->offset = port - pci_addr;
755
756 if (pci_remap_iospace(res, cpu_addr) < 0)
757 goto err;
758
759 pr_info("Remapped I/O %pa to %pR\n", &cpu_addr, res);
760 return;
761err:
762 res->flags |= IORESOURCE_DISABLED;
763#endif
764}
765
2c204383
JL
766int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info)
767{
768 int ret;
769 struct list_head *list = &info->resources;
770 struct acpi_device *device = info->bridge;
771 struct resource_entry *entry, *tmp;
772 unsigned long flags;
773
774 flags = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT;
775 ret = acpi_dev_get_resources(device, list,
776 acpi_dev_filter_resource_type_cb,
777 (void *)flags);
778 if (ret < 0)
779 dev_warn(&device->dev,
780 "failed to parse _CRS method, error code %d\n", ret);
781 else if (ret == 0)
782 dev_dbg(&device->dev,
783 "no IO and memory resources present in _CRS\n");
784 else {
785 resource_list_for_each_entry_safe(entry, tmp, list) {
0a70abb3 786 if (entry->res->flags & IORESOURCE_IO)
36e6f3d4
GP
787 acpi_pci_root_remap_iospace(&device->fwnode,
788 entry);
0a70abb3 789
2c204383
JL
790 if (entry->res->flags & IORESOURCE_DISABLED)
791 resource_list_destroy_entry(entry);
792 else
793 entry->res->name = info->name;
794 }
795 acpi_pci_root_validate_resources(&device->dev, list,
796 IORESOURCE_MEM);
797 acpi_pci_root_validate_resources(&device->dev, list,
798 IORESOURCE_IO);
799 }
800
801 return ret;
802}
803
804static void pci_acpi_root_add_resources(struct acpi_pci_root_info *info)
805{
806 struct resource_entry *entry, *tmp;
807 struct resource *res, *conflict, *root = NULL;
808
809 resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
810 res = entry->res;
811 if (res->flags & IORESOURCE_MEM)
812 root = &iomem_resource;
813 else if (res->flags & IORESOURCE_IO)
814 root = &ioport_resource;
815 else
816 continue;
817
727ae8be
LJ
818 /*
819 * Some legacy x86 host bridge drivers use iomem_resource and
820 * ioport_resource as default resource pool, skip it.
821 */
822 if (res == root)
823 continue;
824
2c204383
JL
825 conflict = insert_resource_conflict(root, res);
826 if (conflict) {
827 dev_info(&info->bridge->dev,
828 "ignoring host bridge window %pR (conflicts with %s %pR)\n",
829 res, conflict->name, conflict);
830 resource_list_destroy_entry(entry);
831 }
832 }
833}
834
835static void __acpi_pci_root_release_info(struct acpi_pci_root_info *info)
836{
837 struct resource *res;
838 struct resource_entry *entry, *tmp;
839
840 if (!info)
841 return;
842
843 resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
844 res = entry->res;
845 if (res->parent &&
846 (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
847 release_resource(res);
848 resource_list_destroy_entry(entry);
849 }
850
851 info->ops->release_info(info);
852}
853
854static void acpi_pci_root_release_info(struct pci_host_bridge *bridge)
855{
856 struct resource *res;
857 struct resource_entry *entry;
858
859 resource_list_for_each_entry(entry, &bridge->windows) {
860 res = entry->res;
0a70abb3
J
861 if (res->flags & IORESOURCE_IO)
862 pci_unmap_iospace(res);
2c204383
JL
863 if (res->parent &&
864 (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
865 release_resource(res);
866 }
867 __acpi_pci_root_release_info(bridge->release_data);
868}
869
870struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
871 struct acpi_pci_root_ops *ops,
872 struct acpi_pci_root_info *info,
873 void *sysdata)
874{
875 int ret, busnum = root->secondary.start;
876 struct acpi_device *device = root->device;
877 int node = acpi_get_node(device->handle);
878 struct pci_bus *bus;
879
880 info->root = root;
881 info->bridge = device;
882 info->ops = ops;
883 INIT_LIST_HEAD(&info->resources);
884 snprintf(info->name, sizeof(info->name), "PCI Bus %04x:%02x",
885 root->segment, busnum);
886
887 if (ops->init_info && ops->init_info(info))
888 goto out_release_info;
889 if (ops->prepare_resources)
890 ret = ops->prepare_resources(info);
891 else
892 ret = acpi_pci_probe_root_resources(info);
893 if (ret < 0)
894 goto out_release_info;
895
896 pci_acpi_root_add_resources(info);
897 pci_add_resource(&info->resources, &root->secondary);
898 bus = pci_create_root_bus(NULL, busnum, ops->pci_ops,
899 sysdata, &info->resources);
900 if (!bus)
901 goto out_release_info;
902
903 pci_scan_child_bus(bus);
904 pci_set_host_bridge_release(to_pci_host_bridge(bus->bridge),
905 acpi_pci_root_release_info, info);
906 if (node != NUMA_NO_NODE)
907 dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
908 return bus;
909
910out_release_info:
911 __acpi_pci_root_release_info(info);
912 return NULL;
913}
914
00c43b96 915void __init acpi_pci_root_init(void)
1da177e4 916{
d3072e6a 917 acpi_hest_init();
3338db00 918 if (acpi_pci_disabled)
668192b6 919 return;
668192b6 920
3338db00
RW
921 pci_acpi_crs_quirks();
922 acpi_scan_add_handler_with_hotplug(&pci_root_handler, "pci_root");
668192b6 923}