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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * processor_idle - idle state submodule to the ACPI processor driver | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
c5ab81ca | 6 | * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> |
1da177e4 LT |
7 | * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> |
8 | * - Added processor hotplug support | |
02df8b93 VP |
9 | * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> |
10 | * - Added support for C3 on SMP | |
1da177e4 LT |
11 | * |
12 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or (at | |
17 | * your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, but | |
20 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
22 | * General Public License for more details. | |
23 | * | |
1da177e4 LT |
24 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
25 | */ | |
b6ec26fb | 26 | #define pr_fmt(fmt) "ACPI: " fmt |
1da177e4 | 27 | |
1da177e4 | 28 | #include <linux/module.h> |
1da177e4 LT |
29 | #include <linux/acpi.h> |
30 | #include <linux/dmi.h> | |
e2668fb5 | 31 | #include <linux/sched.h> /* need_resched() */ |
ee41eebf | 32 | #include <linux/tick.h> |
4f86d3a8 | 33 | #include <linux/cpuidle.h> |
8b48463f | 34 | #include <acpi/processor.h> |
1da177e4 | 35 | |
3434933b TG |
36 | /* |
37 | * Include the apic definitions for x86 to have the APIC timer related defines | |
38 | * available also for UP (on SMP it gets magically included via linux/smp.h). | |
39 | * asm/acpi.h is not an option, as it would require more include magic. Also | |
40 | * creating an empty asm-ia64/apic.h would just trade pest vs. cholera. | |
41 | */ | |
42 | #ifdef CONFIG_X86 | |
43 | #include <asm/apic.h> | |
44 | #endif | |
45 | ||
1da177e4 | 46 | #define ACPI_PROCESSOR_CLASS "processor" |
1da177e4 | 47 | #define _COMPONENT ACPI_PROCESSOR_COMPONENT |
f52fd66d | 48 | ACPI_MODULE_NAME("processor_idle"); |
1da177e4 | 49 | |
4f86d3a8 LB |
50 | static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER; |
51 | module_param(max_cstate, uint, 0000); | |
b6835052 | 52 | static unsigned int nocst __read_mostly; |
1da177e4 | 53 | module_param(nocst, uint, 0000); |
d3e7e99f LB |
54 | static int bm_check_disable __read_mostly; |
55 | module_param(bm_check_disable, uint, 0000); | |
1da177e4 | 56 | |
25de5718 | 57 | static unsigned int latency_factor __read_mostly = 2; |
4963f620 | 58 | module_param(latency_factor, uint, 0644); |
1da177e4 | 59 | |
3d339dcb DL |
60 | static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device); |
61 | ||
35ae7133 SH |
62 | struct cpuidle_driver acpi_idle_driver = { |
63 | .name = "acpi_idle", | |
64 | .owner = THIS_MODULE, | |
65 | }; | |
66 | ||
67 | #ifdef CONFIG_ACPI_PROCESSOR_CSTATE | |
25528213 PZ |
68 | static |
69 | DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], acpi_cstate); | |
ac3ebafa | 70 | |
d1896049 TR |
71 | static int disabled_by_idle_boot_param(void) |
72 | { | |
73 | return boot_option_idle_override == IDLE_POLL || | |
d1896049 TR |
74 | boot_option_idle_override == IDLE_HALT; |
75 | } | |
76 | ||
1da177e4 LT |
77 | /* |
78 | * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. | |
79 | * For now disable this. Probably a bug somewhere else. | |
80 | * | |
81 | * To skip this limit, boot/load with a large max_cstate limit. | |
82 | */ | |
1855256c | 83 | static int set_max_cstate(const struct dmi_system_id *id) |
1da177e4 LT |
84 | { |
85 | if (max_cstate > ACPI_PROCESSOR_MAX_POWER) | |
86 | return 0; | |
87 | ||
b6ec26fb SH |
88 | pr_notice("%s detected - limiting to C%ld max_cstate." |
89 | " Override with \"processor.max_cstate=%d\"\n", id->ident, | |
90 | (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); | |
1da177e4 | 91 | |
3d35600a | 92 | max_cstate = (long)id->driver_data; |
1da177e4 LT |
93 | |
94 | return 0; | |
95 | } | |
96 | ||
b0346688 | 97 | static const struct dmi_system_id processor_power_dmi_table[] = { |
876c184b TR |
98 | { set_max_cstate, "Clevo 5600D", { |
99 | DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), | |
100 | DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, | |
4be44fcd | 101 | (void *)2}, |
370d5cd8 AV |
102 | { set_max_cstate, "Pavilion zv5000", { |
103 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
104 | DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")}, | |
105 | (void *)1}, | |
106 | { set_max_cstate, "Asus L8400B", { | |
107 | DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."), | |
108 | DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")}, | |
109 | (void *)1}, | |
1da177e4 LT |
110 | {}, |
111 | }; | |
112 | ||
4f86d3a8 | 113 | |
2e906655 | 114 | /* |
115 | * Callers should disable interrupts before the call and enable | |
116 | * interrupts after return. | |
117 | */ | |
ddc081a1 VP |
118 | static void acpi_safe_halt(void) |
119 | { | |
ea811747 | 120 | if (!tif_need_resched()) { |
ddc081a1 | 121 | safe_halt(); |
71e93d15 VP |
122 | local_irq_disable(); |
123 | } | |
ddc081a1 VP |
124 | } |
125 | ||
169a0abb TG |
126 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
127 | ||
128 | /* | |
129 | * Some BIOS implementations switch to C3 in the published C2 state. | |
296d93cd LT |
130 | * This seems to be a common problem on AMD boxen, but other vendors |
131 | * are affected too. We pick the most conservative approach: we assume | |
132 | * that the local APIC stops in both C2 and C3. | |
169a0abb | 133 | */ |
7e275cc4 | 134 | static void lapic_timer_check_state(int state, struct acpi_processor *pr, |
169a0abb TG |
135 | struct acpi_processor_cx *cx) |
136 | { | |
137 | struct acpi_processor_power *pwr = &pr->power; | |
e585bef8 | 138 | u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; |
169a0abb | 139 | |
db954b58 VP |
140 | if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT)) |
141 | return; | |
142 | ||
02c68a02 | 143 | if (amd_e400_c1e_detected) |
87ad57ba SL |
144 | type = ACPI_STATE_C1; |
145 | ||
169a0abb TG |
146 | /* |
147 | * Check, if one of the previous states already marked the lapic | |
148 | * unstable | |
149 | */ | |
150 | if (pwr->timer_broadcast_on_state < state) | |
151 | return; | |
152 | ||
e585bef8 | 153 | if (cx->type >= type) |
296d93cd | 154 | pr->power.timer_broadcast_on_state = state; |
169a0abb TG |
155 | } |
156 | ||
918aae42 | 157 | static void __lapic_timer_propagate_broadcast(void *arg) |
169a0abb | 158 | { |
f833bab8 | 159 | struct acpi_processor *pr = (struct acpi_processor *) arg; |
e9e2cdb4 | 160 | |
ee41eebf TG |
161 | if (pr->power.timer_broadcast_on_state < INT_MAX) |
162 | tick_broadcast_enable(); | |
163 | else | |
164 | tick_broadcast_disable(); | |
e9e2cdb4 TG |
165 | } |
166 | ||
918aae42 HS |
167 | static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) |
168 | { | |
169 | smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast, | |
170 | (void *)pr, 1); | |
171 | } | |
172 | ||
e9e2cdb4 | 173 | /* Power(C) State timer broadcast control */ |
7e275cc4 | 174 | static void lapic_timer_state_broadcast(struct acpi_processor *pr, |
e9e2cdb4 TG |
175 | struct acpi_processor_cx *cx, |
176 | int broadcast) | |
177 | { | |
e9e2cdb4 TG |
178 | int state = cx - pr->power.states; |
179 | ||
180 | if (state >= pr->power.timer_broadcast_on_state) { | |
7815701c TG |
181 | if (broadcast) |
182 | tick_broadcast_enter(); | |
183 | else | |
184 | tick_broadcast_exit(); | |
e9e2cdb4 | 185 | } |
169a0abb TG |
186 | } |
187 | ||
188 | #else | |
189 | ||
7e275cc4 | 190 | static void lapic_timer_check_state(int state, struct acpi_processor *pr, |
169a0abb | 191 | struct acpi_processor_cx *cstate) { } |
7e275cc4 LB |
192 | static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { } |
193 | static void lapic_timer_state_broadcast(struct acpi_processor *pr, | |
e9e2cdb4 TG |
194 | struct acpi_processor_cx *cx, |
195 | int broadcast) | |
196 | { | |
197 | } | |
169a0abb TG |
198 | |
199 | #endif | |
200 | ||
592913ec | 201 | #if defined(CONFIG_X86) |
520daf72 | 202 | static void tsc_check_state(int state) |
ddb25f9a AK |
203 | { |
204 | switch (boot_cpu_data.x86_vendor) { | |
205 | case X86_VENDOR_AMD: | |
40fb1715 | 206 | case X86_VENDOR_INTEL: |
ddb25f9a AK |
207 | /* |
208 | * AMD Fam10h TSC will tick in all | |
209 | * C/P/S0/S1 states when this bit is set. | |
210 | */ | |
40fb1715 | 211 | if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) |
520daf72 | 212 | return; |
40fb1715 | 213 | |
ddb25f9a | 214 | /*FALL THROUGH*/ |
ddb25f9a | 215 | default: |
520daf72 LB |
216 | /* TSC could halt in idle, so notify users */ |
217 | if (state > ACPI_STATE_C1) | |
218 | mark_tsc_unstable("TSC halts in idle"); | |
ddb25f9a AK |
219 | } |
220 | } | |
520daf72 LB |
221 | #else |
222 | static void tsc_check_state(int state) { return; } | |
ddb25f9a AK |
223 | #endif |
224 | ||
4be44fcd | 225 | static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) |
1da177e4 | 226 | { |
1da177e4 | 227 | |
1da177e4 | 228 | if (!pr->pblk) |
d550d98d | 229 | return -ENODEV; |
1da177e4 | 230 | |
1da177e4 | 231 | /* if info is obtained from pblk/fadt, type equals state */ |
1da177e4 LT |
232 | pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; |
233 | pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; | |
234 | ||
4c033552 VP |
235 | #ifndef CONFIG_HOTPLUG_CPU |
236 | /* | |
237 | * Check for P_LVL2_UP flag before entering C2 and above on | |
4f86d3a8 | 238 | * an SMP system. |
4c033552 | 239 | */ |
ad71860a | 240 | if ((num_online_cpus() > 1) && |
cee324b1 | 241 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) |
d550d98d | 242 | return -ENODEV; |
4c033552 VP |
243 | #endif |
244 | ||
1da177e4 LT |
245 | /* determine C2 and C3 address from pblk */ |
246 | pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; | |
247 | pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; | |
248 | ||
249 | /* determine latencies from FADT */ | |
ba494bee BM |
250 | pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency; |
251 | pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency; | |
1da177e4 | 252 | |
5d76b6f6 LB |
253 | /* |
254 | * FADT specified C2 latency must be less than or equal to | |
255 | * 100 microseconds. | |
256 | */ | |
ba494bee | 257 | if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { |
5d76b6f6 | 258 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
ba494bee | 259 | "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency)); |
5d76b6f6 LB |
260 | /* invalidate C2 */ |
261 | pr->power.states[ACPI_STATE_C2].address = 0; | |
262 | } | |
263 | ||
a6d72c18 LB |
264 | /* |
265 | * FADT supplied C3 latency must be less than or equal to | |
266 | * 1000 microseconds. | |
267 | */ | |
ba494bee | 268 | if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { |
a6d72c18 | 269 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
ba494bee | 270 | "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency)); |
a6d72c18 LB |
271 | /* invalidate C3 */ |
272 | pr->power.states[ACPI_STATE_C3].address = 0; | |
273 | } | |
274 | ||
1da177e4 LT |
275 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
276 | "lvl2[0x%08x] lvl3[0x%08x]\n", | |
277 | pr->power.states[ACPI_STATE_C2].address, | |
278 | pr->power.states[ACPI_STATE_C3].address)); | |
279 | ||
d550d98d | 280 | return 0; |
1da177e4 LT |
281 | } |
282 | ||
991528d7 | 283 | static int acpi_processor_get_power_info_default(struct acpi_processor *pr) |
acf05f4b | 284 | { |
991528d7 VP |
285 | if (!pr->power.states[ACPI_STATE_C1].valid) { |
286 | /* set the first C-State to C1 */ | |
287 | /* all processors need to support C1 */ | |
288 | pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; | |
289 | pr->power.states[ACPI_STATE_C1].valid = 1; | |
0fda6b40 | 290 | pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT; |
991528d7 VP |
291 | } |
292 | /* the C0 state only exists as a filler in our array */ | |
acf05f4b | 293 | pr->power.states[ACPI_STATE_C0].valid = 1; |
d550d98d | 294 | return 0; |
acf05f4b VP |
295 | } |
296 | ||
4be44fcd | 297 | static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) |
1da177e4 | 298 | { |
6fd8050a | 299 | acpi_status status; |
439913ff | 300 | u64 count; |
cf824788 | 301 | int current_count; |
6fd8050a | 302 | int i, ret = 0; |
4be44fcd LB |
303 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; |
304 | union acpi_object *cst; | |
1da177e4 | 305 | |
1da177e4 | 306 | |
1da177e4 | 307 | if (nocst) |
d550d98d | 308 | return -ENODEV; |
1da177e4 | 309 | |
991528d7 | 310 | current_count = 0; |
1da177e4 LT |
311 | |
312 | status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer); | |
313 | if (ACPI_FAILURE(status)) { | |
314 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n")); | |
d550d98d | 315 | return -ENODEV; |
4be44fcd | 316 | } |
1da177e4 | 317 | |
50dd0969 | 318 | cst = buffer.pointer; |
1da177e4 LT |
319 | |
320 | /* There must be at least 2 elements */ | |
321 | if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) { | |
b6ec26fb | 322 | pr_err("not enough elements in _CST\n"); |
6fd8050a | 323 | ret = -EFAULT; |
1da177e4 LT |
324 | goto end; |
325 | } | |
326 | ||
327 | count = cst->package.elements[0].integer.value; | |
328 | ||
329 | /* Validate number of power states. */ | |
330 | if (count < 1 || count != cst->package.count - 1) { | |
b6ec26fb | 331 | pr_err("count given by _CST is not valid\n"); |
6fd8050a | 332 | ret = -EFAULT; |
1da177e4 LT |
333 | goto end; |
334 | } | |
335 | ||
1da177e4 LT |
336 | /* Tell driver that at least _CST is supported. */ |
337 | pr->flags.has_cst = 1; | |
338 | ||
339 | for (i = 1; i <= count; i++) { | |
340 | union acpi_object *element; | |
341 | union acpi_object *obj; | |
342 | struct acpi_power_register *reg; | |
343 | struct acpi_processor_cx cx; | |
344 | ||
345 | memset(&cx, 0, sizeof(cx)); | |
346 | ||
50dd0969 | 347 | element = &(cst->package.elements[i]); |
1da177e4 LT |
348 | if (element->type != ACPI_TYPE_PACKAGE) |
349 | continue; | |
350 | ||
351 | if (element->package.count != 4) | |
352 | continue; | |
353 | ||
50dd0969 | 354 | obj = &(element->package.elements[0]); |
1da177e4 LT |
355 | |
356 | if (obj->type != ACPI_TYPE_BUFFER) | |
357 | continue; | |
358 | ||
4be44fcd | 359 | reg = (struct acpi_power_register *)obj->buffer.pointer; |
1da177e4 LT |
360 | |
361 | if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && | |
4be44fcd | 362 | (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) |
1da177e4 LT |
363 | continue; |
364 | ||
1da177e4 | 365 | /* There should be an easy way to extract an integer... */ |
50dd0969 | 366 | obj = &(element->package.elements[1]); |
1da177e4 LT |
367 | if (obj->type != ACPI_TYPE_INTEGER) |
368 | continue; | |
369 | ||
370 | cx.type = obj->integer.value; | |
991528d7 VP |
371 | /* |
372 | * Some buggy BIOSes won't list C1 in _CST - | |
373 | * Let acpi_processor_get_power_info_default() handle them later | |
374 | */ | |
375 | if (i == 1 && cx.type != ACPI_STATE_C1) | |
376 | current_count++; | |
377 | ||
378 | cx.address = reg->address; | |
379 | cx.index = current_count + 1; | |
380 | ||
bc71bec9 | 381 | cx.entry_method = ACPI_CSTATE_SYSTEMIO; |
991528d7 VP |
382 | if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) { |
383 | if (acpi_processor_ffh_cstate_probe | |
384 | (pr->id, &cx, reg) == 0) { | |
bc71bec9 | 385 | cx.entry_method = ACPI_CSTATE_FFH; |
386 | } else if (cx.type == ACPI_STATE_C1) { | |
991528d7 VP |
387 | /* |
388 | * C1 is a special case where FIXED_HARDWARE | |
389 | * can be handled in non-MWAIT way as well. | |
390 | * In that case, save this _CST entry info. | |
991528d7 VP |
391 | * Otherwise, ignore this info and continue. |
392 | */ | |
bc71bec9 | 393 | cx.entry_method = ACPI_CSTATE_HALT; |
4fcb2fcd | 394 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); |
bc71bec9 | 395 | } else { |
991528d7 VP |
396 | continue; |
397 | } | |
da5e09a1 | 398 | if (cx.type == ACPI_STATE_C1 && |
d1896049 | 399 | (boot_option_idle_override == IDLE_NOMWAIT)) { |
c1e3b377 ZY |
400 | /* |
401 | * In most cases the C1 space_id obtained from | |
402 | * _CST object is FIXED_HARDWARE access mode. | |
403 | * But when the option of idle=halt is added, | |
404 | * the entry_method type should be changed from | |
405 | * CSTATE_FFH to CSTATE_HALT. | |
da5e09a1 ZY |
406 | * When the option of idle=nomwait is added, |
407 | * the C1 entry_method type should be | |
408 | * CSTATE_HALT. | |
c1e3b377 ZY |
409 | */ |
410 | cx.entry_method = ACPI_CSTATE_HALT; | |
411 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); | |
412 | } | |
4fcb2fcd VP |
413 | } else { |
414 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x", | |
415 | cx.address); | |
991528d7 | 416 | } |
1da177e4 | 417 | |
0fda6b40 VP |
418 | if (cx.type == ACPI_STATE_C1) { |
419 | cx.valid = 1; | |
420 | } | |
4fcb2fcd | 421 | |
50dd0969 | 422 | obj = &(element->package.elements[2]); |
1da177e4 LT |
423 | if (obj->type != ACPI_TYPE_INTEGER) |
424 | continue; | |
425 | ||
426 | cx.latency = obj->integer.value; | |
427 | ||
50dd0969 | 428 | obj = &(element->package.elements[3]); |
1da177e4 LT |
429 | if (obj->type != ACPI_TYPE_INTEGER) |
430 | continue; | |
431 | ||
cf824788 JM |
432 | current_count++; |
433 | memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx)); | |
434 | ||
435 | /* | |
436 | * We support total ACPI_PROCESSOR_MAX_POWER - 1 | |
437 | * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1) | |
438 | */ | |
439 | if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) { | |
b6ec26fb SH |
440 | pr_warn("Limiting number of power states to max (%d)\n", |
441 | ACPI_PROCESSOR_MAX_POWER); | |
442 | pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); | |
cf824788 JM |
443 | break; |
444 | } | |
1da177e4 LT |
445 | } |
446 | ||
4be44fcd | 447 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n", |
cf824788 | 448 | current_count)); |
1da177e4 LT |
449 | |
450 | /* Validate number of power states discovered */ | |
cf824788 | 451 | if (current_count < 2) |
6fd8050a | 452 | ret = -EFAULT; |
1da177e4 | 453 | |
4be44fcd | 454 | end: |
02438d87 | 455 | kfree(buffer.pointer); |
1da177e4 | 456 | |
6fd8050a | 457 | return ret; |
1da177e4 LT |
458 | } |
459 | ||
4be44fcd LB |
460 | static void acpi_processor_power_verify_c3(struct acpi_processor *pr, |
461 | struct acpi_processor_cx *cx) | |
1da177e4 | 462 | { |
ee1ca48f PV |
463 | static int bm_check_flag = -1; |
464 | static int bm_control_flag = -1; | |
02df8b93 | 465 | |
1da177e4 LT |
466 | |
467 | if (!cx->address) | |
d550d98d | 468 | return; |
1da177e4 | 469 | |
1da177e4 LT |
470 | /* |
471 | * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) | |
472 | * DMA transfers are used by any ISA device to avoid livelock. | |
473 | * Note that we could disable Type-F DMA (as recommended by | |
474 | * the erratum), but this is known to disrupt certain ISA | |
475 | * devices thus we take the conservative approach. | |
476 | */ | |
477 | else if (errata.piix4.fdma) { | |
478 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 479 | "C3 not supported on PIIX4 with Type-F DMA\n")); |
d550d98d | 480 | return; |
1da177e4 LT |
481 | } |
482 | ||
02df8b93 | 483 | /* All the logic here assumes flags.bm_check is same across all CPUs */ |
ee1ca48f | 484 | if (bm_check_flag == -1) { |
02df8b93 VP |
485 | /* Determine whether bm_check is needed based on CPU */ |
486 | acpi_processor_power_init_bm_check(&(pr->flags), pr->id); | |
487 | bm_check_flag = pr->flags.bm_check; | |
ee1ca48f | 488 | bm_control_flag = pr->flags.bm_control; |
02df8b93 VP |
489 | } else { |
490 | pr->flags.bm_check = bm_check_flag; | |
ee1ca48f | 491 | pr->flags.bm_control = bm_control_flag; |
02df8b93 VP |
492 | } |
493 | ||
494 | if (pr->flags.bm_check) { | |
02df8b93 | 495 | if (!pr->flags.bm_control) { |
ed3110ef VP |
496 | if (pr->flags.has_cst != 1) { |
497 | /* bus mastering control is necessary */ | |
498 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
499 | "C3 support requires BM control\n")); | |
500 | return; | |
501 | } else { | |
502 | /* Here we enter C3 without bus mastering */ | |
503 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
504 | "C3 support without BM control\n")); | |
505 | } | |
02df8b93 VP |
506 | } |
507 | } else { | |
02df8b93 VP |
508 | /* |
509 | * WBINVD should be set in fadt, for C3 state to be | |
510 | * supported on when bm_check is not required. | |
511 | */ | |
cee324b1 | 512 | if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) { |
02df8b93 | 513 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
4be44fcd LB |
514 | "Cache invalidation should work properly" |
515 | " for C3 to be enabled on SMP systems\n")); | |
d550d98d | 516 | return; |
02df8b93 | 517 | } |
02df8b93 VP |
518 | } |
519 | ||
1da177e4 LT |
520 | /* |
521 | * Otherwise we've met all of our C3 requirements. | |
522 | * Normalize the C3 latency to expidite policy. Enable | |
523 | * checking of bus mastering status (bm_check) so we can | |
524 | * use this in our C3 policy | |
525 | */ | |
526 | cx->valid = 1; | |
4f86d3a8 | 527 | |
31878dd8 LB |
528 | /* |
529 | * On older chipsets, BM_RLD needs to be set | |
530 | * in order for Bus Master activity to wake the | |
531 | * system from C3. Newer chipsets handle DMA | |
532 | * during C3 automatically and BM_RLD is a NOP. | |
533 | * In either case, the proper way to | |
534 | * handle BM_RLD is to set it and leave it set. | |
535 | */ | |
50ffba1b | 536 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1); |
1da177e4 | 537 | |
d550d98d | 538 | return; |
1da177e4 LT |
539 | } |
540 | ||
1da177e4 LT |
541 | static int acpi_processor_power_verify(struct acpi_processor *pr) |
542 | { | |
543 | unsigned int i; | |
544 | unsigned int working = 0; | |
6eb0a0fd | 545 | |
169a0abb | 546 | pr->power.timer_broadcast_on_state = INT_MAX; |
6eb0a0fd | 547 | |
a0bf284b | 548 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
1da177e4 LT |
549 | struct acpi_processor_cx *cx = &pr->power.states[i]; |
550 | ||
551 | switch (cx->type) { | |
552 | case ACPI_STATE_C1: | |
553 | cx->valid = 1; | |
554 | break; | |
555 | ||
556 | case ACPI_STATE_C2: | |
d22edd29 LB |
557 | if (!cx->address) |
558 | break; | |
cad1525a | 559 | cx->valid = 1; |
1da177e4 LT |
560 | break; |
561 | ||
562 | case ACPI_STATE_C3: | |
563 | acpi_processor_power_verify_c3(pr, cx); | |
564 | break; | |
565 | } | |
7e275cc4 LB |
566 | if (!cx->valid) |
567 | continue; | |
1da177e4 | 568 | |
7e275cc4 LB |
569 | lapic_timer_check_state(i, pr, cx); |
570 | tsc_check_state(cx->type); | |
571 | working++; | |
1da177e4 | 572 | } |
bd663347 | 573 | |
918aae42 | 574 | lapic_timer_propagate_broadcast(pr); |
1da177e4 LT |
575 | |
576 | return (working); | |
577 | } | |
578 | ||
4be44fcd | 579 | static int acpi_processor_get_power_info(struct acpi_processor *pr) |
1da177e4 LT |
580 | { |
581 | unsigned int i; | |
582 | int result; | |
583 | ||
1da177e4 LT |
584 | |
585 | /* NOTE: the idle thread may not be running while calling | |
586 | * this function */ | |
587 | ||
991528d7 VP |
588 | /* Zero initialize all the C-states info. */ |
589 | memset(pr->power.states, 0, sizeof(pr->power.states)); | |
590 | ||
1da177e4 | 591 | result = acpi_processor_get_power_info_cst(pr); |
6d93c648 | 592 | if (result == -ENODEV) |
c5a114f1 | 593 | result = acpi_processor_get_power_info_fadt(pr); |
6d93c648 | 594 | |
991528d7 VP |
595 | if (result) |
596 | return result; | |
597 | ||
598 | acpi_processor_get_power_info_default(pr); | |
599 | ||
cf824788 | 600 | pr->power.count = acpi_processor_power_verify(pr); |
1da177e4 | 601 | |
1da177e4 LT |
602 | /* |
603 | * if one state of type C2 or C3 is available, mark this | |
604 | * CPU as being "idle manageable" | |
605 | */ | |
606 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { | |
acf05f4b | 607 | if (pr->power.states[i].valid) { |
1da177e4 | 608 | pr->power.count = i; |
2203d6ed LT |
609 | if (pr->power.states[i].type >= ACPI_STATE_C2) |
610 | pr->flags.power = 1; | |
acf05f4b | 611 | } |
1da177e4 LT |
612 | } |
613 | ||
d550d98d | 614 | return 0; |
1da177e4 LT |
615 | } |
616 | ||
4f86d3a8 LB |
617 | /** |
618 | * acpi_idle_bm_check - checks if bus master activity was detected | |
619 | */ | |
620 | static int acpi_idle_bm_check(void) | |
621 | { | |
622 | u32 bm_status = 0; | |
623 | ||
d3e7e99f LB |
624 | if (bm_check_disable) |
625 | return 0; | |
626 | ||
50ffba1b | 627 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); |
4f86d3a8 | 628 | if (bm_status) |
50ffba1b | 629 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); |
4f86d3a8 LB |
630 | /* |
631 | * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect | |
632 | * the true state of bus mastering activity; forcing us to | |
633 | * manually check the BMIDEA bit of each IDE channel. | |
634 | */ | |
635 | else if (errata.piix4.bmisx) { | |
636 | if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) | |
637 | || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) | |
638 | bm_status = 1; | |
639 | } | |
640 | return bm_status; | |
641 | } | |
642 | ||
4f86d3a8 | 643 | /** |
b00783fd | 644 | * acpi_idle_do_entry - enter idle state using the appropriate method |
4f86d3a8 | 645 | * @cx: cstate data |
bc71bec9 | 646 | * |
647 | * Caller disables interrupt before call and enables interrupt after return. | |
4f86d3a8 | 648 | */ |
b00783fd | 649 | static void acpi_idle_do_entry(struct acpi_processor_cx *cx) |
4f86d3a8 | 650 | { |
bc71bec9 | 651 | if (cx->entry_method == ACPI_CSTATE_FFH) { |
4f86d3a8 LB |
652 | /* Call into architectural FFH based C-state */ |
653 | acpi_processor_ffh_cstate_enter(cx); | |
bc71bec9 | 654 | } else if (cx->entry_method == ACPI_CSTATE_HALT) { |
655 | acpi_safe_halt(); | |
4f86d3a8 | 656 | } else { |
4f86d3a8 LB |
657 | /* IO port based C-state */ |
658 | inb(cx->address); | |
659 | /* Dummy wait op - must do something useless after P_LVL2 read | |
660 | because chipsets cannot guarantee that STPCLK# signal | |
661 | gets asserted in time to freeze execution properly. */ | |
cfa806f0 | 662 | inl(acpi_gbl_FADT.xpm_timer_block.address); |
4f86d3a8 LB |
663 | } |
664 | } | |
665 | ||
1a022e3f BO |
666 | /** |
667 | * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining) | |
668 | * @dev: the target CPU | |
669 | * @index: the index of suggested state | |
670 | */ | |
671 | static int acpi_idle_play_dead(struct cpuidle_device *dev, int index) | |
672 | { | |
6240a10d | 673 | struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); |
1a022e3f BO |
674 | |
675 | ACPI_FLUSH_CPU_CACHE(); | |
676 | ||
677 | while (1) { | |
678 | ||
679 | if (cx->entry_method == ACPI_CSTATE_HALT) | |
54f70077 | 680 | safe_halt(); |
1a022e3f BO |
681 | else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) { |
682 | inb(cx->address); | |
683 | /* See comment in acpi_idle_do_entry() */ | |
684 | inl(acpi_gbl_FADT.xpm_timer_block.address); | |
685 | } else | |
686 | return -ENODEV; | |
687 | } | |
688 | ||
689 | /* Never reached */ | |
690 | return 0; | |
691 | } | |
692 | ||
adcb2623 RW |
693 | static bool acpi_idle_fallback_to_c1(struct acpi_processor *pr) |
694 | { | |
5f508185 RW |
695 | return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst && |
696 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED); | |
adcb2623 RW |
697 | } |
698 | ||
4f86d3a8 | 699 | static int c3_cpu_count; |
e12f65f7 | 700 | static DEFINE_RAW_SPINLOCK(c3_lock); |
4f86d3a8 LB |
701 | |
702 | /** | |
703 | * acpi_idle_enter_bm - enters C3 with proper BM handling | |
6491bc0c RW |
704 | * @pr: Target processor |
705 | * @cx: Target state context | |
5f508185 | 706 | * @timer_bc: Whether or not to change timer mode to broadcast |
4f86d3a8 | 707 | */ |
6491bc0c | 708 | static void acpi_idle_enter_bm(struct acpi_processor *pr, |
5f508185 | 709 | struct acpi_processor_cx *cx, bool timer_bc) |
4f86d3a8 | 710 | { |
996520c1 VP |
711 | acpi_unlazy_tlb(smp_processor_id()); |
712 | ||
4f86d3a8 LB |
713 | /* |
714 | * Must be done before busmaster disable as we might need to | |
715 | * access HPET ! | |
716 | */ | |
5f508185 RW |
717 | if (timer_bc) |
718 | lapic_timer_state_broadcast(pr, cx, 1); | |
4f86d3a8 | 719 | |
ddc081a1 VP |
720 | /* |
721 | * disable bus master | |
722 | * bm_check implies we need ARB_DIS | |
ddc081a1 VP |
723 | * bm_control implies whether we can do ARB_DIS |
724 | * | |
725 | * That leaves a case where bm_check is set and bm_control is | |
726 | * not set. In that case we cannot do much, we enter C3 | |
727 | * without doing anything. | |
728 | */ | |
2a738352 | 729 | if (pr->flags.bm_control) { |
e12f65f7 | 730 | raw_spin_lock(&c3_lock); |
4f86d3a8 LB |
731 | c3_cpu_count++; |
732 | /* Disable bus master arbitration when all CPUs are in C3 */ | |
733 | if (c3_cpu_count == num_online_cpus()) | |
50ffba1b | 734 | acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1); |
e12f65f7 | 735 | raw_spin_unlock(&c3_lock); |
ddc081a1 | 736 | } |
4f86d3a8 | 737 | |
ddc081a1 | 738 | acpi_idle_do_entry(cx); |
4f86d3a8 | 739 | |
ddc081a1 | 740 | /* Re-enable bus master arbitration */ |
2a738352 | 741 | if (pr->flags.bm_control) { |
e12f65f7 | 742 | raw_spin_lock(&c3_lock); |
50ffba1b | 743 | acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0); |
4f86d3a8 | 744 | c3_cpu_count--; |
e12f65f7 | 745 | raw_spin_unlock(&c3_lock); |
4f86d3a8 | 746 | } |
e978aa7d | 747 | |
5f508185 RW |
748 | if (timer_bc) |
749 | lapic_timer_state_broadcast(pr, cx, 0); | |
6491bc0c RW |
750 | } |
751 | ||
752 | static int acpi_idle_enter(struct cpuidle_device *dev, | |
753 | struct cpuidle_driver *drv, int index) | |
754 | { | |
755 | struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); | |
756 | struct acpi_processor *pr; | |
757 | ||
758 | pr = __this_cpu_read(processors); | |
759 | if (unlikely(!pr)) | |
760 | return -EINVAL; | |
761 | ||
762 | if (cx->type != ACPI_STATE_C1) { | |
5f508185 | 763 | if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) { |
6491bc0c RW |
764 | index = CPUIDLE_DRIVER_STATE_START; |
765 | cx = per_cpu(acpi_cstate[index], dev->cpu); | |
766 | } else if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check) { | |
767 | if (cx->bm_sts_skip || !acpi_idle_bm_check()) { | |
5f508185 | 768 | acpi_idle_enter_bm(pr, cx, true); |
6491bc0c RW |
769 | return index; |
770 | } else if (drv->safe_state_index >= 0) { | |
771 | index = drv->safe_state_index; | |
772 | cx = per_cpu(acpi_cstate[index], dev->cpu); | |
773 | } else { | |
774 | acpi_safe_halt(); | |
775 | return -EBUSY; | |
776 | } | |
777 | } | |
778 | } | |
779 | ||
780 | lapic_timer_state_broadcast(pr, cx, 1); | |
781 | ||
782 | if (cx->type == ACPI_STATE_C3) | |
783 | ACPI_FLUSH_CPU_CACHE(); | |
784 | ||
785 | acpi_idle_do_entry(cx); | |
786 | ||
787 | lapic_timer_state_broadcast(pr, cx, 0); | |
788 | ||
e978aa7d | 789 | return index; |
4f86d3a8 LB |
790 | } |
791 | ||
5f508185 RW |
792 | static void acpi_idle_enter_freeze(struct cpuidle_device *dev, |
793 | struct cpuidle_driver *drv, int index) | |
794 | { | |
795 | struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); | |
796 | ||
797 | if (cx->type == ACPI_STATE_C3) { | |
798 | struct acpi_processor *pr = __this_cpu_read(processors); | |
799 | ||
800 | if (unlikely(!pr)) | |
801 | return; | |
802 | ||
803 | if (pr->flags.bm_check) { | |
804 | acpi_idle_enter_bm(pr, cx, false); | |
805 | return; | |
806 | } else { | |
807 | ACPI_FLUSH_CPU_CACHE(); | |
808 | } | |
809 | } | |
810 | acpi_idle_do_entry(cx); | |
811 | } | |
812 | ||
4f86d3a8 | 813 | /** |
46bcfad7 DD |
814 | * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE |
815 | * device i.e. per-cpu data | |
816 | * | |
4f86d3a8 | 817 | * @pr: the ACPI processor |
6ef0f086 | 818 | * @dev : the cpuidle device |
4f86d3a8 | 819 | */ |
6ef0f086 DL |
820 | static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, |
821 | struct cpuidle_device *dev) | |
4f86d3a8 | 822 | { |
9a0b8415 | 823 | int i, count = CPUIDLE_DRIVER_STATE_START; |
4f86d3a8 | 824 | struct acpi_processor_cx *cx; |
4f86d3a8 LB |
825 | |
826 | if (!pr->flags.power_setup_done) | |
827 | return -EINVAL; | |
828 | ||
829 | if (pr->flags.power == 0) { | |
830 | return -EINVAL; | |
831 | } | |
832 | ||
b88a634a KRW |
833 | if (!dev) |
834 | return -EINVAL; | |
835 | ||
dcb84f33 | 836 | dev->cpu = pr->id; |
4fcb2fcd | 837 | |
615dfd93 LB |
838 | if (max_cstate == 0) |
839 | max_cstate = 1; | |
840 | ||
4f86d3a8 LB |
841 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
842 | cx = &pr->power.states[i]; | |
4f86d3a8 LB |
843 | |
844 | if (!cx->valid) | |
845 | continue; | |
846 | ||
6240a10d | 847 | per_cpu(acpi_cstate[count], dev->cpu) = cx; |
4f86d3a8 | 848 | |
46bcfad7 DD |
849 | count++; |
850 | if (count == CPUIDLE_STATE_MAX) | |
851 | break; | |
852 | } | |
853 | ||
46bcfad7 DD |
854 | if (!count) |
855 | return -EINVAL; | |
856 | ||
857 | return 0; | |
858 | } | |
859 | ||
860 | /** | |
861 | * acpi_processor_setup_cpuidle states- prepares and configures cpuidle | |
862 | * global state data i.e. idle routines | |
863 | * | |
864 | * @pr: the ACPI processor | |
865 | */ | |
866 | static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr) | |
867 | { | |
868 | int i, count = CPUIDLE_DRIVER_STATE_START; | |
869 | struct acpi_processor_cx *cx; | |
870 | struct cpuidle_state *state; | |
871 | struct cpuidle_driver *drv = &acpi_idle_driver; | |
872 | ||
873 | if (!pr->flags.power_setup_done) | |
874 | return -EINVAL; | |
875 | ||
876 | if (pr->flags.power == 0) | |
877 | return -EINVAL; | |
878 | ||
879 | drv->safe_state_index = -1; | |
c7e8bdf5 | 880 | for (i = CPUIDLE_DRIVER_STATE_START; i < CPUIDLE_STATE_MAX; i++) { |
46bcfad7 DD |
881 | drv->states[i].name[0] = '\0'; |
882 | drv->states[i].desc[0] = '\0'; | |
4fcb2fcd VP |
883 | } |
884 | ||
615dfd93 LB |
885 | if (max_cstate == 0) |
886 | max_cstate = 1; | |
887 | ||
4f86d3a8 LB |
888 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
889 | cx = &pr->power.states[i]; | |
4f86d3a8 LB |
890 | |
891 | if (!cx->valid) | |
892 | continue; | |
893 | ||
46bcfad7 | 894 | state = &drv->states[count]; |
4f86d3a8 | 895 | snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i); |
4fcb2fcd | 896 | strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN); |
4f86d3a8 | 897 | state->exit_latency = cx->latency; |
4963f620 | 898 | state->target_residency = cx->latency * latency_factor; |
6491bc0c | 899 | state->enter = acpi_idle_enter; |
4f86d3a8 LB |
900 | |
901 | state->flags = 0; | |
6491bc0c | 902 | if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2) { |
1a022e3f | 903 | state->enter_dead = acpi_idle_play_dead; |
46bcfad7 | 904 | drv->safe_state_index = count; |
4f86d3a8 | 905 | } |
5f508185 RW |
906 | /* |
907 | * Halt-induced C1 is not good for ->enter_freeze, because it | |
908 | * re-enables interrupts on exit. Moreover, C1 is generally not | |
909 | * particularly interesting from the suspend-to-idle angle, so | |
910 | * avoid C1 and the situations in which we may need to fall back | |
911 | * to it altogether. | |
912 | */ | |
913 | if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr)) | |
914 | state->enter_freeze = acpi_idle_enter_freeze; | |
4f86d3a8 LB |
915 | |
916 | count++; | |
9a0b8415 | 917 | if (count == CPUIDLE_STATE_MAX) |
918 | break; | |
4f86d3a8 LB |
919 | } |
920 | ||
46bcfad7 | 921 | drv->state_count = count; |
4f86d3a8 LB |
922 | |
923 | if (!count) | |
924 | return -EINVAL; | |
925 | ||
4f86d3a8 LB |
926 | return 0; |
927 | } | |
928 | ||
35ae7133 SH |
929 | static inline void acpi_processor_cstate_first_run_checks(void) |
930 | { | |
931 | acpi_status status; | |
932 | static int first_run; | |
933 | ||
934 | if (first_run) | |
935 | return; | |
936 | dmi_check_system(processor_power_dmi_table); | |
937 | max_cstate = acpi_processor_cstate_check(max_cstate); | |
938 | if (max_cstate < ACPI_C_STATES_MAX) | |
939 | pr_notice("ACPI: processor limited to max C-state %d\n", | |
940 | max_cstate); | |
941 | first_run++; | |
942 | ||
943 | if (acpi_gbl_FADT.cst_control && !nocst) { | |
944 | status = acpi_os_write_port(acpi_gbl_FADT.smi_command, | |
945 | acpi_gbl_FADT.cst_control, 8); | |
946 | if (ACPI_FAILURE(status)) | |
947 | ACPI_EXCEPTION((AE_INFO, status, | |
948 | "Notifying BIOS of _CST ability failed")); | |
949 | } | |
950 | } | |
951 | #else | |
952 | ||
953 | static inline int disabled_by_idle_boot_param(void) { return 0; } | |
954 | static inline void acpi_processor_cstate_first_run_checks(void) { } | |
955 | static int acpi_processor_get_power_info(struct acpi_processor *pr) | |
956 | { | |
957 | return -ENODEV; | |
958 | } | |
959 | ||
960 | static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, | |
961 | struct cpuidle_device *dev) | |
962 | { | |
963 | return -EINVAL; | |
964 | } | |
965 | ||
966 | static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr) | |
967 | { | |
968 | return -EINVAL; | |
969 | } | |
970 | ||
971 | #endif /* CONFIG_ACPI_PROCESSOR_CSTATE */ | |
972 | ||
46bcfad7 | 973 | int acpi_processor_hotplug(struct acpi_processor *pr) |
4f86d3a8 | 974 | { |
dcb84f33 | 975 | int ret = 0; |
e8b1b59d | 976 | struct cpuidle_device *dev; |
4f86d3a8 | 977 | |
d1896049 | 978 | if (disabled_by_idle_boot_param()) |
36a91358 VP |
979 | return 0; |
980 | ||
bf9b59f2 | 981 | if (nocst) |
4f86d3a8 | 982 | return -ENODEV; |
4f86d3a8 LB |
983 | |
984 | if (!pr->flags.power_setup_done) | |
985 | return -ENODEV; | |
986 | ||
e8b1b59d | 987 | dev = per_cpu(acpi_cpuidle_device, pr->id); |
4f86d3a8 | 988 | cpuidle_pause_and_lock(); |
3d339dcb | 989 | cpuidle_disable_device(dev); |
4f86d3a8 | 990 | acpi_processor_get_power_info(pr); |
dcb84f33 | 991 | if (pr->flags.power) { |
6ef0f086 | 992 | acpi_processor_setup_cpuidle_cx(pr, dev); |
3d339dcb | 993 | ret = cpuidle_enable_device(dev); |
dcb84f33 | 994 | } |
4f86d3a8 LB |
995 | cpuidle_resume_and_unlock(); |
996 | ||
997 | return ret; | |
998 | } | |
999 | ||
46bcfad7 DD |
1000 | int acpi_processor_cst_has_changed(struct acpi_processor *pr) |
1001 | { | |
1002 | int cpu; | |
1003 | struct acpi_processor *_pr; | |
3d339dcb | 1004 | struct cpuidle_device *dev; |
46bcfad7 DD |
1005 | |
1006 | if (disabled_by_idle_boot_param()) | |
1007 | return 0; | |
1008 | ||
46bcfad7 DD |
1009 | if (nocst) |
1010 | return -ENODEV; | |
1011 | ||
1012 | if (!pr->flags.power_setup_done) | |
1013 | return -ENODEV; | |
1014 | ||
1015 | /* | |
1016 | * FIXME: Design the ACPI notification to make it once per | |
1017 | * system instead of once per-cpu. This condition is a hack | |
1018 | * to make the code that updates C-States be called once. | |
1019 | */ | |
1020 | ||
9505626d | 1021 | if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) { |
46bcfad7 | 1022 | |
46bcfad7 DD |
1023 | /* Protect against cpu-hotplug */ |
1024 | get_online_cpus(); | |
6726655d | 1025 | cpuidle_pause_and_lock(); |
46bcfad7 DD |
1026 | |
1027 | /* Disable all cpuidle devices */ | |
1028 | for_each_online_cpu(cpu) { | |
1029 | _pr = per_cpu(processors, cpu); | |
1030 | if (!_pr || !_pr->flags.power_setup_done) | |
1031 | continue; | |
3d339dcb DL |
1032 | dev = per_cpu(acpi_cpuidle_device, cpu); |
1033 | cpuidle_disable_device(dev); | |
46bcfad7 DD |
1034 | } |
1035 | ||
1036 | /* Populate Updated C-state information */ | |
f427e5f1 | 1037 | acpi_processor_get_power_info(pr); |
46bcfad7 DD |
1038 | acpi_processor_setup_cpuidle_states(pr); |
1039 | ||
1040 | /* Enable all cpuidle devices */ | |
1041 | for_each_online_cpu(cpu) { | |
1042 | _pr = per_cpu(processors, cpu); | |
1043 | if (!_pr || !_pr->flags.power_setup_done) | |
1044 | continue; | |
1045 | acpi_processor_get_power_info(_pr); | |
1046 | if (_pr->flags.power) { | |
3d339dcb | 1047 | dev = per_cpu(acpi_cpuidle_device, cpu); |
6ef0f086 | 1048 | acpi_processor_setup_cpuidle_cx(_pr, dev); |
3d339dcb | 1049 | cpuidle_enable_device(dev); |
46bcfad7 DD |
1050 | } |
1051 | } | |
46bcfad7 | 1052 | cpuidle_resume_and_unlock(); |
6726655d | 1053 | put_online_cpus(); |
46bcfad7 DD |
1054 | } |
1055 | ||
1056 | return 0; | |
1057 | } | |
1058 | ||
1059 | static int acpi_processor_registered; | |
1060 | ||
fe7bf106 | 1061 | int acpi_processor_power_init(struct acpi_processor *pr) |
1da177e4 | 1062 | { |
46bcfad7 | 1063 | int retval; |
3d339dcb | 1064 | struct cpuidle_device *dev; |
1da177e4 | 1065 | |
d1896049 | 1066 | if (disabled_by_idle_boot_param()) |
36a91358 | 1067 | return 0; |
1da177e4 | 1068 | |
35ae7133 | 1069 | acpi_processor_cstate_first_run_checks(); |
1da177e4 | 1070 | |
35ae7133 SH |
1071 | if (!acpi_processor_get_power_info(pr)) |
1072 | pr->flags.power_setup_done = 1; | |
1da177e4 LT |
1073 | |
1074 | /* | |
1075 | * Install the idle handler if processor power management is supported. | |
1076 | * Note that we use previously set idle handler will be used on | |
1077 | * platforms that only support C1. | |
1078 | */ | |
36a91358 | 1079 | if (pr->flags.power) { |
46bcfad7 DD |
1080 | /* Register acpi_idle_driver if not already registered */ |
1081 | if (!acpi_processor_registered) { | |
1082 | acpi_processor_setup_cpuidle_states(pr); | |
1083 | retval = cpuidle_register_driver(&acpi_idle_driver); | |
1084 | if (retval) | |
1085 | return retval; | |
b6ec26fb SH |
1086 | pr_debug("%s registered with cpuidle\n", |
1087 | acpi_idle_driver.name); | |
46bcfad7 | 1088 | } |
3d339dcb DL |
1089 | |
1090 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); | |
1091 | if (!dev) | |
1092 | return -ENOMEM; | |
1093 | per_cpu(acpi_cpuidle_device, pr->id) = dev; | |
1094 | ||
6ef0f086 | 1095 | acpi_processor_setup_cpuidle_cx(pr, dev); |
3d339dcb | 1096 | |
46bcfad7 DD |
1097 | /* Register per-cpu cpuidle_device. Cpuidle driver |
1098 | * must already be registered before registering device | |
1099 | */ | |
3d339dcb | 1100 | retval = cpuidle_register_device(dev); |
46bcfad7 DD |
1101 | if (retval) { |
1102 | if (acpi_processor_registered == 0) | |
1103 | cpuidle_unregister_driver(&acpi_idle_driver); | |
1104 | return retval; | |
1105 | } | |
1106 | acpi_processor_registered++; | |
1da177e4 | 1107 | } |
d550d98d | 1108 | return 0; |
1da177e4 LT |
1109 | } |
1110 | ||
38a991b6 | 1111 | int acpi_processor_power_exit(struct acpi_processor *pr) |
1da177e4 | 1112 | { |
3d339dcb DL |
1113 | struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id); |
1114 | ||
d1896049 | 1115 | if (disabled_by_idle_boot_param()) |
36a91358 VP |
1116 | return 0; |
1117 | ||
46bcfad7 | 1118 | if (pr->flags.power) { |
3d339dcb | 1119 | cpuidle_unregister_device(dev); |
46bcfad7 DD |
1120 | acpi_processor_registered--; |
1121 | if (acpi_processor_registered == 0) | |
1122 | cpuidle_unregister_driver(&acpi_idle_driver); | |
1123 | } | |
1da177e4 | 1124 | |
46bcfad7 | 1125 | pr->flags.power_setup_done = 0; |
d550d98d | 1126 | return 0; |
1da177e4 | 1127 | } |