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1da177e4 LT |
1 | /* |
2 | * processor_idle - idle state submodule to the ACPI processor driver | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
6 | * Copyright (C) 2004 Dominik Brodowski <linux@brodo.de> | |
7 | * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> | |
8 | * - Added processor hotplug support | |
02df8b93 VP |
9 | * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> |
10 | * - Added support for C3 on SMP | |
1da177e4 LT |
11 | * |
12 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or (at | |
17 | * your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, but | |
20 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
22 | * General Public License for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License along | |
25 | * with this program; if not, write to the Free Software Foundation, Inc., | |
26 | * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
27 | * | |
28 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
29 | */ | |
30 | ||
31 | #include <linux/kernel.h> | |
32 | #include <linux/module.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/cpufreq.h> | |
35 | #include <linux/proc_fs.h> | |
36 | #include <linux/seq_file.h> | |
37 | #include <linux/acpi.h> | |
38 | #include <linux/dmi.h> | |
39 | #include <linux/moduleparam.h> | |
4e57b681 | 40 | #include <linux/sched.h> /* need_resched() */ |
1da177e4 LT |
41 | |
42 | #include <asm/io.h> | |
43 | #include <asm/uaccess.h> | |
44 | ||
45 | #include <acpi/acpi_bus.h> | |
46 | #include <acpi/processor.h> | |
47 | ||
48 | #define ACPI_PROCESSOR_COMPONENT 0x01000000 | |
49 | #define ACPI_PROCESSOR_CLASS "processor" | |
50 | #define ACPI_PROCESSOR_DRIVER_NAME "ACPI Processor Driver" | |
51 | #define _COMPONENT ACPI_PROCESSOR_COMPONENT | |
4be44fcd | 52 | ACPI_MODULE_NAME("acpi_processor") |
1da177e4 | 53 | #define ACPI_PROCESSOR_FILE_POWER "power" |
1da177e4 LT |
54 | #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000) |
55 | #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */ | |
56 | #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */ | |
b6835052 | 57 | static void (*pm_idle_save) (void) __read_mostly; |
1da177e4 LT |
58 | module_param(max_cstate, uint, 0644); |
59 | ||
b6835052 | 60 | static unsigned int nocst __read_mostly; |
1da177e4 LT |
61 | module_param(nocst, uint, 0000); |
62 | ||
63 | /* | |
64 | * bm_history -- bit-mask with a bit per jiffy of bus-master activity | |
65 | * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms | |
66 | * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms | |
67 | * 100 HZ: 0x0000000F: 4 jiffies = 40ms | |
68 | * reduce history for more aggressive entry into C3 | |
69 | */ | |
b6835052 | 70 | static unsigned int bm_history __read_mostly = |
4be44fcd | 71 | (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1)); |
1da177e4 LT |
72 | module_param(bm_history, uint, 0644); |
73 | /* -------------------------------------------------------------------------- | |
74 | Power Management | |
75 | -------------------------------------------------------------------------- */ | |
76 | ||
77 | /* | |
78 | * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. | |
79 | * For now disable this. Probably a bug somewhere else. | |
80 | * | |
81 | * To skip this limit, boot/load with a large max_cstate limit. | |
82 | */ | |
335f16be | 83 | static int set_max_cstate(struct dmi_system_id *id) |
1da177e4 LT |
84 | { |
85 | if (max_cstate > ACPI_PROCESSOR_MAX_POWER) | |
86 | return 0; | |
87 | ||
3d35600a | 88 | printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate." |
4be44fcd LB |
89 | " Override with \"processor.max_cstate=%d\"\n", id->ident, |
90 | (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); | |
1da177e4 | 91 | |
3d35600a | 92 | max_cstate = (long)id->driver_data; |
1da177e4 LT |
93 | |
94 | return 0; | |
95 | } | |
96 | ||
7ded5689 AR |
97 | /* Actually this shouldn't be __cpuinitdata, would be better to fix the |
98 | callers to only run once -AK */ | |
99 | static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = { | |
876c184b TR |
100 | { set_max_cstate, "IBM ThinkPad R40e", { |
101 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
102 | DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1}, | |
103 | { set_max_cstate, "IBM ThinkPad R40e", { | |
104 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
105 | DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1}, | |
106 | { set_max_cstate, "IBM ThinkPad R40e", { | |
107 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
108 | DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1}, | |
109 | { set_max_cstate, "IBM ThinkPad R40e", { | |
110 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
111 | DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1}, | |
112 | { set_max_cstate, "IBM ThinkPad R40e", { | |
113 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
114 | DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1}, | |
115 | { set_max_cstate, "IBM ThinkPad R40e", { | |
116 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
117 | DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1}, | |
118 | { set_max_cstate, "IBM ThinkPad R40e", { | |
119 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
120 | DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1}, | |
121 | { set_max_cstate, "IBM ThinkPad R40e", { | |
122 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
123 | DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1}, | |
124 | { set_max_cstate, "IBM ThinkPad R40e", { | |
125 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
126 | DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1}, | |
127 | { set_max_cstate, "IBM ThinkPad R40e", { | |
128 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
129 | DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1}, | |
130 | { set_max_cstate, "IBM ThinkPad R40e", { | |
131 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
132 | DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1}, | |
133 | { set_max_cstate, "IBM ThinkPad R40e", { | |
134 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
135 | DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1}, | |
136 | { set_max_cstate, "IBM ThinkPad R40e", { | |
137 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
138 | DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1}, | |
139 | { set_max_cstate, "IBM ThinkPad R40e", { | |
140 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
141 | DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1}, | |
142 | { set_max_cstate, "IBM ThinkPad R40e", { | |
143 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
144 | DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1}, | |
145 | { set_max_cstate, "Medion 41700", { | |
146 | DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), | |
147 | DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1}, | |
148 | { set_max_cstate, "Clevo 5600D", { | |
149 | DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), | |
150 | DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, | |
4be44fcd | 151 | (void *)2}, |
1da177e4 LT |
152 | {}, |
153 | }; | |
154 | ||
4be44fcd | 155 | static inline u32 ticks_elapsed(u32 t1, u32 t2) |
1da177e4 LT |
156 | { |
157 | if (t2 >= t1) | |
158 | return (t2 - t1); | |
159 | else if (!acpi_fadt.tmr_val_ext) | |
160 | return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF); | |
161 | else | |
162 | return ((0xFFFFFFFF - t1) + t2); | |
163 | } | |
164 | ||
1da177e4 | 165 | static void |
4be44fcd LB |
166 | acpi_processor_power_activate(struct acpi_processor *pr, |
167 | struct acpi_processor_cx *new) | |
1da177e4 | 168 | { |
4be44fcd | 169 | struct acpi_processor_cx *old; |
1da177e4 LT |
170 | |
171 | if (!pr || !new) | |
172 | return; | |
173 | ||
174 | old = pr->power.state; | |
175 | ||
176 | if (old) | |
177 | old->promotion.count = 0; | |
4be44fcd | 178 | new->demotion.count = 0; |
1da177e4 LT |
179 | |
180 | /* Cleanup from old state. */ | |
181 | if (old) { | |
182 | switch (old->type) { | |
183 | case ACPI_STATE_C3: | |
184 | /* Disable bus master reload */ | |
02df8b93 | 185 | if (new->type != ACPI_STATE_C3 && pr->flags.bm_check) |
4be44fcd LB |
186 | acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0, |
187 | ACPI_MTX_DO_NOT_LOCK); | |
1da177e4 LT |
188 | break; |
189 | } | |
190 | } | |
191 | ||
192 | /* Prepare to use new state. */ | |
193 | switch (new->type) { | |
194 | case ACPI_STATE_C3: | |
195 | /* Enable bus master reload */ | |
02df8b93 | 196 | if (old->type != ACPI_STATE_C3 && pr->flags.bm_check) |
4be44fcd LB |
197 | acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1, |
198 | ACPI_MTX_DO_NOT_LOCK); | |
1da177e4 LT |
199 | break; |
200 | } | |
201 | ||
202 | pr->power.state = new; | |
203 | ||
204 | return; | |
205 | } | |
206 | ||
64c7c8f8 NP |
207 | static void acpi_safe_halt(void) |
208 | { | |
495ab9c0 | 209 | current_thread_info()->status &= ~TS_POLLING; |
2a298a35 | 210 | smp_mb__after_clear_bit(); |
64c7c8f8 NP |
211 | if (!need_resched()) |
212 | safe_halt(); | |
495ab9c0 | 213 | current_thread_info()->status |= TS_POLLING; |
64c7c8f8 NP |
214 | } |
215 | ||
4be44fcd | 216 | static atomic_t c3_cpu_count; |
1da177e4 | 217 | |
4be44fcd | 218 | static void acpi_processor_idle(void) |
1da177e4 | 219 | { |
4be44fcd | 220 | struct acpi_processor *pr = NULL; |
1da177e4 LT |
221 | struct acpi_processor_cx *cx = NULL; |
222 | struct acpi_processor_cx *next_state = NULL; | |
4be44fcd LB |
223 | int sleep_ticks = 0; |
224 | u32 t1, t2 = 0; | |
1da177e4 | 225 | |
64c7c8f8 | 226 | pr = processors[smp_processor_id()]; |
1da177e4 LT |
227 | if (!pr) |
228 | return; | |
229 | ||
230 | /* | |
231 | * Interrupts must be disabled during bus mastering calculations and | |
232 | * for C2/C3 transitions. | |
233 | */ | |
234 | local_irq_disable(); | |
235 | ||
236 | /* | |
237 | * Check whether we truly need to go idle, or should | |
238 | * reschedule: | |
239 | */ | |
240 | if (unlikely(need_resched())) { | |
241 | local_irq_enable(); | |
242 | return; | |
243 | } | |
244 | ||
245 | cx = pr->power.state; | |
64c7c8f8 NP |
246 | if (!cx) { |
247 | if (pm_idle_save) | |
248 | pm_idle_save(); | |
249 | else | |
250 | acpi_safe_halt(); | |
251 | return; | |
252 | } | |
1da177e4 LT |
253 | |
254 | /* | |
255 | * Check BM Activity | |
256 | * ----------------- | |
257 | * Check for bus mastering activity (if required), record, and check | |
258 | * for demotion. | |
259 | */ | |
260 | if (pr->flags.bm_check) { | |
4be44fcd LB |
261 | u32 bm_status = 0; |
262 | unsigned long diff = jiffies - pr->power.bm_check_timestamp; | |
1da177e4 LT |
263 | |
264 | if (diff > 32) | |
265 | diff = 32; | |
266 | ||
267 | while (diff) { | |
268 | /* if we didn't get called, assume there was busmaster activity */ | |
269 | diff--; | |
270 | if (diff) | |
271 | pr->power.bm_activity |= 0x1; | |
272 | pr->power.bm_activity <<= 1; | |
273 | } | |
274 | ||
275 | acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, | |
4be44fcd | 276 | &bm_status, ACPI_MTX_DO_NOT_LOCK); |
1da177e4 LT |
277 | if (bm_status) { |
278 | pr->power.bm_activity++; | |
279 | acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, | |
4be44fcd | 280 | 1, ACPI_MTX_DO_NOT_LOCK); |
1da177e4 LT |
281 | } |
282 | /* | |
283 | * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect | |
284 | * the true state of bus mastering activity; forcing us to | |
285 | * manually check the BMIDEA bit of each IDE channel. | |
286 | */ | |
287 | else if (errata.piix4.bmisx) { | |
288 | if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) | |
4be44fcd | 289 | || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) |
1da177e4 LT |
290 | pr->power.bm_activity++; |
291 | } | |
292 | ||
293 | pr->power.bm_check_timestamp = jiffies; | |
294 | ||
295 | /* | |
296 | * Apply bus mastering demotion policy. Automatically demote | |
297 | * to avoid a faulty transition. Note that the processor | |
298 | * won't enter a low-power state during this call (to this | |
299 | * funciton) but should upon the next. | |
300 | * | |
301 | * TBD: A better policy might be to fallback to the demotion | |
302 | * state (use it for this quantum only) istead of | |
303 | * demoting -- and rely on duration as our sole demotion | |
304 | * qualification. This may, however, introduce DMA | |
305 | * issues (e.g. floppy DMA transfer overrun/underrun). | |
306 | */ | |
307 | if (pr->power.bm_activity & cx->demotion.threshold.bm) { | |
308 | local_irq_enable(); | |
309 | next_state = cx->demotion.state; | |
310 | goto end; | |
311 | } | |
312 | } | |
313 | ||
4c033552 VP |
314 | #ifdef CONFIG_HOTPLUG_CPU |
315 | /* | |
316 | * Check for P_LVL2_UP flag before entering C2 and above on | |
317 | * an SMP system. We do it here instead of doing it at _CST/P_LVL | |
318 | * detection phase, to work cleanly with logical CPU hotplug. | |
319 | */ | |
320 | if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
1e483969 DSL |
321 | !pr->flags.has_cst && !acpi_fadt.plvl2_up) |
322 | cx = &pr->power.states[ACPI_STATE_C1]; | |
4c033552 | 323 | #endif |
1e483969 DSL |
324 | |
325 | cx->usage++; | |
326 | ||
1da177e4 LT |
327 | /* |
328 | * Sleep: | |
329 | * ------ | |
330 | * Invoke the current Cx state to put the processor to sleep. | |
331 | */ | |
2a298a35 | 332 | if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) { |
495ab9c0 | 333 | current_thread_info()->status &= ~TS_POLLING; |
2a298a35 NP |
334 | smp_mb__after_clear_bit(); |
335 | if (need_resched()) { | |
495ab9c0 | 336 | current_thread_info()->status |= TS_POLLING; |
af2eb17b | 337 | local_irq_enable(); |
2a298a35 NP |
338 | return; |
339 | } | |
340 | } | |
341 | ||
1da177e4 LT |
342 | switch (cx->type) { |
343 | ||
344 | case ACPI_STATE_C1: | |
345 | /* | |
346 | * Invoke C1. | |
347 | * Use the appropriate idle routine, the one that would | |
348 | * be used without acpi C-states. | |
349 | */ | |
350 | if (pm_idle_save) | |
351 | pm_idle_save(); | |
352 | else | |
64c7c8f8 NP |
353 | acpi_safe_halt(); |
354 | ||
1da177e4 | 355 | /* |
4be44fcd | 356 | * TBD: Can't get time duration while in C1, as resumes |
1da177e4 LT |
357 | * go to an ISR rather than here. Need to instrument |
358 | * base interrupt handler. | |
359 | */ | |
360 | sleep_ticks = 0xFFFFFFFF; | |
361 | break; | |
362 | ||
363 | case ACPI_STATE_C2: | |
364 | /* Get start time (ticks) */ | |
365 | t1 = inl(acpi_fadt.xpm_tmr_blk.address); | |
366 | /* Invoke C2 */ | |
367 | inb(cx->address); | |
368 | /* Dummy op - must do something useless after P_LVL2 read */ | |
369 | t2 = inl(acpi_fadt.xpm_tmr_blk.address); | |
370 | /* Get end time (ticks) */ | |
371 | t2 = inl(acpi_fadt.xpm_tmr_blk.address); | |
539eb11e JS |
372 | |
373 | #ifdef CONFIG_GENERIC_TIME | |
374 | /* TSC halts in C2, so notify users */ | |
375 | mark_tsc_unstable(); | |
376 | #endif | |
1da177e4 LT |
377 | /* Re-enable interrupts */ |
378 | local_irq_enable(); | |
495ab9c0 | 379 | current_thread_info()->status |= TS_POLLING; |
1da177e4 | 380 | /* Compute time (ticks) that we were actually asleep */ |
4be44fcd LB |
381 | sleep_ticks = |
382 | ticks_elapsed(t1, t2) - cx->latency_ticks - C2_OVERHEAD; | |
1da177e4 LT |
383 | break; |
384 | ||
385 | case ACPI_STATE_C3: | |
4be44fcd | 386 | |
02df8b93 VP |
387 | if (pr->flags.bm_check) { |
388 | if (atomic_inc_return(&c3_cpu_count) == | |
4be44fcd | 389 | num_online_cpus()) { |
02df8b93 VP |
390 | /* |
391 | * All CPUs are trying to go to C3 | |
392 | * Disable bus master arbitration | |
393 | */ | |
394 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1, | |
4be44fcd | 395 | ACPI_MTX_DO_NOT_LOCK); |
02df8b93 VP |
396 | } |
397 | } else { | |
398 | /* SMP with no shared cache... Invalidate cache */ | |
399 | ACPI_FLUSH_CPU_CACHE(); | |
400 | } | |
4be44fcd | 401 | |
1da177e4 LT |
402 | /* Get start time (ticks) */ |
403 | t1 = inl(acpi_fadt.xpm_tmr_blk.address); | |
404 | /* Invoke C3 */ | |
405 | inb(cx->address); | |
406 | /* Dummy op - must do something useless after P_LVL3 read */ | |
407 | t2 = inl(acpi_fadt.xpm_tmr_blk.address); | |
408 | /* Get end time (ticks) */ | |
409 | t2 = inl(acpi_fadt.xpm_tmr_blk.address); | |
02df8b93 VP |
410 | if (pr->flags.bm_check) { |
411 | /* Enable bus master arbitration */ | |
412 | atomic_dec(&c3_cpu_count); | |
4be44fcd LB |
413 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0, |
414 | ACPI_MTX_DO_NOT_LOCK); | |
02df8b93 VP |
415 | } |
416 | ||
539eb11e JS |
417 | #ifdef CONFIG_GENERIC_TIME |
418 | /* TSC halts in C3, so notify users */ | |
419 | mark_tsc_unstable(); | |
420 | #endif | |
1da177e4 LT |
421 | /* Re-enable interrupts */ |
422 | local_irq_enable(); | |
495ab9c0 | 423 | current_thread_info()->status |= TS_POLLING; |
1da177e4 | 424 | /* Compute time (ticks) that we were actually asleep */ |
4be44fcd LB |
425 | sleep_ticks = |
426 | ticks_elapsed(t1, t2) - cx->latency_ticks - C3_OVERHEAD; | |
1da177e4 LT |
427 | break; |
428 | ||
429 | default: | |
430 | local_irq_enable(); | |
431 | return; | |
432 | } | |
433 | ||
434 | next_state = pr->power.state; | |
435 | ||
1e483969 DSL |
436 | #ifdef CONFIG_HOTPLUG_CPU |
437 | /* Don't do promotion/demotion */ | |
438 | if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
439 | !pr->flags.has_cst && !acpi_fadt.plvl2_up) { | |
440 | next_state = cx; | |
441 | goto end; | |
442 | } | |
443 | #endif | |
444 | ||
1da177e4 LT |
445 | /* |
446 | * Promotion? | |
447 | * ---------- | |
448 | * Track the number of longs (time asleep is greater than threshold) | |
449 | * and promote when the count threshold is reached. Note that bus | |
450 | * mastering activity may prevent promotions. | |
451 | * Do not promote above max_cstate. | |
452 | */ | |
453 | if (cx->promotion.state && | |
454 | ((cx->promotion.state - pr->power.states) <= max_cstate)) { | |
455 | if (sleep_ticks > cx->promotion.threshold.ticks) { | |
456 | cx->promotion.count++; | |
4be44fcd LB |
457 | cx->demotion.count = 0; |
458 | if (cx->promotion.count >= | |
459 | cx->promotion.threshold.count) { | |
1da177e4 | 460 | if (pr->flags.bm_check) { |
4be44fcd LB |
461 | if (! |
462 | (pr->power.bm_activity & cx-> | |
463 | promotion.threshold.bm)) { | |
464 | next_state = | |
465 | cx->promotion.state; | |
1da177e4 LT |
466 | goto end; |
467 | } | |
4be44fcd | 468 | } else { |
1da177e4 LT |
469 | next_state = cx->promotion.state; |
470 | goto end; | |
471 | } | |
472 | } | |
473 | } | |
474 | } | |
475 | ||
476 | /* | |
477 | * Demotion? | |
478 | * --------- | |
479 | * Track the number of shorts (time asleep is less than time threshold) | |
480 | * and demote when the usage threshold is reached. | |
481 | */ | |
482 | if (cx->demotion.state) { | |
483 | if (sleep_ticks < cx->demotion.threshold.ticks) { | |
484 | cx->demotion.count++; | |
485 | cx->promotion.count = 0; | |
486 | if (cx->demotion.count >= cx->demotion.threshold.count) { | |
487 | next_state = cx->demotion.state; | |
488 | goto end; | |
489 | } | |
490 | } | |
491 | } | |
492 | ||
4be44fcd | 493 | end: |
1da177e4 LT |
494 | /* |
495 | * Demote if current state exceeds max_cstate | |
496 | */ | |
497 | if ((pr->power.state - pr->power.states) > max_cstate) { | |
498 | if (cx->demotion.state) | |
499 | next_state = cx->demotion.state; | |
500 | } | |
501 | ||
502 | /* | |
503 | * New Cx State? | |
504 | * ------------- | |
505 | * If we're going to start using a new Cx state we must clean up | |
506 | * from the previous and prepare to use the new. | |
507 | */ | |
508 | if (next_state != pr->power.state) | |
509 | acpi_processor_power_activate(pr, next_state); | |
1da177e4 LT |
510 | } |
511 | ||
4be44fcd | 512 | static int acpi_processor_set_power_policy(struct acpi_processor *pr) |
1da177e4 LT |
513 | { |
514 | unsigned int i; | |
515 | unsigned int state_is_set = 0; | |
516 | struct acpi_processor_cx *lower = NULL; | |
517 | struct acpi_processor_cx *higher = NULL; | |
518 | struct acpi_processor_cx *cx; | |
519 | ||
1da177e4 LT |
520 | |
521 | if (!pr) | |
d550d98d | 522 | return -EINVAL; |
1da177e4 LT |
523 | |
524 | /* | |
525 | * This function sets the default Cx state policy (OS idle handler). | |
526 | * Our scheme is to promote quickly to C2 but more conservatively | |
527 | * to C3. We're favoring C2 for its characteristics of low latency | |
528 | * (quick response), good power savings, and ability to allow bus | |
529 | * mastering activity. Note that the Cx state policy is completely | |
530 | * customizable and can be altered dynamically. | |
531 | */ | |
532 | ||
533 | /* startup state */ | |
4be44fcd | 534 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { |
1da177e4 LT |
535 | cx = &pr->power.states[i]; |
536 | if (!cx->valid) | |
537 | continue; | |
538 | ||
539 | if (!state_is_set) | |
540 | pr->power.state = cx; | |
541 | state_is_set++; | |
542 | break; | |
4be44fcd | 543 | } |
1da177e4 LT |
544 | |
545 | if (!state_is_set) | |
d550d98d | 546 | return -ENODEV; |
1da177e4 LT |
547 | |
548 | /* demotion */ | |
4be44fcd | 549 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { |
1da177e4 LT |
550 | cx = &pr->power.states[i]; |
551 | if (!cx->valid) | |
552 | continue; | |
553 | ||
554 | if (lower) { | |
555 | cx->demotion.state = lower; | |
556 | cx->demotion.threshold.ticks = cx->latency_ticks; | |
557 | cx->demotion.threshold.count = 1; | |
558 | if (cx->type == ACPI_STATE_C3) | |
559 | cx->demotion.threshold.bm = bm_history; | |
560 | } | |
561 | ||
562 | lower = cx; | |
563 | } | |
564 | ||
565 | /* promotion */ | |
566 | for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) { | |
567 | cx = &pr->power.states[i]; | |
568 | if (!cx->valid) | |
569 | continue; | |
570 | ||
571 | if (higher) { | |
4be44fcd | 572 | cx->promotion.state = higher; |
1da177e4 LT |
573 | cx->promotion.threshold.ticks = cx->latency_ticks; |
574 | if (cx->type >= ACPI_STATE_C2) | |
575 | cx->promotion.threshold.count = 4; | |
576 | else | |
577 | cx->promotion.threshold.count = 10; | |
578 | if (higher->type == ACPI_STATE_C3) | |
579 | cx->promotion.threshold.bm = bm_history; | |
580 | } | |
581 | ||
582 | higher = cx; | |
583 | } | |
584 | ||
d550d98d | 585 | return 0; |
1da177e4 LT |
586 | } |
587 | ||
4be44fcd | 588 | static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) |
1da177e4 | 589 | { |
1da177e4 LT |
590 | |
591 | if (!pr) | |
d550d98d | 592 | return -EINVAL; |
1da177e4 LT |
593 | |
594 | if (!pr->pblk) | |
d550d98d | 595 | return -ENODEV; |
1da177e4 | 596 | |
1da177e4 | 597 | /* if info is obtained from pblk/fadt, type equals state */ |
1da177e4 LT |
598 | pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; |
599 | pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; | |
600 | ||
4c033552 VP |
601 | #ifndef CONFIG_HOTPLUG_CPU |
602 | /* | |
603 | * Check for P_LVL2_UP flag before entering C2 and above on | |
604 | * an SMP system. | |
605 | */ | |
1e483969 | 606 | if ((num_online_cpus() > 1) && !acpi_fadt.plvl2_up) |
d550d98d | 607 | return -ENODEV; |
4c033552 VP |
608 | #endif |
609 | ||
1da177e4 LT |
610 | /* determine C2 and C3 address from pblk */ |
611 | pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; | |
612 | pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; | |
613 | ||
614 | /* determine latencies from FADT */ | |
615 | pr->power.states[ACPI_STATE_C2].latency = acpi_fadt.plvl2_lat; | |
616 | pr->power.states[ACPI_STATE_C3].latency = acpi_fadt.plvl3_lat; | |
617 | ||
618 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
619 | "lvl2[0x%08x] lvl3[0x%08x]\n", | |
620 | pr->power.states[ACPI_STATE_C2].address, | |
621 | pr->power.states[ACPI_STATE_C3].address)); | |
622 | ||
d550d98d | 623 | return 0; |
1da177e4 LT |
624 | } |
625 | ||
4be44fcd | 626 | static int acpi_processor_get_power_info_default_c1(struct acpi_processor *pr) |
acf05f4b | 627 | { |
acf05f4b | 628 | |
cf824788 | 629 | /* Zero initialize all the C-states info. */ |
2203d6ed | 630 | memset(pr->power.states, 0, sizeof(pr->power.states)); |
acf05f4b | 631 | |
cf824788 | 632 | /* set the first C-State to C1 */ |
acf05f4b | 633 | pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; |
acf05f4b VP |
634 | |
635 | /* the C0 state only exists as a filler in our array, | |
636 | * and all processors need to support C1 */ | |
637 | pr->power.states[ACPI_STATE_C0].valid = 1; | |
638 | pr->power.states[ACPI_STATE_C1].valid = 1; | |
639 | ||
d550d98d | 640 | return 0; |
acf05f4b VP |
641 | } |
642 | ||
4be44fcd | 643 | static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) |
1da177e4 | 644 | { |
4be44fcd LB |
645 | acpi_status status = 0; |
646 | acpi_integer count; | |
cf824788 | 647 | int current_count; |
4be44fcd LB |
648 | int i; |
649 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; | |
650 | union acpi_object *cst; | |
1da177e4 | 651 | |
1da177e4 | 652 | |
1da177e4 | 653 | if (nocst) |
d550d98d | 654 | return -ENODEV; |
1da177e4 | 655 | |
cf824788 JM |
656 | current_count = 1; |
657 | ||
658 | /* Zero initialize C2 onwards and prepare for fresh CST lookup */ | |
659 | for (i = 2; i < ACPI_PROCESSOR_MAX_POWER; i++) | |
660 | memset(&(pr->power.states[i]), 0, | |
661 | sizeof(struct acpi_processor_cx)); | |
1da177e4 LT |
662 | |
663 | status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer); | |
664 | if (ACPI_FAILURE(status)) { | |
665 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n")); | |
d550d98d | 666 | return -ENODEV; |
4be44fcd | 667 | } |
1da177e4 | 668 | |
4be44fcd | 669 | cst = (union acpi_object *)buffer.pointer; |
1da177e4 LT |
670 | |
671 | /* There must be at least 2 elements */ | |
672 | if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) { | |
6468463a | 673 | printk(KERN_ERR PREFIX "not enough elements in _CST\n"); |
1da177e4 LT |
674 | status = -EFAULT; |
675 | goto end; | |
676 | } | |
677 | ||
678 | count = cst->package.elements[0].integer.value; | |
679 | ||
680 | /* Validate number of power states. */ | |
681 | if (count < 1 || count != cst->package.count - 1) { | |
6468463a | 682 | printk(KERN_ERR PREFIX "count given by _CST is not valid\n"); |
1da177e4 LT |
683 | status = -EFAULT; |
684 | goto end; | |
685 | } | |
686 | ||
1da177e4 LT |
687 | /* Tell driver that at least _CST is supported. */ |
688 | pr->flags.has_cst = 1; | |
689 | ||
690 | for (i = 1; i <= count; i++) { | |
691 | union acpi_object *element; | |
692 | union acpi_object *obj; | |
693 | struct acpi_power_register *reg; | |
694 | struct acpi_processor_cx cx; | |
695 | ||
696 | memset(&cx, 0, sizeof(cx)); | |
697 | ||
4be44fcd | 698 | element = (union acpi_object *)&(cst->package.elements[i]); |
1da177e4 LT |
699 | if (element->type != ACPI_TYPE_PACKAGE) |
700 | continue; | |
701 | ||
702 | if (element->package.count != 4) | |
703 | continue; | |
704 | ||
4be44fcd | 705 | obj = (union acpi_object *)&(element->package.elements[0]); |
1da177e4 LT |
706 | |
707 | if (obj->type != ACPI_TYPE_BUFFER) | |
708 | continue; | |
709 | ||
4be44fcd | 710 | reg = (struct acpi_power_register *)obj->buffer.pointer; |
1da177e4 LT |
711 | |
712 | if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && | |
4be44fcd | 713 | (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) |
1da177e4 LT |
714 | continue; |
715 | ||
716 | cx.address = (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) ? | |
4be44fcd | 717 | 0 : reg->address; |
1da177e4 LT |
718 | |
719 | /* There should be an easy way to extract an integer... */ | |
4be44fcd | 720 | obj = (union acpi_object *)&(element->package.elements[1]); |
1da177e4 LT |
721 | if (obj->type != ACPI_TYPE_INTEGER) |
722 | continue; | |
723 | ||
724 | cx.type = obj->integer.value; | |
725 | ||
726 | if ((cx.type != ACPI_STATE_C1) && | |
727 | (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO)) | |
728 | continue; | |
729 | ||
cf824788 | 730 | if ((cx.type < ACPI_STATE_C2) || (cx.type > ACPI_STATE_C3)) |
1da177e4 LT |
731 | continue; |
732 | ||
4be44fcd | 733 | obj = (union acpi_object *)&(element->package.elements[2]); |
1da177e4 LT |
734 | if (obj->type != ACPI_TYPE_INTEGER) |
735 | continue; | |
736 | ||
737 | cx.latency = obj->integer.value; | |
738 | ||
4be44fcd | 739 | obj = (union acpi_object *)&(element->package.elements[3]); |
1da177e4 LT |
740 | if (obj->type != ACPI_TYPE_INTEGER) |
741 | continue; | |
742 | ||
743 | cx.power = obj->integer.value; | |
744 | ||
cf824788 JM |
745 | current_count++; |
746 | memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx)); | |
747 | ||
748 | /* | |
749 | * We support total ACPI_PROCESSOR_MAX_POWER - 1 | |
750 | * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1) | |
751 | */ | |
752 | if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) { | |
753 | printk(KERN_WARNING | |
754 | "Limiting number of power states to max (%d)\n", | |
755 | ACPI_PROCESSOR_MAX_POWER); | |
756 | printk(KERN_WARNING | |
757 | "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); | |
758 | break; | |
759 | } | |
1da177e4 LT |
760 | } |
761 | ||
4be44fcd | 762 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n", |
cf824788 | 763 | current_count)); |
1da177e4 LT |
764 | |
765 | /* Validate number of power states discovered */ | |
cf824788 | 766 | if (current_count < 2) |
6d93c648 | 767 | status = -EFAULT; |
1da177e4 | 768 | |
4be44fcd | 769 | end: |
1da177e4 LT |
770 | acpi_os_free(buffer.pointer); |
771 | ||
d550d98d | 772 | return status; |
1da177e4 LT |
773 | } |
774 | ||
1da177e4 LT |
775 | static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx) |
776 | { | |
1da177e4 LT |
777 | |
778 | if (!cx->address) | |
d550d98d | 779 | return; |
1da177e4 LT |
780 | |
781 | /* | |
782 | * C2 latency must be less than or equal to 100 | |
783 | * microseconds. | |
784 | */ | |
785 | else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { | |
786 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 787 | "latency too large [%d]\n", cx->latency)); |
d550d98d | 788 | return; |
1da177e4 LT |
789 | } |
790 | ||
1da177e4 LT |
791 | /* |
792 | * Otherwise we've met all of our C2 requirements. | |
793 | * Normalize the C2 latency to expidite policy | |
794 | */ | |
795 | cx->valid = 1; | |
796 | cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency); | |
797 | ||
d550d98d | 798 | return; |
1da177e4 LT |
799 | } |
800 | ||
4be44fcd LB |
801 | static void acpi_processor_power_verify_c3(struct acpi_processor *pr, |
802 | struct acpi_processor_cx *cx) | |
1da177e4 | 803 | { |
02df8b93 VP |
804 | static int bm_check_flag; |
805 | ||
1da177e4 LT |
806 | |
807 | if (!cx->address) | |
d550d98d | 808 | return; |
1da177e4 LT |
809 | |
810 | /* | |
811 | * C3 latency must be less than or equal to 1000 | |
812 | * microseconds. | |
813 | */ | |
814 | else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { | |
815 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 816 | "latency too large [%d]\n", cx->latency)); |
d550d98d | 817 | return; |
1da177e4 LT |
818 | } |
819 | ||
1da177e4 LT |
820 | /* |
821 | * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) | |
822 | * DMA transfers are used by any ISA device to avoid livelock. | |
823 | * Note that we could disable Type-F DMA (as recommended by | |
824 | * the erratum), but this is known to disrupt certain ISA | |
825 | * devices thus we take the conservative approach. | |
826 | */ | |
827 | else if (errata.piix4.fdma) { | |
828 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 829 | "C3 not supported on PIIX4 with Type-F DMA\n")); |
d550d98d | 830 | return; |
1da177e4 LT |
831 | } |
832 | ||
02df8b93 VP |
833 | /* All the logic here assumes flags.bm_check is same across all CPUs */ |
834 | if (!bm_check_flag) { | |
835 | /* Determine whether bm_check is needed based on CPU */ | |
836 | acpi_processor_power_init_bm_check(&(pr->flags), pr->id); | |
837 | bm_check_flag = pr->flags.bm_check; | |
838 | } else { | |
839 | pr->flags.bm_check = bm_check_flag; | |
840 | } | |
841 | ||
842 | if (pr->flags.bm_check) { | |
02df8b93 VP |
843 | /* bus mastering control is necessary */ |
844 | if (!pr->flags.bm_control) { | |
845 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 846 | "C3 support requires bus mastering control\n")); |
d550d98d | 847 | return; |
02df8b93 VP |
848 | } |
849 | } else { | |
02df8b93 VP |
850 | /* |
851 | * WBINVD should be set in fadt, for C3 state to be | |
852 | * supported on when bm_check is not required. | |
853 | */ | |
854 | if (acpi_fadt.wb_invd != 1) { | |
855 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd LB |
856 | "Cache invalidation should work properly" |
857 | " for C3 to be enabled on SMP systems\n")); | |
d550d98d | 858 | return; |
02df8b93 VP |
859 | } |
860 | acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, | |
4be44fcd | 861 | 0, ACPI_MTX_DO_NOT_LOCK); |
02df8b93 VP |
862 | } |
863 | ||
1da177e4 LT |
864 | /* |
865 | * Otherwise we've met all of our C3 requirements. | |
866 | * Normalize the C3 latency to expidite policy. Enable | |
867 | * checking of bus mastering status (bm_check) so we can | |
868 | * use this in our C3 policy | |
869 | */ | |
870 | cx->valid = 1; | |
871 | cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency); | |
1da177e4 | 872 | |
d550d98d | 873 | return; |
1da177e4 LT |
874 | } |
875 | ||
1da177e4 LT |
876 | static int acpi_processor_power_verify(struct acpi_processor *pr) |
877 | { | |
878 | unsigned int i; | |
879 | unsigned int working = 0; | |
6eb0a0fd | 880 | |
bd663347 | 881 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
0b5c59a1 AK |
882 | int timer_broadcast = 0; |
883 | cpumask_t mask = cpumask_of_cpu(pr->id); | |
bd663347 | 884 | on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1); |
6eb0a0fd VP |
885 | #endif |
886 | ||
4be44fcd | 887 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { |
1da177e4 LT |
888 | struct acpi_processor_cx *cx = &pr->power.states[i]; |
889 | ||
890 | switch (cx->type) { | |
891 | case ACPI_STATE_C1: | |
892 | cx->valid = 1; | |
893 | break; | |
894 | ||
895 | case ACPI_STATE_C2: | |
896 | acpi_processor_power_verify_c2(cx); | |
bd663347 AK |
897 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
898 | /* Some AMD systems fake C3 as C2, but still | |
899 | have timer troubles */ | |
900 | if (cx->valid && | |
901 | boot_cpu_data.x86_vendor == X86_VENDOR_AMD) | |
902 | timer_broadcast++; | |
903 | #endif | |
1da177e4 LT |
904 | break; |
905 | ||
906 | case ACPI_STATE_C3: | |
907 | acpi_processor_power_verify_c3(pr, cx); | |
6eb0a0fd | 908 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
bd663347 AK |
909 | if (cx->valid) |
910 | timer_broadcast++; | |
6eb0a0fd | 911 | #endif |
1da177e4 LT |
912 | break; |
913 | } | |
914 | ||
915 | if (cx->valid) | |
916 | working++; | |
917 | } | |
bd663347 | 918 | |
0b5c59a1 | 919 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
bd663347 AK |
920 | if (timer_broadcast) |
921 | on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1); | |
0b5c59a1 | 922 | #endif |
1da177e4 LT |
923 | |
924 | return (working); | |
925 | } | |
926 | ||
4be44fcd | 927 | static int acpi_processor_get_power_info(struct acpi_processor *pr) |
1da177e4 LT |
928 | { |
929 | unsigned int i; | |
930 | int result; | |
931 | ||
1da177e4 LT |
932 | |
933 | /* NOTE: the idle thread may not be running while calling | |
934 | * this function */ | |
935 | ||
cf824788 JM |
936 | /* Adding C1 state */ |
937 | acpi_processor_get_power_info_default_c1(pr); | |
1da177e4 | 938 | result = acpi_processor_get_power_info_cst(pr); |
6d93c648 | 939 | if (result == -ENODEV) |
cf824788 | 940 | acpi_processor_get_power_info_fadt(pr); |
6d93c648 | 941 | |
cf824788 | 942 | pr->power.count = acpi_processor_power_verify(pr); |
1da177e4 LT |
943 | |
944 | /* | |
945 | * Set Default Policy | |
946 | * ------------------ | |
947 | * Now that we know which states are supported, set the default | |
948 | * policy. Note that this policy can be changed dynamically | |
949 | * (e.g. encourage deeper sleeps to conserve battery life when | |
950 | * not on AC). | |
951 | */ | |
952 | result = acpi_processor_set_power_policy(pr); | |
953 | if (result) | |
d550d98d | 954 | return result; |
1da177e4 LT |
955 | |
956 | /* | |
957 | * if one state of type C2 or C3 is available, mark this | |
958 | * CPU as being "idle manageable" | |
959 | */ | |
960 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { | |
acf05f4b | 961 | if (pr->power.states[i].valid) { |
1da177e4 | 962 | pr->power.count = i; |
2203d6ed LT |
963 | if (pr->power.states[i].type >= ACPI_STATE_C2) |
964 | pr->flags.power = 1; | |
acf05f4b | 965 | } |
1da177e4 LT |
966 | } |
967 | ||
d550d98d | 968 | return 0; |
1da177e4 LT |
969 | } |
970 | ||
4be44fcd | 971 | int acpi_processor_cst_has_changed(struct acpi_processor *pr) |
1da177e4 | 972 | { |
4be44fcd | 973 | int result = 0; |
1da177e4 | 974 | |
1da177e4 LT |
975 | |
976 | if (!pr) | |
d550d98d | 977 | return -EINVAL; |
1da177e4 | 978 | |
4be44fcd | 979 | if (nocst) { |
d550d98d | 980 | return -ENODEV; |
1da177e4 LT |
981 | } |
982 | ||
983 | if (!pr->flags.power_setup_done) | |
d550d98d | 984 | return -ENODEV; |
1da177e4 LT |
985 | |
986 | /* Fall back to the default idle loop */ | |
987 | pm_idle = pm_idle_save; | |
4be44fcd | 988 | synchronize_sched(); /* Relies on interrupts forcing exit from idle. */ |
1da177e4 LT |
989 | |
990 | pr->flags.power = 0; | |
991 | result = acpi_processor_get_power_info(pr); | |
992 | if ((pr->flags.power == 1) && (pr->flags.power_setup_done)) | |
993 | pm_idle = acpi_processor_idle; | |
994 | ||
d550d98d | 995 | return result; |
1da177e4 LT |
996 | } |
997 | ||
998 | /* proc interface */ | |
999 | ||
1000 | static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset) | |
1001 | { | |
4be44fcd LB |
1002 | struct acpi_processor *pr = (struct acpi_processor *)seq->private; |
1003 | unsigned int i; | |
1da177e4 | 1004 | |
1da177e4 LT |
1005 | |
1006 | if (!pr) | |
1007 | goto end; | |
1008 | ||
1009 | seq_printf(seq, "active state: C%zd\n" | |
4be44fcd LB |
1010 | "max_cstate: C%d\n" |
1011 | "bus master activity: %08x\n", | |
1012 | pr->power.state ? pr->power.state - pr->power.states : 0, | |
1013 | max_cstate, (unsigned)pr->power.bm_activity); | |
1da177e4 LT |
1014 | |
1015 | seq_puts(seq, "states:\n"); | |
1016 | ||
1017 | for (i = 1; i <= pr->power.count; i++) { | |
1018 | seq_printf(seq, " %cC%d: ", | |
4be44fcd LB |
1019 | (&pr->power.states[i] == |
1020 | pr->power.state ? '*' : ' '), i); | |
1da177e4 LT |
1021 | |
1022 | if (!pr->power.states[i].valid) { | |
1023 | seq_puts(seq, "<not supported>\n"); | |
1024 | continue; | |
1025 | } | |
1026 | ||
1027 | switch (pr->power.states[i].type) { | |
1028 | case ACPI_STATE_C1: | |
1029 | seq_printf(seq, "type[C1] "); | |
1030 | break; | |
1031 | case ACPI_STATE_C2: | |
1032 | seq_printf(seq, "type[C2] "); | |
1033 | break; | |
1034 | case ACPI_STATE_C3: | |
1035 | seq_printf(seq, "type[C3] "); | |
1036 | break; | |
1037 | default: | |
1038 | seq_printf(seq, "type[--] "); | |
1039 | break; | |
1040 | } | |
1041 | ||
1042 | if (pr->power.states[i].promotion.state) | |
1043 | seq_printf(seq, "promotion[C%zd] ", | |
4be44fcd LB |
1044 | (pr->power.states[i].promotion.state - |
1045 | pr->power.states)); | |
1da177e4 LT |
1046 | else |
1047 | seq_puts(seq, "promotion[--] "); | |
1048 | ||
1049 | if (pr->power.states[i].demotion.state) | |
1050 | seq_printf(seq, "demotion[C%zd] ", | |
4be44fcd LB |
1051 | (pr->power.states[i].demotion.state - |
1052 | pr->power.states)); | |
1da177e4 LT |
1053 | else |
1054 | seq_puts(seq, "demotion[--] "); | |
1055 | ||
1056 | seq_printf(seq, "latency[%03d] usage[%08d]\n", | |
4be44fcd LB |
1057 | pr->power.states[i].latency, |
1058 | pr->power.states[i].usage); | |
1da177e4 LT |
1059 | } |
1060 | ||
4be44fcd | 1061 | end: |
d550d98d | 1062 | return 0; |
1da177e4 LT |
1063 | } |
1064 | ||
1065 | static int acpi_processor_power_open_fs(struct inode *inode, struct file *file) | |
1066 | { | |
1067 | return single_open(file, acpi_processor_power_seq_show, | |
4be44fcd | 1068 | PDE(inode)->data); |
1da177e4 LT |
1069 | } |
1070 | ||
1071 | static struct file_operations acpi_processor_power_fops = { | |
4be44fcd LB |
1072 | .open = acpi_processor_power_open_fs, |
1073 | .read = seq_read, | |
1074 | .llseek = seq_lseek, | |
1075 | .release = single_release, | |
1da177e4 LT |
1076 | }; |
1077 | ||
4be44fcd LB |
1078 | int acpi_processor_power_init(struct acpi_processor *pr, |
1079 | struct acpi_device *device) | |
1da177e4 | 1080 | { |
4be44fcd | 1081 | acpi_status status = 0; |
b6835052 | 1082 | static int first_run; |
4be44fcd | 1083 | struct proc_dir_entry *entry = NULL; |
1da177e4 LT |
1084 | unsigned int i; |
1085 | ||
1da177e4 LT |
1086 | |
1087 | if (!first_run) { | |
1088 | dmi_check_system(processor_power_dmi_table); | |
1089 | if (max_cstate < ACPI_C_STATES_MAX) | |
4be44fcd LB |
1090 | printk(KERN_NOTICE |
1091 | "ACPI: processor limited to max C-state %d\n", | |
1092 | max_cstate); | |
1da177e4 LT |
1093 | first_run++; |
1094 | } | |
1095 | ||
02df8b93 | 1096 | if (!pr) |
d550d98d | 1097 | return -EINVAL; |
02df8b93 VP |
1098 | |
1099 | if (acpi_fadt.cst_cnt && !nocst) { | |
4be44fcd LB |
1100 | status = |
1101 | acpi_os_write_port(acpi_fadt.smi_cmd, acpi_fadt.cst_cnt, 8); | |
1da177e4 | 1102 | if (ACPI_FAILURE(status)) { |
a6fc6720 TR |
1103 | ACPI_EXCEPTION((AE_INFO, status, |
1104 | "Notifying BIOS of _CST ability failed")); | |
1da177e4 LT |
1105 | } |
1106 | } | |
1107 | ||
1108 | acpi_processor_get_power_info(pr); | |
1109 | ||
1110 | /* | |
1111 | * Install the idle handler if processor power management is supported. | |
1112 | * Note that we use previously set idle handler will be used on | |
1113 | * platforms that only support C1. | |
1114 | */ | |
1115 | if ((pr->flags.power) && (!boot_option_idle_override)) { | |
1116 | printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id); | |
1117 | for (i = 1; i <= pr->power.count; i++) | |
1118 | if (pr->power.states[i].valid) | |
4be44fcd LB |
1119 | printk(" C%d[C%d]", i, |
1120 | pr->power.states[i].type); | |
1da177e4 LT |
1121 | printk(")\n"); |
1122 | ||
1123 | if (pr->id == 0) { | |
1124 | pm_idle_save = pm_idle; | |
1125 | pm_idle = acpi_processor_idle; | |
1126 | } | |
1127 | } | |
1128 | ||
1129 | /* 'power' [R] */ | |
1130 | entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER, | |
4be44fcd | 1131 | S_IRUGO, acpi_device_dir(device)); |
1da177e4 | 1132 | if (!entry) |
a6fc6720 | 1133 | return -EIO; |
1da177e4 LT |
1134 | else { |
1135 | entry->proc_fops = &acpi_processor_power_fops; | |
1136 | entry->data = acpi_driver_data(device); | |
1137 | entry->owner = THIS_MODULE; | |
1138 | } | |
1139 | ||
1140 | pr->flags.power_setup_done = 1; | |
1141 | ||
d550d98d | 1142 | return 0; |
1da177e4 LT |
1143 | } |
1144 | ||
4be44fcd LB |
1145 | int acpi_processor_power_exit(struct acpi_processor *pr, |
1146 | struct acpi_device *device) | |
1da177e4 | 1147 | { |
1da177e4 LT |
1148 | |
1149 | pr->flags.power_setup_done = 0; | |
1150 | ||
1151 | if (acpi_device_dir(device)) | |
4be44fcd LB |
1152 | remove_proc_entry(ACPI_PROCESSOR_FILE_POWER, |
1153 | acpi_device_dir(device)); | |
1da177e4 LT |
1154 | |
1155 | /* Unregister the idle handler when processor #0 is removed. */ | |
1156 | if (pr->id == 0) { | |
1157 | pm_idle = pm_idle_save; | |
1158 | ||
1159 | /* | |
1160 | * We are about to unload the current idle thread pm callback | |
1161 | * (pm_idle), Wait for all processors to update cached/local | |
1162 | * copies of pm_idle before proceeding. | |
1163 | */ | |
1164 | cpu_idle_wait(); | |
1165 | } | |
1166 | ||
d550d98d | 1167 | return 0; |
1da177e4 | 1168 | } |