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1da177e4 LT |
1 | /* |
2 | * processor_idle - idle state submodule to the ACPI processor driver | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
6 | * Copyright (C) 2004 Dominik Brodowski <linux@brodo.de> | |
7 | * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> | |
8 | * - Added processor hotplug support | |
02df8b93 VP |
9 | * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> |
10 | * - Added support for C3 on SMP | |
1da177e4 LT |
11 | * |
12 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or (at | |
17 | * your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, but | |
20 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
22 | * General Public License for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License along | |
25 | * with this program; if not, write to the Free Software Foundation, Inc., | |
26 | * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
27 | * | |
28 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
29 | */ | |
30 | ||
31 | #include <linux/kernel.h> | |
32 | #include <linux/module.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/cpufreq.h> | |
35 | #include <linux/proc_fs.h> | |
36 | #include <linux/seq_file.h> | |
37 | #include <linux/acpi.h> | |
38 | #include <linux/dmi.h> | |
39 | #include <linux/moduleparam.h> | |
4e57b681 | 40 | #include <linux/sched.h> /* need_resched() */ |
1da177e4 LT |
41 | |
42 | #include <asm/io.h> | |
43 | #include <asm/uaccess.h> | |
44 | ||
45 | #include <acpi/acpi_bus.h> | |
46 | #include <acpi/processor.h> | |
47 | ||
48 | #define ACPI_PROCESSOR_COMPONENT 0x01000000 | |
49 | #define ACPI_PROCESSOR_CLASS "processor" | |
50 | #define ACPI_PROCESSOR_DRIVER_NAME "ACPI Processor Driver" | |
51 | #define _COMPONENT ACPI_PROCESSOR_COMPONENT | |
4be44fcd | 52 | ACPI_MODULE_NAME("acpi_processor") |
1da177e4 | 53 | #define ACPI_PROCESSOR_FILE_POWER "power" |
1da177e4 LT |
54 | #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000) |
55 | #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */ | |
56 | #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */ | |
b6835052 | 57 | static void (*pm_idle_save) (void) __read_mostly; |
1da177e4 LT |
58 | module_param(max_cstate, uint, 0644); |
59 | ||
b6835052 | 60 | static unsigned int nocst __read_mostly; |
1da177e4 LT |
61 | module_param(nocst, uint, 0000); |
62 | ||
63 | /* | |
64 | * bm_history -- bit-mask with a bit per jiffy of bus-master activity | |
65 | * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms | |
66 | * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms | |
67 | * 100 HZ: 0x0000000F: 4 jiffies = 40ms | |
68 | * reduce history for more aggressive entry into C3 | |
69 | */ | |
b6835052 | 70 | static unsigned int bm_history __read_mostly = |
4be44fcd | 71 | (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1)); |
1da177e4 LT |
72 | module_param(bm_history, uint, 0644); |
73 | /* -------------------------------------------------------------------------- | |
74 | Power Management | |
75 | -------------------------------------------------------------------------- */ | |
76 | ||
77 | /* | |
78 | * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. | |
79 | * For now disable this. Probably a bug somewhere else. | |
80 | * | |
81 | * To skip this limit, boot/load with a large max_cstate limit. | |
82 | */ | |
335f16be | 83 | static int set_max_cstate(struct dmi_system_id *id) |
1da177e4 LT |
84 | { |
85 | if (max_cstate > ACPI_PROCESSOR_MAX_POWER) | |
86 | return 0; | |
87 | ||
3d35600a | 88 | printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate." |
4be44fcd LB |
89 | " Override with \"processor.max_cstate=%d\"\n", id->ident, |
90 | (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); | |
1da177e4 | 91 | |
3d35600a | 92 | max_cstate = (long)id->driver_data; |
1da177e4 LT |
93 | |
94 | return 0; | |
95 | } | |
96 | ||
7ded5689 AR |
97 | /* Actually this shouldn't be __cpuinitdata, would be better to fix the |
98 | callers to only run once -AK */ | |
99 | static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = { | |
876c184b TR |
100 | { set_max_cstate, "IBM ThinkPad R40e", { |
101 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
102 | DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1}, | |
103 | { set_max_cstate, "IBM ThinkPad R40e", { | |
104 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
105 | DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1}, | |
106 | { set_max_cstate, "IBM ThinkPad R40e", { | |
107 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
108 | DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1}, | |
109 | { set_max_cstate, "IBM ThinkPad R40e", { | |
110 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
111 | DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1}, | |
112 | { set_max_cstate, "IBM ThinkPad R40e", { | |
113 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
114 | DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1}, | |
115 | { set_max_cstate, "IBM ThinkPad R40e", { | |
116 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
117 | DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1}, | |
118 | { set_max_cstate, "IBM ThinkPad R40e", { | |
119 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
120 | DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1}, | |
121 | { set_max_cstate, "IBM ThinkPad R40e", { | |
122 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
123 | DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1}, | |
124 | { set_max_cstate, "IBM ThinkPad R40e", { | |
125 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
126 | DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1}, | |
127 | { set_max_cstate, "IBM ThinkPad R40e", { | |
128 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
129 | DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1}, | |
130 | { set_max_cstate, "IBM ThinkPad R40e", { | |
131 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
132 | DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1}, | |
133 | { set_max_cstate, "IBM ThinkPad R40e", { | |
134 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
135 | DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1}, | |
136 | { set_max_cstate, "IBM ThinkPad R40e", { | |
137 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
138 | DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1}, | |
139 | { set_max_cstate, "IBM ThinkPad R40e", { | |
140 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
141 | DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1}, | |
142 | { set_max_cstate, "IBM ThinkPad R40e", { | |
143 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
144 | DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1}, | |
145 | { set_max_cstate, "Medion 41700", { | |
146 | DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), | |
147 | DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1}, | |
148 | { set_max_cstate, "Clevo 5600D", { | |
149 | DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), | |
150 | DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, | |
4be44fcd | 151 | (void *)2}, |
1da177e4 LT |
152 | {}, |
153 | }; | |
154 | ||
4be44fcd | 155 | static inline u32 ticks_elapsed(u32 t1, u32 t2) |
1da177e4 LT |
156 | { |
157 | if (t2 >= t1) | |
158 | return (t2 - t1); | |
159 | else if (!acpi_fadt.tmr_val_ext) | |
160 | return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF); | |
161 | else | |
162 | return ((0xFFFFFFFF - t1) + t2); | |
163 | } | |
164 | ||
1da177e4 | 165 | static void |
4be44fcd LB |
166 | acpi_processor_power_activate(struct acpi_processor *pr, |
167 | struct acpi_processor_cx *new) | |
1da177e4 | 168 | { |
4be44fcd | 169 | struct acpi_processor_cx *old; |
1da177e4 LT |
170 | |
171 | if (!pr || !new) | |
172 | return; | |
173 | ||
174 | old = pr->power.state; | |
175 | ||
176 | if (old) | |
177 | old->promotion.count = 0; | |
4be44fcd | 178 | new->demotion.count = 0; |
1da177e4 LT |
179 | |
180 | /* Cleanup from old state. */ | |
181 | if (old) { | |
182 | switch (old->type) { | |
183 | case ACPI_STATE_C3: | |
184 | /* Disable bus master reload */ | |
02df8b93 | 185 | if (new->type != ACPI_STATE_C3 && pr->flags.bm_check) |
4be44fcd LB |
186 | acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0, |
187 | ACPI_MTX_DO_NOT_LOCK); | |
1da177e4 LT |
188 | break; |
189 | } | |
190 | } | |
191 | ||
192 | /* Prepare to use new state. */ | |
193 | switch (new->type) { | |
194 | case ACPI_STATE_C3: | |
195 | /* Enable bus master reload */ | |
02df8b93 | 196 | if (old->type != ACPI_STATE_C3 && pr->flags.bm_check) |
4be44fcd LB |
197 | acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1, |
198 | ACPI_MTX_DO_NOT_LOCK); | |
1da177e4 LT |
199 | break; |
200 | } | |
201 | ||
202 | pr->power.state = new; | |
203 | ||
204 | return; | |
205 | } | |
206 | ||
64c7c8f8 NP |
207 | static void acpi_safe_halt(void) |
208 | { | |
495ab9c0 | 209 | current_thread_info()->status &= ~TS_POLLING; |
2a298a35 | 210 | smp_mb__after_clear_bit(); |
64c7c8f8 NP |
211 | if (!need_resched()) |
212 | safe_halt(); | |
495ab9c0 | 213 | current_thread_info()->status |= TS_POLLING; |
64c7c8f8 NP |
214 | } |
215 | ||
4be44fcd | 216 | static atomic_t c3_cpu_count; |
1da177e4 | 217 | |
4be44fcd | 218 | static void acpi_processor_idle(void) |
1da177e4 | 219 | { |
4be44fcd | 220 | struct acpi_processor *pr = NULL; |
1da177e4 LT |
221 | struct acpi_processor_cx *cx = NULL; |
222 | struct acpi_processor_cx *next_state = NULL; | |
4be44fcd LB |
223 | int sleep_ticks = 0; |
224 | u32 t1, t2 = 0; | |
1da177e4 | 225 | |
64c7c8f8 | 226 | pr = processors[smp_processor_id()]; |
1da177e4 LT |
227 | if (!pr) |
228 | return; | |
229 | ||
230 | /* | |
231 | * Interrupts must be disabled during bus mastering calculations and | |
232 | * for C2/C3 transitions. | |
233 | */ | |
234 | local_irq_disable(); | |
235 | ||
236 | /* | |
237 | * Check whether we truly need to go idle, or should | |
238 | * reschedule: | |
239 | */ | |
240 | if (unlikely(need_resched())) { | |
241 | local_irq_enable(); | |
242 | return; | |
243 | } | |
244 | ||
245 | cx = pr->power.state; | |
64c7c8f8 NP |
246 | if (!cx) { |
247 | if (pm_idle_save) | |
248 | pm_idle_save(); | |
249 | else | |
250 | acpi_safe_halt(); | |
251 | return; | |
252 | } | |
1da177e4 LT |
253 | |
254 | /* | |
255 | * Check BM Activity | |
256 | * ----------------- | |
257 | * Check for bus mastering activity (if required), record, and check | |
258 | * for demotion. | |
259 | */ | |
260 | if (pr->flags.bm_check) { | |
4be44fcd LB |
261 | u32 bm_status = 0; |
262 | unsigned long diff = jiffies - pr->power.bm_check_timestamp; | |
1da177e4 LT |
263 | |
264 | if (diff > 32) | |
265 | diff = 32; | |
266 | ||
267 | while (diff) { | |
268 | /* if we didn't get called, assume there was busmaster activity */ | |
269 | diff--; | |
270 | if (diff) | |
271 | pr->power.bm_activity |= 0x1; | |
272 | pr->power.bm_activity <<= 1; | |
273 | } | |
274 | ||
275 | acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, | |
4be44fcd | 276 | &bm_status, ACPI_MTX_DO_NOT_LOCK); |
1da177e4 LT |
277 | if (bm_status) { |
278 | pr->power.bm_activity++; | |
279 | acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, | |
4be44fcd | 280 | 1, ACPI_MTX_DO_NOT_LOCK); |
1da177e4 LT |
281 | } |
282 | /* | |
283 | * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect | |
284 | * the true state of bus mastering activity; forcing us to | |
285 | * manually check the BMIDEA bit of each IDE channel. | |
286 | */ | |
287 | else if (errata.piix4.bmisx) { | |
288 | if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) | |
4be44fcd | 289 | || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) |
1da177e4 LT |
290 | pr->power.bm_activity++; |
291 | } | |
292 | ||
293 | pr->power.bm_check_timestamp = jiffies; | |
294 | ||
295 | /* | |
296 | * Apply bus mastering demotion policy. Automatically demote | |
297 | * to avoid a faulty transition. Note that the processor | |
298 | * won't enter a low-power state during this call (to this | |
299 | * funciton) but should upon the next. | |
300 | * | |
301 | * TBD: A better policy might be to fallback to the demotion | |
302 | * state (use it for this quantum only) istead of | |
303 | * demoting -- and rely on duration as our sole demotion | |
304 | * qualification. This may, however, introduce DMA | |
305 | * issues (e.g. floppy DMA transfer overrun/underrun). | |
306 | */ | |
307 | if (pr->power.bm_activity & cx->demotion.threshold.bm) { | |
308 | local_irq_enable(); | |
309 | next_state = cx->demotion.state; | |
310 | goto end; | |
311 | } | |
312 | } | |
313 | ||
4c033552 VP |
314 | #ifdef CONFIG_HOTPLUG_CPU |
315 | /* | |
316 | * Check for P_LVL2_UP flag before entering C2 and above on | |
317 | * an SMP system. We do it here instead of doing it at _CST/P_LVL | |
318 | * detection phase, to work cleanly with logical CPU hotplug. | |
319 | */ | |
320 | if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
1e483969 DSL |
321 | !pr->flags.has_cst && !acpi_fadt.plvl2_up) |
322 | cx = &pr->power.states[ACPI_STATE_C1]; | |
4c033552 | 323 | #endif |
1e483969 | 324 | |
1da177e4 LT |
325 | /* |
326 | * Sleep: | |
327 | * ------ | |
328 | * Invoke the current Cx state to put the processor to sleep. | |
329 | */ | |
2a298a35 | 330 | if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) { |
495ab9c0 | 331 | current_thread_info()->status &= ~TS_POLLING; |
2a298a35 NP |
332 | smp_mb__after_clear_bit(); |
333 | if (need_resched()) { | |
495ab9c0 | 334 | current_thread_info()->status |= TS_POLLING; |
af2eb17b | 335 | local_irq_enable(); |
2a298a35 NP |
336 | return; |
337 | } | |
338 | } | |
339 | ||
1da177e4 LT |
340 | switch (cx->type) { |
341 | ||
342 | case ACPI_STATE_C1: | |
343 | /* | |
344 | * Invoke C1. | |
345 | * Use the appropriate idle routine, the one that would | |
346 | * be used without acpi C-states. | |
347 | */ | |
348 | if (pm_idle_save) | |
349 | pm_idle_save(); | |
350 | else | |
64c7c8f8 NP |
351 | acpi_safe_halt(); |
352 | ||
1da177e4 | 353 | /* |
4be44fcd | 354 | * TBD: Can't get time duration while in C1, as resumes |
1da177e4 LT |
355 | * go to an ISR rather than here. Need to instrument |
356 | * base interrupt handler. | |
357 | */ | |
358 | sleep_ticks = 0xFFFFFFFF; | |
359 | break; | |
360 | ||
361 | case ACPI_STATE_C2: | |
362 | /* Get start time (ticks) */ | |
363 | t1 = inl(acpi_fadt.xpm_tmr_blk.address); | |
364 | /* Invoke C2 */ | |
365 | inb(cx->address); | |
366 | /* Dummy op - must do something useless after P_LVL2 read */ | |
367 | t2 = inl(acpi_fadt.xpm_tmr_blk.address); | |
368 | /* Get end time (ticks) */ | |
369 | t2 = inl(acpi_fadt.xpm_tmr_blk.address); | |
539eb11e JS |
370 | |
371 | #ifdef CONFIG_GENERIC_TIME | |
372 | /* TSC halts in C2, so notify users */ | |
373 | mark_tsc_unstable(); | |
374 | #endif | |
1da177e4 LT |
375 | /* Re-enable interrupts */ |
376 | local_irq_enable(); | |
495ab9c0 | 377 | current_thread_info()->status |= TS_POLLING; |
1da177e4 | 378 | /* Compute time (ticks) that we were actually asleep */ |
4be44fcd LB |
379 | sleep_ticks = |
380 | ticks_elapsed(t1, t2) - cx->latency_ticks - C2_OVERHEAD; | |
1da177e4 LT |
381 | break; |
382 | ||
383 | case ACPI_STATE_C3: | |
4be44fcd | 384 | |
02df8b93 VP |
385 | if (pr->flags.bm_check) { |
386 | if (atomic_inc_return(&c3_cpu_count) == | |
4be44fcd | 387 | num_online_cpus()) { |
02df8b93 VP |
388 | /* |
389 | * All CPUs are trying to go to C3 | |
390 | * Disable bus master arbitration | |
391 | */ | |
392 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1, | |
4be44fcd | 393 | ACPI_MTX_DO_NOT_LOCK); |
02df8b93 VP |
394 | } |
395 | } else { | |
396 | /* SMP with no shared cache... Invalidate cache */ | |
397 | ACPI_FLUSH_CPU_CACHE(); | |
398 | } | |
4be44fcd | 399 | |
1da177e4 LT |
400 | /* Get start time (ticks) */ |
401 | t1 = inl(acpi_fadt.xpm_tmr_blk.address); | |
402 | /* Invoke C3 */ | |
403 | inb(cx->address); | |
404 | /* Dummy op - must do something useless after P_LVL3 read */ | |
405 | t2 = inl(acpi_fadt.xpm_tmr_blk.address); | |
406 | /* Get end time (ticks) */ | |
407 | t2 = inl(acpi_fadt.xpm_tmr_blk.address); | |
02df8b93 VP |
408 | if (pr->flags.bm_check) { |
409 | /* Enable bus master arbitration */ | |
410 | atomic_dec(&c3_cpu_count); | |
4be44fcd LB |
411 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0, |
412 | ACPI_MTX_DO_NOT_LOCK); | |
02df8b93 VP |
413 | } |
414 | ||
539eb11e JS |
415 | #ifdef CONFIG_GENERIC_TIME |
416 | /* TSC halts in C3, so notify users */ | |
417 | mark_tsc_unstable(); | |
418 | #endif | |
1da177e4 LT |
419 | /* Re-enable interrupts */ |
420 | local_irq_enable(); | |
495ab9c0 | 421 | current_thread_info()->status |= TS_POLLING; |
1da177e4 | 422 | /* Compute time (ticks) that we were actually asleep */ |
4be44fcd LB |
423 | sleep_ticks = |
424 | ticks_elapsed(t1, t2) - cx->latency_ticks - C3_OVERHEAD; | |
1da177e4 LT |
425 | break; |
426 | ||
427 | default: | |
428 | local_irq_enable(); | |
429 | return; | |
430 | } | |
a3c6598f DB |
431 | cx->usage++; |
432 | if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0)) | |
433 | cx->time += sleep_ticks; | |
1da177e4 LT |
434 | |
435 | next_state = pr->power.state; | |
436 | ||
1e483969 DSL |
437 | #ifdef CONFIG_HOTPLUG_CPU |
438 | /* Don't do promotion/demotion */ | |
439 | if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
440 | !pr->flags.has_cst && !acpi_fadt.plvl2_up) { | |
441 | next_state = cx; | |
442 | goto end; | |
443 | } | |
444 | #endif | |
445 | ||
1da177e4 LT |
446 | /* |
447 | * Promotion? | |
448 | * ---------- | |
449 | * Track the number of longs (time asleep is greater than threshold) | |
450 | * and promote when the count threshold is reached. Note that bus | |
451 | * mastering activity may prevent promotions. | |
452 | * Do not promote above max_cstate. | |
453 | */ | |
454 | if (cx->promotion.state && | |
455 | ((cx->promotion.state - pr->power.states) <= max_cstate)) { | |
456 | if (sleep_ticks > cx->promotion.threshold.ticks) { | |
457 | cx->promotion.count++; | |
4be44fcd LB |
458 | cx->demotion.count = 0; |
459 | if (cx->promotion.count >= | |
460 | cx->promotion.threshold.count) { | |
1da177e4 | 461 | if (pr->flags.bm_check) { |
4be44fcd LB |
462 | if (! |
463 | (pr->power.bm_activity & cx-> | |
464 | promotion.threshold.bm)) { | |
465 | next_state = | |
466 | cx->promotion.state; | |
1da177e4 LT |
467 | goto end; |
468 | } | |
4be44fcd | 469 | } else { |
1da177e4 LT |
470 | next_state = cx->promotion.state; |
471 | goto end; | |
472 | } | |
473 | } | |
474 | } | |
475 | } | |
476 | ||
477 | /* | |
478 | * Demotion? | |
479 | * --------- | |
480 | * Track the number of shorts (time asleep is less than time threshold) | |
481 | * and demote when the usage threshold is reached. | |
482 | */ | |
483 | if (cx->demotion.state) { | |
484 | if (sleep_ticks < cx->demotion.threshold.ticks) { | |
485 | cx->demotion.count++; | |
486 | cx->promotion.count = 0; | |
487 | if (cx->demotion.count >= cx->demotion.threshold.count) { | |
488 | next_state = cx->demotion.state; | |
489 | goto end; | |
490 | } | |
491 | } | |
492 | } | |
493 | ||
4be44fcd | 494 | end: |
1da177e4 LT |
495 | /* |
496 | * Demote if current state exceeds max_cstate | |
497 | */ | |
498 | if ((pr->power.state - pr->power.states) > max_cstate) { | |
499 | if (cx->demotion.state) | |
500 | next_state = cx->demotion.state; | |
501 | } | |
502 | ||
503 | /* | |
504 | * New Cx State? | |
505 | * ------------- | |
506 | * If we're going to start using a new Cx state we must clean up | |
507 | * from the previous and prepare to use the new. | |
508 | */ | |
509 | if (next_state != pr->power.state) | |
510 | acpi_processor_power_activate(pr, next_state); | |
1da177e4 LT |
511 | } |
512 | ||
4be44fcd | 513 | static int acpi_processor_set_power_policy(struct acpi_processor *pr) |
1da177e4 LT |
514 | { |
515 | unsigned int i; | |
516 | unsigned int state_is_set = 0; | |
517 | struct acpi_processor_cx *lower = NULL; | |
518 | struct acpi_processor_cx *higher = NULL; | |
519 | struct acpi_processor_cx *cx; | |
520 | ||
1da177e4 LT |
521 | |
522 | if (!pr) | |
d550d98d | 523 | return -EINVAL; |
1da177e4 LT |
524 | |
525 | /* | |
526 | * This function sets the default Cx state policy (OS idle handler). | |
527 | * Our scheme is to promote quickly to C2 but more conservatively | |
528 | * to C3. We're favoring C2 for its characteristics of low latency | |
529 | * (quick response), good power savings, and ability to allow bus | |
530 | * mastering activity. Note that the Cx state policy is completely | |
531 | * customizable and can be altered dynamically. | |
532 | */ | |
533 | ||
534 | /* startup state */ | |
4be44fcd | 535 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { |
1da177e4 LT |
536 | cx = &pr->power.states[i]; |
537 | if (!cx->valid) | |
538 | continue; | |
539 | ||
540 | if (!state_is_set) | |
541 | pr->power.state = cx; | |
542 | state_is_set++; | |
543 | break; | |
4be44fcd | 544 | } |
1da177e4 LT |
545 | |
546 | if (!state_is_set) | |
d550d98d | 547 | return -ENODEV; |
1da177e4 LT |
548 | |
549 | /* demotion */ | |
4be44fcd | 550 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { |
1da177e4 LT |
551 | cx = &pr->power.states[i]; |
552 | if (!cx->valid) | |
553 | continue; | |
554 | ||
555 | if (lower) { | |
556 | cx->demotion.state = lower; | |
557 | cx->demotion.threshold.ticks = cx->latency_ticks; | |
558 | cx->demotion.threshold.count = 1; | |
559 | if (cx->type == ACPI_STATE_C3) | |
560 | cx->demotion.threshold.bm = bm_history; | |
561 | } | |
562 | ||
563 | lower = cx; | |
564 | } | |
565 | ||
566 | /* promotion */ | |
567 | for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) { | |
568 | cx = &pr->power.states[i]; | |
569 | if (!cx->valid) | |
570 | continue; | |
571 | ||
572 | if (higher) { | |
4be44fcd | 573 | cx->promotion.state = higher; |
1da177e4 LT |
574 | cx->promotion.threshold.ticks = cx->latency_ticks; |
575 | if (cx->type >= ACPI_STATE_C2) | |
576 | cx->promotion.threshold.count = 4; | |
577 | else | |
578 | cx->promotion.threshold.count = 10; | |
579 | if (higher->type == ACPI_STATE_C3) | |
580 | cx->promotion.threshold.bm = bm_history; | |
581 | } | |
582 | ||
583 | higher = cx; | |
584 | } | |
585 | ||
d550d98d | 586 | return 0; |
1da177e4 LT |
587 | } |
588 | ||
4be44fcd | 589 | static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) |
1da177e4 | 590 | { |
1da177e4 LT |
591 | |
592 | if (!pr) | |
d550d98d | 593 | return -EINVAL; |
1da177e4 LT |
594 | |
595 | if (!pr->pblk) | |
d550d98d | 596 | return -ENODEV; |
1da177e4 | 597 | |
1da177e4 | 598 | /* if info is obtained from pblk/fadt, type equals state */ |
1da177e4 LT |
599 | pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; |
600 | pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; | |
601 | ||
4c033552 VP |
602 | #ifndef CONFIG_HOTPLUG_CPU |
603 | /* | |
604 | * Check for P_LVL2_UP flag before entering C2 and above on | |
605 | * an SMP system. | |
606 | */ | |
1e483969 | 607 | if ((num_online_cpus() > 1) && !acpi_fadt.plvl2_up) |
d550d98d | 608 | return -ENODEV; |
4c033552 VP |
609 | #endif |
610 | ||
1da177e4 LT |
611 | /* determine C2 and C3 address from pblk */ |
612 | pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; | |
613 | pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; | |
614 | ||
615 | /* determine latencies from FADT */ | |
616 | pr->power.states[ACPI_STATE_C2].latency = acpi_fadt.plvl2_lat; | |
617 | pr->power.states[ACPI_STATE_C3].latency = acpi_fadt.plvl3_lat; | |
618 | ||
619 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
620 | "lvl2[0x%08x] lvl3[0x%08x]\n", | |
621 | pr->power.states[ACPI_STATE_C2].address, | |
622 | pr->power.states[ACPI_STATE_C3].address)); | |
623 | ||
d550d98d | 624 | return 0; |
1da177e4 LT |
625 | } |
626 | ||
4be44fcd | 627 | static int acpi_processor_get_power_info_default_c1(struct acpi_processor *pr) |
acf05f4b | 628 | { |
acf05f4b | 629 | |
cf824788 | 630 | /* Zero initialize all the C-states info. */ |
2203d6ed | 631 | memset(pr->power.states, 0, sizeof(pr->power.states)); |
acf05f4b | 632 | |
cf824788 | 633 | /* set the first C-State to C1 */ |
acf05f4b | 634 | pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; |
acf05f4b VP |
635 | |
636 | /* the C0 state only exists as a filler in our array, | |
637 | * and all processors need to support C1 */ | |
638 | pr->power.states[ACPI_STATE_C0].valid = 1; | |
639 | pr->power.states[ACPI_STATE_C1].valid = 1; | |
640 | ||
d550d98d | 641 | return 0; |
acf05f4b VP |
642 | } |
643 | ||
4be44fcd | 644 | static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) |
1da177e4 | 645 | { |
4be44fcd LB |
646 | acpi_status status = 0; |
647 | acpi_integer count; | |
cf824788 | 648 | int current_count; |
4be44fcd LB |
649 | int i; |
650 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; | |
651 | union acpi_object *cst; | |
1da177e4 | 652 | |
1da177e4 | 653 | |
1da177e4 | 654 | if (nocst) |
d550d98d | 655 | return -ENODEV; |
1da177e4 | 656 | |
cf824788 JM |
657 | current_count = 1; |
658 | ||
659 | /* Zero initialize C2 onwards and prepare for fresh CST lookup */ | |
660 | for (i = 2; i < ACPI_PROCESSOR_MAX_POWER; i++) | |
661 | memset(&(pr->power.states[i]), 0, | |
662 | sizeof(struct acpi_processor_cx)); | |
1da177e4 LT |
663 | |
664 | status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer); | |
665 | if (ACPI_FAILURE(status)) { | |
666 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n")); | |
d550d98d | 667 | return -ENODEV; |
4be44fcd | 668 | } |
1da177e4 | 669 | |
4be44fcd | 670 | cst = (union acpi_object *)buffer.pointer; |
1da177e4 LT |
671 | |
672 | /* There must be at least 2 elements */ | |
673 | if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) { | |
6468463a | 674 | printk(KERN_ERR PREFIX "not enough elements in _CST\n"); |
1da177e4 LT |
675 | status = -EFAULT; |
676 | goto end; | |
677 | } | |
678 | ||
679 | count = cst->package.elements[0].integer.value; | |
680 | ||
681 | /* Validate number of power states. */ | |
682 | if (count < 1 || count != cst->package.count - 1) { | |
6468463a | 683 | printk(KERN_ERR PREFIX "count given by _CST is not valid\n"); |
1da177e4 LT |
684 | status = -EFAULT; |
685 | goto end; | |
686 | } | |
687 | ||
1da177e4 LT |
688 | /* Tell driver that at least _CST is supported. */ |
689 | pr->flags.has_cst = 1; | |
690 | ||
691 | for (i = 1; i <= count; i++) { | |
692 | union acpi_object *element; | |
693 | union acpi_object *obj; | |
694 | struct acpi_power_register *reg; | |
695 | struct acpi_processor_cx cx; | |
696 | ||
697 | memset(&cx, 0, sizeof(cx)); | |
698 | ||
4be44fcd | 699 | element = (union acpi_object *)&(cst->package.elements[i]); |
1da177e4 LT |
700 | if (element->type != ACPI_TYPE_PACKAGE) |
701 | continue; | |
702 | ||
703 | if (element->package.count != 4) | |
704 | continue; | |
705 | ||
4be44fcd | 706 | obj = (union acpi_object *)&(element->package.elements[0]); |
1da177e4 LT |
707 | |
708 | if (obj->type != ACPI_TYPE_BUFFER) | |
709 | continue; | |
710 | ||
4be44fcd | 711 | reg = (struct acpi_power_register *)obj->buffer.pointer; |
1da177e4 LT |
712 | |
713 | if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && | |
4be44fcd | 714 | (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) |
1da177e4 LT |
715 | continue; |
716 | ||
717 | cx.address = (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) ? | |
4be44fcd | 718 | 0 : reg->address; |
1da177e4 LT |
719 | |
720 | /* There should be an easy way to extract an integer... */ | |
4be44fcd | 721 | obj = (union acpi_object *)&(element->package.elements[1]); |
1da177e4 LT |
722 | if (obj->type != ACPI_TYPE_INTEGER) |
723 | continue; | |
724 | ||
725 | cx.type = obj->integer.value; | |
726 | ||
727 | if ((cx.type != ACPI_STATE_C1) && | |
728 | (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO)) | |
729 | continue; | |
730 | ||
cf824788 | 731 | if ((cx.type < ACPI_STATE_C2) || (cx.type > ACPI_STATE_C3)) |
1da177e4 LT |
732 | continue; |
733 | ||
4be44fcd | 734 | obj = (union acpi_object *)&(element->package.elements[2]); |
1da177e4 LT |
735 | if (obj->type != ACPI_TYPE_INTEGER) |
736 | continue; | |
737 | ||
738 | cx.latency = obj->integer.value; | |
739 | ||
4be44fcd | 740 | obj = (union acpi_object *)&(element->package.elements[3]); |
1da177e4 LT |
741 | if (obj->type != ACPI_TYPE_INTEGER) |
742 | continue; | |
743 | ||
744 | cx.power = obj->integer.value; | |
745 | ||
cf824788 JM |
746 | current_count++; |
747 | memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx)); | |
748 | ||
749 | /* | |
750 | * We support total ACPI_PROCESSOR_MAX_POWER - 1 | |
751 | * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1) | |
752 | */ | |
753 | if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) { | |
754 | printk(KERN_WARNING | |
755 | "Limiting number of power states to max (%d)\n", | |
756 | ACPI_PROCESSOR_MAX_POWER); | |
757 | printk(KERN_WARNING | |
758 | "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); | |
759 | break; | |
760 | } | |
1da177e4 LT |
761 | } |
762 | ||
4be44fcd | 763 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n", |
cf824788 | 764 | current_count)); |
1da177e4 LT |
765 | |
766 | /* Validate number of power states discovered */ | |
cf824788 | 767 | if (current_count < 2) |
6d93c648 | 768 | status = -EFAULT; |
1da177e4 | 769 | |
4be44fcd | 770 | end: |
1da177e4 LT |
771 | acpi_os_free(buffer.pointer); |
772 | ||
d550d98d | 773 | return status; |
1da177e4 LT |
774 | } |
775 | ||
1da177e4 LT |
776 | static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx) |
777 | { | |
1da177e4 LT |
778 | |
779 | if (!cx->address) | |
d550d98d | 780 | return; |
1da177e4 LT |
781 | |
782 | /* | |
783 | * C2 latency must be less than or equal to 100 | |
784 | * microseconds. | |
785 | */ | |
786 | else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { | |
787 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 788 | "latency too large [%d]\n", cx->latency)); |
d550d98d | 789 | return; |
1da177e4 LT |
790 | } |
791 | ||
1da177e4 LT |
792 | /* |
793 | * Otherwise we've met all of our C2 requirements. | |
794 | * Normalize the C2 latency to expidite policy | |
795 | */ | |
796 | cx->valid = 1; | |
797 | cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency); | |
798 | ||
d550d98d | 799 | return; |
1da177e4 LT |
800 | } |
801 | ||
4be44fcd LB |
802 | static void acpi_processor_power_verify_c3(struct acpi_processor *pr, |
803 | struct acpi_processor_cx *cx) | |
1da177e4 | 804 | { |
02df8b93 VP |
805 | static int bm_check_flag; |
806 | ||
1da177e4 LT |
807 | |
808 | if (!cx->address) | |
d550d98d | 809 | return; |
1da177e4 LT |
810 | |
811 | /* | |
812 | * C3 latency must be less than or equal to 1000 | |
813 | * microseconds. | |
814 | */ | |
815 | else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { | |
816 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 817 | "latency too large [%d]\n", cx->latency)); |
d550d98d | 818 | return; |
1da177e4 LT |
819 | } |
820 | ||
1da177e4 LT |
821 | /* |
822 | * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) | |
823 | * DMA transfers are used by any ISA device to avoid livelock. | |
824 | * Note that we could disable Type-F DMA (as recommended by | |
825 | * the erratum), but this is known to disrupt certain ISA | |
826 | * devices thus we take the conservative approach. | |
827 | */ | |
828 | else if (errata.piix4.fdma) { | |
829 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 830 | "C3 not supported on PIIX4 with Type-F DMA\n")); |
d550d98d | 831 | return; |
1da177e4 LT |
832 | } |
833 | ||
02df8b93 VP |
834 | /* All the logic here assumes flags.bm_check is same across all CPUs */ |
835 | if (!bm_check_flag) { | |
836 | /* Determine whether bm_check is needed based on CPU */ | |
837 | acpi_processor_power_init_bm_check(&(pr->flags), pr->id); | |
838 | bm_check_flag = pr->flags.bm_check; | |
839 | } else { | |
840 | pr->flags.bm_check = bm_check_flag; | |
841 | } | |
842 | ||
843 | if (pr->flags.bm_check) { | |
02df8b93 VP |
844 | /* bus mastering control is necessary */ |
845 | if (!pr->flags.bm_control) { | |
846 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 847 | "C3 support requires bus mastering control\n")); |
d550d98d | 848 | return; |
02df8b93 VP |
849 | } |
850 | } else { | |
02df8b93 VP |
851 | /* |
852 | * WBINVD should be set in fadt, for C3 state to be | |
853 | * supported on when bm_check is not required. | |
854 | */ | |
855 | if (acpi_fadt.wb_invd != 1) { | |
856 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd LB |
857 | "Cache invalidation should work properly" |
858 | " for C3 to be enabled on SMP systems\n")); | |
d550d98d | 859 | return; |
02df8b93 VP |
860 | } |
861 | acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, | |
4be44fcd | 862 | 0, ACPI_MTX_DO_NOT_LOCK); |
02df8b93 VP |
863 | } |
864 | ||
1da177e4 LT |
865 | /* |
866 | * Otherwise we've met all of our C3 requirements. | |
867 | * Normalize the C3 latency to expidite policy. Enable | |
868 | * checking of bus mastering status (bm_check) so we can | |
869 | * use this in our C3 policy | |
870 | */ | |
871 | cx->valid = 1; | |
872 | cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency); | |
1da177e4 | 873 | |
d550d98d | 874 | return; |
1da177e4 LT |
875 | } |
876 | ||
1da177e4 LT |
877 | static int acpi_processor_power_verify(struct acpi_processor *pr) |
878 | { | |
879 | unsigned int i; | |
880 | unsigned int working = 0; | |
6eb0a0fd | 881 | |
bd663347 | 882 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
0b5c59a1 AK |
883 | int timer_broadcast = 0; |
884 | cpumask_t mask = cpumask_of_cpu(pr->id); | |
bd663347 | 885 | on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1); |
6eb0a0fd VP |
886 | #endif |
887 | ||
4be44fcd | 888 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { |
1da177e4 LT |
889 | struct acpi_processor_cx *cx = &pr->power.states[i]; |
890 | ||
891 | switch (cx->type) { | |
892 | case ACPI_STATE_C1: | |
893 | cx->valid = 1; | |
894 | break; | |
895 | ||
896 | case ACPI_STATE_C2: | |
897 | acpi_processor_power_verify_c2(cx); | |
bd663347 AK |
898 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
899 | /* Some AMD systems fake C3 as C2, but still | |
900 | have timer troubles */ | |
901 | if (cx->valid && | |
902 | boot_cpu_data.x86_vendor == X86_VENDOR_AMD) | |
903 | timer_broadcast++; | |
904 | #endif | |
1da177e4 LT |
905 | break; |
906 | ||
907 | case ACPI_STATE_C3: | |
908 | acpi_processor_power_verify_c3(pr, cx); | |
6eb0a0fd | 909 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
bd663347 AK |
910 | if (cx->valid) |
911 | timer_broadcast++; | |
6eb0a0fd | 912 | #endif |
1da177e4 LT |
913 | break; |
914 | } | |
915 | ||
916 | if (cx->valid) | |
917 | working++; | |
918 | } | |
bd663347 | 919 | |
0b5c59a1 | 920 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
bd663347 AK |
921 | if (timer_broadcast) |
922 | on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1); | |
0b5c59a1 | 923 | #endif |
1da177e4 LT |
924 | |
925 | return (working); | |
926 | } | |
927 | ||
4be44fcd | 928 | static int acpi_processor_get_power_info(struct acpi_processor *pr) |
1da177e4 LT |
929 | { |
930 | unsigned int i; | |
931 | int result; | |
932 | ||
1da177e4 LT |
933 | |
934 | /* NOTE: the idle thread may not be running while calling | |
935 | * this function */ | |
936 | ||
cf824788 JM |
937 | /* Adding C1 state */ |
938 | acpi_processor_get_power_info_default_c1(pr); | |
1da177e4 | 939 | result = acpi_processor_get_power_info_cst(pr); |
6d93c648 | 940 | if (result == -ENODEV) |
cf824788 | 941 | acpi_processor_get_power_info_fadt(pr); |
6d93c648 | 942 | |
cf824788 | 943 | pr->power.count = acpi_processor_power_verify(pr); |
1da177e4 LT |
944 | |
945 | /* | |
946 | * Set Default Policy | |
947 | * ------------------ | |
948 | * Now that we know which states are supported, set the default | |
949 | * policy. Note that this policy can be changed dynamically | |
950 | * (e.g. encourage deeper sleeps to conserve battery life when | |
951 | * not on AC). | |
952 | */ | |
953 | result = acpi_processor_set_power_policy(pr); | |
954 | if (result) | |
d550d98d | 955 | return result; |
1da177e4 LT |
956 | |
957 | /* | |
958 | * if one state of type C2 or C3 is available, mark this | |
959 | * CPU as being "idle manageable" | |
960 | */ | |
961 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { | |
acf05f4b | 962 | if (pr->power.states[i].valid) { |
1da177e4 | 963 | pr->power.count = i; |
2203d6ed LT |
964 | if (pr->power.states[i].type >= ACPI_STATE_C2) |
965 | pr->flags.power = 1; | |
acf05f4b | 966 | } |
1da177e4 LT |
967 | } |
968 | ||
d550d98d | 969 | return 0; |
1da177e4 LT |
970 | } |
971 | ||
4be44fcd | 972 | int acpi_processor_cst_has_changed(struct acpi_processor *pr) |
1da177e4 | 973 | { |
4be44fcd | 974 | int result = 0; |
1da177e4 | 975 | |
1da177e4 LT |
976 | |
977 | if (!pr) | |
d550d98d | 978 | return -EINVAL; |
1da177e4 | 979 | |
4be44fcd | 980 | if (nocst) { |
d550d98d | 981 | return -ENODEV; |
1da177e4 LT |
982 | } |
983 | ||
984 | if (!pr->flags.power_setup_done) | |
d550d98d | 985 | return -ENODEV; |
1da177e4 LT |
986 | |
987 | /* Fall back to the default idle loop */ | |
988 | pm_idle = pm_idle_save; | |
4be44fcd | 989 | synchronize_sched(); /* Relies on interrupts forcing exit from idle. */ |
1da177e4 LT |
990 | |
991 | pr->flags.power = 0; | |
992 | result = acpi_processor_get_power_info(pr); | |
993 | if ((pr->flags.power == 1) && (pr->flags.power_setup_done)) | |
994 | pm_idle = acpi_processor_idle; | |
995 | ||
d550d98d | 996 | return result; |
1da177e4 LT |
997 | } |
998 | ||
999 | /* proc interface */ | |
1000 | ||
1001 | static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset) | |
1002 | { | |
4be44fcd LB |
1003 | struct acpi_processor *pr = (struct acpi_processor *)seq->private; |
1004 | unsigned int i; | |
1da177e4 | 1005 | |
1da177e4 LT |
1006 | |
1007 | if (!pr) | |
1008 | goto end; | |
1009 | ||
1010 | seq_printf(seq, "active state: C%zd\n" | |
4be44fcd LB |
1011 | "max_cstate: C%d\n" |
1012 | "bus master activity: %08x\n", | |
1013 | pr->power.state ? pr->power.state - pr->power.states : 0, | |
1014 | max_cstate, (unsigned)pr->power.bm_activity); | |
1da177e4 LT |
1015 | |
1016 | seq_puts(seq, "states:\n"); | |
1017 | ||
1018 | for (i = 1; i <= pr->power.count; i++) { | |
1019 | seq_printf(seq, " %cC%d: ", | |
4be44fcd LB |
1020 | (&pr->power.states[i] == |
1021 | pr->power.state ? '*' : ' '), i); | |
1da177e4 LT |
1022 | |
1023 | if (!pr->power.states[i].valid) { | |
1024 | seq_puts(seq, "<not supported>\n"); | |
1025 | continue; | |
1026 | } | |
1027 | ||
1028 | switch (pr->power.states[i].type) { | |
1029 | case ACPI_STATE_C1: | |
1030 | seq_printf(seq, "type[C1] "); | |
1031 | break; | |
1032 | case ACPI_STATE_C2: | |
1033 | seq_printf(seq, "type[C2] "); | |
1034 | break; | |
1035 | case ACPI_STATE_C3: | |
1036 | seq_printf(seq, "type[C3] "); | |
1037 | break; | |
1038 | default: | |
1039 | seq_printf(seq, "type[--] "); | |
1040 | break; | |
1041 | } | |
1042 | ||
1043 | if (pr->power.states[i].promotion.state) | |
1044 | seq_printf(seq, "promotion[C%zd] ", | |
4be44fcd LB |
1045 | (pr->power.states[i].promotion.state - |
1046 | pr->power.states)); | |
1da177e4 LT |
1047 | else |
1048 | seq_puts(seq, "promotion[--] "); | |
1049 | ||
1050 | if (pr->power.states[i].demotion.state) | |
1051 | seq_printf(seq, "demotion[C%zd] ", | |
4be44fcd LB |
1052 | (pr->power.states[i].demotion.state - |
1053 | pr->power.states)); | |
1da177e4 LT |
1054 | else |
1055 | seq_puts(seq, "demotion[--] "); | |
1056 | ||
a3c6598f | 1057 | seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n", |
4be44fcd | 1058 | pr->power.states[i].latency, |
a3c6598f DB |
1059 | pr->power.states[i].usage, |
1060 | pr->power.states[i].time); | |
1da177e4 LT |
1061 | } |
1062 | ||
4be44fcd | 1063 | end: |
d550d98d | 1064 | return 0; |
1da177e4 LT |
1065 | } |
1066 | ||
1067 | static int acpi_processor_power_open_fs(struct inode *inode, struct file *file) | |
1068 | { | |
1069 | return single_open(file, acpi_processor_power_seq_show, | |
4be44fcd | 1070 | PDE(inode)->data); |
1da177e4 LT |
1071 | } |
1072 | ||
1073 | static struct file_operations acpi_processor_power_fops = { | |
4be44fcd LB |
1074 | .open = acpi_processor_power_open_fs, |
1075 | .read = seq_read, | |
1076 | .llseek = seq_lseek, | |
1077 | .release = single_release, | |
1da177e4 LT |
1078 | }; |
1079 | ||
4be44fcd LB |
1080 | int acpi_processor_power_init(struct acpi_processor *pr, |
1081 | struct acpi_device *device) | |
1da177e4 | 1082 | { |
4be44fcd | 1083 | acpi_status status = 0; |
b6835052 | 1084 | static int first_run; |
4be44fcd | 1085 | struct proc_dir_entry *entry = NULL; |
1da177e4 LT |
1086 | unsigned int i; |
1087 | ||
1da177e4 LT |
1088 | |
1089 | if (!first_run) { | |
1090 | dmi_check_system(processor_power_dmi_table); | |
1091 | if (max_cstate < ACPI_C_STATES_MAX) | |
4be44fcd LB |
1092 | printk(KERN_NOTICE |
1093 | "ACPI: processor limited to max C-state %d\n", | |
1094 | max_cstate); | |
1da177e4 LT |
1095 | first_run++; |
1096 | } | |
1097 | ||
02df8b93 | 1098 | if (!pr) |
d550d98d | 1099 | return -EINVAL; |
02df8b93 VP |
1100 | |
1101 | if (acpi_fadt.cst_cnt && !nocst) { | |
4be44fcd LB |
1102 | status = |
1103 | acpi_os_write_port(acpi_fadt.smi_cmd, acpi_fadt.cst_cnt, 8); | |
1da177e4 | 1104 | if (ACPI_FAILURE(status)) { |
a6fc6720 TR |
1105 | ACPI_EXCEPTION((AE_INFO, status, |
1106 | "Notifying BIOS of _CST ability failed")); | |
1da177e4 LT |
1107 | } |
1108 | } | |
1109 | ||
1110 | acpi_processor_get_power_info(pr); | |
1111 | ||
1112 | /* | |
1113 | * Install the idle handler if processor power management is supported. | |
1114 | * Note that we use previously set idle handler will be used on | |
1115 | * platforms that only support C1. | |
1116 | */ | |
1117 | if ((pr->flags.power) && (!boot_option_idle_override)) { | |
1118 | printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id); | |
1119 | for (i = 1; i <= pr->power.count; i++) | |
1120 | if (pr->power.states[i].valid) | |
4be44fcd LB |
1121 | printk(" C%d[C%d]", i, |
1122 | pr->power.states[i].type); | |
1da177e4 LT |
1123 | printk(")\n"); |
1124 | ||
1125 | if (pr->id == 0) { | |
1126 | pm_idle_save = pm_idle; | |
1127 | pm_idle = acpi_processor_idle; | |
1128 | } | |
1129 | } | |
1130 | ||
1131 | /* 'power' [R] */ | |
1132 | entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER, | |
4be44fcd | 1133 | S_IRUGO, acpi_device_dir(device)); |
1da177e4 | 1134 | if (!entry) |
a6fc6720 | 1135 | return -EIO; |
1da177e4 LT |
1136 | else { |
1137 | entry->proc_fops = &acpi_processor_power_fops; | |
1138 | entry->data = acpi_driver_data(device); | |
1139 | entry->owner = THIS_MODULE; | |
1140 | } | |
1141 | ||
1142 | pr->flags.power_setup_done = 1; | |
1143 | ||
d550d98d | 1144 | return 0; |
1da177e4 LT |
1145 | } |
1146 | ||
4be44fcd LB |
1147 | int acpi_processor_power_exit(struct acpi_processor *pr, |
1148 | struct acpi_device *device) | |
1da177e4 | 1149 | { |
1da177e4 LT |
1150 | |
1151 | pr->flags.power_setup_done = 0; | |
1152 | ||
1153 | if (acpi_device_dir(device)) | |
4be44fcd LB |
1154 | remove_proc_entry(ACPI_PROCESSOR_FILE_POWER, |
1155 | acpi_device_dir(device)); | |
1da177e4 LT |
1156 | |
1157 | /* Unregister the idle handler when processor #0 is removed. */ | |
1158 | if (pr->id == 0) { | |
1159 | pm_idle = pm_idle_save; | |
1160 | ||
1161 | /* | |
1162 | * We are about to unload the current idle thread pm callback | |
1163 | * (pm_idle), Wait for all processors to update cached/local | |
1164 | * copies of pm_idle before proceeding. | |
1165 | */ | |
1166 | cpu_idle_wait(); | |
1167 | } | |
1168 | ||
d550d98d | 1169 | return 0; |
1da177e4 | 1170 | } |