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1da177e4 LT |
1 | /* |
2 | * processor_idle - idle state submodule to the ACPI processor driver | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
c5ab81ca | 6 | * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> |
1da177e4 LT |
7 | * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> |
8 | * - Added processor hotplug support | |
02df8b93 VP |
9 | * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> |
10 | * - Added support for C3 on SMP | |
1da177e4 LT |
11 | * |
12 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or (at | |
17 | * your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, but | |
20 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
22 | * General Public License for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License along | |
25 | * with this program; if not, write to the Free Software Foundation, Inc., | |
26 | * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
27 | * | |
28 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
29 | */ | |
30 | ||
31 | #include <linux/kernel.h> | |
32 | #include <linux/module.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/cpufreq.h> | |
5a0e3ad6 | 35 | #include <linux/slab.h> |
1da177e4 LT |
36 | #include <linux/acpi.h> |
37 | #include <linux/dmi.h> | |
38 | #include <linux/moduleparam.h> | |
4e57b681 | 39 | #include <linux/sched.h> /* need_resched() */ |
e8db0be1 | 40 | #include <linux/pm_qos.h> |
e9e2cdb4 | 41 | #include <linux/clockchips.h> |
4f86d3a8 | 42 | #include <linux/cpuidle.h> |
ba84be23 | 43 | #include <linux/irqflags.h> |
1da177e4 | 44 | |
3434933b TG |
45 | /* |
46 | * Include the apic definitions for x86 to have the APIC timer related defines | |
47 | * available also for UP (on SMP it gets magically included via linux/smp.h). | |
48 | * asm/acpi.h is not an option, as it would require more include magic. Also | |
49 | * creating an empty asm-ia64/apic.h would just trade pest vs. cholera. | |
50 | */ | |
51 | #ifdef CONFIG_X86 | |
52 | #include <asm/apic.h> | |
53 | #endif | |
54 | ||
1da177e4 LT |
55 | #include <asm/io.h> |
56 | #include <asm/uaccess.h> | |
57 | ||
58 | #include <acpi/acpi_bus.h> | |
59 | #include <acpi/processor.h> | |
c1e3b377 | 60 | #include <asm/processor.h> |
1da177e4 | 61 | |
a192a958 LB |
62 | #define PREFIX "ACPI: " |
63 | ||
1da177e4 | 64 | #define ACPI_PROCESSOR_CLASS "processor" |
1da177e4 | 65 | #define _COMPONENT ACPI_PROCESSOR_COMPONENT |
f52fd66d | 66 | ACPI_MODULE_NAME("processor_idle"); |
2aa44d05 | 67 | #define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY) |
4f86d3a8 LB |
68 | #define C2_OVERHEAD 1 /* 1us */ |
69 | #define C3_OVERHEAD 1 /* 1us */ | |
4f86d3a8 | 70 | #define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000)) |
1da177e4 | 71 | |
4f86d3a8 LB |
72 | static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER; |
73 | module_param(max_cstate, uint, 0000); | |
b6835052 | 74 | static unsigned int nocst __read_mostly; |
1da177e4 | 75 | module_param(nocst, uint, 0000); |
d3e7e99f LB |
76 | static int bm_check_disable __read_mostly; |
77 | module_param(bm_check_disable, uint, 0000); | |
1da177e4 | 78 | |
25de5718 | 79 | static unsigned int latency_factor __read_mostly = 2; |
4963f620 | 80 | module_param(latency_factor, uint, 0644); |
1da177e4 | 81 | |
d1896049 TR |
82 | static int disabled_by_idle_boot_param(void) |
83 | { | |
84 | return boot_option_idle_override == IDLE_POLL || | |
85 | boot_option_idle_override == IDLE_FORCE_MWAIT || | |
86 | boot_option_idle_override == IDLE_HALT; | |
87 | } | |
88 | ||
1da177e4 LT |
89 | /* |
90 | * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. | |
91 | * For now disable this. Probably a bug somewhere else. | |
92 | * | |
93 | * To skip this limit, boot/load with a large max_cstate limit. | |
94 | */ | |
1855256c | 95 | static int set_max_cstate(const struct dmi_system_id *id) |
1da177e4 LT |
96 | { |
97 | if (max_cstate > ACPI_PROCESSOR_MAX_POWER) | |
98 | return 0; | |
99 | ||
3d35600a | 100 | printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate." |
4be44fcd LB |
101 | " Override with \"processor.max_cstate=%d\"\n", id->ident, |
102 | (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); | |
1da177e4 | 103 | |
3d35600a | 104 | max_cstate = (long)id->driver_data; |
1da177e4 LT |
105 | |
106 | return 0; | |
107 | } | |
108 | ||
7ded5689 AR |
109 | /* Actually this shouldn't be __cpuinitdata, would be better to fix the |
110 | callers to only run once -AK */ | |
111 | static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = { | |
876c184b TR |
112 | { set_max_cstate, "Clevo 5600D", { |
113 | DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), | |
114 | DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, | |
4be44fcd | 115 | (void *)2}, |
370d5cd8 AV |
116 | { set_max_cstate, "Pavilion zv5000", { |
117 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
118 | DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")}, | |
119 | (void *)1}, | |
120 | { set_max_cstate, "Asus L8400B", { | |
121 | DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."), | |
122 | DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")}, | |
123 | (void *)1}, | |
1da177e4 LT |
124 | {}, |
125 | }; | |
126 | ||
4f86d3a8 | 127 | |
2e906655 | 128 | /* |
129 | * Callers should disable interrupts before the call and enable | |
130 | * interrupts after return. | |
131 | */ | |
ddc081a1 VP |
132 | static void acpi_safe_halt(void) |
133 | { | |
134 | current_thread_info()->status &= ~TS_POLLING; | |
135 | /* | |
136 | * TS_POLLING-cleared state must be visible before we | |
137 | * test NEED_RESCHED: | |
138 | */ | |
139 | smp_mb(); | |
71e93d15 | 140 | if (!need_resched()) { |
ddc081a1 | 141 | safe_halt(); |
71e93d15 VP |
142 | local_irq_disable(); |
143 | } | |
ddc081a1 VP |
144 | current_thread_info()->status |= TS_POLLING; |
145 | } | |
146 | ||
169a0abb TG |
147 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
148 | ||
149 | /* | |
150 | * Some BIOS implementations switch to C3 in the published C2 state. | |
296d93cd LT |
151 | * This seems to be a common problem on AMD boxen, but other vendors |
152 | * are affected too. We pick the most conservative approach: we assume | |
153 | * that the local APIC stops in both C2 and C3. | |
169a0abb | 154 | */ |
7e275cc4 | 155 | static void lapic_timer_check_state(int state, struct acpi_processor *pr, |
169a0abb TG |
156 | struct acpi_processor_cx *cx) |
157 | { | |
158 | struct acpi_processor_power *pwr = &pr->power; | |
e585bef8 | 159 | u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; |
169a0abb | 160 | |
db954b58 VP |
161 | if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT)) |
162 | return; | |
163 | ||
02c68a02 | 164 | if (amd_e400_c1e_detected) |
87ad57ba SL |
165 | type = ACPI_STATE_C1; |
166 | ||
169a0abb TG |
167 | /* |
168 | * Check, if one of the previous states already marked the lapic | |
169 | * unstable | |
170 | */ | |
171 | if (pwr->timer_broadcast_on_state < state) | |
172 | return; | |
173 | ||
e585bef8 | 174 | if (cx->type >= type) |
296d93cd | 175 | pr->power.timer_broadcast_on_state = state; |
169a0abb TG |
176 | } |
177 | ||
918aae42 | 178 | static void __lapic_timer_propagate_broadcast(void *arg) |
169a0abb | 179 | { |
f833bab8 | 180 | struct acpi_processor *pr = (struct acpi_processor *) arg; |
e9e2cdb4 TG |
181 | unsigned long reason; |
182 | ||
183 | reason = pr->power.timer_broadcast_on_state < INT_MAX ? | |
184 | CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF; | |
185 | ||
186 | clockevents_notify(reason, &pr->id); | |
e9e2cdb4 TG |
187 | } |
188 | ||
918aae42 HS |
189 | static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) |
190 | { | |
191 | smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast, | |
192 | (void *)pr, 1); | |
193 | } | |
194 | ||
e9e2cdb4 | 195 | /* Power(C) State timer broadcast control */ |
7e275cc4 | 196 | static void lapic_timer_state_broadcast(struct acpi_processor *pr, |
e9e2cdb4 TG |
197 | struct acpi_processor_cx *cx, |
198 | int broadcast) | |
199 | { | |
e9e2cdb4 TG |
200 | int state = cx - pr->power.states; |
201 | ||
202 | if (state >= pr->power.timer_broadcast_on_state) { | |
203 | unsigned long reason; | |
204 | ||
205 | reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER : | |
206 | CLOCK_EVT_NOTIFY_BROADCAST_EXIT; | |
207 | clockevents_notify(reason, &pr->id); | |
208 | } | |
169a0abb TG |
209 | } |
210 | ||
211 | #else | |
212 | ||
7e275cc4 | 213 | static void lapic_timer_check_state(int state, struct acpi_processor *pr, |
169a0abb | 214 | struct acpi_processor_cx *cstate) { } |
7e275cc4 LB |
215 | static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { } |
216 | static void lapic_timer_state_broadcast(struct acpi_processor *pr, | |
e9e2cdb4 TG |
217 | struct acpi_processor_cx *cx, |
218 | int broadcast) | |
219 | { | |
220 | } | |
169a0abb TG |
221 | |
222 | #endif | |
223 | ||
815ab0fd LB |
224 | static u32 saved_bm_rld; |
225 | ||
226 | static void acpi_idle_bm_rld_save(void) | |
227 | { | |
228 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld); | |
229 | } | |
230 | static void acpi_idle_bm_rld_restore(void) | |
231 | { | |
232 | u32 resumed_bm_rld; | |
233 | ||
234 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld); | |
235 | ||
236 | if (resumed_bm_rld != saved_bm_rld) | |
237 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld); | |
238 | } | |
b04e7bdb | 239 | |
e8110b64 | 240 | int acpi_processor_suspend(struct device *dev) |
b04e7bdb | 241 | { |
815ab0fd | 242 | acpi_idle_bm_rld_save(); |
b04e7bdb TG |
243 | return 0; |
244 | } | |
245 | ||
e8110b64 | 246 | int acpi_processor_resume(struct device *dev) |
b04e7bdb | 247 | { |
815ab0fd | 248 | acpi_idle_bm_rld_restore(); |
b04e7bdb TG |
249 | return 0; |
250 | } | |
251 | ||
592913ec | 252 | #if defined(CONFIG_X86) |
520daf72 | 253 | static void tsc_check_state(int state) |
ddb25f9a AK |
254 | { |
255 | switch (boot_cpu_data.x86_vendor) { | |
256 | case X86_VENDOR_AMD: | |
40fb1715 | 257 | case X86_VENDOR_INTEL: |
ddb25f9a AK |
258 | /* |
259 | * AMD Fam10h TSC will tick in all | |
260 | * C/P/S0/S1 states when this bit is set. | |
261 | */ | |
40fb1715 | 262 | if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) |
520daf72 | 263 | return; |
40fb1715 | 264 | |
ddb25f9a | 265 | /*FALL THROUGH*/ |
ddb25f9a | 266 | default: |
520daf72 LB |
267 | /* TSC could halt in idle, so notify users */ |
268 | if (state > ACPI_STATE_C1) | |
269 | mark_tsc_unstable("TSC halts in idle"); | |
ddb25f9a AK |
270 | } |
271 | } | |
520daf72 LB |
272 | #else |
273 | static void tsc_check_state(int state) { return; } | |
ddb25f9a AK |
274 | #endif |
275 | ||
4be44fcd | 276 | static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) |
1da177e4 | 277 | { |
1da177e4 LT |
278 | |
279 | if (!pr) | |
d550d98d | 280 | return -EINVAL; |
1da177e4 LT |
281 | |
282 | if (!pr->pblk) | |
d550d98d | 283 | return -ENODEV; |
1da177e4 | 284 | |
1da177e4 | 285 | /* if info is obtained from pblk/fadt, type equals state */ |
1da177e4 LT |
286 | pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; |
287 | pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; | |
288 | ||
4c033552 VP |
289 | #ifndef CONFIG_HOTPLUG_CPU |
290 | /* | |
291 | * Check for P_LVL2_UP flag before entering C2 and above on | |
4f86d3a8 | 292 | * an SMP system. |
4c033552 | 293 | */ |
ad71860a | 294 | if ((num_online_cpus() > 1) && |
cee324b1 | 295 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) |
d550d98d | 296 | return -ENODEV; |
4c033552 VP |
297 | #endif |
298 | ||
1da177e4 LT |
299 | /* determine C2 and C3 address from pblk */ |
300 | pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; | |
301 | pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; | |
302 | ||
303 | /* determine latencies from FADT */ | |
ba494bee BM |
304 | pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency; |
305 | pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency; | |
1da177e4 | 306 | |
5d76b6f6 LB |
307 | /* |
308 | * FADT specified C2 latency must be less than or equal to | |
309 | * 100 microseconds. | |
310 | */ | |
ba494bee | 311 | if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { |
5d76b6f6 | 312 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
ba494bee | 313 | "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency)); |
5d76b6f6 LB |
314 | /* invalidate C2 */ |
315 | pr->power.states[ACPI_STATE_C2].address = 0; | |
316 | } | |
317 | ||
a6d72c18 LB |
318 | /* |
319 | * FADT supplied C3 latency must be less than or equal to | |
320 | * 1000 microseconds. | |
321 | */ | |
ba494bee | 322 | if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { |
a6d72c18 | 323 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
ba494bee | 324 | "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency)); |
a6d72c18 LB |
325 | /* invalidate C3 */ |
326 | pr->power.states[ACPI_STATE_C3].address = 0; | |
327 | } | |
328 | ||
1da177e4 LT |
329 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
330 | "lvl2[0x%08x] lvl3[0x%08x]\n", | |
331 | pr->power.states[ACPI_STATE_C2].address, | |
332 | pr->power.states[ACPI_STATE_C3].address)); | |
333 | ||
d550d98d | 334 | return 0; |
1da177e4 LT |
335 | } |
336 | ||
991528d7 | 337 | static int acpi_processor_get_power_info_default(struct acpi_processor *pr) |
acf05f4b | 338 | { |
991528d7 VP |
339 | if (!pr->power.states[ACPI_STATE_C1].valid) { |
340 | /* set the first C-State to C1 */ | |
341 | /* all processors need to support C1 */ | |
342 | pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; | |
343 | pr->power.states[ACPI_STATE_C1].valid = 1; | |
0fda6b40 | 344 | pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT; |
991528d7 VP |
345 | } |
346 | /* the C0 state only exists as a filler in our array */ | |
acf05f4b | 347 | pr->power.states[ACPI_STATE_C0].valid = 1; |
d550d98d | 348 | return 0; |
acf05f4b VP |
349 | } |
350 | ||
4be44fcd | 351 | static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) |
1da177e4 | 352 | { |
4be44fcd | 353 | acpi_status status = 0; |
439913ff | 354 | u64 count; |
cf824788 | 355 | int current_count; |
4be44fcd LB |
356 | int i; |
357 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; | |
358 | union acpi_object *cst; | |
1da177e4 | 359 | |
1da177e4 | 360 | |
1da177e4 | 361 | if (nocst) |
d550d98d | 362 | return -ENODEV; |
1da177e4 | 363 | |
991528d7 | 364 | current_count = 0; |
1da177e4 LT |
365 | |
366 | status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer); | |
367 | if (ACPI_FAILURE(status)) { | |
368 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n")); | |
d550d98d | 369 | return -ENODEV; |
4be44fcd | 370 | } |
1da177e4 | 371 | |
50dd0969 | 372 | cst = buffer.pointer; |
1da177e4 LT |
373 | |
374 | /* There must be at least 2 elements */ | |
375 | if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) { | |
6468463a | 376 | printk(KERN_ERR PREFIX "not enough elements in _CST\n"); |
1da177e4 LT |
377 | status = -EFAULT; |
378 | goto end; | |
379 | } | |
380 | ||
381 | count = cst->package.elements[0].integer.value; | |
382 | ||
383 | /* Validate number of power states. */ | |
384 | if (count < 1 || count != cst->package.count - 1) { | |
6468463a | 385 | printk(KERN_ERR PREFIX "count given by _CST is not valid\n"); |
1da177e4 LT |
386 | status = -EFAULT; |
387 | goto end; | |
388 | } | |
389 | ||
1da177e4 LT |
390 | /* Tell driver that at least _CST is supported. */ |
391 | pr->flags.has_cst = 1; | |
392 | ||
393 | for (i = 1; i <= count; i++) { | |
394 | union acpi_object *element; | |
395 | union acpi_object *obj; | |
396 | struct acpi_power_register *reg; | |
397 | struct acpi_processor_cx cx; | |
398 | ||
399 | memset(&cx, 0, sizeof(cx)); | |
400 | ||
50dd0969 | 401 | element = &(cst->package.elements[i]); |
1da177e4 LT |
402 | if (element->type != ACPI_TYPE_PACKAGE) |
403 | continue; | |
404 | ||
405 | if (element->package.count != 4) | |
406 | continue; | |
407 | ||
50dd0969 | 408 | obj = &(element->package.elements[0]); |
1da177e4 LT |
409 | |
410 | if (obj->type != ACPI_TYPE_BUFFER) | |
411 | continue; | |
412 | ||
4be44fcd | 413 | reg = (struct acpi_power_register *)obj->buffer.pointer; |
1da177e4 LT |
414 | |
415 | if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && | |
4be44fcd | 416 | (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) |
1da177e4 LT |
417 | continue; |
418 | ||
1da177e4 | 419 | /* There should be an easy way to extract an integer... */ |
50dd0969 | 420 | obj = &(element->package.elements[1]); |
1da177e4 LT |
421 | if (obj->type != ACPI_TYPE_INTEGER) |
422 | continue; | |
423 | ||
424 | cx.type = obj->integer.value; | |
991528d7 VP |
425 | /* |
426 | * Some buggy BIOSes won't list C1 in _CST - | |
427 | * Let acpi_processor_get_power_info_default() handle them later | |
428 | */ | |
429 | if (i == 1 && cx.type != ACPI_STATE_C1) | |
430 | current_count++; | |
431 | ||
432 | cx.address = reg->address; | |
433 | cx.index = current_count + 1; | |
434 | ||
bc71bec9 | 435 | cx.entry_method = ACPI_CSTATE_SYSTEMIO; |
991528d7 VP |
436 | if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) { |
437 | if (acpi_processor_ffh_cstate_probe | |
438 | (pr->id, &cx, reg) == 0) { | |
bc71bec9 | 439 | cx.entry_method = ACPI_CSTATE_FFH; |
440 | } else if (cx.type == ACPI_STATE_C1) { | |
991528d7 VP |
441 | /* |
442 | * C1 is a special case where FIXED_HARDWARE | |
443 | * can be handled in non-MWAIT way as well. | |
444 | * In that case, save this _CST entry info. | |
991528d7 VP |
445 | * Otherwise, ignore this info and continue. |
446 | */ | |
bc71bec9 | 447 | cx.entry_method = ACPI_CSTATE_HALT; |
4fcb2fcd | 448 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); |
bc71bec9 | 449 | } else { |
991528d7 VP |
450 | continue; |
451 | } | |
da5e09a1 | 452 | if (cx.type == ACPI_STATE_C1 && |
d1896049 | 453 | (boot_option_idle_override == IDLE_NOMWAIT)) { |
c1e3b377 ZY |
454 | /* |
455 | * In most cases the C1 space_id obtained from | |
456 | * _CST object is FIXED_HARDWARE access mode. | |
457 | * But when the option of idle=halt is added, | |
458 | * the entry_method type should be changed from | |
459 | * CSTATE_FFH to CSTATE_HALT. | |
da5e09a1 ZY |
460 | * When the option of idle=nomwait is added, |
461 | * the C1 entry_method type should be | |
462 | * CSTATE_HALT. | |
c1e3b377 ZY |
463 | */ |
464 | cx.entry_method = ACPI_CSTATE_HALT; | |
465 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); | |
466 | } | |
4fcb2fcd VP |
467 | } else { |
468 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x", | |
469 | cx.address); | |
991528d7 | 470 | } |
1da177e4 | 471 | |
0fda6b40 VP |
472 | if (cx.type == ACPI_STATE_C1) { |
473 | cx.valid = 1; | |
474 | } | |
4fcb2fcd | 475 | |
50dd0969 | 476 | obj = &(element->package.elements[2]); |
1da177e4 LT |
477 | if (obj->type != ACPI_TYPE_INTEGER) |
478 | continue; | |
479 | ||
480 | cx.latency = obj->integer.value; | |
481 | ||
50dd0969 | 482 | obj = &(element->package.elements[3]); |
1da177e4 LT |
483 | if (obj->type != ACPI_TYPE_INTEGER) |
484 | continue; | |
485 | ||
cf824788 JM |
486 | current_count++; |
487 | memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx)); | |
488 | ||
489 | /* | |
490 | * We support total ACPI_PROCESSOR_MAX_POWER - 1 | |
491 | * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1) | |
492 | */ | |
493 | if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) { | |
494 | printk(KERN_WARNING | |
495 | "Limiting number of power states to max (%d)\n", | |
496 | ACPI_PROCESSOR_MAX_POWER); | |
497 | printk(KERN_WARNING | |
498 | "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); | |
499 | break; | |
500 | } | |
1da177e4 LT |
501 | } |
502 | ||
4be44fcd | 503 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n", |
cf824788 | 504 | current_count)); |
1da177e4 LT |
505 | |
506 | /* Validate number of power states discovered */ | |
cf824788 | 507 | if (current_count < 2) |
6d93c648 | 508 | status = -EFAULT; |
1da177e4 | 509 | |
4be44fcd | 510 | end: |
02438d87 | 511 | kfree(buffer.pointer); |
1da177e4 | 512 | |
d550d98d | 513 | return status; |
1da177e4 LT |
514 | } |
515 | ||
4be44fcd LB |
516 | static void acpi_processor_power_verify_c3(struct acpi_processor *pr, |
517 | struct acpi_processor_cx *cx) | |
1da177e4 | 518 | { |
ee1ca48f PV |
519 | static int bm_check_flag = -1; |
520 | static int bm_control_flag = -1; | |
02df8b93 | 521 | |
1da177e4 LT |
522 | |
523 | if (!cx->address) | |
d550d98d | 524 | return; |
1da177e4 | 525 | |
1da177e4 LT |
526 | /* |
527 | * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) | |
528 | * DMA transfers are used by any ISA device to avoid livelock. | |
529 | * Note that we could disable Type-F DMA (as recommended by | |
530 | * the erratum), but this is known to disrupt certain ISA | |
531 | * devices thus we take the conservative approach. | |
532 | */ | |
533 | else if (errata.piix4.fdma) { | |
534 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 535 | "C3 not supported on PIIX4 with Type-F DMA\n")); |
d550d98d | 536 | return; |
1da177e4 LT |
537 | } |
538 | ||
02df8b93 | 539 | /* All the logic here assumes flags.bm_check is same across all CPUs */ |
ee1ca48f | 540 | if (bm_check_flag == -1) { |
02df8b93 VP |
541 | /* Determine whether bm_check is needed based on CPU */ |
542 | acpi_processor_power_init_bm_check(&(pr->flags), pr->id); | |
543 | bm_check_flag = pr->flags.bm_check; | |
ee1ca48f | 544 | bm_control_flag = pr->flags.bm_control; |
02df8b93 VP |
545 | } else { |
546 | pr->flags.bm_check = bm_check_flag; | |
ee1ca48f | 547 | pr->flags.bm_control = bm_control_flag; |
02df8b93 VP |
548 | } |
549 | ||
550 | if (pr->flags.bm_check) { | |
02df8b93 | 551 | if (!pr->flags.bm_control) { |
ed3110ef VP |
552 | if (pr->flags.has_cst != 1) { |
553 | /* bus mastering control is necessary */ | |
554 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
555 | "C3 support requires BM control\n")); | |
556 | return; | |
557 | } else { | |
558 | /* Here we enter C3 without bus mastering */ | |
559 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
560 | "C3 support without BM control\n")); | |
561 | } | |
02df8b93 VP |
562 | } |
563 | } else { | |
02df8b93 VP |
564 | /* |
565 | * WBINVD should be set in fadt, for C3 state to be | |
566 | * supported on when bm_check is not required. | |
567 | */ | |
cee324b1 | 568 | if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) { |
02df8b93 | 569 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
4be44fcd LB |
570 | "Cache invalidation should work properly" |
571 | " for C3 to be enabled on SMP systems\n")); | |
d550d98d | 572 | return; |
02df8b93 | 573 | } |
02df8b93 VP |
574 | } |
575 | ||
1da177e4 LT |
576 | /* |
577 | * Otherwise we've met all of our C3 requirements. | |
578 | * Normalize the C3 latency to expidite policy. Enable | |
579 | * checking of bus mastering status (bm_check) so we can | |
580 | * use this in our C3 policy | |
581 | */ | |
582 | cx->valid = 1; | |
4f86d3a8 | 583 | |
31878dd8 LB |
584 | /* |
585 | * On older chipsets, BM_RLD needs to be set | |
586 | * in order for Bus Master activity to wake the | |
587 | * system from C3. Newer chipsets handle DMA | |
588 | * during C3 automatically and BM_RLD is a NOP. | |
589 | * In either case, the proper way to | |
590 | * handle BM_RLD is to set it and leave it set. | |
591 | */ | |
50ffba1b | 592 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1); |
1da177e4 | 593 | |
d550d98d | 594 | return; |
1da177e4 LT |
595 | } |
596 | ||
1da177e4 LT |
597 | static int acpi_processor_power_verify(struct acpi_processor *pr) |
598 | { | |
599 | unsigned int i; | |
600 | unsigned int working = 0; | |
6eb0a0fd | 601 | |
169a0abb | 602 | pr->power.timer_broadcast_on_state = INT_MAX; |
6eb0a0fd | 603 | |
a0bf284b | 604 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
1da177e4 LT |
605 | struct acpi_processor_cx *cx = &pr->power.states[i]; |
606 | ||
607 | switch (cx->type) { | |
608 | case ACPI_STATE_C1: | |
609 | cx->valid = 1; | |
610 | break; | |
611 | ||
612 | case ACPI_STATE_C2: | |
d22edd29 LB |
613 | if (!cx->address) |
614 | break; | |
615 | cx->valid = 1; | |
1da177e4 LT |
616 | break; |
617 | ||
618 | case ACPI_STATE_C3: | |
619 | acpi_processor_power_verify_c3(pr, cx); | |
620 | break; | |
621 | } | |
7e275cc4 LB |
622 | if (!cx->valid) |
623 | continue; | |
1da177e4 | 624 | |
7e275cc4 LB |
625 | lapic_timer_check_state(i, pr, cx); |
626 | tsc_check_state(cx->type); | |
627 | working++; | |
1da177e4 | 628 | } |
bd663347 | 629 | |
918aae42 | 630 | lapic_timer_propagate_broadcast(pr); |
1da177e4 LT |
631 | |
632 | return (working); | |
633 | } | |
634 | ||
4be44fcd | 635 | static int acpi_processor_get_power_info(struct acpi_processor *pr) |
1da177e4 LT |
636 | { |
637 | unsigned int i; | |
638 | int result; | |
639 | ||
1da177e4 LT |
640 | |
641 | /* NOTE: the idle thread may not be running while calling | |
642 | * this function */ | |
643 | ||
991528d7 VP |
644 | /* Zero initialize all the C-states info. */ |
645 | memset(pr->power.states, 0, sizeof(pr->power.states)); | |
646 | ||
1da177e4 | 647 | result = acpi_processor_get_power_info_cst(pr); |
6d93c648 | 648 | if (result == -ENODEV) |
c5a114f1 | 649 | result = acpi_processor_get_power_info_fadt(pr); |
6d93c648 | 650 | |
991528d7 VP |
651 | if (result) |
652 | return result; | |
653 | ||
654 | acpi_processor_get_power_info_default(pr); | |
655 | ||
cf824788 | 656 | pr->power.count = acpi_processor_power_verify(pr); |
1da177e4 | 657 | |
1da177e4 LT |
658 | /* |
659 | * if one state of type C2 or C3 is available, mark this | |
660 | * CPU as being "idle manageable" | |
661 | */ | |
662 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { | |
acf05f4b | 663 | if (pr->power.states[i].valid) { |
1da177e4 | 664 | pr->power.count = i; |
2203d6ed LT |
665 | if (pr->power.states[i].type >= ACPI_STATE_C2) |
666 | pr->flags.power = 1; | |
acf05f4b | 667 | } |
1da177e4 LT |
668 | } |
669 | ||
d550d98d | 670 | return 0; |
1da177e4 LT |
671 | } |
672 | ||
4f86d3a8 LB |
673 | /** |
674 | * acpi_idle_bm_check - checks if bus master activity was detected | |
675 | */ | |
676 | static int acpi_idle_bm_check(void) | |
677 | { | |
678 | u32 bm_status = 0; | |
679 | ||
d3e7e99f LB |
680 | if (bm_check_disable) |
681 | return 0; | |
682 | ||
50ffba1b | 683 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); |
4f86d3a8 | 684 | if (bm_status) |
50ffba1b | 685 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); |
4f86d3a8 LB |
686 | /* |
687 | * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect | |
688 | * the true state of bus mastering activity; forcing us to | |
689 | * manually check the BMIDEA bit of each IDE channel. | |
690 | */ | |
691 | else if (errata.piix4.bmisx) { | |
692 | if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) | |
693 | || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) | |
694 | bm_status = 1; | |
695 | } | |
696 | return bm_status; | |
697 | } | |
698 | ||
4f86d3a8 LB |
699 | /** |
700 | * acpi_idle_do_entry - a helper function that does C2 and C3 type entry | |
701 | * @cx: cstate data | |
bc71bec9 | 702 | * |
703 | * Caller disables interrupt before call and enables interrupt after return. | |
4f86d3a8 LB |
704 | */ |
705 | static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx) | |
706 | { | |
dcf30997 SR |
707 | /* Don't trace irqs off for idle */ |
708 | stop_critical_timings(); | |
bc71bec9 | 709 | if (cx->entry_method == ACPI_CSTATE_FFH) { |
4f86d3a8 LB |
710 | /* Call into architectural FFH based C-state */ |
711 | acpi_processor_ffh_cstate_enter(cx); | |
bc71bec9 | 712 | } else if (cx->entry_method == ACPI_CSTATE_HALT) { |
713 | acpi_safe_halt(); | |
4f86d3a8 | 714 | } else { |
4f86d3a8 LB |
715 | /* IO port based C-state */ |
716 | inb(cx->address); | |
717 | /* Dummy wait op - must do something useless after P_LVL2 read | |
718 | because chipsets cannot guarantee that STPCLK# signal | |
719 | gets asserted in time to freeze execution properly. */ | |
cfa806f0 | 720 | inl(acpi_gbl_FADT.xpm_timer_block.address); |
4f86d3a8 | 721 | } |
dcf30997 | 722 | start_critical_timings(); |
4f86d3a8 LB |
723 | } |
724 | ||
725 | /** | |
726 | * acpi_idle_enter_c1 - enters an ACPI C1 state-type | |
727 | * @dev: the target CPU | |
46bcfad7 | 728 | * @drv: cpuidle driver containing cpuidle state info |
e978aa7d | 729 | * @index: index of target state |
4f86d3a8 LB |
730 | * |
731 | * This is equivalent to the HALT instruction. | |
732 | */ | |
733 | static int acpi_idle_enter_c1(struct cpuidle_device *dev, | |
46bcfad7 | 734 | struct cpuidle_driver *drv, int index) |
4f86d3a8 | 735 | { |
ff69f2bb AS |
736 | ktime_t kt1, kt2; |
737 | s64 idle_time; | |
4f86d3a8 | 738 | struct acpi_processor *pr; |
4202735e DD |
739 | struct cpuidle_state_usage *state_usage = &dev->states_usage[index]; |
740 | struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage); | |
9b12e18c | 741 | |
4a6f4fe8 | 742 | pr = __this_cpu_read(processors); |
e978aa7d | 743 | dev->last_residency = 0; |
4f86d3a8 LB |
744 | |
745 | if (unlikely(!pr)) | |
e978aa7d | 746 | return -EINVAL; |
4f86d3a8 | 747 | |
2e906655 | 748 | local_irq_disable(); |
b077fbad | 749 | |
75cc5235 | 750 | |
7e275cc4 | 751 | lapic_timer_state_broadcast(pr, cx, 1); |
ff69f2bb | 752 | kt1 = ktime_get_real(); |
bc71bec9 | 753 | acpi_idle_do_entry(cx); |
ff69f2bb AS |
754 | kt2 = ktime_get_real(); |
755 | idle_time = ktime_to_us(ktime_sub(kt2, kt1)); | |
4f86d3a8 | 756 | |
e978aa7d DD |
757 | /* Update device last_residency*/ |
758 | dev->last_residency = (int)idle_time; | |
759 | ||
2e906655 | 760 | local_irq_enable(); |
7e275cc4 | 761 | lapic_timer_state_broadcast(pr, cx, 0); |
4f86d3a8 | 762 | |
e978aa7d | 763 | return index; |
4f86d3a8 LB |
764 | } |
765 | ||
1a022e3f BO |
766 | |
767 | /** | |
768 | * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining) | |
769 | * @dev: the target CPU | |
770 | * @index: the index of suggested state | |
771 | */ | |
772 | static int acpi_idle_play_dead(struct cpuidle_device *dev, int index) | |
773 | { | |
774 | struct cpuidle_state_usage *state_usage = &dev->states_usage[index]; | |
775 | struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage); | |
776 | ||
777 | ACPI_FLUSH_CPU_CACHE(); | |
778 | ||
779 | while (1) { | |
780 | ||
781 | if (cx->entry_method == ACPI_CSTATE_HALT) | |
54f70077 | 782 | safe_halt(); |
1a022e3f BO |
783 | else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) { |
784 | inb(cx->address); | |
785 | /* See comment in acpi_idle_do_entry() */ | |
786 | inl(acpi_gbl_FADT.xpm_timer_block.address); | |
787 | } else | |
788 | return -ENODEV; | |
789 | } | |
790 | ||
791 | /* Never reached */ | |
792 | return 0; | |
793 | } | |
794 | ||
4f86d3a8 LB |
795 | /** |
796 | * acpi_idle_enter_simple - enters an ACPI state without BM handling | |
797 | * @dev: the target CPU | |
46bcfad7 | 798 | * @drv: cpuidle driver with cpuidle state information |
e978aa7d | 799 | * @index: the index of suggested state |
4f86d3a8 LB |
800 | */ |
801 | static int acpi_idle_enter_simple(struct cpuidle_device *dev, | |
46bcfad7 | 802 | struct cpuidle_driver *drv, int index) |
4f86d3a8 LB |
803 | { |
804 | struct acpi_processor *pr; | |
4202735e DD |
805 | struct cpuidle_state_usage *state_usage = &dev->states_usage[index]; |
806 | struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage); | |
ff69f2bb | 807 | ktime_t kt1, kt2; |
2da513f5 | 808 | s64 idle_time_ns; |
ff69f2bb | 809 | s64 idle_time; |
50629118 | 810 | |
4a6f4fe8 | 811 | pr = __this_cpu_read(processors); |
e978aa7d | 812 | dev->last_residency = 0; |
4f86d3a8 LB |
813 | |
814 | if (unlikely(!pr)) | |
e978aa7d | 815 | return -EINVAL; |
e196441b | 816 | |
4f86d3a8 | 817 | local_irq_disable(); |
02cf4f98 | 818 | |
75cc5235 | 819 | |
d306ebc2 PV |
820 | if (cx->entry_method != ACPI_CSTATE_FFH) { |
821 | current_thread_info()->status &= ~TS_POLLING; | |
822 | /* | |
823 | * TS_POLLING-cleared state must be visible before we test | |
824 | * NEED_RESCHED: | |
825 | */ | |
826 | smp_mb(); | |
4f86d3a8 | 827 | |
02cf4f98 LB |
828 | if (unlikely(need_resched())) { |
829 | current_thread_info()->status |= TS_POLLING; | |
830 | local_irq_enable(); | |
e978aa7d | 831 | return -EINVAL; |
02cf4f98 | 832 | } |
4f86d3a8 LB |
833 | } |
834 | ||
e17bcb43 TG |
835 | /* |
836 | * Must be done before busmaster disable as we might need to | |
837 | * access HPET ! | |
838 | */ | |
7e275cc4 | 839 | lapic_timer_state_broadcast(pr, cx, 1); |
e17bcb43 | 840 | |
4f86d3a8 LB |
841 | if (cx->type == ACPI_STATE_C3) |
842 | ACPI_FLUSH_CPU_CACHE(); | |
843 | ||
ff69f2bb | 844 | kt1 = ktime_get_real(); |
50629118 VP |
845 | /* Tell the scheduler that we are going deep-idle: */ |
846 | sched_clock_idle_sleep_event(); | |
4f86d3a8 | 847 | acpi_idle_do_entry(cx); |
ff69f2bb | 848 | kt2 = ktime_get_real(); |
2da513f5 VP |
849 | idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1)); |
850 | idle_time = idle_time_ns; | |
851 | do_div(idle_time, NSEC_PER_USEC); | |
4f86d3a8 | 852 | |
e978aa7d DD |
853 | /* Update device last_residency*/ |
854 | dev->last_residency = (int)idle_time; | |
855 | ||
50629118 | 856 | /* Tell the scheduler how much we idled: */ |
2da513f5 | 857 | sched_clock_idle_wakeup_event(idle_time_ns); |
4f86d3a8 LB |
858 | |
859 | local_irq_enable(); | |
02cf4f98 LB |
860 | if (cx->entry_method != ACPI_CSTATE_FFH) |
861 | current_thread_info()->status |= TS_POLLING; | |
4f86d3a8 | 862 | |
7e275cc4 | 863 | lapic_timer_state_broadcast(pr, cx, 0); |
e978aa7d | 864 | return index; |
4f86d3a8 LB |
865 | } |
866 | ||
867 | static int c3_cpu_count; | |
e12f65f7 | 868 | static DEFINE_RAW_SPINLOCK(c3_lock); |
4f86d3a8 LB |
869 | |
870 | /** | |
871 | * acpi_idle_enter_bm - enters C3 with proper BM handling | |
872 | * @dev: the target CPU | |
46bcfad7 | 873 | * @drv: cpuidle driver containing state data |
e978aa7d | 874 | * @index: the index of suggested state |
4f86d3a8 LB |
875 | * |
876 | * If BM is detected, the deepest non-C3 idle state is entered instead. | |
877 | */ | |
878 | static int acpi_idle_enter_bm(struct cpuidle_device *dev, | |
46bcfad7 | 879 | struct cpuidle_driver *drv, int index) |
4f86d3a8 LB |
880 | { |
881 | struct acpi_processor *pr; | |
4202735e DD |
882 | struct cpuidle_state_usage *state_usage = &dev->states_usage[index]; |
883 | struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage); | |
ff69f2bb | 884 | ktime_t kt1, kt2; |
2da513f5 | 885 | s64 idle_time_ns; |
ff69f2bb | 886 | s64 idle_time; |
ff69f2bb | 887 | |
50629118 | 888 | |
4a6f4fe8 | 889 | pr = __this_cpu_read(processors); |
e978aa7d | 890 | dev->last_residency = 0; |
4f86d3a8 LB |
891 | |
892 | if (unlikely(!pr)) | |
e978aa7d | 893 | return -EINVAL; |
4f86d3a8 | 894 | |
718be4aa | 895 | if (!cx->bm_sts_skip && acpi_idle_bm_check()) { |
46bcfad7 DD |
896 | if (drv->safe_state_index >= 0) { |
897 | return drv->states[drv->safe_state_index].enter(dev, | |
898 | drv, drv->safe_state_index); | |
ddc081a1 | 899 | } else { |
2e906655 | 900 | local_irq_disable(); |
8651f97b | 901 | acpi_safe_halt(); |
2e906655 | 902 | local_irq_enable(); |
75cc5235 | 903 | return -EBUSY; |
ddc081a1 VP |
904 | } |
905 | } | |
906 | ||
4f86d3a8 | 907 | local_irq_disable(); |
02cf4f98 | 908 | |
75cc5235 | 909 | |
d306ebc2 PV |
910 | if (cx->entry_method != ACPI_CSTATE_FFH) { |
911 | current_thread_info()->status &= ~TS_POLLING; | |
912 | /* | |
913 | * TS_POLLING-cleared state must be visible before we test | |
914 | * NEED_RESCHED: | |
915 | */ | |
916 | smp_mb(); | |
4f86d3a8 | 917 | |
02cf4f98 LB |
918 | if (unlikely(need_resched())) { |
919 | current_thread_info()->status |= TS_POLLING; | |
920 | local_irq_enable(); | |
e978aa7d | 921 | return -EINVAL; |
02cf4f98 | 922 | } |
4f86d3a8 LB |
923 | } |
924 | ||
996520c1 VP |
925 | acpi_unlazy_tlb(smp_processor_id()); |
926 | ||
50629118 VP |
927 | /* Tell the scheduler that we are going deep-idle: */ |
928 | sched_clock_idle_sleep_event(); | |
4f86d3a8 LB |
929 | /* |
930 | * Must be done before busmaster disable as we might need to | |
931 | * access HPET ! | |
932 | */ | |
7e275cc4 | 933 | lapic_timer_state_broadcast(pr, cx, 1); |
4f86d3a8 | 934 | |
f461ddea | 935 | kt1 = ktime_get_real(); |
ddc081a1 VP |
936 | /* |
937 | * disable bus master | |
938 | * bm_check implies we need ARB_DIS | |
939 | * !bm_check implies we need cache flush | |
940 | * bm_control implies whether we can do ARB_DIS | |
941 | * | |
942 | * That leaves a case where bm_check is set and bm_control is | |
943 | * not set. In that case we cannot do much, we enter C3 | |
944 | * without doing anything. | |
945 | */ | |
946 | if (pr->flags.bm_check && pr->flags.bm_control) { | |
e12f65f7 | 947 | raw_spin_lock(&c3_lock); |
4f86d3a8 LB |
948 | c3_cpu_count++; |
949 | /* Disable bus master arbitration when all CPUs are in C3 */ | |
950 | if (c3_cpu_count == num_online_cpus()) | |
50ffba1b | 951 | acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1); |
e12f65f7 | 952 | raw_spin_unlock(&c3_lock); |
ddc081a1 VP |
953 | } else if (!pr->flags.bm_check) { |
954 | ACPI_FLUSH_CPU_CACHE(); | |
955 | } | |
4f86d3a8 | 956 | |
ddc081a1 | 957 | acpi_idle_do_entry(cx); |
4f86d3a8 | 958 | |
ddc081a1 VP |
959 | /* Re-enable bus master arbitration */ |
960 | if (pr->flags.bm_check && pr->flags.bm_control) { | |
e12f65f7 | 961 | raw_spin_lock(&c3_lock); |
50ffba1b | 962 | acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0); |
4f86d3a8 | 963 | c3_cpu_count--; |
e12f65f7 | 964 | raw_spin_unlock(&c3_lock); |
4f86d3a8 | 965 | } |
f461ddea | 966 | kt2 = ktime_get_real(); |
157317ba | 967 | idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1)); |
2da513f5 VP |
968 | idle_time = idle_time_ns; |
969 | do_div(idle_time, NSEC_PER_USEC); | |
4f86d3a8 | 970 | |
e978aa7d DD |
971 | /* Update device last_residency*/ |
972 | dev->last_residency = (int)idle_time; | |
973 | ||
50629118 | 974 | /* Tell the scheduler how much we idled: */ |
2da513f5 | 975 | sched_clock_idle_wakeup_event(idle_time_ns); |
4f86d3a8 LB |
976 | |
977 | local_irq_enable(); | |
02cf4f98 LB |
978 | if (cx->entry_method != ACPI_CSTATE_FFH) |
979 | current_thread_info()->status |= TS_POLLING; | |
4f86d3a8 | 980 | |
7e275cc4 | 981 | lapic_timer_state_broadcast(pr, cx, 0); |
e978aa7d | 982 | return index; |
4f86d3a8 LB |
983 | } |
984 | ||
985 | struct cpuidle_driver acpi_idle_driver = { | |
986 | .name = "acpi_idle", | |
987 | .owner = THIS_MODULE, | |
988 | }; | |
989 | ||
990 | /** | |
46bcfad7 DD |
991 | * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE |
992 | * device i.e. per-cpu data | |
993 | * | |
4f86d3a8 LB |
994 | * @pr: the ACPI processor |
995 | */ | |
46bcfad7 | 996 | static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr) |
4f86d3a8 | 997 | { |
9a0b8415 | 998 | int i, count = CPUIDLE_DRIVER_STATE_START; |
4f86d3a8 | 999 | struct acpi_processor_cx *cx; |
4202735e | 1000 | struct cpuidle_state_usage *state_usage; |
4f86d3a8 LB |
1001 | struct cpuidle_device *dev = &pr->power.dev; |
1002 | ||
1003 | if (!pr->flags.power_setup_done) | |
1004 | return -EINVAL; | |
1005 | ||
1006 | if (pr->flags.power == 0) { | |
1007 | return -EINVAL; | |
1008 | } | |
1009 | ||
dcb84f33 | 1010 | dev->cpu = pr->id; |
4fcb2fcd | 1011 | |
615dfd93 LB |
1012 | if (max_cstate == 0) |
1013 | max_cstate = 1; | |
1014 | ||
4f86d3a8 LB |
1015 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
1016 | cx = &pr->power.states[i]; | |
4202735e | 1017 | state_usage = &dev->states_usage[count]; |
4f86d3a8 LB |
1018 | |
1019 | if (!cx->valid) | |
1020 | continue; | |
1021 | ||
1022 | #ifdef CONFIG_HOTPLUG_CPU | |
1023 | if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
1024 | !pr->flags.has_cst && | |
1025 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) | |
1026 | continue; | |
1fec74a9 | 1027 | #endif |
46bcfad7 | 1028 | |
4202735e | 1029 | cpuidle_set_statedata(state_usage, cx); |
4f86d3a8 | 1030 | |
46bcfad7 DD |
1031 | count++; |
1032 | if (count == CPUIDLE_STATE_MAX) | |
1033 | break; | |
1034 | } | |
1035 | ||
1036 | dev->state_count = count; | |
1037 | ||
1038 | if (!count) | |
1039 | return -EINVAL; | |
1040 | ||
1041 | return 0; | |
1042 | } | |
1043 | ||
1044 | /** | |
1045 | * acpi_processor_setup_cpuidle states- prepares and configures cpuidle | |
1046 | * global state data i.e. idle routines | |
1047 | * | |
1048 | * @pr: the ACPI processor | |
1049 | */ | |
1050 | static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr) | |
1051 | { | |
1052 | int i, count = CPUIDLE_DRIVER_STATE_START; | |
1053 | struct acpi_processor_cx *cx; | |
1054 | struct cpuidle_state *state; | |
1055 | struct cpuidle_driver *drv = &acpi_idle_driver; | |
1056 | ||
1057 | if (!pr->flags.power_setup_done) | |
1058 | return -EINVAL; | |
1059 | ||
1060 | if (pr->flags.power == 0) | |
1061 | return -EINVAL; | |
1062 | ||
1063 | drv->safe_state_index = -1; | |
4fcb2fcd | 1064 | for (i = 0; i < CPUIDLE_STATE_MAX; i++) { |
46bcfad7 DD |
1065 | drv->states[i].name[0] = '\0'; |
1066 | drv->states[i].desc[0] = '\0'; | |
4fcb2fcd VP |
1067 | } |
1068 | ||
615dfd93 LB |
1069 | if (max_cstate == 0) |
1070 | max_cstate = 1; | |
1071 | ||
4f86d3a8 LB |
1072 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
1073 | cx = &pr->power.states[i]; | |
4f86d3a8 LB |
1074 | |
1075 | if (!cx->valid) | |
1076 | continue; | |
1077 | ||
1078 | #ifdef CONFIG_HOTPLUG_CPU | |
1079 | if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
1080 | !pr->flags.has_cst && | |
1081 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) | |
1082 | continue; | |
1fec74a9 | 1083 | #endif |
4f86d3a8 | 1084 | |
46bcfad7 | 1085 | state = &drv->states[count]; |
4f86d3a8 | 1086 | snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i); |
4fcb2fcd | 1087 | strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN); |
4f86d3a8 | 1088 | state->exit_latency = cx->latency; |
4963f620 | 1089 | state->target_residency = cx->latency * latency_factor; |
4f86d3a8 LB |
1090 | |
1091 | state->flags = 0; | |
1092 | switch (cx->type) { | |
1093 | case ACPI_STATE_C1: | |
8e92b660 VP |
1094 | if (cx->entry_method == ACPI_CSTATE_FFH) |
1095 | state->flags |= CPUIDLE_FLAG_TIME_VALID; | |
1096 | ||
4f86d3a8 | 1097 | state->enter = acpi_idle_enter_c1; |
1a022e3f | 1098 | state->enter_dead = acpi_idle_play_dead; |
46bcfad7 | 1099 | drv->safe_state_index = count; |
4f86d3a8 LB |
1100 | break; |
1101 | ||
1102 | case ACPI_STATE_C2: | |
4f86d3a8 LB |
1103 | state->flags |= CPUIDLE_FLAG_TIME_VALID; |
1104 | state->enter = acpi_idle_enter_simple; | |
1a022e3f | 1105 | state->enter_dead = acpi_idle_play_dead; |
46bcfad7 | 1106 | drv->safe_state_index = count; |
4f86d3a8 LB |
1107 | break; |
1108 | ||
1109 | case ACPI_STATE_C3: | |
4f86d3a8 | 1110 | state->flags |= CPUIDLE_FLAG_TIME_VALID; |
4f86d3a8 LB |
1111 | state->enter = pr->flags.bm_check ? |
1112 | acpi_idle_enter_bm : | |
1113 | acpi_idle_enter_simple; | |
1114 | break; | |
1115 | } | |
1116 | ||
1117 | count++; | |
9a0b8415 | 1118 | if (count == CPUIDLE_STATE_MAX) |
1119 | break; | |
4f86d3a8 LB |
1120 | } |
1121 | ||
46bcfad7 | 1122 | drv->state_count = count; |
4f86d3a8 LB |
1123 | |
1124 | if (!count) | |
1125 | return -EINVAL; | |
1126 | ||
4f86d3a8 LB |
1127 | return 0; |
1128 | } | |
1129 | ||
46bcfad7 | 1130 | int acpi_processor_hotplug(struct acpi_processor *pr) |
4f86d3a8 | 1131 | { |
dcb84f33 | 1132 | int ret = 0; |
4f86d3a8 | 1133 | |
d1896049 | 1134 | if (disabled_by_idle_boot_param()) |
36a91358 VP |
1135 | return 0; |
1136 | ||
4f86d3a8 LB |
1137 | if (!pr) |
1138 | return -EINVAL; | |
1139 | ||
1140 | if (nocst) { | |
1141 | return -ENODEV; | |
1142 | } | |
1143 | ||
1144 | if (!pr->flags.power_setup_done) | |
1145 | return -ENODEV; | |
1146 | ||
1147 | cpuidle_pause_and_lock(); | |
1148 | cpuidle_disable_device(&pr->power.dev); | |
1149 | acpi_processor_get_power_info(pr); | |
dcb84f33 | 1150 | if (pr->flags.power) { |
46bcfad7 | 1151 | acpi_processor_setup_cpuidle_cx(pr); |
dcb84f33 VP |
1152 | ret = cpuidle_enable_device(&pr->power.dev); |
1153 | } | |
4f86d3a8 LB |
1154 | cpuidle_resume_and_unlock(); |
1155 | ||
1156 | return ret; | |
1157 | } | |
1158 | ||
46bcfad7 DD |
1159 | int acpi_processor_cst_has_changed(struct acpi_processor *pr) |
1160 | { | |
1161 | int cpu; | |
1162 | struct acpi_processor *_pr; | |
1163 | ||
1164 | if (disabled_by_idle_boot_param()) | |
1165 | return 0; | |
1166 | ||
1167 | if (!pr) | |
1168 | return -EINVAL; | |
1169 | ||
1170 | if (nocst) | |
1171 | return -ENODEV; | |
1172 | ||
1173 | if (!pr->flags.power_setup_done) | |
1174 | return -ENODEV; | |
1175 | ||
1176 | /* | |
1177 | * FIXME: Design the ACPI notification to make it once per | |
1178 | * system instead of once per-cpu. This condition is a hack | |
1179 | * to make the code that updates C-States be called once. | |
1180 | */ | |
1181 | ||
9505626d | 1182 | if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) { |
46bcfad7 DD |
1183 | |
1184 | cpuidle_pause_and_lock(); | |
1185 | /* Protect against cpu-hotplug */ | |
1186 | get_online_cpus(); | |
1187 | ||
1188 | /* Disable all cpuidle devices */ | |
1189 | for_each_online_cpu(cpu) { | |
1190 | _pr = per_cpu(processors, cpu); | |
1191 | if (!_pr || !_pr->flags.power_setup_done) | |
1192 | continue; | |
1193 | cpuidle_disable_device(&_pr->power.dev); | |
1194 | } | |
1195 | ||
1196 | /* Populate Updated C-state information */ | |
1197 | acpi_processor_setup_cpuidle_states(pr); | |
1198 | ||
1199 | /* Enable all cpuidle devices */ | |
1200 | for_each_online_cpu(cpu) { | |
1201 | _pr = per_cpu(processors, cpu); | |
1202 | if (!_pr || !_pr->flags.power_setup_done) | |
1203 | continue; | |
1204 | acpi_processor_get_power_info(_pr); | |
1205 | if (_pr->flags.power) { | |
1206 | acpi_processor_setup_cpuidle_cx(_pr); | |
1207 | cpuidle_enable_device(&_pr->power.dev); | |
1208 | } | |
1209 | } | |
1210 | put_online_cpus(); | |
1211 | cpuidle_resume_and_unlock(); | |
1212 | } | |
1213 | ||
1214 | return 0; | |
1215 | } | |
1216 | ||
1217 | static int acpi_processor_registered; | |
1218 | ||
7af8b660 | 1219 | int __cpuinit acpi_processor_power_init(struct acpi_processor *pr, |
4be44fcd | 1220 | struct acpi_device *device) |
1da177e4 | 1221 | { |
4be44fcd | 1222 | acpi_status status = 0; |
46bcfad7 | 1223 | int retval; |
b6835052 | 1224 | static int first_run; |
1da177e4 | 1225 | |
d1896049 | 1226 | if (disabled_by_idle_boot_param()) |
36a91358 | 1227 | return 0; |
1da177e4 LT |
1228 | |
1229 | if (!first_run) { | |
1230 | dmi_check_system(processor_power_dmi_table); | |
c1c30634 | 1231 | max_cstate = acpi_processor_cstate_check(max_cstate); |
1da177e4 | 1232 | if (max_cstate < ACPI_C_STATES_MAX) |
4be44fcd LB |
1233 | printk(KERN_NOTICE |
1234 | "ACPI: processor limited to max C-state %d\n", | |
1235 | max_cstate); | |
1da177e4 LT |
1236 | first_run++; |
1237 | } | |
1238 | ||
02df8b93 | 1239 | if (!pr) |
d550d98d | 1240 | return -EINVAL; |
02df8b93 | 1241 | |
cee324b1 | 1242 | if (acpi_gbl_FADT.cst_control && !nocst) { |
4be44fcd | 1243 | status = |
cee324b1 | 1244 | acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8); |
1da177e4 | 1245 | if (ACPI_FAILURE(status)) { |
a6fc6720 TR |
1246 | ACPI_EXCEPTION((AE_INFO, status, |
1247 | "Notifying BIOS of _CST ability failed")); | |
1da177e4 LT |
1248 | } |
1249 | } | |
1250 | ||
1251 | acpi_processor_get_power_info(pr); | |
4f86d3a8 | 1252 | pr->flags.power_setup_done = 1; |
1da177e4 LT |
1253 | |
1254 | /* | |
1255 | * Install the idle handler if processor power management is supported. | |
1256 | * Note that we use previously set idle handler will be used on | |
1257 | * platforms that only support C1. | |
1258 | */ | |
36a91358 | 1259 | if (pr->flags.power) { |
46bcfad7 DD |
1260 | /* Register acpi_idle_driver if not already registered */ |
1261 | if (!acpi_processor_registered) { | |
1262 | acpi_processor_setup_cpuidle_states(pr); | |
1263 | retval = cpuidle_register_driver(&acpi_idle_driver); | |
1264 | if (retval) | |
1265 | return retval; | |
1266 | printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n", | |
1267 | acpi_idle_driver.name); | |
1268 | } | |
1269 | /* Register per-cpu cpuidle_device. Cpuidle driver | |
1270 | * must already be registered before registering device | |
1271 | */ | |
1272 | acpi_processor_setup_cpuidle_cx(pr); | |
1273 | retval = cpuidle_register_device(&pr->power.dev); | |
1274 | if (retval) { | |
1275 | if (acpi_processor_registered == 0) | |
1276 | cpuidle_unregister_driver(&acpi_idle_driver); | |
1277 | return retval; | |
1278 | } | |
1279 | acpi_processor_registered++; | |
1da177e4 | 1280 | } |
d550d98d | 1281 | return 0; |
1da177e4 LT |
1282 | } |
1283 | ||
4be44fcd LB |
1284 | int acpi_processor_power_exit(struct acpi_processor *pr, |
1285 | struct acpi_device *device) | |
1da177e4 | 1286 | { |
d1896049 | 1287 | if (disabled_by_idle_boot_param()) |
36a91358 VP |
1288 | return 0; |
1289 | ||
46bcfad7 DD |
1290 | if (pr->flags.power) { |
1291 | cpuidle_unregister_device(&pr->power.dev); | |
1292 | acpi_processor_registered--; | |
1293 | if (acpi_processor_registered == 0) | |
1294 | cpuidle_unregister_driver(&acpi_idle_driver); | |
1295 | } | |
1da177e4 | 1296 | |
46bcfad7 | 1297 | pr->flags.power_setup_done = 0; |
d550d98d | 1298 | return 0; |
1da177e4 | 1299 | } |