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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * processor_idle - idle state submodule to the ACPI processor driver | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
c5ab81ca | 6 | * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> |
1da177e4 LT |
7 | * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> |
8 | * - Added processor hotplug support | |
02df8b93 VP |
9 | * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> |
10 | * - Added support for C3 on SMP | |
1da177e4 LT |
11 | * |
12 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or (at | |
17 | * your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, but | |
20 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
22 | * General Public License for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License along | |
25 | * with this program; if not, write to the Free Software Foundation, Inc., | |
26 | * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
27 | * | |
28 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
29 | */ | |
30 | ||
1da177e4 | 31 | #include <linux/module.h> |
1da177e4 LT |
32 | #include <linux/acpi.h> |
33 | #include <linux/dmi.h> | |
e2668fb5 | 34 | #include <linux/sched.h> /* need_resched() */ |
e9e2cdb4 | 35 | #include <linux/clockchips.h> |
4f86d3a8 | 36 | #include <linux/cpuidle.h> |
1da177e4 | 37 | |
3434933b TG |
38 | /* |
39 | * Include the apic definitions for x86 to have the APIC timer related defines | |
40 | * available also for UP (on SMP it gets magically included via linux/smp.h). | |
41 | * asm/acpi.h is not an option, as it would require more include magic. Also | |
42 | * creating an empty asm-ia64/apic.h would just trade pest vs. cholera. | |
43 | */ | |
44 | #ifdef CONFIG_X86 | |
45 | #include <asm/apic.h> | |
46 | #endif | |
47 | ||
1da177e4 LT |
48 | #include <acpi/acpi_bus.h> |
49 | #include <acpi/processor.h> | |
50 | ||
a192a958 LB |
51 | #define PREFIX "ACPI: " |
52 | ||
1da177e4 | 53 | #define ACPI_PROCESSOR_CLASS "processor" |
1da177e4 | 54 | #define _COMPONENT ACPI_PROCESSOR_COMPONENT |
f52fd66d | 55 | ACPI_MODULE_NAME("processor_idle"); |
1da177e4 | 56 | |
4f86d3a8 LB |
57 | static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER; |
58 | module_param(max_cstate, uint, 0000); | |
b6835052 | 59 | static unsigned int nocst __read_mostly; |
1da177e4 | 60 | module_param(nocst, uint, 0000); |
d3e7e99f LB |
61 | static int bm_check_disable __read_mostly; |
62 | module_param(bm_check_disable, uint, 0000); | |
1da177e4 | 63 | |
25de5718 | 64 | static unsigned int latency_factor __read_mostly = 2; |
4963f620 | 65 | module_param(latency_factor, uint, 0644); |
1da177e4 | 66 | |
3d339dcb DL |
67 | static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device); |
68 | ||
d1896049 TR |
69 | static int disabled_by_idle_boot_param(void) |
70 | { | |
71 | return boot_option_idle_override == IDLE_POLL || | |
72 | boot_option_idle_override == IDLE_FORCE_MWAIT || | |
73 | boot_option_idle_override == IDLE_HALT; | |
74 | } | |
75 | ||
1da177e4 LT |
76 | /* |
77 | * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. | |
78 | * For now disable this. Probably a bug somewhere else. | |
79 | * | |
80 | * To skip this limit, boot/load with a large max_cstate limit. | |
81 | */ | |
1855256c | 82 | static int set_max_cstate(const struct dmi_system_id *id) |
1da177e4 LT |
83 | { |
84 | if (max_cstate > ACPI_PROCESSOR_MAX_POWER) | |
85 | return 0; | |
86 | ||
3d35600a | 87 | printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate." |
4be44fcd LB |
88 | " Override with \"processor.max_cstate=%d\"\n", id->ident, |
89 | (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); | |
1da177e4 | 90 | |
3d35600a | 91 | max_cstate = (long)id->driver_data; |
1da177e4 LT |
92 | |
93 | return 0; | |
94 | } | |
95 | ||
7ded5689 AR |
96 | /* Actually this shouldn't be __cpuinitdata, would be better to fix the |
97 | callers to only run once -AK */ | |
98 | static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = { | |
876c184b TR |
99 | { set_max_cstate, "Clevo 5600D", { |
100 | DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), | |
101 | DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, | |
4be44fcd | 102 | (void *)2}, |
370d5cd8 AV |
103 | { set_max_cstate, "Pavilion zv5000", { |
104 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
105 | DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")}, | |
106 | (void *)1}, | |
107 | { set_max_cstate, "Asus L8400B", { | |
108 | DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."), | |
109 | DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")}, | |
110 | (void *)1}, | |
1da177e4 LT |
111 | {}, |
112 | }; | |
113 | ||
4f86d3a8 | 114 | |
2e906655 | 115 | /* |
116 | * Callers should disable interrupts before the call and enable | |
117 | * interrupts after return. | |
118 | */ | |
ddc081a1 VP |
119 | static void acpi_safe_halt(void) |
120 | { | |
121 | current_thread_info()->status &= ~TS_POLLING; | |
122 | /* | |
123 | * TS_POLLING-cleared state must be visible before we | |
124 | * test NEED_RESCHED: | |
125 | */ | |
126 | smp_mb(); | |
71e93d15 | 127 | if (!need_resched()) { |
ddc081a1 | 128 | safe_halt(); |
71e93d15 VP |
129 | local_irq_disable(); |
130 | } | |
ddc081a1 VP |
131 | current_thread_info()->status |= TS_POLLING; |
132 | } | |
133 | ||
169a0abb TG |
134 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
135 | ||
136 | /* | |
137 | * Some BIOS implementations switch to C3 in the published C2 state. | |
296d93cd LT |
138 | * This seems to be a common problem on AMD boxen, but other vendors |
139 | * are affected too. We pick the most conservative approach: we assume | |
140 | * that the local APIC stops in both C2 and C3. | |
169a0abb | 141 | */ |
7e275cc4 | 142 | static void lapic_timer_check_state(int state, struct acpi_processor *pr, |
169a0abb TG |
143 | struct acpi_processor_cx *cx) |
144 | { | |
145 | struct acpi_processor_power *pwr = &pr->power; | |
e585bef8 | 146 | u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; |
169a0abb | 147 | |
db954b58 VP |
148 | if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT)) |
149 | return; | |
150 | ||
02c68a02 | 151 | if (amd_e400_c1e_detected) |
87ad57ba SL |
152 | type = ACPI_STATE_C1; |
153 | ||
169a0abb TG |
154 | /* |
155 | * Check, if one of the previous states already marked the lapic | |
156 | * unstable | |
157 | */ | |
158 | if (pwr->timer_broadcast_on_state < state) | |
159 | return; | |
160 | ||
e585bef8 | 161 | if (cx->type >= type) |
296d93cd | 162 | pr->power.timer_broadcast_on_state = state; |
169a0abb TG |
163 | } |
164 | ||
918aae42 | 165 | static void __lapic_timer_propagate_broadcast(void *arg) |
169a0abb | 166 | { |
f833bab8 | 167 | struct acpi_processor *pr = (struct acpi_processor *) arg; |
e9e2cdb4 TG |
168 | unsigned long reason; |
169 | ||
170 | reason = pr->power.timer_broadcast_on_state < INT_MAX ? | |
171 | CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF; | |
172 | ||
173 | clockevents_notify(reason, &pr->id); | |
e9e2cdb4 TG |
174 | } |
175 | ||
918aae42 HS |
176 | static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) |
177 | { | |
178 | smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast, | |
179 | (void *)pr, 1); | |
180 | } | |
181 | ||
e9e2cdb4 | 182 | /* Power(C) State timer broadcast control */ |
7e275cc4 | 183 | static void lapic_timer_state_broadcast(struct acpi_processor *pr, |
e9e2cdb4 TG |
184 | struct acpi_processor_cx *cx, |
185 | int broadcast) | |
186 | { | |
e9e2cdb4 TG |
187 | int state = cx - pr->power.states; |
188 | ||
189 | if (state >= pr->power.timer_broadcast_on_state) { | |
190 | unsigned long reason; | |
191 | ||
192 | reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER : | |
193 | CLOCK_EVT_NOTIFY_BROADCAST_EXIT; | |
194 | clockevents_notify(reason, &pr->id); | |
195 | } | |
169a0abb TG |
196 | } |
197 | ||
198 | #else | |
199 | ||
7e275cc4 | 200 | static void lapic_timer_check_state(int state, struct acpi_processor *pr, |
169a0abb | 201 | struct acpi_processor_cx *cstate) { } |
7e275cc4 LB |
202 | static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { } |
203 | static void lapic_timer_state_broadcast(struct acpi_processor *pr, | |
e9e2cdb4 TG |
204 | struct acpi_processor_cx *cx, |
205 | int broadcast) | |
206 | { | |
207 | } | |
169a0abb TG |
208 | |
209 | #endif | |
210 | ||
815ab0fd LB |
211 | static u32 saved_bm_rld; |
212 | ||
213 | static void acpi_idle_bm_rld_save(void) | |
214 | { | |
215 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld); | |
216 | } | |
217 | static void acpi_idle_bm_rld_restore(void) | |
218 | { | |
219 | u32 resumed_bm_rld; | |
220 | ||
221 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld); | |
222 | ||
223 | if (resumed_bm_rld != saved_bm_rld) | |
224 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld); | |
225 | } | |
b04e7bdb | 226 | |
e8110b64 | 227 | int acpi_processor_suspend(struct device *dev) |
b04e7bdb | 228 | { |
815ab0fd | 229 | acpi_idle_bm_rld_save(); |
b04e7bdb TG |
230 | return 0; |
231 | } | |
232 | ||
e8110b64 | 233 | int acpi_processor_resume(struct device *dev) |
b04e7bdb | 234 | { |
815ab0fd | 235 | acpi_idle_bm_rld_restore(); |
b04e7bdb TG |
236 | return 0; |
237 | } | |
238 | ||
592913ec | 239 | #if defined(CONFIG_X86) |
520daf72 | 240 | static void tsc_check_state(int state) |
ddb25f9a AK |
241 | { |
242 | switch (boot_cpu_data.x86_vendor) { | |
243 | case X86_VENDOR_AMD: | |
40fb1715 | 244 | case X86_VENDOR_INTEL: |
ddb25f9a AK |
245 | /* |
246 | * AMD Fam10h TSC will tick in all | |
247 | * C/P/S0/S1 states when this bit is set. | |
248 | */ | |
40fb1715 | 249 | if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) |
520daf72 | 250 | return; |
40fb1715 | 251 | |
ddb25f9a | 252 | /*FALL THROUGH*/ |
ddb25f9a | 253 | default: |
520daf72 LB |
254 | /* TSC could halt in idle, so notify users */ |
255 | if (state > ACPI_STATE_C1) | |
256 | mark_tsc_unstable("TSC halts in idle"); | |
ddb25f9a AK |
257 | } |
258 | } | |
520daf72 LB |
259 | #else |
260 | static void tsc_check_state(int state) { return; } | |
ddb25f9a AK |
261 | #endif |
262 | ||
4be44fcd | 263 | static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) |
1da177e4 | 264 | { |
1da177e4 LT |
265 | |
266 | if (!pr) | |
d550d98d | 267 | return -EINVAL; |
1da177e4 LT |
268 | |
269 | if (!pr->pblk) | |
d550d98d | 270 | return -ENODEV; |
1da177e4 | 271 | |
1da177e4 | 272 | /* if info is obtained from pblk/fadt, type equals state */ |
1da177e4 LT |
273 | pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; |
274 | pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; | |
275 | ||
4c033552 VP |
276 | #ifndef CONFIG_HOTPLUG_CPU |
277 | /* | |
278 | * Check for P_LVL2_UP flag before entering C2 and above on | |
4f86d3a8 | 279 | * an SMP system. |
4c033552 | 280 | */ |
ad71860a | 281 | if ((num_online_cpus() > 1) && |
cee324b1 | 282 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) |
d550d98d | 283 | return -ENODEV; |
4c033552 VP |
284 | #endif |
285 | ||
1da177e4 LT |
286 | /* determine C2 and C3 address from pblk */ |
287 | pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; | |
288 | pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; | |
289 | ||
290 | /* determine latencies from FADT */ | |
ba494bee BM |
291 | pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency; |
292 | pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency; | |
1da177e4 | 293 | |
5d76b6f6 LB |
294 | /* |
295 | * FADT specified C2 latency must be less than or equal to | |
296 | * 100 microseconds. | |
297 | */ | |
ba494bee | 298 | if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { |
5d76b6f6 | 299 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
ba494bee | 300 | "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency)); |
5d76b6f6 LB |
301 | /* invalidate C2 */ |
302 | pr->power.states[ACPI_STATE_C2].address = 0; | |
303 | } | |
304 | ||
a6d72c18 LB |
305 | /* |
306 | * FADT supplied C3 latency must be less than or equal to | |
307 | * 1000 microseconds. | |
308 | */ | |
ba494bee | 309 | if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { |
a6d72c18 | 310 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
ba494bee | 311 | "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency)); |
a6d72c18 LB |
312 | /* invalidate C3 */ |
313 | pr->power.states[ACPI_STATE_C3].address = 0; | |
314 | } | |
315 | ||
1da177e4 LT |
316 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
317 | "lvl2[0x%08x] lvl3[0x%08x]\n", | |
318 | pr->power.states[ACPI_STATE_C2].address, | |
319 | pr->power.states[ACPI_STATE_C3].address)); | |
320 | ||
d550d98d | 321 | return 0; |
1da177e4 LT |
322 | } |
323 | ||
991528d7 | 324 | static int acpi_processor_get_power_info_default(struct acpi_processor *pr) |
acf05f4b | 325 | { |
991528d7 VP |
326 | if (!pr->power.states[ACPI_STATE_C1].valid) { |
327 | /* set the first C-State to C1 */ | |
328 | /* all processors need to support C1 */ | |
329 | pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; | |
330 | pr->power.states[ACPI_STATE_C1].valid = 1; | |
0fda6b40 | 331 | pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT; |
991528d7 VP |
332 | } |
333 | /* the C0 state only exists as a filler in our array */ | |
acf05f4b | 334 | pr->power.states[ACPI_STATE_C0].valid = 1; |
d550d98d | 335 | return 0; |
acf05f4b VP |
336 | } |
337 | ||
4be44fcd | 338 | static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) |
1da177e4 | 339 | { |
4be44fcd | 340 | acpi_status status = 0; |
439913ff | 341 | u64 count; |
cf824788 | 342 | int current_count; |
4be44fcd LB |
343 | int i; |
344 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; | |
345 | union acpi_object *cst; | |
1da177e4 | 346 | |
1da177e4 | 347 | |
1da177e4 | 348 | if (nocst) |
d550d98d | 349 | return -ENODEV; |
1da177e4 | 350 | |
991528d7 | 351 | current_count = 0; |
1da177e4 LT |
352 | |
353 | status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer); | |
354 | if (ACPI_FAILURE(status)) { | |
355 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n")); | |
d550d98d | 356 | return -ENODEV; |
4be44fcd | 357 | } |
1da177e4 | 358 | |
50dd0969 | 359 | cst = buffer.pointer; |
1da177e4 LT |
360 | |
361 | /* There must be at least 2 elements */ | |
362 | if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) { | |
6468463a | 363 | printk(KERN_ERR PREFIX "not enough elements in _CST\n"); |
1da177e4 LT |
364 | status = -EFAULT; |
365 | goto end; | |
366 | } | |
367 | ||
368 | count = cst->package.elements[0].integer.value; | |
369 | ||
370 | /* Validate number of power states. */ | |
371 | if (count < 1 || count != cst->package.count - 1) { | |
6468463a | 372 | printk(KERN_ERR PREFIX "count given by _CST is not valid\n"); |
1da177e4 LT |
373 | status = -EFAULT; |
374 | goto end; | |
375 | } | |
376 | ||
1da177e4 LT |
377 | /* Tell driver that at least _CST is supported. */ |
378 | pr->flags.has_cst = 1; | |
379 | ||
380 | for (i = 1; i <= count; i++) { | |
381 | union acpi_object *element; | |
382 | union acpi_object *obj; | |
383 | struct acpi_power_register *reg; | |
384 | struct acpi_processor_cx cx; | |
385 | ||
386 | memset(&cx, 0, sizeof(cx)); | |
387 | ||
50dd0969 | 388 | element = &(cst->package.elements[i]); |
1da177e4 LT |
389 | if (element->type != ACPI_TYPE_PACKAGE) |
390 | continue; | |
391 | ||
392 | if (element->package.count != 4) | |
393 | continue; | |
394 | ||
50dd0969 | 395 | obj = &(element->package.elements[0]); |
1da177e4 LT |
396 | |
397 | if (obj->type != ACPI_TYPE_BUFFER) | |
398 | continue; | |
399 | ||
4be44fcd | 400 | reg = (struct acpi_power_register *)obj->buffer.pointer; |
1da177e4 LT |
401 | |
402 | if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && | |
4be44fcd | 403 | (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) |
1da177e4 LT |
404 | continue; |
405 | ||
1da177e4 | 406 | /* There should be an easy way to extract an integer... */ |
50dd0969 | 407 | obj = &(element->package.elements[1]); |
1da177e4 LT |
408 | if (obj->type != ACPI_TYPE_INTEGER) |
409 | continue; | |
410 | ||
411 | cx.type = obj->integer.value; | |
991528d7 VP |
412 | /* |
413 | * Some buggy BIOSes won't list C1 in _CST - | |
414 | * Let acpi_processor_get_power_info_default() handle them later | |
415 | */ | |
416 | if (i == 1 && cx.type != ACPI_STATE_C1) | |
417 | current_count++; | |
418 | ||
419 | cx.address = reg->address; | |
420 | cx.index = current_count + 1; | |
421 | ||
bc71bec9 | 422 | cx.entry_method = ACPI_CSTATE_SYSTEMIO; |
991528d7 VP |
423 | if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) { |
424 | if (acpi_processor_ffh_cstate_probe | |
425 | (pr->id, &cx, reg) == 0) { | |
bc71bec9 | 426 | cx.entry_method = ACPI_CSTATE_FFH; |
427 | } else if (cx.type == ACPI_STATE_C1) { | |
991528d7 VP |
428 | /* |
429 | * C1 is a special case where FIXED_HARDWARE | |
430 | * can be handled in non-MWAIT way as well. | |
431 | * In that case, save this _CST entry info. | |
991528d7 VP |
432 | * Otherwise, ignore this info and continue. |
433 | */ | |
bc71bec9 | 434 | cx.entry_method = ACPI_CSTATE_HALT; |
4fcb2fcd | 435 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); |
bc71bec9 | 436 | } else { |
991528d7 VP |
437 | continue; |
438 | } | |
da5e09a1 | 439 | if (cx.type == ACPI_STATE_C1 && |
d1896049 | 440 | (boot_option_idle_override == IDLE_NOMWAIT)) { |
c1e3b377 ZY |
441 | /* |
442 | * In most cases the C1 space_id obtained from | |
443 | * _CST object is FIXED_HARDWARE access mode. | |
444 | * But when the option of idle=halt is added, | |
445 | * the entry_method type should be changed from | |
446 | * CSTATE_FFH to CSTATE_HALT. | |
da5e09a1 ZY |
447 | * When the option of idle=nomwait is added, |
448 | * the C1 entry_method type should be | |
449 | * CSTATE_HALT. | |
c1e3b377 ZY |
450 | */ |
451 | cx.entry_method = ACPI_CSTATE_HALT; | |
452 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); | |
453 | } | |
4fcb2fcd VP |
454 | } else { |
455 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x", | |
456 | cx.address); | |
991528d7 | 457 | } |
1da177e4 | 458 | |
0fda6b40 VP |
459 | if (cx.type == ACPI_STATE_C1) { |
460 | cx.valid = 1; | |
461 | } | |
4fcb2fcd | 462 | |
50dd0969 | 463 | obj = &(element->package.elements[2]); |
1da177e4 LT |
464 | if (obj->type != ACPI_TYPE_INTEGER) |
465 | continue; | |
466 | ||
467 | cx.latency = obj->integer.value; | |
468 | ||
50dd0969 | 469 | obj = &(element->package.elements[3]); |
1da177e4 LT |
470 | if (obj->type != ACPI_TYPE_INTEGER) |
471 | continue; | |
472 | ||
cf824788 JM |
473 | current_count++; |
474 | memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx)); | |
475 | ||
476 | /* | |
477 | * We support total ACPI_PROCESSOR_MAX_POWER - 1 | |
478 | * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1) | |
479 | */ | |
480 | if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) { | |
481 | printk(KERN_WARNING | |
482 | "Limiting number of power states to max (%d)\n", | |
483 | ACPI_PROCESSOR_MAX_POWER); | |
484 | printk(KERN_WARNING | |
485 | "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); | |
486 | break; | |
487 | } | |
1da177e4 LT |
488 | } |
489 | ||
4be44fcd | 490 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n", |
cf824788 | 491 | current_count)); |
1da177e4 LT |
492 | |
493 | /* Validate number of power states discovered */ | |
cf824788 | 494 | if (current_count < 2) |
6d93c648 | 495 | status = -EFAULT; |
1da177e4 | 496 | |
4be44fcd | 497 | end: |
02438d87 | 498 | kfree(buffer.pointer); |
1da177e4 | 499 | |
d550d98d | 500 | return status; |
1da177e4 LT |
501 | } |
502 | ||
4be44fcd LB |
503 | static void acpi_processor_power_verify_c3(struct acpi_processor *pr, |
504 | struct acpi_processor_cx *cx) | |
1da177e4 | 505 | { |
ee1ca48f PV |
506 | static int bm_check_flag = -1; |
507 | static int bm_control_flag = -1; | |
02df8b93 | 508 | |
1da177e4 LT |
509 | |
510 | if (!cx->address) | |
d550d98d | 511 | return; |
1da177e4 | 512 | |
1da177e4 LT |
513 | /* |
514 | * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) | |
515 | * DMA transfers are used by any ISA device to avoid livelock. | |
516 | * Note that we could disable Type-F DMA (as recommended by | |
517 | * the erratum), but this is known to disrupt certain ISA | |
518 | * devices thus we take the conservative approach. | |
519 | */ | |
520 | else if (errata.piix4.fdma) { | |
521 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 522 | "C3 not supported on PIIX4 with Type-F DMA\n")); |
d550d98d | 523 | return; |
1da177e4 LT |
524 | } |
525 | ||
02df8b93 | 526 | /* All the logic here assumes flags.bm_check is same across all CPUs */ |
ee1ca48f | 527 | if (bm_check_flag == -1) { |
02df8b93 VP |
528 | /* Determine whether bm_check is needed based on CPU */ |
529 | acpi_processor_power_init_bm_check(&(pr->flags), pr->id); | |
530 | bm_check_flag = pr->flags.bm_check; | |
ee1ca48f | 531 | bm_control_flag = pr->flags.bm_control; |
02df8b93 VP |
532 | } else { |
533 | pr->flags.bm_check = bm_check_flag; | |
ee1ca48f | 534 | pr->flags.bm_control = bm_control_flag; |
02df8b93 VP |
535 | } |
536 | ||
537 | if (pr->flags.bm_check) { | |
02df8b93 | 538 | if (!pr->flags.bm_control) { |
ed3110ef VP |
539 | if (pr->flags.has_cst != 1) { |
540 | /* bus mastering control is necessary */ | |
541 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
542 | "C3 support requires BM control\n")); | |
543 | return; | |
544 | } else { | |
545 | /* Here we enter C3 without bus mastering */ | |
546 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
547 | "C3 support without BM control\n")); | |
548 | } | |
02df8b93 VP |
549 | } |
550 | } else { | |
02df8b93 VP |
551 | /* |
552 | * WBINVD should be set in fadt, for C3 state to be | |
553 | * supported on when bm_check is not required. | |
554 | */ | |
cee324b1 | 555 | if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) { |
02df8b93 | 556 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
4be44fcd LB |
557 | "Cache invalidation should work properly" |
558 | " for C3 to be enabled on SMP systems\n")); | |
d550d98d | 559 | return; |
02df8b93 | 560 | } |
02df8b93 VP |
561 | } |
562 | ||
1da177e4 LT |
563 | /* |
564 | * Otherwise we've met all of our C3 requirements. | |
565 | * Normalize the C3 latency to expidite policy. Enable | |
566 | * checking of bus mastering status (bm_check) so we can | |
567 | * use this in our C3 policy | |
568 | */ | |
569 | cx->valid = 1; | |
4f86d3a8 | 570 | |
31878dd8 LB |
571 | /* |
572 | * On older chipsets, BM_RLD needs to be set | |
573 | * in order for Bus Master activity to wake the | |
574 | * system from C3. Newer chipsets handle DMA | |
575 | * during C3 automatically and BM_RLD is a NOP. | |
576 | * In either case, the proper way to | |
577 | * handle BM_RLD is to set it and leave it set. | |
578 | */ | |
50ffba1b | 579 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1); |
1da177e4 | 580 | |
d550d98d | 581 | return; |
1da177e4 LT |
582 | } |
583 | ||
1da177e4 LT |
584 | static int acpi_processor_power_verify(struct acpi_processor *pr) |
585 | { | |
586 | unsigned int i; | |
587 | unsigned int working = 0; | |
6eb0a0fd | 588 | |
169a0abb | 589 | pr->power.timer_broadcast_on_state = INT_MAX; |
6eb0a0fd | 590 | |
a0bf284b | 591 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
1da177e4 LT |
592 | struct acpi_processor_cx *cx = &pr->power.states[i]; |
593 | ||
594 | switch (cx->type) { | |
595 | case ACPI_STATE_C1: | |
596 | cx->valid = 1; | |
597 | break; | |
598 | ||
599 | case ACPI_STATE_C2: | |
d22edd29 LB |
600 | if (!cx->address) |
601 | break; | |
602 | cx->valid = 1; | |
1da177e4 LT |
603 | break; |
604 | ||
605 | case ACPI_STATE_C3: | |
606 | acpi_processor_power_verify_c3(pr, cx); | |
607 | break; | |
608 | } | |
7e275cc4 LB |
609 | if (!cx->valid) |
610 | continue; | |
1da177e4 | 611 | |
7e275cc4 LB |
612 | lapic_timer_check_state(i, pr, cx); |
613 | tsc_check_state(cx->type); | |
614 | working++; | |
1da177e4 | 615 | } |
bd663347 | 616 | |
918aae42 | 617 | lapic_timer_propagate_broadcast(pr); |
1da177e4 LT |
618 | |
619 | return (working); | |
620 | } | |
621 | ||
4be44fcd | 622 | static int acpi_processor_get_power_info(struct acpi_processor *pr) |
1da177e4 LT |
623 | { |
624 | unsigned int i; | |
625 | int result; | |
626 | ||
1da177e4 LT |
627 | |
628 | /* NOTE: the idle thread may not be running while calling | |
629 | * this function */ | |
630 | ||
991528d7 VP |
631 | /* Zero initialize all the C-states info. */ |
632 | memset(pr->power.states, 0, sizeof(pr->power.states)); | |
633 | ||
1da177e4 | 634 | result = acpi_processor_get_power_info_cst(pr); |
6d93c648 | 635 | if (result == -ENODEV) |
c5a114f1 | 636 | result = acpi_processor_get_power_info_fadt(pr); |
6d93c648 | 637 | |
991528d7 VP |
638 | if (result) |
639 | return result; | |
640 | ||
641 | acpi_processor_get_power_info_default(pr); | |
642 | ||
cf824788 | 643 | pr->power.count = acpi_processor_power_verify(pr); |
1da177e4 | 644 | |
1da177e4 LT |
645 | /* |
646 | * if one state of type C2 or C3 is available, mark this | |
647 | * CPU as being "idle manageable" | |
648 | */ | |
649 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { | |
acf05f4b | 650 | if (pr->power.states[i].valid) { |
1da177e4 | 651 | pr->power.count = i; |
2203d6ed LT |
652 | if (pr->power.states[i].type >= ACPI_STATE_C2) |
653 | pr->flags.power = 1; | |
acf05f4b | 654 | } |
1da177e4 LT |
655 | } |
656 | ||
d550d98d | 657 | return 0; |
1da177e4 LT |
658 | } |
659 | ||
4f86d3a8 LB |
660 | /** |
661 | * acpi_idle_bm_check - checks if bus master activity was detected | |
662 | */ | |
663 | static int acpi_idle_bm_check(void) | |
664 | { | |
665 | u32 bm_status = 0; | |
666 | ||
d3e7e99f LB |
667 | if (bm_check_disable) |
668 | return 0; | |
669 | ||
50ffba1b | 670 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); |
4f86d3a8 | 671 | if (bm_status) |
50ffba1b | 672 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); |
4f86d3a8 LB |
673 | /* |
674 | * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect | |
675 | * the true state of bus mastering activity; forcing us to | |
676 | * manually check the BMIDEA bit of each IDE channel. | |
677 | */ | |
678 | else if (errata.piix4.bmisx) { | |
679 | if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) | |
680 | || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) | |
681 | bm_status = 1; | |
682 | } | |
683 | return bm_status; | |
684 | } | |
685 | ||
4f86d3a8 LB |
686 | /** |
687 | * acpi_idle_do_entry - a helper function that does C2 and C3 type entry | |
688 | * @cx: cstate data | |
bc71bec9 | 689 | * |
690 | * Caller disables interrupt before call and enables interrupt after return. | |
4f86d3a8 LB |
691 | */ |
692 | static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx) | |
693 | { | |
dcf30997 SR |
694 | /* Don't trace irqs off for idle */ |
695 | stop_critical_timings(); | |
bc71bec9 | 696 | if (cx->entry_method == ACPI_CSTATE_FFH) { |
4f86d3a8 LB |
697 | /* Call into architectural FFH based C-state */ |
698 | acpi_processor_ffh_cstate_enter(cx); | |
bc71bec9 | 699 | } else if (cx->entry_method == ACPI_CSTATE_HALT) { |
700 | acpi_safe_halt(); | |
4f86d3a8 | 701 | } else { |
4f86d3a8 LB |
702 | /* IO port based C-state */ |
703 | inb(cx->address); | |
704 | /* Dummy wait op - must do something useless after P_LVL2 read | |
705 | because chipsets cannot guarantee that STPCLK# signal | |
706 | gets asserted in time to freeze execution properly. */ | |
cfa806f0 | 707 | inl(acpi_gbl_FADT.xpm_timer_block.address); |
4f86d3a8 | 708 | } |
dcf30997 | 709 | start_critical_timings(); |
4f86d3a8 LB |
710 | } |
711 | ||
712 | /** | |
713 | * acpi_idle_enter_c1 - enters an ACPI C1 state-type | |
714 | * @dev: the target CPU | |
46bcfad7 | 715 | * @drv: cpuidle driver containing cpuidle state info |
e978aa7d | 716 | * @index: index of target state |
4f86d3a8 LB |
717 | * |
718 | * This is equivalent to the HALT instruction. | |
719 | */ | |
720 | static int acpi_idle_enter_c1(struct cpuidle_device *dev, | |
46bcfad7 | 721 | struct cpuidle_driver *drv, int index) |
4f86d3a8 LB |
722 | { |
723 | struct acpi_processor *pr; | |
4202735e DD |
724 | struct cpuidle_state_usage *state_usage = &dev->states_usage[index]; |
725 | struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage); | |
9b12e18c | 726 | |
4a6f4fe8 | 727 | pr = __this_cpu_read(processors); |
4f86d3a8 LB |
728 | |
729 | if (unlikely(!pr)) | |
e978aa7d | 730 | return -EINVAL; |
4f86d3a8 | 731 | |
7e275cc4 | 732 | lapic_timer_state_broadcast(pr, cx, 1); |
bc71bec9 | 733 | acpi_idle_do_entry(cx); |
e978aa7d | 734 | |
7e275cc4 | 735 | lapic_timer_state_broadcast(pr, cx, 0); |
4f86d3a8 | 736 | |
e978aa7d | 737 | return index; |
4f86d3a8 LB |
738 | } |
739 | ||
1a022e3f BO |
740 | |
741 | /** | |
742 | * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining) | |
743 | * @dev: the target CPU | |
744 | * @index: the index of suggested state | |
745 | */ | |
746 | static int acpi_idle_play_dead(struct cpuidle_device *dev, int index) | |
747 | { | |
748 | struct cpuidle_state_usage *state_usage = &dev->states_usage[index]; | |
749 | struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage); | |
750 | ||
751 | ACPI_FLUSH_CPU_CACHE(); | |
752 | ||
753 | while (1) { | |
754 | ||
755 | if (cx->entry_method == ACPI_CSTATE_HALT) | |
54f70077 | 756 | safe_halt(); |
1a022e3f BO |
757 | else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) { |
758 | inb(cx->address); | |
759 | /* See comment in acpi_idle_do_entry() */ | |
760 | inl(acpi_gbl_FADT.xpm_timer_block.address); | |
761 | } else | |
762 | return -ENODEV; | |
763 | } | |
764 | ||
765 | /* Never reached */ | |
766 | return 0; | |
767 | } | |
768 | ||
4f86d3a8 LB |
769 | /** |
770 | * acpi_idle_enter_simple - enters an ACPI state without BM handling | |
771 | * @dev: the target CPU | |
46bcfad7 | 772 | * @drv: cpuidle driver with cpuidle state information |
e978aa7d | 773 | * @index: the index of suggested state |
4f86d3a8 LB |
774 | */ |
775 | static int acpi_idle_enter_simple(struct cpuidle_device *dev, | |
46bcfad7 | 776 | struct cpuidle_driver *drv, int index) |
4f86d3a8 LB |
777 | { |
778 | struct acpi_processor *pr; | |
4202735e DD |
779 | struct cpuidle_state_usage *state_usage = &dev->states_usage[index]; |
780 | struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage); | |
50629118 | 781 | |
4a6f4fe8 | 782 | pr = __this_cpu_read(processors); |
4f86d3a8 LB |
783 | |
784 | if (unlikely(!pr)) | |
e978aa7d | 785 | return -EINVAL; |
e196441b | 786 | |
d306ebc2 PV |
787 | if (cx->entry_method != ACPI_CSTATE_FFH) { |
788 | current_thread_info()->status &= ~TS_POLLING; | |
789 | /* | |
790 | * TS_POLLING-cleared state must be visible before we test | |
791 | * NEED_RESCHED: | |
792 | */ | |
793 | smp_mb(); | |
4f86d3a8 | 794 | |
02cf4f98 LB |
795 | if (unlikely(need_resched())) { |
796 | current_thread_info()->status |= TS_POLLING; | |
e978aa7d | 797 | return -EINVAL; |
02cf4f98 | 798 | } |
4f86d3a8 LB |
799 | } |
800 | ||
e17bcb43 TG |
801 | /* |
802 | * Must be done before busmaster disable as we might need to | |
803 | * access HPET ! | |
804 | */ | |
7e275cc4 | 805 | lapic_timer_state_broadcast(pr, cx, 1); |
e17bcb43 | 806 | |
4f86d3a8 LB |
807 | if (cx->type == ACPI_STATE_C3) |
808 | ACPI_FLUSH_CPU_CACHE(); | |
809 | ||
50629118 VP |
810 | /* Tell the scheduler that we are going deep-idle: */ |
811 | sched_clock_idle_sleep_event(); | |
4f86d3a8 | 812 | acpi_idle_do_entry(cx); |
4f86d3a8 | 813 | |
a474a515 | 814 | sched_clock_idle_wakeup_event(0); |
e978aa7d | 815 | |
02cf4f98 LB |
816 | if (cx->entry_method != ACPI_CSTATE_FFH) |
817 | current_thread_info()->status |= TS_POLLING; | |
4f86d3a8 | 818 | |
7e275cc4 | 819 | lapic_timer_state_broadcast(pr, cx, 0); |
e978aa7d | 820 | return index; |
4f86d3a8 LB |
821 | } |
822 | ||
823 | static int c3_cpu_count; | |
e12f65f7 | 824 | static DEFINE_RAW_SPINLOCK(c3_lock); |
4f86d3a8 LB |
825 | |
826 | /** | |
827 | * acpi_idle_enter_bm - enters C3 with proper BM handling | |
828 | * @dev: the target CPU | |
46bcfad7 | 829 | * @drv: cpuidle driver containing state data |
e978aa7d | 830 | * @index: the index of suggested state |
4f86d3a8 LB |
831 | * |
832 | * If BM is detected, the deepest non-C3 idle state is entered instead. | |
833 | */ | |
834 | static int acpi_idle_enter_bm(struct cpuidle_device *dev, | |
46bcfad7 | 835 | struct cpuidle_driver *drv, int index) |
4f86d3a8 LB |
836 | { |
837 | struct acpi_processor *pr; | |
4202735e DD |
838 | struct cpuidle_state_usage *state_usage = &dev->states_usage[index]; |
839 | struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage); | |
50629118 | 840 | |
4a6f4fe8 | 841 | pr = __this_cpu_read(processors); |
4f86d3a8 LB |
842 | |
843 | if (unlikely(!pr)) | |
e978aa7d | 844 | return -EINVAL; |
4f86d3a8 | 845 | |
718be4aa | 846 | if (!cx->bm_sts_skip && acpi_idle_bm_check()) { |
46bcfad7 DD |
847 | if (drv->safe_state_index >= 0) { |
848 | return drv->states[drv->safe_state_index].enter(dev, | |
849 | drv, drv->safe_state_index); | |
ddc081a1 | 850 | } else { |
8651f97b | 851 | acpi_safe_halt(); |
75cc5235 | 852 | return -EBUSY; |
ddc081a1 VP |
853 | } |
854 | } | |
855 | ||
d306ebc2 PV |
856 | if (cx->entry_method != ACPI_CSTATE_FFH) { |
857 | current_thread_info()->status &= ~TS_POLLING; | |
858 | /* | |
859 | * TS_POLLING-cleared state must be visible before we test | |
860 | * NEED_RESCHED: | |
861 | */ | |
862 | smp_mb(); | |
4f86d3a8 | 863 | |
02cf4f98 LB |
864 | if (unlikely(need_resched())) { |
865 | current_thread_info()->status |= TS_POLLING; | |
e978aa7d | 866 | return -EINVAL; |
02cf4f98 | 867 | } |
4f86d3a8 LB |
868 | } |
869 | ||
996520c1 VP |
870 | acpi_unlazy_tlb(smp_processor_id()); |
871 | ||
50629118 VP |
872 | /* Tell the scheduler that we are going deep-idle: */ |
873 | sched_clock_idle_sleep_event(); | |
4f86d3a8 LB |
874 | /* |
875 | * Must be done before busmaster disable as we might need to | |
876 | * access HPET ! | |
877 | */ | |
7e275cc4 | 878 | lapic_timer_state_broadcast(pr, cx, 1); |
4f86d3a8 | 879 | |
ddc081a1 VP |
880 | /* |
881 | * disable bus master | |
882 | * bm_check implies we need ARB_DIS | |
883 | * !bm_check implies we need cache flush | |
884 | * bm_control implies whether we can do ARB_DIS | |
885 | * | |
886 | * That leaves a case where bm_check is set and bm_control is | |
887 | * not set. In that case we cannot do much, we enter C3 | |
888 | * without doing anything. | |
889 | */ | |
890 | if (pr->flags.bm_check && pr->flags.bm_control) { | |
e12f65f7 | 891 | raw_spin_lock(&c3_lock); |
4f86d3a8 LB |
892 | c3_cpu_count++; |
893 | /* Disable bus master arbitration when all CPUs are in C3 */ | |
894 | if (c3_cpu_count == num_online_cpus()) | |
50ffba1b | 895 | acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1); |
e12f65f7 | 896 | raw_spin_unlock(&c3_lock); |
ddc081a1 VP |
897 | } else if (!pr->flags.bm_check) { |
898 | ACPI_FLUSH_CPU_CACHE(); | |
899 | } | |
4f86d3a8 | 900 | |
ddc081a1 | 901 | acpi_idle_do_entry(cx); |
4f86d3a8 | 902 | |
ddc081a1 VP |
903 | /* Re-enable bus master arbitration */ |
904 | if (pr->flags.bm_check && pr->flags.bm_control) { | |
e12f65f7 | 905 | raw_spin_lock(&c3_lock); |
50ffba1b | 906 | acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0); |
4f86d3a8 | 907 | c3_cpu_count--; |
e12f65f7 | 908 | raw_spin_unlock(&c3_lock); |
4f86d3a8 | 909 | } |
e978aa7d | 910 | |
a474a515 | 911 | sched_clock_idle_wakeup_event(0); |
4f86d3a8 | 912 | |
02cf4f98 LB |
913 | if (cx->entry_method != ACPI_CSTATE_FFH) |
914 | current_thread_info()->status |= TS_POLLING; | |
4f86d3a8 | 915 | |
7e275cc4 | 916 | lapic_timer_state_broadcast(pr, cx, 0); |
e978aa7d | 917 | return index; |
4f86d3a8 LB |
918 | } |
919 | ||
920 | struct cpuidle_driver acpi_idle_driver = { | |
921 | .name = "acpi_idle", | |
922 | .owner = THIS_MODULE, | |
a474a515 | 923 | .en_core_tk_irqen = 1, |
4f86d3a8 LB |
924 | }; |
925 | ||
926 | /** | |
46bcfad7 DD |
927 | * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE |
928 | * device i.e. per-cpu data | |
929 | * | |
4f86d3a8 LB |
930 | * @pr: the ACPI processor |
931 | */ | |
46bcfad7 | 932 | static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr) |
4f86d3a8 | 933 | { |
9a0b8415 | 934 | int i, count = CPUIDLE_DRIVER_STATE_START; |
4f86d3a8 | 935 | struct acpi_processor_cx *cx; |
4202735e | 936 | struct cpuidle_state_usage *state_usage; |
3d339dcb | 937 | struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id); |
4f86d3a8 LB |
938 | |
939 | if (!pr->flags.power_setup_done) | |
940 | return -EINVAL; | |
941 | ||
942 | if (pr->flags.power == 0) { | |
943 | return -EINVAL; | |
944 | } | |
945 | ||
b88a634a KRW |
946 | if (!dev) |
947 | return -EINVAL; | |
948 | ||
dcb84f33 | 949 | dev->cpu = pr->id; |
4fcb2fcd | 950 | |
615dfd93 LB |
951 | if (max_cstate == 0) |
952 | max_cstate = 1; | |
953 | ||
4f86d3a8 LB |
954 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
955 | cx = &pr->power.states[i]; | |
4202735e | 956 | state_usage = &dev->states_usage[count]; |
4f86d3a8 LB |
957 | |
958 | if (!cx->valid) | |
959 | continue; | |
960 | ||
961 | #ifdef CONFIG_HOTPLUG_CPU | |
962 | if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
963 | !pr->flags.has_cst && | |
964 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) | |
965 | continue; | |
1fec74a9 | 966 | #endif |
46bcfad7 | 967 | |
4202735e | 968 | cpuidle_set_statedata(state_usage, cx); |
4f86d3a8 | 969 | |
46bcfad7 DD |
970 | count++; |
971 | if (count == CPUIDLE_STATE_MAX) | |
972 | break; | |
973 | } | |
974 | ||
975 | dev->state_count = count; | |
976 | ||
977 | if (!count) | |
978 | return -EINVAL; | |
979 | ||
980 | return 0; | |
981 | } | |
982 | ||
983 | /** | |
984 | * acpi_processor_setup_cpuidle states- prepares and configures cpuidle | |
985 | * global state data i.e. idle routines | |
986 | * | |
987 | * @pr: the ACPI processor | |
988 | */ | |
989 | static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr) | |
990 | { | |
991 | int i, count = CPUIDLE_DRIVER_STATE_START; | |
992 | struct acpi_processor_cx *cx; | |
993 | struct cpuidle_state *state; | |
994 | struct cpuidle_driver *drv = &acpi_idle_driver; | |
995 | ||
996 | if (!pr->flags.power_setup_done) | |
997 | return -EINVAL; | |
998 | ||
999 | if (pr->flags.power == 0) | |
1000 | return -EINVAL; | |
1001 | ||
1002 | drv->safe_state_index = -1; | |
4fcb2fcd | 1003 | for (i = 0; i < CPUIDLE_STATE_MAX; i++) { |
46bcfad7 DD |
1004 | drv->states[i].name[0] = '\0'; |
1005 | drv->states[i].desc[0] = '\0'; | |
4fcb2fcd VP |
1006 | } |
1007 | ||
615dfd93 LB |
1008 | if (max_cstate == 0) |
1009 | max_cstate = 1; | |
1010 | ||
4f86d3a8 LB |
1011 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
1012 | cx = &pr->power.states[i]; | |
4f86d3a8 LB |
1013 | |
1014 | if (!cx->valid) | |
1015 | continue; | |
1016 | ||
1017 | #ifdef CONFIG_HOTPLUG_CPU | |
1018 | if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
1019 | !pr->flags.has_cst && | |
1020 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) | |
1021 | continue; | |
1fec74a9 | 1022 | #endif |
4f86d3a8 | 1023 | |
46bcfad7 | 1024 | state = &drv->states[count]; |
4f86d3a8 | 1025 | snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i); |
4fcb2fcd | 1026 | strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN); |
4f86d3a8 | 1027 | state->exit_latency = cx->latency; |
4963f620 | 1028 | state->target_residency = cx->latency * latency_factor; |
4f86d3a8 LB |
1029 | |
1030 | state->flags = 0; | |
1031 | switch (cx->type) { | |
1032 | case ACPI_STATE_C1: | |
8e92b660 VP |
1033 | if (cx->entry_method == ACPI_CSTATE_FFH) |
1034 | state->flags |= CPUIDLE_FLAG_TIME_VALID; | |
1035 | ||
4f86d3a8 | 1036 | state->enter = acpi_idle_enter_c1; |
1a022e3f | 1037 | state->enter_dead = acpi_idle_play_dead; |
46bcfad7 | 1038 | drv->safe_state_index = count; |
4f86d3a8 LB |
1039 | break; |
1040 | ||
1041 | case ACPI_STATE_C2: | |
4f86d3a8 LB |
1042 | state->flags |= CPUIDLE_FLAG_TIME_VALID; |
1043 | state->enter = acpi_idle_enter_simple; | |
1a022e3f | 1044 | state->enter_dead = acpi_idle_play_dead; |
46bcfad7 | 1045 | drv->safe_state_index = count; |
4f86d3a8 LB |
1046 | break; |
1047 | ||
1048 | case ACPI_STATE_C3: | |
4f86d3a8 | 1049 | state->flags |= CPUIDLE_FLAG_TIME_VALID; |
4f86d3a8 LB |
1050 | state->enter = pr->flags.bm_check ? |
1051 | acpi_idle_enter_bm : | |
1052 | acpi_idle_enter_simple; | |
1053 | break; | |
1054 | } | |
1055 | ||
1056 | count++; | |
9a0b8415 | 1057 | if (count == CPUIDLE_STATE_MAX) |
1058 | break; | |
4f86d3a8 LB |
1059 | } |
1060 | ||
46bcfad7 | 1061 | drv->state_count = count; |
4f86d3a8 LB |
1062 | |
1063 | if (!count) | |
1064 | return -EINVAL; | |
1065 | ||
4f86d3a8 LB |
1066 | return 0; |
1067 | } | |
1068 | ||
46bcfad7 | 1069 | int acpi_processor_hotplug(struct acpi_processor *pr) |
4f86d3a8 | 1070 | { |
dcb84f33 | 1071 | int ret = 0; |
e8b1b59d | 1072 | struct cpuidle_device *dev; |
4f86d3a8 | 1073 | |
d1896049 | 1074 | if (disabled_by_idle_boot_param()) |
36a91358 VP |
1075 | return 0; |
1076 | ||
4f86d3a8 LB |
1077 | if (!pr) |
1078 | return -EINVAL; | |
1079 | ||
1080 | if (nocst) { | |
1081 | return -ENODEV; | |
1082 | } | |
1083 | ||
1084 | if (!pr->flags.power_setup_done) | |
1085 | return -ENODEV; | |
1086 | ||
e8b1b59d | 1087 | dev = per_cpu(acpi_cpuidle_device, pr->id); |
4f86d3a8 | 1088 | cpuidle_pause_and_lock(); |
3d339dcb | 1089 | cpuidle_disable_device(dev); |
4f86d3a8 | 1090 | acpi_processor_get_power_info(pr); |
dcb84f33 | 1091 | if (pr->flags.power) { |
46bcfad7 | 1092 | acpi_processor_setup_cpuidle_cx(pr); |
3d339dcb | 1093 | ret = cpuidle_enable_device(dev); |
dcb84f33 | 1094 | } |
4f86d3a8 LB |
1095 | cpuidle_resume_and_unlock(); |
1096 | ||
1097 | return ret; | |
1098 | } | |
1099 | ||
46bcfad7 DD |
1100 | int acpi_processor_cst_has_changed(struct acpi_processor *pr) |
1101 | { | |
1102 | int cpu; | |
1103 | struct acpi_processor *_pr; | |
3d339dcb | 1104 | struct cpuidle_device *dev; |
46bcfad7 DD |
1105 | |
1106 | if (disabled_by_idle_boot_param()) | |
1107 | return 0; | |
1108 | ||
1109 | if (!pr) | |
1110 | return -EINVAL; | |
1111 | ||
1112 | if (nocst) | |
1113 | return -ENODEV; | |
1114 | ||
1115 | if (!pr->flags.power_setup_done) | |
1116 | return -ENODEV; | |
1117 | ||
1118 | /* | |
1119 | * FIXME: Design the ACPI notification to make it once per | |
1120 | * system instead of once per-cpu. This condition is a hack | |
1121 | * to make the code that updates C-States be called once. | |
1122 | */ | |
1123 | ||
9505626d | 1124 | if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) { |
46bcfad7 DD |
1125 | |
1126 | cpuidle_pause_and_lock(); | |
1127 | /* Protect against cpu-hotplug */ | |
1128 | get_online_cpus(); | |
1129 | ||
1130 | /* Disable all cpuidle devices */ | |
1131 | for_each_online_cpu(cpu) { | |
1132 | _pr = per_cpu(processors, cpu); | |
1133 | if (!_pr || !_pr->flags.power_setup_done) | |
1134 | continue; | |
3d339dcb DL |
1135 | dev = per_cpu(acpi_cpuidle_device, cpu); |
1136 | cpuidle_disable_device(dev); | |
46bcfad7 DD |
1137 | } |
1138 | ||
1139 | /* Populate Updated C-state information */ | |
f427e5f1 | 1140 | acpi_processor_get_power_info(pr); |
46bcfad7 DD |
1141 | acpi_processor_setup_cpuidle_states(pr); |
1142 | ||
1143 | /* Enable all cpuidle devices */ | |
1144 | for_each_online_cpu(cpu) { | |
1145 | _pr = per_cpu(processors, cpu); | |
1146 | if (!_pr || !_pr->flags.power_setup_done) | |
1147 | continue; | |
1148 | acpi_processor_get_power_info(_pr); | |
1149 | if (_pr->flags.power) { | |
1150 | acpi_processor_setup_cpuidle_cx(_pr); | |
3d339dcb DL |
1151 | dev = per_cpu(acpi_cpuidle_device, cpu); |
1152 | cpuidle_enable_device(dev); | |
46bcfad7 DD |
1153 | } |
1154 | } | |
1155 | put_online_cpus(); | |
1156 | cpuidle_resume_and_unlock(); | |
1157 | } | |
1158 | ||
1159 | return 0; | |
1160 | } | |
1161 | ||
1162 | static int acpi_processor_registered; | |
1163 | ||
38a991b6 | 1164 | int __cpuinit acpi_processor_power_init(struct acpi_processor *pr) |
1da177e4 | 1165 | { |
4be44fcd | 1166 | acpi_status status = 0; |
46bcfad7 | 1167 | int retval; |
3d339dcb | 1168 | struct cpuidle_device *dev; |
b6835052 | 1169 | static int first_run; |
1da177e4 | 1170 | |
d1896049 | 1171 | if (disabled_by_idle_boot_param()) |
36a91358 | 1172 | return 0; |
1da177e4 LT |
1173 | |
1174 | if (!first_run) { | |
1175 | dmi_check_system(processor_power_dmi_table); | |
c1c30634 | 1176 | max_cstate = acpi_processor_cstate_check(max_cstate); |
1da177e4 | 1177 | if (max_cstate < ACPI_C_STATES_MAX) |
4be44fcd LB |
1178 | printk(KERN_NOTICE |
1179 | "ACPI: processor limited to max C-state %d\n", | |
1180 | max_cstate); | |
1da177e4 LT |
1181 | first_run++; |
1182 | } | |
1183 | ||
02df8b93 | 1184 | if (!pr) |
d550d98d | 1185 | return -EINVAL; |
02df8b93 | 1186 | |
cee324b1 | 1187 | if (acpi_gbl_FADT.cst_control && !nocst) { |
4be44fcd | 1188 | status = |
cee324b1 | 1189 | acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8); |
1da177e4 | 1190 | if (ACPI_FAILURE(status)) { |
a6fc6720 TR |
1191 | ACPI_EXCEPTION((AE_INFO, status, |
1192 | "Notifying BIOS of _CST ability failed")); | |
1da177e4 LT |
1193 | } |
1194 | } | |
1195 | ||
1196 | acpi_processor_get_power_info(pr); | |
4f86d3a8 | 1197 | pr->flags.power_setup_done = 1; |
1da177e4 LT |
1198 | |
1199 | /* | |
1200 | * Install the idle handler if processor power management is supported. | |
1201 | * Note that we use previously set idle handler will be used on | |
1202 | * platforms that only support C1. | |
1203 | */ | |
36a91358 | 1204 | if (pr->flags.power) { |
46bcfad7 DD |
1205 | /* Register acpi_idle_driver if not already registered */ |
1206 | if (!acpi_processor_registered) { | |
1207 | acpi_processor_setup_cpuidle_states(pr); | |
1208 | retval = cpuidle_register_driver(&acpi_idle_driver); | |
1209 | if (retval) | |
1210 | return retval; | |
1211 | printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n", | |
1212 | acpi_idle_driver.name); | |
1213 | } | |
3d339dcb DL |
1214 | |
1215 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); | |
1216 | if (!dev) | |
1217 | return -ENOMEM; | |
1218 | per_cpu(acpi_cpuidle_device, pr->id) = dev; | |
1219 | ||
1220 | acpi_processor_setup_cpuidle_cx(pr); | |
1221 | ||
46bcfad7 DD |
1222 | /* Register per-cpu cpuidle_device. Cpuidle driver |
1223 | * must already be registered before registering device | |
1224 | */ | |
3d339dcb | 1225 | retval = cpuidle_register_device(dev); |
46bcfad7 DD |
1226 | if (retval) { |
1227 | if (acpi_processor_registered == 0) | |
1228 | cpuidle_unregister_driver(&acpi_idle_driver); | |
1229 | return retval; | |
1230 | } | |
1231 | acpi_processor_registered++; | |
1da177e4 | 1232 | } |
d550d98d | 1233 | return 0; |
1da177e4 LT |
1234 | } |
1235 | ||
38a991b6 | 1236 | int acpi_processor_power_exit(struct acpi_processor *pr) |
1da177e4 | 1237 | { |
3d339dcb DL |
1238 | struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id); |
1239 | ||
d1896049 | 1240 | if (disabled_by_idle_boot_param()) |
36a91358 VP |
1241 | return 0; |
1242 | ||
46bcfad7 | 1243 | if (pr->flags.power) { |
3d339dcb | 1244 | cpuidle_unregister_device(dev); |
46bcfad7 DD |
1245 | acpi_processor_registered--; |
1246 | if (acpi_processor_registered == 0) | |
1247 | cpuidle_unregister_driver(&acpi_idle_driver); | |
1248 | } | |
1da177e4 | 1249 | |
46bcfad7 | 1250 | pr->flags.power_setup_done = 0; |
d550d98d | 1251 | return 0; |
1da177e4 | 1252 | } |