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ACPI: processor: Fix CPU0 wakeup in acpi_idle_play_dead()
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c942fddf 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4
LT
2/*
3 * processor_idle - idle state submodule to the ACPI processor driver
4 *
5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
c5ab81ca 7 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
1da177e4
LT
8 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
9 * - Added processor hotplug support
02df8b93
VP
10 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
11 * - Added support for C3 on SMP
1da177e4 12 */
b6ec26fb 13#define pr_fmt(fmt) "ACPI: " fmt
1da177e4 14
1da177e4 15#include <linux/module.h>
1da177e4
LT
16#include <linux/acpi.h>
17#include <linux/dmi.h>
e2668fb5 18#include <linux/sched.h> /* need_resched() */
ee41eebf 19#include <linux/tick.h>
4f86d3a8 20#include <linux/cpuidle.h>
6727ad9e 21#include <linux/cpu.h>
8b48463f 22#include <acpi/processor.h>
1da177e4 23
3434933b
TG
24/*
25 * Include the apic definitions for x86 to have the APIC timer related defines
26 * available also for UP (on SMP it gets magically included via linux/smp.h).
27 * asm/acpi.h is not an option, as it would require more include magic. Also
28 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
29 */
30#ifdef CONFIG_X86
31#include <asm/apic.h>
fae1cb57 32#include <asm/cpu.h>
3434933b
TG
33#endif
34
1da177e4 35#define _COMPONENT ACPI_PROCESSOR_COMPONENT
f52fd66d 36ACPI_MODULE_NAME("processor_idle");
1da177e4 37
dc2251bf
RW
38#define ACPI_IDLE_STATE_START (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX) ? 1 : 0)
39
4f86d3a8
LB
40static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
41module_param(max_cstate, uint, 0000);
b6835052 42static unsigned int nocst __read_mostly;
1da177e4 43module_param(nocst, uint, 0000);
d3e7e99f
LB
44static int bm_check_disable __read_mostly;
45module_param(bm_check_disable, uint, 0000);
1da177e4 46
25de5718 47static unsigned int latency_factor __read_mostly = 2;
4963f620 48module_param(latency_factor, uint, 0644);
1da177e4 49
3d339dcb
DL
50static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device);
51
35ae7133
SH
52struct cpuidle_driver acpi_idle_driver = {
53 .name = "acpi_idle",
54 .owner = THIS_MODULE,
55};
56
57#ifdef CONFIG_ACPI_PROCESSOR_CSTATE
25528213
PZ
58static
59DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], acpi_cstate);
ac3ebafa 60
d1896049
TR
61static int disabled_by_idle_boot_param(void)
62{
63 return boot_option_idle_override == IDLE_POLL ||
d1896049
TR
64 boot_option_idle_override == IDLE_HALT;
65}
66
1da177e4
LT
67/*
68 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
69 * For now disable this. Probably a bug somewhere else.
70 *
71 * To skip this limit, boot/load with a large max_cstate limit.
72 */
1855256c 73static int set_max_cstate(const struct dmi_system_id *id)
1da177e4
LT
74{
75 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
76 return 0;
77
b6ec26fb
SH
78 pr_notice("%s detected - limiting to C%ld max_cstate."
79 " Override with \"processor.max_cstate=%d\"\n", id->ident,
80 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
1da177e4 81
3d35600a 82 max_cstate = (long)id->driver_data;
1da177e4
LT
83
84 return 0;
85}
86
b0346688 87static const struct dmi_system_id processor_power_dmi_table[] = {
876c184b
TR
88 { set_max_cstate, "Clevo 5600D", {
89 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
90 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
4be44fcd 91 (void *)2},
370d5cd8
AV
92 { set_max_cstate, "Pavilion zv5000", {
93 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
94 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
95 (void *)1},
96 { set_max_cstate, "Asus L8400B", {
97 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
98 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
99 (void *)1},
1da177e4
LT
100 {},
101};
102
4f86d3a8 103
2e906655 104/*
105 * Callers should disable interrupts before the call and enable
106 * interrupts after return.
107 */
6727ad9e 108static void __cpuidle acpi_safe_halt(void)
ddc081a1 109{
ea811747 110 if (!tif_need_resched()) {
ddc081a1 111 safe_halt();
71e93d15
VP
112 local_irq_disable();
113 }
ddc081a1
VP
114}
115
169a0abb
TG
116#ifdef ARCH_APICTIMER_STOPS_ON_C3
117
118/*
119 * Some BIOS implementations switch to C3 in the published C2 state.
296d93cd
LT
120 * This seems to be a common problem on AMD boxen, but other vendors
121 * are affected too. We pick the most conservative approach: we assume
122 * that the local APIC stops in both C2 and C3.
169a0abb 123 */
7e275cc4 124static void lapic_timer_check_state(int state, struct acpi_processor *pr,
169a0abb
TG
125 struct acpi_processor_cx *cx)
126{
127 struct acpi_processor_power *pwr = &pr->power;
e585bef8 128 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
169a0abb 129
db954b58
VP
130 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
131 return;
132
07c94a38 133 if (boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E))
87ad57ba
SL
134 type = ACPI_STATE_C1;
135
169a0abb
TG
136 /*
137 * Check, if one of the previous states already marked the lapic
138 * unstable
139 */
140 if (pwr->timer_broadcast_on_state < state)
141 return;
142
e585bef8 143 if (cx->type >= type)
296d93cd 144 pr->power.timer_broadcast_on_state = state;
169a0abb
TG
145}
146
918aae42 147static void __lapic_timer_propagate_broadcast(void *arg)
169a0abb 148{
f833bab8 149 struct acpi_processor *pr = (struct acpi_processor *) arg;
e9e2cdb4 150
ee41eebf
TG
151 if (pr->power.timer_broadcast_on_state < INT_MAX)
152 tick_broadcast_enable();
153 else
154 tick_broadcast_disable();
e9e2cdb4
TG
155}
156
918aae42
HS
157static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
158{
159 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
160 (void *)pr, 1);
161}
162
e9e2cdb4 163/* Power(C) State timer broadcast control */
aa6b43d5
PZ
164static bool lapic_timer_needs_broadcast(struct acpi_processor *pr,
165 struct acpi_processor_cx *cx)
e9e2cdb4 166{
aa6b43d5 167 return cx - pr->power.states >= pr->power.timer_broadcast_on_state;
169a0abb
TG
168}
169
170#else
171
7e275cc4 172static void lapic_timer_check_state(int state, struct acpi_processor *pr,
169a0abb 173 struct acpi_processor_cx *cstate) { }
7e275cc4 174static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
aa6b43d5
PZ
175
176static bool lapic_timer_needs_broadcast(struct acpi_processor *pr,
177 struct acpi_processor_cx *cx)
e9e2cdb4 178{
95592128 179 return false;
e9e2cdb4 180}
169a0abb
TG
181
182#endif
183
592913ec 184#if defined(CONFIG_X86)
520daf72 185static void tsc_check_state(int state)
ddb25f9a
AK
186{
187 switch (boot_cpu_data.x86_vendor) {
7377ed4b 188 case X86_VENDOR_HYGON:
ddb25f9a 189 case X86_VENDOR_AMD:
40fb1715 190 case X86_VENDOR_INTEL:
fe6daab1 191 case X86_VENDOR_CENTAUR:
773b2f30 192 case X86_VENDOR_ZHAOXIN:
ddb25f9a
AK
193 /*
194 * AMD Fam10h TSC will tick in all
195 * C/P/S0/S1 states when this bit is set.
196 */
40fb1715 197 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
520daf72 198 return;
57d2dd4b 199 fallthrough;
ddb25f9a 200 default:
520daf72
LB
201 /* TSC could halt in idle, so notify users */
202 if (state > ACPI_STATE_C1)
203 mark_tsc_unstable("TSC halts in idle");
ddb25f9a
AK
204 }
205}
520daf72
LB
206#else
207static void tsc_check_state(int state) { return; }
ddb25f9a
AK
208#endif
209
4be44fcd 210static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
1da177e4 211{
1da177e4 212
1da177e4 213 if (!pr->pblk)
d550d98d 214 return -ENODEV;
1da177e4 215
1da177e4 216 /* if info is obtained from pblk/fadt, type equals state */
1da177e4
LT
217 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
218 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
219
4c033552
VP
220#ifndef CONFIG_HOTPLUG_CPU
221 /*
222 * Check for P_LVL2_UP flag before entering C2 and above on
4f86d3a8 223 * an SMP system.
4c033552 224 */
ad71860a 225 if ((num_online_cpus() > 1) &&
cee324b1 226 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
d550d98d 227 return -ENODEV;
4c033552
VP
228#endif
229
1da177e4
LT
230 /* determine C2 and C3 address from pblk */
231 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
232 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
233
234 /* determine latencies from FADT */
ba494bee
BM
235 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
236 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
1da177e4 237
5d76b6f6
LB
238 /*
239 * FADT specified C2 latency must be less than or equal to
240 * 100 microseconds.
241 */
ba494bee 242 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
5d76b6f6 243 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
ba494bee 244 "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency));
5d76b6f6
LB
245 /* invalidate C2 */
246 pr->power.states[ACPI_STATE_C2].address = 0;
247 }
248
a6d72c18
LB
249 /*
250 * FADT supplied C3 latency must be less than or equal to
251 * 1000 microseconds.
252 */
ba494bee 253 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
a6d72c18 254 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
ba494bee 255 "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency));
a6d72c18
LB
256 /* invalidate C3 */
257 pr->power.states[ACPI_STATE_C3].address = 0;
258 }
259
1da177e4
LT
260 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
261 "lvl2[0x%08x] lvl3[0x%08x]\n",
262 pr->power.states[ACPI_STATE_C2].address,
263 pr->power.states[ACPI_STATE_C3].address));
264
34a62cd0
YG
265 snprintf(pr->power.states[ACPI_STATE_C2].desc,
266 ACPI_CX_DESC_LEN, "ACPI P_LVL2 IOPORT 0x%x",
267 pr->power.states[ACPI_STATE_C2].address);
268 snprintf(pr->power.states[ACPI_STATE_C3].desc,
269 ACPI_CX_DESC_LEN, "ACPI P_LVL3 IOPORT 0x%x",
270 pr->power.states[ACPI_STATE_C3].address);
271
d550d98d 272 return 0;
1da177e4
LT
273}
274
991528d7 275static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
acf05f4b 276{
991528d7
VP
277 if (!pr->power.states[ACPI_STATE_C1].valid) {
278 /* set the first C-State to C1 */
279 /* all processors need to support C1 */
280 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
281 pr->power.states[ACPI_STATE_C1].valid = 1;
0fda6b40 282 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
248e8841
YG
283
284 snprintf(pr->power.states[ACPI_STATE_C1].desc,
285 ACPI_CX_DESC_LEN, "ACPI HLT");
991528d7
VP
286 }
287 /* the C0 state only exists as a filler in our array */
acf05f4b 288 pr->power.states[ACPI_STATE_C0].valid = 1;
d550d98d 289 return 0;
acf05f4b
VP
290}
291
987c7853
RW
292static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
293{
294 int ret;
295
296 if (nocst)
297 return -ENODEV;
298
299 ret = acpi_processor_evaluate_cst(pr->handle, pr->id, &pr->power);
300 if (ret)
301 return ret;
302
496121c0 303 if (!pr->power.count)
987c7853
RW
304 return -EFAULT;
305
306 pr->flags.has_cst = 1;
307 return 0;
308}
309
4be44fcd
LB
310static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
311 struct acpi_processor_cx *cx)
1da177e4 312{
ee1ca48f
PV
313 static int bm_check_flag = -1;
314 static int bm_control_flag = -1;
02df8b93 315
1da177e4
LT
316
317 if (!cx->address)
d550d98d 318 return;
1da177e4 319
1da177e4
LT
320 /*
321 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
322 * DMA transfers are used by any ISA device to avoid livelock.
323 * Note that we could disable Type-F DMA (as recommended by
324 * the erratum), but this is known to disrupt certain ISA
325 * devices thus we take the conservative approach.
326 */
327 else if (errata.piix4.fdma) {
328 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
4be44fcd 329 "C3 not supported on PIIX4 with Type-F DMA\n"));
d550d98d 330 return;
1da177e4
LT
331 }
332
02df8b93 333 /* All the logic here assumes flags.bm_check is same across all CPUs */
ee1ca48f 334 if (bm_check_flag == -1) {
02df8b93
VP
335 /* Determine whether bm_check is needed based on CPU */
336 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
337 bm_check_flag = pr->flags.bm_check;
ee1ca48f 338 bm_control_flag = pr->flags.bm_control;
02df8b93
VP
339 } else {
340 pr->flags.bm_check = bm_check_flag;
ee1ca48f 341 pr->flags.bm_control = bm_control_flag;
02df8b93
VP
342 }
343
344 if (pr->flags.bm_check) {
02df8b93 345 if (!pr->flags.bm_control) {
ed3110ef
VP
346 if (pr->flags.has_cst != 1) {
347 /* bus mastering control is necessary */
348 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
349 "C3 support requires BM control\n"));
350 return;
351 } else {
352 /* Here we enter C3 without bus mastering */
353 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
354 "C3 support without BM control\n"));
355 }
02df8b93
VP
356 }
357 } else {
02df8b93
VP
358 /*
359 * WBINVD should be set in fadt, for C3 state to be
360 * supported on when bm_check is not required.
361 */
cee324b1 362 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
02df8b93 363 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
4be44fcd
LB
364 "Cache invalidation should work properly"
365 " for C3 to be enabled on SMP systems\n"));
d550d98d 366 return;
02df8b93 367 }
02df8b93
VP
368 }
369
1da177e4
LT
370 /*
371 * Otherwise we've met all of our C3 requirements.
372 * Normalize the C3 latency to expidite policy. Enable
373 * checking of bus mastering status (bm_check) so we can
374 * use this in our C3 policy
375 */
376 cx->valid = 1;
4f86d3a8 377
31878dd8
LB
378 /*
379 * On older chipsets, BM_RLD needs to be set
380 * in order for Bus Master activity to wake the
381 * system from C3. Newer chipsets handle DMA
382 * during C3 automatically and BM_RLD is a NOP.
383 * In either case, the proper way to
384 * handle BM_RLD is to set it and leave it set.
385 */
50ffba1b 386 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
1da177e4 387
d550d98d 388 return;
1da177e4
LT
389}
390
1da177e4
LT
391static int acpi_processor_power_verify(struct acpi_processor *pr)
392{
393 unsigned int i;
394 unsigned int working = 0;
6eb0a0fd 395
169a0abb 396 pr->power.timer_broadcast_on_state = INT_MAX;
6eb0a0fd 397
a0bf284b 398 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1da177e4
LT
399 struct acpi_processor_cx *cx = &pr->power.states[i];
400
401 switch (cx->type) {
402 case ACPI_STATE_C1:
403 cx->valid = 1;
404 break;
405
406 case ACPI_STATE_C2:
d22edd29
LB
407 if (!cx->address)
408 break;
cad1525a 409 cx->valid = 1;
1da177e4
LT
410 break;
411
412 case ACPI_STATE_C3:
413 acpi_processor_power_verify_c3(pr, cx);
414 break;
415 }
7e275cc4
LB
416 if (!cx->valid)
417 continue;
1da177e4 418
7e275cc4
LB
419 lapic_timer_check_state(i, pr, cx);
420 tsc_check_state(cx->type);
421 working++;
1da177e4 422 }
bd663347 423
918aae42 424 lapic_timer_propagate_broadcast(pr);
1da177e4
LT
425
426 return (working);
427}
428
a36a7fec 429static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
1da177e4
LT
430{
431 unsigned int i;
432 int result;
433
1da177e4
LT
434
435 /* NOTE: the idle thread may not be running while calling
436 * this function */
437
991528d7
VP
438 /* Zero initialize all the C-states info. */
439 memset(pr->power.states, 0, sizeof(pr->power.states));
440
1da177e4 441 result = acpi_processor_get_power_info_cst(pr);
6d93c648 442 if (result == -ENODEV)
c5a114f1 443 result = acpi_processor_get_power_info_fadt(pr);
6d93c648 444
991528d7
VP
445 if (result)
446 return result;
447
448 acpi_processor_get_power_info_default(pr);
449
cf824788 450 pr->power.count = acpi_processor_power_verify(pr);
1da177e4 451
1da177e4
LT
452 /*
453 * if one state of type C2 or C3 is available, mark this
454 * CPU as being "idle manageable"
455 */
456 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
acf05f4b 457 if (pr->power.states[i].valid) {
1da177e4 458 pr->power.count = i;
496121c0 459 pr->flags.power = 1;
acf05f4b 460 }
1da177e4
LT
461 }
462
d550d98d 463 return 0;
1da177e4
LT
464}
465
4f86d3a8
LB
466/**
467 * acpi_idle_bm_check - checks if bus master activity was detected
468 */
469static int acpi_idle_bm_check(void)
470{
471 u32 bm_status = 0;
472
d3e7e99f
LB
473 if (bm_check_disable)
474 return 0;
475
50ffba1b 476 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
4f86d3a8 477 if (bm_status)
50ffba1b 478 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
4f86d3a8
LB
479 /*
480 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
481 * the true state of bus mastering activity; forcing us to
482 * manually check the BMIDEA bit of each IDE channel.
483 */
484 else if (errata.piix4.bmisx) {
485 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
486 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
487 bm_status = 1;
488 }
489 return bm_status;
490}
491
fa583f71
YF
492static void wait_for_freeze(void)
493{
494#ifdef CONFIG_X86
495 /* No delay is needed if we are in guest */
496 if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
497 return;
498#endif
499 /* Dummy wait op - must do something useless after P_LVL2 read
500 because chipsets cannot guarantee that STPCLK# signal
501 gets asserted in time to freeze execution properly. */
502 inl(acpi_gbl_FADT.xpm_timer_block.address);
503}
504
4f86d3a8 505/**
b00783fd 506 * acpi_idle_do_entry - enter idle state using the appropriate method
4f86d3a8 507 * @cx: cstate data
bc71bec9 508 *
509 * Caller disables interrupt before call and enables interrupt after return.
4f86d3a8 510 */
6727ad9e 511static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx)
4f86d3a8 512{
bc71bec9 513 if (cx->entry_method == ACPI_CSTATE_FFH) {
4f86d3a8
LB
514 /* Call into architectural FFH based C-state */
515 acpi_processor_ffh_cstate_enter(cx);
bc71bec9 516 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
517 acpi_safe_halt();
4f86d3a8 518 } else {
4f86d3a8
LB
519 /* IO port based C-state */
520 inb(cx->address);
fa583f71 521 wait_for_freeze();
4f86d3a8
LB
522 }
523}
524
1a022e3f
BO
525/**
526 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
527 * @dev: the target CPU
528 * @index: the index of suggested state
529 */
530static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
531{
6240a10d 532 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
1a022e3f
BO
533
534 ACPI_FLUSH_CPU_CACHE();
535
536 while (1) {
537
538 if (cx->entry_method == ACPI_CSTATE_HALT)
54f70077 539 safe_halt();
1a022e3f
BO
540 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
541 inb(cx->address);
fa583f71 542 wait_for_freeze();
1a022e3f
BO
543 } else
544 return -ENODEV;
fae1cb57
VK
545
546#if defined(CONFIG_X86) && defined(CONFIG_HOTPLUG_CPU)
547 /* If NMI wants to wake up CPU0, start CPU0. */
548 if (wakeup_cpu0())
549 start_cpu0();
550#endif
1a022e3f
BO
551 }
552
553 /* Never reached */
554 return 0;
555}
556
adcb2623
RW
557static bool acpi_idle_fallback_to_c1(struct acpi_processor *pr)
558{
5f508185
RW
559 return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst &&
560 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED);
adcb2623
RW
561}
562
4f86d3a8 563static int c3_cpu_count;
e12f65f7 564static DEFINE_RAW_SPINLOCK(c3_lock);
4f86d3a8
LB
565
566/**
567 * acpi_idle_enter_bm - enters C3 with proper BM handling
1fecfdbb 568 * @drv: cpuidle driver
6491bc0c
RW
569 * @pr: Target processor
570 * @cx: Target state context
1fecfdbb 571 * @index: index of target state
4f86d3a8 572 */
1fecfdbb
PZ
573static int acpi_idle_enter_bm(struct cpuidle_driver *drv,
574 struct acpi_processor *pr,
575 struct acpi_processor_cx *cx,
576 int index)
4f86d3a8 577{
1fecfdbb
PZ
578 static struct acpi_processor_cx safe_cx = {
579 .entry_method = ACPI_CSTATE_HALT,
580 };
581
ddc081a1
VP
582 /*
583 * disable bus master
584 * bm_check implies we need ARB_DIS
ddc081a1
VP
585 * bm_control implies whether we can do ARB_DIS
586 *
1fecfdbb
PZ
587 * That leaves a case where bm_check is set and bm_control is not set.
588 * In that case we cannot do much, we enter C3 without doing anything.
ddc081a1 589 */
1fecfdbb
PZ
590 bool dis_bm = pr->flags.bm_control;
591
592 /* If we can skip BM, demote to a safe state. */
593 if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
594 dis_bm = false;
595 index = drv->safe_state_index;
596 if (index >= 0) {
597 cx = this_cpu_read(acpi_cstate[index]);
598 } else {
599 cx = &safe_cx;
600 index = -EBUSY;
601 }
602 }
603
604 if (dis_bm) {
e12f65f7 605 raw_spin_lock(&c3_lock);
4f86d3a8
LB
606 c3_cpu_count++;
607 /* Disable bus master arbitration when all CPUs are in C3 */
608 if (c3_cpu_count == num_online_cpus())
50ffba1b 609 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
e12f65f7 610 raw_spin_unlock(&c3_lock);
ddc081a1 611 }
4f86d3a8 612
1fecfdbb
PZ
613 rcu_idle_enter();
614
ddc081a1 615 acpi_idle_do_entry(cx);
4f86d3a8 616
1fecfdbb
PZ
617 rcu_idle_exit();
618
ddc081a1 619 /* Re-enable bus master arbitration */
1fecfdbb 620 if (dis_bm) {
e12f65f7 621 raw_spin_lock(&c3_lock);
50ffba1b 622 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
4f86d3a8 623 c3_cpu_count--;
e12f65f7 624 raw_spin_unlock(&c3_lock);
4f86d3a8 625 }
1fecfdbb
PZ
626
627 return index;
6491bc0c
RW
628}
629
630static int acpi_idle_enter(struct cpuidle_device *dev,
631 struct cpuidle_driver *drv, int index)
632{
633 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
634 struct acpi_processor *pr;
635
636 pr = __this_cpu_read(processors);
637 if (unlikely(!pr))
638 return -EINVAL;
639
640 if (cx->type != ACPI_STATE_C1) {
1fecfdbb
PZ
641 if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check)
642 return acpi_idle_enter_bm(drv, pr, cx, index);
643
644 /* C2 to C1 demotion. */
5f508185 645 if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) {
dc2251bf 646 index = ACPI_IDLE_STATE_START;
6491bc0c 647 cx = per_cpu(acpi_cstate[index], dev->cpu);
6491bc0c
RW
648 }
649 }
650
6491bc0c
RW
651 if (cx->type == ACPI_STATE_C3)
652 ACPI_FLUSH_CPU_CACHE();
653
654 acpi_idle_do_entry(cx);
655
e978aa7d 656 return index;
4f86d3a8
LB
657}
658
efe97112
NL
659static int acpi_idle_enter_s2idle(struct cpuidle_device *dev,
660 struct cpuidle_driver *drv, int index)
5f508185
RW
661{
662 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
663
664 if (cx->type == ACPI_STATE_C3) {
665 struct acpi_processor *pr = __this_cpu_read(processors);
666
667 if (unlikely(!pr))
0a398945 668 return 0;
5f508185
RW
669
670 if (pr->flags.bm_check) {
1fecfdbb
PZ
671 u8 bm_sts_skip = cx->bm_sts_skip;
672
673 /* Don't check BM_STS, do an unconditional ARB_DIS for S2IDLE */
674 cx->bm_sts_skip = 1;
675 acpi_idle_enter_bm(drv, pr, cx, index);
676 cx->bm_sts_skip = bm_sts_skip;
677
0a398945 678 return 0;
5f508185
RW
679 } else {
680 ACPI_FLUSH_CPU_CACHE();
681 }
682 }
683 acpi_idle_do_entry(cx);
efe97112
NL
684
685 return 0;
5f508185
RW
686}
687
6ef0f086
DL
688static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
689 struct cpuidle_device *dev)
4f86d3a8 690{
dc2251bf 691 int i, count = ACPI_IDLE_STATE_START;
4f86d3a8 692 struct acpi_processor_cx *cx;
aa6b43d5 693 struct cpuidle_state *state;
4f86d3a8 694
615dfd93
LB
695 if (max_cstate == 0)
696 max_cstate = 1;
697
4f86d3a8 698 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
a889a23a 699 state = &acpi_idle_driver.states[count];
4f86d3a8 700 cx = &pr->power.states[i];
4f86d3a8
LB
701
702 if (!cx->valid)
703 continue;
704
6240a10d 705 per_cpu(acpi_cstate[count], dev->cpu) = cx;
4f86d3a8 706
a889a23a 707 if (lapic_timer_needs_broadcast(pr, cx))
aa6b43d5 708 state->flags |= CPUIDLE_FLAG_TIMER_STOP;
a889a23a 709
1fecfdbb 710 if (cx->type == ACPI_STATE_C3) {
a889a23a 711 state->flags |= CPUIDLE_FLAG_TLB_FLUSHED;
1fecfdbb
PZ
712 if (pr->flags.bm_check)
713 state->flags |= CPUIDLE_FLAG_RCU_IDLE;
714 }
aa6b43d5 715
46bcfad7
DD
716 count++;
717 if (count == CPUIDLE_STATE_MAX)
718 break;
719 }
720
46bcfad7
DD
721 if (!count)
722 return -EINVAL;
723
724 return 0;
725}
726
a36a7fec 727static int acpi_processor_setup_cstates(struct acpi_processor *pr)
46bcfad7 728{
1b39e3f8 729 int i, count;
46bcfad7
DD
730 struct acpi_processor_cx *cx;
731 struct cpuidle_state *state;
732 struct cpuidle_driver *drv = &acpi_idle_driver;
733
615dfd93
LB
734 if (max_cstate == 0)
735 max_cstate = 1;
736
1b39e3f8
RW
737 if (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX)) {
738 cpuidle_poll_state_init(drv);
739 count = 1;
740 } else {
741 count = 0;
742 }
743
4f86d3a8
LB
744 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
745 cx = &pr->power.states[i];
4f86d3a8
LB
746
747 if (!cx->valid)
748 continue;
749
46bcfad7 750 state = &drv->states[count];
4f86d3a8 751 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
a36a7fec 752 strlcpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
4f86d3a8 753 state->exit_latency = cx->latency;
4963f620 754 state->target_residency = cx->latency * latency_factor;
6491bc0c 755 state->enter = acpi_idle_enter;
4f86d3a8
LB
756
757 state->flags = 0;
6491bc0c 758 if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2) {
1a022e3f 759 state->enter_dead = acpi_idle_play_dead;
46bcfad7 760 drv->safe_state_index = count;
4f86d3a8 761 }
5f508185 762 /*
28ba086e 763 * Halt-induced C1 is not good for ->enter_s2idle, because it
5f508185
RW
764 * re-enables interrupts on exit. Moreover, C1 is generally not
765 * particularly interesting from the suspend-to-idle angle, so
766 * avoid C1 and the situations in which we may need to fall back
767 * to it altogether.
768 */
769 if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr))
28ba086e 770 state->enter_s2idle = acpi_idle_enter_s2idle;
4f86d3a8
LB
771
772 count++;
9a0b8415 773 if (count == CPUIDLE_STATE_MAX)
774 break;
4f86d3a8
LB
775 }
776
46bcfad7 777 drv->state_count = count;
4f86d3a8
LB
778
779 if (!count)
780 return -EINVAL;
781
4f86d3a8
LB
782 return 0;
783}
784
35ae7133
SH
785static inline void acpi_processor_cstate_first_run_checks(void)
786{
35ae7133
SH
787 static int first_run;
788
789 if (first_run)
790 return;
791 dmi_check_system(processor_power_dmi_table);
792 max_cstate = acpi_processor_cstate_check(max_cstate);
793 if (max_cstate < ACPI_C_STATES_MAX)
794 pr_notice("ACPI: processor limited to max C-state %d\n",
795 max_cstate);
796 first_run++;
797
bc946388
RW
798 if (nocst)
799 return;
800
801 acpi_processor_claim_cst_control();
35ae7133
SH
802}
803#else
804
805static inline int disabled_by_idle_boot_param(void) { return 0; }
806static inline void acpi_processor_cstate_first_run_checks(void) { }
a36a7fec 807static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
35ae7133
SH
808{
809 return -ENODEV;
810}
811
812static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
813 struct cpuidle_device *dev)
814{
815 return -EINVAL;
816}
817
a36a7fec 818static int acpi_processor_setup_cstates(struct acpi_processor *pr)
35ae7133
SH
819{
820 return -EINVAL;
821}
822
823#endif /* CONFIG_ACPI_PROCESSOR_CSTATE */
824
a36a7fec
SH
825struct acpi_lpi_states_array {
826 unsigned int size;
827 unsigned int composite_states_size;
828 struct acpi_lpi_state *entries;
829 struct acpi_lpi_state *composite_states[ACPI_PROCESSOR_MAX_POWER];
830};
831
832static int obj_get_integer(union acpi_object *obj, u32 *value)
833{
834 if (obj->type != ACPI_TYPE_INTEGER)
835 return -EINVAL;
836
837 *value = obj->integer.value;
838 return 0;
839}
840
841static int acpi_processor_evaluate_lpi(acpi_handle handle,
842 struct acpi_lpi_states_array *info)
843{
844 acpi_status status;
845 int ret = 0;
846 int pkg_count, state_idx = 1, loop;
847 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
848 union acpi_object *lpi_data;
849 struct acpi_lpi_state *lpi_state;
850
851 status = acpi_evaluate_object(handle, "_LPI", NULL, &buffer);
852 if (ACPI_FAILURE(status)) {
853 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _LPI, giving up\n"));
854 return -ENODEV;
855 }
856
857 lpi_data = buffer.pointer;
858
859 /* There must be at least 4 elements = 3 elements + 1 package */
860 if (!lpi_data || lpi_data->type != ACPI_TYPE_PACKAGE ||
861 lpi_data->package.count < 4) {
862 pr_debug("not enough elements in _LPI\n");
863 ret = -ENODATA;
864 goto end;
865 }
866
867 pkg_count = lpi_data->package.elements[2].integer.value;
868
869 /* Validate number of power states. */
870 if (pkg_count < 1 || pkg_count != lpi_data->package.count - 3) {
871 pr_debug("count given by _LPI is not valid\n");
872 ret = -ENODATA;
873 goto end;
874 }
875
876 lpi_state = kcalloc(pkg_count, sizeof(*lpi_state), GFP_KERNEL);
877 if (!lpi_state) {
878 ret = -ENOMEM;
879 goto end;
880 }
881
882 info->size = pkg_count;
883 info->entries = lpi_state;
884
885 /* LPI States start at index 3 */
886 for (loop = 3; state_idx <= pkg_count; loop++, state_idx++, lpi_state++) {
887 union acpi_object *element, *pkg_elem, *obj;
888
889 element = &lpi_data->package.elements[loop];
890 if (element->type != ACPI_TYPE_PACKAGE || element->package.count < 7)
891 continue;
892
893 pkg_elem = element->package.elements;
894
895 obj = pkg_elem + 6;
896 if (obj->type == ACPI_TYPE_BUFFER) {
897 struct acpi_power_register *reg;
898
899 reg = (struct acpi_power_register *)obj->buffer.pointer;
900 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
901 reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)
902 continue;
903
904 lpi_state->address = reg->address;
905 lpi_state->entry_method =
906 reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE ?
907 ACPI_CSTATE_FFH : ACPI_CSTATE_SYSTEMIO;
908 } else if (obj->type == ACPI_TYPE_INTEGER) {
909 lpi_state->entry_method = ACPI_CSTATE_INTEGER;
910 lpi_state->address = obj->integer.value;
911 } else {
912 continue;
913 }
914
915 /* elements[7,8] skipped for now i.e. Residency/Usage counter*/
916
917 obj = pkg_elem + 9;
918 if (obj->type == ACPI_TYPE_STRING)
919 strlcpy(lpi_state->desc, obj->string.pointer,
920 ACPI_CX_DESC_LEN);
921
922 lpi_state->index = state_idx;
923 if (obj_get_integer(pkg_elem + 0, &lpi_state->min_residency)) {
924 pr_debug("No min. residency found, assuming 10 us\n");
925 lpi_state->min_residency = 10;
926 }
927
928 if (obj_get_integer(pkg_elem + 1, &lpi_state->wake_latency)) {
929 pr_debug("No wakeup residency found, assuming 10 us\n");
930 lpi_state->wake_latency = 10;
931 }
932
933 if (obj_get_integer(pkg_elem + 2, &lpi_state->flags))
934 lpi_state->flags = 0;
935
936 if (obj_get_integer(pkg_elem + 3, &lpi_state->arch_flags))
937 lpi_state->arch_flags = 0;
938
939 if (obj_get_integer(pkg_elem + 4, &lpi_state->res_cnt_freq))
940 lpi_state->res_cnt_freq = 1;
941
942 if (obj_get_integer(pkg_elem + 5, &lpi_state->enable_parent_state))
943 lpi_state->enable_parent_state = 0;
944 }
945
946 acpi_handle_debug(handle, "Found %d power states\n", state_idx);
947end:
948 kfree(buffer.pointer);
949 return ret;
950}
951
952/*
953 * flat_state_cnt - the number of composite LPI states after the process of flattening
954 */
955static int flat_state_cnt;
956
957/**
958 * combine_lpi_states - combine local and parent LPI states to form a composite LPI state
959 *
960 * @local: local LPI state
961 * @parent: parent LPI state
962 * @result: composite LPI state
963 */
964static bool combine_lpi_states(struct acpi_lpi_state *local,
965 struct acpi_lpi_state *parent,
966 struct acpi_lpi_state *result)
967{
968 if (parent->entry_method == ACPI_CSTATE_INTEGER) {
969 if (!parent->address) /* 0 means autopromotable */
970 return false;
971 result->address = local->address + parent->address;
972 } else {
973 result->address = parent->address;
974 }
975
976 result->min_residency = max(local->min_residency, parent->min_residency);
977 result->wake_latency = local->wake_latency + parent->wake_latency;
978 result->enable_parent_state = parent->enable_parent_state;
979 result->entry_method = local->entry_method;
980
981 result->flags = parent->flags;
982 result->arch_flags = parent->arch_flags;
983 result->index = parent->index;
984
985 strlcpy(result->desc, local->desc, ACPI_CX_DESC_LEN);
986 strlcat(result->desc, "+", ACPI_CX_DESC_LEN);
987 strlcat(result->desc, parent->desc, ACPI_CX_DESC_LEN);
988 return true;
989}
990
991#define ACPI_LPI_STATE_FLAGS_ENABLED BIT(0)
992
993static void stash_composite_state(struct acpi_lpi_states_array *curr_level,
994 struct acpi_lpi_state *t)
995{
996 curr_level->composite_states[curr_level->composite_states_size++] = t;
997}
998
999static int flatten_lpi_states(struct acpi_processor *pr,
1000 struct acpi_lpi_states_array *curr_level,
1001 struct acpi_lpi_states_array *prev_level)
1002{
1003 int i, j, state_count = curr_level->size;
1004 struct acpi_lpi_state *p, *t = curr_level->entries;
1005
1006 curr_level->composite_states_size = 0;
1007 for (j = 0; j < state_count; j++, t++) {
1008 struct acpi_lpi_state *flpi;
1009
1010 if (!(t->flags & ACPI_LPI_STATE_FLAGS_ENABLED))
1011 continue;
1012
1013 if (flat_state_cnt >= ACPI_PROCESSOR_MAX_POWER) {
1014 pr_warn("Limiting number of LPI states to max (%d)\n",
1015 ACPI_PROCESSOR_MAX_POWER);
1016 pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
1017 break;
1018 }
1019
1020 flpi = &pr->power.lpi_states[flat_state_cnt];
1021
1022 if (!prev_level) { /* leaf/processor node */
1023 memcpy(flpi, t, sizeof(*t));
1024 stash_composite_state(curr_level, flpi);
1025 flat_state_cnt++;
1026 continue;
1027 }
1028
1029 for (i = 0; i < prev_level->composite_states_size; i++) {
1030 p = prev_level->composite_states[i];
1031 if (t->index <= p->enable_parent_state &&
1032 combine_lpi_states(p, t, flpi)) {
1033 stash_composite_state(curr_level, flpi);
1034 flat_state_cnt++;
1035 flpi++;
1036 }
1037 }
1038 }
1039
1040 kfree(curr_level->entries);
1041 return 0;
1042}
1043
1044static int acpi_processor_get_lpi_info(struct acpi_processor *pr)
1045{
1046 int ret, i;
1047 acpi_status status;
1048 acpi_handle handle = pr->handle, pr_ahandle;
1049 struct acpi_device *d = NULL;
1050 struct acpi_lpi_states_array info[2], *tmp, *prev, *curr;
1051
1052 if (!osc_pc_lpi_support_confirmed)
1053 return -EOPNOTSUPP;
1054
1055 if (!acpi_has_method(handle, "_LPI"))
1056 return -EINVAL;
1057
1058 flat_state_cnt = 0;
1059 prev = &info[0];
1060 curr = &info[1];
1061 handle = pr->handle;
1062 ret = acpi_processor_evaluate_lpi(handle, prev);
1063 if (ret)
1064 return ret;
1065 flatten_lpi_states(pr, prev, NULL);
1066
1067 status = acpi_get_parent(handle, &pr_ahandle);
1068 while (ACPI_SUCCESS(status)) {
1069 acpi_bus_get_device(pr_ahandle, &d);
1070 handle = pr_ahandle;
1071
1072 if (strcmp(acpi_device_hid(d), ACPI_PROCESSOR_CONTAINER_HID))
1073 break;
1074
1075 /* can be optional ? */
1076 if (!acpi_has_method(handle, "_LPI"))
1077 break;
1078
1079 ret = acpi_processor_evaluate_lpi(handle, curr);
1080 if (ret)
1081 break;
1082
1083 /* flatten all the LPI states in this level of hierarchy */
1084 flatten_lpi_states(pr, curr, prev);
1085
1086 tmp = prev, prev = curr, curr = tmp;
1087
1088 status = acpi_get_parent(handle, &pr_ahandle);
1089 }
1090
1091 pr->power.count = flat_state_cnt;
1092 /* reset the index after flattening */
1093 for (i = 0; i < pr->power.count; i++)
1094 pr->power.lpi_states[i].index = i;
1095
1096 /* Tell driver that _LPI is supported. */
1097 pr->flags.has_lpi = 1;
1098 pr->flags.power = 1;
1099
1100 return 0;
1101}
1102
1103int __weak acpi_processor_ffh_lpi_probe(unsigned int cpu)
1104{
1105 return -ENODEV;
1106}
1107
1108int __weak acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi)
1109{
1110 return -ENODEV;
1111}
1112
1113/**
1114 * acpi_idle_lpi_enter - enters an ACPI any LPI state
1115 * @dev: the target CPU
1116 * @drv: cpuidle driver containing cpuidle state info
1117 * @index: index of target state
1118 *
1119 * Return: 0 for success or negative value for error
1120 */
1121static int acpi_idle_lpi_enter(struct cpuidle_device *dev,
1122 struct cpuidle_driver *drv, int index)
1123{
1124 struct acpi_processor *pr;
1125 struct acpi_lpi_state *lpi;
1126
1127 pr = __this_cpu_read(processors);
1128
1129 if (unlikely(!pr))
1130 return -EINVAL;
1131
1132 lpi = &pr->power.lpi_states[index];
1133 if (lpi->entry_method == ACPI_CSTATE_FFH)
1134 return acpi_processor_ffh_lpi_enter(lpi);
1135
1136 return -EINVAL;
1137}
1138
1139static int acpi_processor_setup_lpi_states(struct acpi_processor *pr)
1140{
1141 int i;
1142 struct acpi_lpi_state *lpi;
1143 struct cpuidle_state *state;
1144 struct cpuidle_driver *drv = &acpi_idle_driver;
1145
1146 if (!pr->flags.has_lpi)
1147 return -EOPNOTSUPP;
1148
1149 for (i = 0; i < pr->power.count && i < CPUIDLE_STATE_MAX; i++) {
1150 lpi = &pr->power.lpi_states[i];
1151
1152 state = &drv->states[i];
1153 snprintf(state->name, CPUIDLE_NAME_LEN, "LPI-%d", i);
1154 strlcpy(state->desc, lpi->desc, CPUIDLE_DESC_LEN);
1155 state->exit_latency = lpi->wake_latency;
1156 state->target_residency = lpi->min_residency;
1157 if (lpi->arch_flags)
1158 state->flags |= CPUIDLE_FLAG_TIMER_STOP;
1159 state->enter = acpi_idle_lpi_enter;
1160 drv->safe_state_index = i;
1161 }
1162
1163 drv->state_count = i;
1164
1165 return 0;
1166}
1167
1168/**
1169 * acpi_processor_setup_cpuidle_states- prepares and configures cpuidle
1170 * global state data i.e. idle routines
1171 *
1172 * @pr: the ACPI processor
1173 */
1174static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
1175{
1176 int i;
1177 struct cpuidle_driver *drv = &acpi_idle_driver;
1178
1179 if (!pr->flags.power_setup_done || !pr->flags.power)
1180 return -EINVAL;
1181
1182 drv->safe_state_index = -1;
dc2251bf 1183 for (i = ACPI_IDLE_STATE_START; i < CPUIDLE_STATE_MAX; i++) {
a36a7fec
SH
1184 drv->states[i].name[0] = '\0';
1185 drv->states[i].desc[0] = '\0';
1186 }
1187
1188 if (pr->flags.has_lpi)
1189 return acpi_processor_setup_lpi_states(pr);
1190
1191 return acpi_processor_setup_cstates(pr);
1192}
1193
1194/**
1195 * acpi_processor_setup_cpuidle_dev - prepares and configures CPUIDLE
1196 * device i.e. per-cpu data
1197 *
1198 * @pr: the ACPI processor
1199 * @dev : the cpuidle device
1200 */
1201static int acpi_processor_setup_cpuidle_dev(struct acpi_processor *pr,
1202 struct cpuidle_device *dev)
1203{
1204 if (!pr->flags.power_setup_done || !pr->flags.power || !dev)
1205 return -EINVAL;
1206
1207 dev->cpu = pr->id;
1208 if (pr->flags.has_lpi)
1209 return acpi_processor_ffh_lpi_probe(pr->id);
1210
1211 return acpi_processor_setup_cpuidle_cx(pr, dev);
1212}
1213
1214static int acpi_processor_get_power_info(struct acpi_processor *pr)
1215{
1216 int ret;
1217
1218 ret = acpi_processor_get_lpi_info(pr);
1219 if (ret)
1220 ret = acpi_processor_get_cstate_info(pr);
1221
1222 return ret;
1223}
1224
46bcfad7 1225int acpi_processor_hotplug(struct acpi_processor *pr)
4f86d3a8 1226{
dcb84f33 1227 int ret = 0;
e8b1b59d 1228 struct cpuidle_device *dev;
4f86d3a8 1229
d1896049 1230 if (disabled_by_idle_boot_param())
36a91358
VP
1231 return 0;
1232
4f86d3a8
LB
1233 if (!pr->flags.power_setup_done)
1234 return -ENODEV;
1235
e8b1b59d 1236 dev = per_cpu(acpi_cpuidle_device, pr->id);
4f86d3a8 1237 cpuidle_pause_and_lock();
3d339dcb 1238 cpuidle_disable_device(dev);
a36a7fec
SH
1239 ret = acpi_processor_get_power_info(pr);
1240 if (!ret && pr->flags.power) {
1241 acpi_processor_setup_cpuidle_dev(pr, dev);
3d339dcb 1242 ret = cpuidle_enable_device(dev);
dcb84f33 1243 }
4f86d3a8
LB
1244 cpuidle_resume_and_unlock();
1245
1246 return ret;
1247}
1248
a36a7fec 1249int acpi_processor_power_state_has_changed(struct acpi_processor *pr)
46bcfad7
DD
1250{
1251 int cpu;
1252 struct acpi_processor *_pr;
3d339dcb 1253 struct cpuidle_device *dev;
46bcfad7
DD
1254
1255 if (disabled_by_idle_boot_param())
1256 return 0;
1257
46bcfad7
DD
1258 if (!pr->flags.power_setup_done)
1259 return -ENODEV;
1260
1261 /*
1262 * FIXME: Design the ACPI notification to make it once per
1263 * system instead of once per-cpu. This condition is a hack
1264 * to make the code that updates C-States be called once.
1265 */
1266
9505626d 1267 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
46bcfad7 1268
46bcfad7
DD
1269 /* Protect against cpu-hotplug */
1270 get_online_cpus();
6726655d 1271 cpuidle_pause_and_lock();
46bcfad7
DD
1272
1273 /* Disable all cpuidle devices */
1274 for_each_online_cpu(cpu) {
1275 _pr = per_cpu(processors, cpu);
1276 if (!_pr || !_pr->flags.power_setup_done)
1277 continue;
3d339dcb
DL
1278 dev = per_cpu(acpi_cpuidle_device, cpu);
1279 cpuidle_disable_device(dev);
46bcfad7
DD
1280 }
1281
1282 /* Populate Updated C-state information */
f427e5f1 1283 acpi_processor_get_power_info(pr);
46bcfad7
DD
1284 acpi_processor_setup_cpuidle_states(pr);
1285
1286 /* Enable all cpuidle devices */
1287 for_each_online_cpu(cpu) {
1288 _pr = per_cpu(processors, cpu);
1289 if (!_pr || !_pr->flags.power_setup_done)
1290 continue;
1291 acpi_processor_get_power_info(_pr);
1292 if (_pr->flags.power) {
3d339dcb 1293 dev = per_cpu(acpi_cpuidle_device, cpu);
a36a7fec 1294 acpi_processor_setup_cpuidle_dev(_pr, dev);
3d339dcb 1295 cpuidle_enable_device(dev);
46bcfad7
DD
1296 }
1297 }
46bcfad7 1298 cpuidle_resume_and_unlock();
6726655d 1299 put_online_cpus();
46bcfad7
DD
1300 }
1301
1302 return 0;
1303}
1304
1305static int acpi_processor_registered;
1306
fe7bf106 1307int acpi_processor_power_init(struct acpi_processor *pr)
1da177e4 1308{
46bcfad7 1309 int retval;
3d339dcb 1310 struct cpuidle_device *dev;
1da177e4 1311
d1896049 1312 if (disabled_by_idle_boot_param())
36a91358 1313 return 0;
1da177e4 1314
35ae7133 1315 acpi_processor_cstate_first_run_checks();
1da177e4 1316
35ae7133
SH
1317 if (!acpi_processor_get_power_info(pr))
1318 pr->flags.power_setup_done = 1;
1da177e4
LT
1319
1320 /*
1321 * Install the idle handler if processor power management is supported.
1322 * Note that we use previously set idle handler will be used on
1323 * platforms that only support C1.
1324 */
36a91358 1325 if (pr->flags.power) {
46bcfad7
DD
1326 /* Register acpi_idle_driver if not already registered */
1327 if (!acpi_processor_registered) {
1328 acpi_processor_setup_cpuidle_states(pr);
1329 retval = cpuidle_register_driver(&acpi_idle_driver);
1330 if (retval)
1331 return retval;
b6ec26fb
SH
1332 pr_debug("%s registered with cpuidle\n",
1333 acpi_idle_driver.name);
46bcfad7 1334 }
3d339dcb
DL
1335
1336 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1337 if (!dev)
1338 return -ENOMEM;
1339 per_cpu(acpi_cpuidle_device, pr->id) = dev;
1340
a36a7fec 1341 acpi_processor_setup_cpuidle_dev(pr, dev);
3d339dcb 1342
46bcfad7
DD
1343 /* Register per-cpu cpuidle_device. Cpuidle driver
1344 * must already be registered before registering device
1345 */
3d339dcb 1346 retval = cpuidle_register_device(dev);
46bcfad7
DD
1347 if (retval) {
1348 if (acpi_processor_registered == 0)
1349 cpuidle_unregister_driver(&acpi_idle_driver);
1350 return retval;
1351 }
1352 acpi_processor_registered++;
1da177e4 1353 }
d550d98d 1354 return 0;
1da177e4
LT
1355}
1356
38a991b6 1357int acpi_processor_power_exit(struct acpi_processor *pr)
1da177e4 1358{
3d339dcb
DL
1359 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id);
1360
d1896049 1361 if (disabled_by_idle_boot_param())
36a91358
VP
1362 return 0;
1363
46bcfad7 1364 if (pr->flags.power) {
3d339dcb 1365 cpuidle_unregister_device(dev);
46bcfad7
DD
1366 acpi_processor_registered--;
1367 if (acpi_processor_registered == 0)
1368 cpuidle_unregister_driver(&acpi_idle_driver);
1369 }
1da177e4 1370
46bcfad7 1371 pr->flags.power_setup_done = 0;
d550d98d 1372 return 0;
1da177e4 1373}